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d="scan'208";a="220267006" Received: from smoticic-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.245.117]) by fmviesa010-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Mar 2026 06:02:00 -0700 Date: Wed, 25 Mar 2026 15:01:58 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Suraj Kandpal Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, sowmiya.s@intel.com, uma.shankar@intel.com, swati2.sharma@intel.com, chaitanya.kumar.borah@intel.com, arun.r.murthy@intel.com Subject: Re: [PATCH v3 26/26] drm/i915/writeback: Modify state verify function Message-ID: References: <20260325110744.1096786-1-suraj.kandpal@intel.com> <20260325110744.1096786-27-suraj.kandpal@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20260325110744.1096786-27-suraj.kandpal@intel.com> X-Patchwork-Hint: comment Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Wed, Mar 25, 2026 at 04:37:44PM +0530, Suraj Kandpal wrote: > Modify the state verify functions to take into account the fact > that writeback does not need all the timings for it to be set. > Moreover there is no need for dpll state nor do we need to set > any sort of flags for it. > > Signed-off-by: Suraj Kandpal > --- > drivers/gpu/drm/i915/display/intel_display.c | 57 ++++++++++++-------- > 1 file changed, 35 insertions(+), 22 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index e47b4e667fec..59b6c61890bc 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -5140,6 +5140,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > struct drm_printer p; > u32 exclude_infoframes = 0; > bool ret = true; > + bool is_writeback = > + intel_crtc_has_type(current_config, INTEL_OUTPUT_WRITEBACK); > > if (fastset) > p = drm_dbg_printer(display->drm, DRM_UT_KMS, NULL); > @@ -5245,20 +5247,25 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > } while (0) > > #define PIPE_CONF_CHECK_TIMINGS(name) do { \ > - PIPE_CONF_CHECK_I(name.crtc_hdisplay); \ > - PIPE_CONF_CHECK_I(name.crtc_htotal); \ > - PIPE_CONF_CHECK_I(name.crtc_hblank_start); \ > - PIPE_CONF_CHECK_I(name.crtc_hblank_end); \ > - PIPE_CONF_CHECK_I(name.crtc_hsync_start); \ > - PIPE_CONF_CHECK_I(name.crtc_hsync_end); \ > - PIPE_CONF_CHECK_I(name.crtc_vdisplay); \ > - if (!fastset || !allow_vblank_delay_fastset(current_config)) \ > - PIPE_CONF_CHECK_I(name.crtc_vblank_start); \ > - PIPE_CONF_CHECK_I(name.crtc_vsync_start); \ > - PIPE_CONF_CHECK_I(name.crtc_vsync_end); \ > - if (!fastset || !pipe_config->update_lrr) { \ > - PIPE_CONF_CHECK_I(name.crtc_vtotal); \ > - PIPE_CONF_CHECK_I(name.crtc_vblank_end); \ > + if (is_writeback) { \ > + PIPE_CONF_CHECK_I(name.crtc_hdisplay); \ > + PIPE_CONF_CHECK_I(name.crtc_vdisplay); \ > + } else { \ > + PIPE_CONF_CHECK_I(name.crtc_hdisplay); \ > + PIPE_CONF_CHECK_I(name.crtc_htotal); \ > + PIPE_CONF_CHECK_I(name.crtc_hblank_start); \ > + PIPE_CONF_CHECK_I(name.crtc_hblank_end); \ > + PIPE_CONF_CHECK_I(name.crtc_hsync_start); \ > + PIPE_CONF_CHECK_I(name.crtc_hsync_end); \ > + PIPE_CONF_CHECK_I(name.crtc_vdisplay); \ > + if (!fastset || !allow_vblank_delay_fastset(current_config)) \ > + PIPE_CONF_CHECK_I(name.crtc_vblank_start); \ > + PIPE_CONF_CHECK_I(name.crtc_vsync_start); \ > + PIPE_CONF_CHECK_I(name.crtc_vsync_end); \ > + if (!fastset || !pipe_config->update_lrr) { \ > + PIPE_CONF_CHECK_I(name.crtc_vtotal); \ > + PIPE_CONF_CHECK_I(name.crtc_vblank_end); \ > + } \ This is ugly. I think a much better option is to make sure the writeback stuff actually does proper compute/readout for all of this. > } \ > } while (0) > > @@ -5387,10 +5394,11 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > > PIPE_CONF_CHECK_I(pixel_multiplier); > > - PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, > - DRM_MODE_FLAG_INTERLACE); > + if (!is_writeback) > + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, > + DRM_MODE_FLAG_INTERLACE); > > - if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) { > + if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS) && !is_writeback) { > PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, > DRM_MODE_FLAG_PHSYNC); > PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, > @@ -5441,6 +5449,8 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > PIPE_CONF_CHECK_BOOL(hw.casf_params.casf_enable); > PIPE_CONF_CHECK_I(hw.casf_params.win_size); > PIPE_CONF_CHECK_I(hw.casf_params.strength); > + if (!is_writeback) > + PIPE_CONF_CHECK_I(pixel_rate); > > PIPE_CONF_CHECK_X(gamma_mode); > if (display->platform.cherryview) > @@ -5463,24 +5473,27 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, > > PIPE_CONF_CHECK_BOOL(double_wide); > > - if (display->dpll.mgr) > + if (display->dpll.mgr && !is_writeback) > PIPE_CONF_CHECK_P(intel_dpll); > > /* FIXME convert everything over the dpll_mgr */ > - if (display->dpll.mgr || HAS_GMCH(display)) > + if ((display->dpll.mgr || HAS_GMCH(display)) && !is_writeback) > PIPE_CONF_CHECK_PLL(dpll_hw_state); > > PIPE_CONF_CHECK_X(dsi_pll.ctrl); > PIPE_CONF_CHECK_X(dsi_pll.div); > > - if (display->platform.g4x || DISPLAY_VER(display) >= 5) > + if ((display->platform.g4x || DISPLAY_VER(display) >= 5) && > + !is_writeback) > PIPE_CONF_CHECK_I(pipe_bpp); > > - if (!fastset || !pipe_config->update_m_n) { > + if ((!fastset || !pipe_config->update_m_n) && !is_writeback) { > PIPE_CONF_CHECK_I(hw.pipe_mode.crtc_clock); > PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_clock); > } > - PIPE_CONF_CHECK_I(port_clock); > + > + if (!is_writeback) > + PIPE_CONF_CHECK_I(port_clock); > > PIPE_CONF_CHECK_I(min_voltage_level); > > -- > 2.34.1 -- Ville Syrjälä Intel