From: Matthew Brost <matthew.brost@intel.com>
To: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Cc: intel-xe@lists.freedesktop.org,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Maarten Lankhorst" <dev@lankhorst.se>,
"Michal Wajdeczko" <michal.wajdeczko@intel.com>
Subject: Re: [PATCH 2/3] drm/xe/mm: Add batch buffer allocation functions for xe_drm_mm manager
Date: Thu, 26 Mar 2026 12:50:36 -0700 [thread overview]
Message-ID: <acWODIA/iepUzYs+@gsse-cloud1.jf.intel.com> (raw)
In-Reply-To: <20260320121231.638189-3-satyanarayana.k.v.p@intel.com>
On Fri, Mar 20, 2026 at 12:12:30PM +0000, Satyanarayana K V P wrote:
> New APIs xe_drm_mm_bb_alloc(), xe_drm_mm_bb_insert() and
> xe_drm_mm_bb_free() are created to manage allocations from the xe_drm_mm
> manager.
>
> Signed-off-by: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Maarten Lankhorst <dev@lankhorst.se>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> ---
> drivers/gpu/drm/xe/xe_bb.c | 67 ++++++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_bb.h | 6 ++++
> 2 files changed, 73 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_bb.c b/drivers/gpu/drm/xe/xe_bb.c
> index b896b6f6615c..c366ec5b269a 100644
> --- a/drivers/gpu/drm/xe/xe_bb.c
> +++ b/drivers/gpu/drm/xe/xe_bb.c
> @@ -8,6 +8,7 @@
> #include "instructions/xe_mi_commands.h"
> #include "xe_assert.h"
> #include "xe_device_types.h"
> +#include "xe_drm_mm.h"
> #include "xe_exec_queue_types.h"
> #include "xe_gt.h"
> #include "xe_sa.h"
> @@ -172,3 +173,69 @@ void xe_bb_free(struct xe_bb *bb, struct dma_fence *fence)
> xe_sa_bo_free(bb->bo, fence);
> kfree(bb);
> }
> +
> +/**
> + * xe_drm_mm_bb_alloc() - Allocate a new batch buffer structure for drm_mm
> + *
> + * Allocates a new xe_drm_mm_bb structure for use with xe_drm_mm memory management.
> + *
> + * Returns: Batch buffer structure or an ERR_PTR(-ENOMEM).
> + */
> +struct xe_drm_mm_bb *xe_drm_mm_bb_alloc(void)
> +{
> + struct xe_drm_mm_bb *bb = kzalloc(sizeof(*bb), GFP_KERNEL);
> +
> + if (!bb)
> + return ERR_PTR(-ENOMEM);
> +
> + return bb;
> +}
> +
> +/**
> + * xe_drm_mm_bb_insert() - Initialize a batch buffer and insert a hole
> + * @bb: Batch buffer structure to initialize
> + * @bb_pool: drm_mm manager to allocate from
> + * @dwords: Number of dwords to be allocated
> + *
> + * Initializes the batch buffer by allocating memory from the specified
> + * drm_mm manager.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int xe_drm_mm_bb_insert(struct xe_drm_mm_bb *bb, struct xe_drm_mm_manager *bb_pool, u32 dwords)
> +{
> + int err;
> +
> + /*
> + * We need to allocate space for the requested number of dwords &
> + * one additional MI_BATCH_BUFFER_END dword. Since the whole SA
> + * is submitted to HW, we need to make sure that the last instruction
> + * is not over written when the last chunk of SA is allocated for BB.
> + * So, this extra DW acts as a guard here.
> + */
> + err = xe_drm_mm_insert_node(bb_pool, &bb->node, 4 * (dwords + 1));
> + if (err)
> + return err;
> +
> + bb->manager = bb_pool;
> + bb->cs = bb_pool->cpu_addr + bb->node.start;
> + bb->len = 0;
> +
> + memset(bb->cs, MI_NOOP, 4 * (dwords + 1));
Again same patch #1, this memset looks unnecessary as default state upon
alloc should be MI_NOOP, right? Then immediately in
xe_migrate_ccs_rw_copy, 'bb->cs' is written with instructions.
Other than this, patch LGTM.
Matt
> +
> + return 0;
> +}
> +
> +/**
> + * xe_drm_mm_bb_free() - Free a batch buffer allocated with drm_mm
> + * @bb: Batch buffer structure to free
> + */
> +void xe_drm_mm_bb_free(struct xe_drm_mm_bb *bb)
> +{
> + if (!bb)
> + return;
> +
> + xe_drm_mm_remove_node(&bb->node);
> + kfree(bb);
> +}
> +
> diff --git a/drivers/gpu/drm/xe/xe_bb.h b/drivers/gpu/drm/xe/xe_bb.h
> index 231870b24c2f..d5417005d09b 100644
> --- a/drivers/gpu/drm/xe/xe_bb.h
> +++ b/drivers/gpu/drm/xe/xe_bb.h
> @@ -11,6 +11,8 @@
> struct dma_fence;
>
> struct xe_gt;
> +struct xe_drm_mm_bb;
> +struct xe_drm_mm_manager;
> struct xe_exec_queue;
> struct xe_sa_manager;
> struct xe_sched_job;
> @@ -24,5 +26,9 @@ struct xe_sched_job *xe_bb_create_migration_job(struct xe_exec_queue *q,
> struct xe_bb *bb, u64 batch_ofs,
> u32 second_idx);
> void xe_bb_free(struct xe_bb *bb, struct dma_fence *fence);
> +struct xe_drm_mm_bb *xe_drm_mm_bb_alloc(void);
> +int xe_drm_mm_bb_insert(struct xe_drm_mm_bb *bb, struct xe_drm_mm_manager
> + *bb_pool, u32 dwords);
> +void xe_drm_mm_bb_free(struct xe_drm_mm_bb *bb);
>
> #endif
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-03-26 19:50 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-20 12:12 [PATCH 0/3] USE drm mm instead of drm SA for CCS read/write Satyanarayana K V P
2026-03-20 12:12 ` [PATCH 1/3] drm/xe/mm: add XE DRM MM manager with shadow support Satyanarayana K V P
2026-03-26 19:48 ` Matthew Brost
2026-03-26 19:57 ` Thomas Hellström
2026-03-27 10:54 ` Michal Wajdeczko
2026-03-27 11:06 ` Thomas Hellström
2026-03-27 19:54 ` Matthew Brost
2026-03-27 21:26 ` Matthew Brost
2026-03-20 12:12 ` [PATCH 2/3] drm/xe/mm: Add batch buffer allocation functions for xe_drm_mm manager Satyanarayana K V P
2026-03-26 19:50 ` Matthew Brost [this message]
2026-03-20 12:12 ` [PATCH 3/3] drm/xe/vf: Use drm mm instead of drm sa for CCS read/write Satyanarayana K V P
2026-03-26 19:52 ` Matthew Brost
2026-03-27 11:07 ` Michal Wajdeczko
2026-03-27 11:17 ` K V P, Satyanarayana
2026-03-27 11:47 ` Michal Wajdeczko
2026-03-27 20:07 ` Matthew Brost
2026-03-20 12:17 ` ✗ CI.checkpatch: warning for USE drm mm instead of drm SA " Patchwork
2026-03-20 12:19 ` ✓ CI.KUnit: success " Patchwork
2026-03-20 13:08 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-21 11:52 ` ✗ Xe.CI.FULL: failure " Patchwork
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