* [PATCH 1/9] drm/i915/casf: s/casf_enable/enable/
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
@ 2026-03-26 22:31 ` Ville Syrjala
2026-03-27 8:41 ` Michał Grzelak
2026-03-26 22:31 ` [PATCH 2/9] drm/i915/casf: Make a proper hw state copy of the sharpness_strength Ville Syrjala
` (12 subsequent siblings)
13 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjala @ 2026-03-26 22:31 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nemesa Garg
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The 'casf_enable' boolean is already inside a casf specific
structure, so drop the extra 'casf_' namespace from the bool.
Cc: Nemesa Garg <nemesa.garg@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_casf.c | 8 ++++----
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 6 +++---
drivers/gpu/drm/i915/display/intel_display_types.h | 2 +-
drivers/gpu/drm/i915/display/skl_scaler.c | 4 ++--
5 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
index b167af31de5b..32e6f7c8acdd 100644
--- a/drivers/gpu/drm/i915/display/intel_casf.c
+++ b/drivers/gpu/drm/i915/display/intel_casf.c
@@ -110,7 +110,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
return 0;
if (crtc_state->uapi.sharpness_strength == 0) {
- crtc_state->hw.casf_params.casf_enable = false;
+ crtc_state->hw.casf_params.enable = false;
crtc_state->hw.casf_params.strength = 0;
return 0;
}
@@ -121,7 +121,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
return -EINVAL;
}
- crtc_state->hw.casf_params.casf_enable = true;
+ crtc_state->hw.casf_params.enable = true;
/*
* HW takes a value in form (1.0 + strength) in 4.4 fixed format.
@@ -155,7 +155,7 @@ void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state)
else
crtc_state->hw.casf_params.strength =
REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp);
- crtc_state->hw.casf_params.casf_enable = true;
+ crtc_state->hw.casf_params.enable = true;
crtc_state->hw.casf_params.win_size =
REG_FIELD_GET(FILTER_SIZE_MASK, sharp);
}
@@ -163,7 +163,7 @@ void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state)
bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state)
{
- if (crtc_state->hw.casf_params.casf_enable)
+ if (crtc_state->hw.casf_params.enable)
return true;
return false;
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 234843b8f83a..a42153a465fe 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -383,7 +383,7 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
drm_printf(&p, "sharpness strength: %d, sharpness tap size: %d, sharpness enable: %d\n",
pipe_config->hw.casf_params.strength,
pipe_config->hw.casf_params.win_size,
- pipe_config->hw.casf_params.casf_enable);
+ pipe_config->hw.casf_params.enable);
dump_planes:
if (!state)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 10b6c6fcb03f..78d97441f682 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -994,7 +994,7 @@ static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
if (!new_crtc_state->hw.active)
return false;
- return is_enabling(hw.casf_params.casf_enable, old_crtc_state, new_crtc_state);
+ return is_enabling(hw.casf_params.enable, old_crtc_state, new_crtc_state);
}
static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
@@ -1003,7 +1003,7 @@ static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
if (!new_crtc_state->hw.active)
return false;
- return is_disabling(hw.casf_params.casf_enable, old_crtc_state, new_crtc_state);
+ return is_disabling(hw.casf_params.enable, old_crtc_state, new_crtc_state);
}
static bool intel_crtc_lobf_enabling(const struct intel_crtc_state *old_crtc_state,
@@ -5371,7 +5371,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_I(scaler_state.scaler_id);
PIPE_CONF_CHECK_I(pixel_rate);
- PIPE_CONF_CHECK_BOOL(hw.casf_params.casf_enable);
+ PIPE_CONF_CHECK_BOOL(hw.casf_params.enable);
PIPE_CONF_CHECK_I(hw.casf_params.win_size);
PIPE_CONF_CHECK_I(hw.casf_params.strength);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e2496db1642a..83bb5d19b6f6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -997,7 +997,7 @@ struct intel_casf {
struct scaler_filter_coeff coeff[SCALER_FILTER_NUM_TAPS];
u8 strength;
u8 win_size;
- bool casf_enable;
+ bool enable;
};
struct intel_crtc_state {
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 7c5cb188ebf0..cfa17ddb4018 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -986,13 +986,13 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
if (HAS_CASF(display) && id == 1)
intel_casf_sharpness_get_config(crtc_state);
- if (!crtc_state->hw.casf_params.casf_enable)
+ if (!crtc_state->hw.casf_params.enable)
crtc_state->pch_pfit.enabled = true;
pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
- if (!crtc_state->hw.casf_params.casf_enable)
+ if (!crtc_state->hw.casf_params.enable)
drm_rect_init(&crtc_state->pch_pfit.dst,
REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
--
2.52.0
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH 2/9] drm/i915/casf: Make a proper hw state copy of the sharpness_strength
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
2026-03-26 22:31 ` [PATCH 1/9] drm/i915/casf: s/casf_enable/enable/ Ville Syrjala
@ 2026-03-26 22:31 ` Ville Syrjala
2026-03-27 8:46 ` Michał Grzelak
2026-03-26 22:31 ` [PATCH 3/9] drm/i915/casf: Move the casf state to better place Ville Syrjala
` (11 subsequent siblings)
13 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjala @ 2026-03-26 22:31 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nemesa Garg
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make a copy of the uapi.sharpness_strength property value in our hw
state. This is how we deal with having proper state for joined pipes.
Cc: Nemesa Garg <nemesa.garg@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_casf.c | 4 ++--
drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 5 +++--
drivers/gpu/drm/i915/display/intel_display.c | 6 ++++++
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 5 +++--
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_modeset_setup.c | 1 +
6 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
index 32e6f7c8acdd..4316d8214e80 100644
--- a/drivers/gpu/drm/i915/display/intel_casf.c
+++ b/drivers/gpu/drm/i915/display/intel_casf.c
@@ -109,7 +109,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
if (!HAS_CASF(display))
return 0;
- if (crtc_state->uapi.sharpness_strength == 0) {
+ if (crtc_state->hw.sharpness_strength == 0) {
crtc_state->hw.casf_params.enable = false;
crtc_state->hw.casf_params.strength = 0;
return 0;
@@ -132,7 +132,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
* Also 85 + 16 = 101.
*/
crtc_state->hw.casf_params.strength =
- min(crtc_state->uapi.sharpness_strength, 0xEF) + 0x10;
+ min(crtc_state->hw.sharpness_strength, 0xEF) + 0x10;
intel_casf_compute_win_size(crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index a42153a465fe..10a9b51337fa 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -328,11 +328,12 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
pipe_config->linetime, pipe_config->ips_linetime);
if (DISPLAY_VER(display) >= 9)
- drm_printf(&p, "num_scalers: %d, scaler_users: 0x%x, scaler_id: %d, scaling_filter: %d\n",
+ drm_printf(&p, "num_scalers: %d, scaler_users: 0x%x, scaler_id: %d, scaling_filter: %d, sharpness_strength: %d\n",
crtc->num_scalers,
pipe_config->scaler_state.scaler_users,
pipe_config->scaler_state.scaler_id,
- pipe_config->hw.scaling_filter);
+ pipe_config->hw.scaling_filter,
+ pipe_config->hw.sharpness_strength);
if (HAS_GMCH(display))
drm_printf(&p, "gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n",
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 78d97441f682..a02c58b5a34d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4550,6 +4550,7 @@ intel_crtc_copy_uapi_to_hw_state_modeset(struct intel_atomic_state *state,
drm_mode_copy(&crtc_state->hw.adjusted_mode,
&crtc_state->uapi.adjusted_mode);
crtc_state->hw.scaling_filter = crtc_state->uapi.scaling_filter;
+ crtc_state->hw.sharpness_strength = crtc_state->uapi.sharpness_strength;
intel_crtc_copy_uapi_to_hw_state_nomodeset(state, crtc);
}
@@ -4615,6 +4616,7 @@ copy_joiner_crtc_state_modeset(struct intel_atomic_state *state,
drm_mode_copy(&secondary_crtc_state->hw.adjusted_mode,
&primary_crtc_state->hw.adjusted_mode);
secondary_crtc_state->hw.scaling_filter = primary_crtc_state->hw.scaling_filter;
+ secondary_crtc_state->hw.sharpness_strength = primary_crtc_state->hw.sharpness_strength;
if (primary_crtc_state->dp_tunnel_ref.tunnel)
drm_dp_tunnel_ref_get(primary_crtc_state->dp_tunnel_ref.tunnel,
@@ -6441,6 +6443,10 @@ int intel_atomic_check(struct drm_device *dev,
if (new_crtc_state->uapi.scaling_filter !=
old_crtc_state->uapi.scaling_filter)
new_crtc_state->uapi.mode_changed = true;
+
+ if (new_crtc_state->uapi.sharpness_strength !=
+ old_crtc_state->uapi.sharpness_strength)
+ new_crtc_state->uapi.mode_changed = true;
}
intel_vrr_check_modeset(state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 2614c4863c87..f244a2b5d139 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -416,11 +416,12 @@ static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
/* Not all platforms have a scaler */
if (num_scalers) {
- seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
+ seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d sharpness_strength=%d",
num_scalers,
crtc_state->scaler_state.scaler_users,
crtc_state->scaler_state.scaler_id,
- crtc_state->hw.scaling_filter);
+ crtc_state->hw.scaling_filter,
+ crtc_state->hw.sharpness_strength);
for (i = 0; i < num_scalers; i++) {
const struct intel_scaler *sc =
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 83bb5d19b6f6..af0d870de342 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1036,6 +1036,7 @@ struct intel_crtc_state {
struct drm_property_blob *degamma_lut, *gamma_lut, *ctm;
struct drm_display_mode mode, pipe_mode, adjusted_mode;
enum drm_scaling_filter scaling_filter;
+ u8 sharpness_strength;
struct intel_casf casf_params;
} hw;
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index 4086f16a12bf..40a65a0d7ec7 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -333,6 +333,7 @@ static void intel_crtc_copy_hw_to_uapi_state(struct intel_crtc_state *crtc_state
crtc_state->uapi.adjusted_mode = crtc_state->hw.adjusted_mode;
crtc_state->uapi.scaling_filter = crtc_state->hw.scaling_filter;
+ crtc_state->uapi.sharpness_strength = crtc_state->hw.sharpness_strength;
if (DISPLAY_INFO(display)->color.degamma_lut_size) {
/* assume 1:1 mapping */
--
2.52.0
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH 3/9] drm/i915/casf: Move the casf state to better place
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
2026-03-26 22:31 ` [PATCH 1/9] drm/i915/casf: s/casf_enable/enable/ Ville Syrjala
2026-03-26 22:31 ` [PATCH 2/9] drm/i915/casf: Make a proper hw state copy of the sharpness_strength Ville Syrjala
@ 2026-03-26 22:31 ` Ville Syrjala
2026-03-27 9:10 ` Michał Grzelak
2026-03-26 22:31 ` [PATCH 4/9] drm/i915/casf: Extract scaler_has_casf() Ville Syrjala
` (10 subsequent siblings)
13 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjala @ 2026-03-26 22:31 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nemesa Garg
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The casf state is placed inside the 'hw' state for some reason.
That is only really meant for things we have to duplicate from
the uapi state. The rest can live on its own in our actual state.
And since casf is just one aspect of the pfit/pipe scaler the
proper place for it seems to be under pch_pfit.
Cc: Nemesa Garg <nemesa.garg@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_casf.c | 40 +++++++++----------
.../drm/i915/display/intel_crtc_state_dump.c | 6 +--
drivers/gpu/drm/i915/display/intel_display.c | 12 +++---
.../drm/i915/display/intel_display_types.h | 2 +-
drivers/gpu/drm/i915/display/skl_scaler.c | 4 +-
5 files changed, 32 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
index 4316d8214e80..5a8ffb40d30d 100644
--- a/drivers/gpu/drm/i915/display/intel_casf.c
+++ b/drivers/gpu/drm/i915/display/intel_casf.c
@@ -82,7 +82,7 @@ void intel_casf_update_strength(struct intel_crtc_state *crtc_state)
int win_size;
intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe), FILTER_STRENGTH_MASK,
- FILTER_STRENGTH(crtc_state->hw.casf_params.strength));
+ FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength));
win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));
@@ -95,11 +95,11 @@ static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
u32 total_pixels = mode->hdisplay * mode->vdisplay;
if (total_pixels <= MAX_PIXELS_FOR_3_TAP_FILTER)
- crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_3X3;
+ crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_3X3;
else if (total_pixels <= MAX_PIXELS_FOR_5_TAP_FILTER)
- crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_5X5;
+ crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_5X5;
else
- crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_7X7;
+ crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_7X7;
}
int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
@@ -110,8 +110,8 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
return 0;
if (crtc_state->hw.sharpness_strength == 0) {
- crtc_state->hw.casf_params.enable = false;
- crtc_state->hw.casf_params.strength = 0;
+ crtc_state->pch_pfit.casf.enable = false;
+ crtc_state->pch_pfit.casf.strength = 0;
return 0;
}
@@ -121,7 +121,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
return -EINVAL;
}
- crtc_state->hw.casf_params.enable = true;
+ crtc_state->pch_pfit.casf.enable = true;
/*
* HW takes a value in form (1.0 + strength) in 4.4 fixed format.
@@ -131,7 +131,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
* 6.3125 in 4.4 format is b01100101 which is equal to 101.
* Also 85 + 16 = 101.
*/
- crtc_state->hw.casf_params.strength =
+ crtc_state->pch_pfit.casf.strength =
min(crtc_state->hw.sharpness_strength, 0xEF) + 0x10;
intel_casf_compute_win_size(crtc_state);
@@ -151,19 +151,19 @@ void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state)
if (sharp & FILTER_EN) {
if (drm_WARN_ON(display->drm,
REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp) < 16))
- crtc_state->hw.casf_params.strength = 0;
+ crtc_state->pch_pfit.casf.strength = 0;
else
- crtc_state->hw.casf_params.strength =
+ crtc_state->pch_pfit.casf.strength =
REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp);
- crtc_state->hw.casf_params.enable = true;
- crtc_state->hw.casf_params.win_size =
+ crtc_state->pch_pfit.casf.enable = true;
+ crtc_state->pch_pfit.casf.win_size =
REG_FIELD_GET(FILTER_SIZE_MASK, sharp);
}
}
bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state)
{
- if (crtc_state->hw.casf_params.enable)
+ if (crtc_state->pch_pfit.casf.enable)
return true;
return false;
@@ -179,7 +179,7 @@ static u32 casf_coeff(struct intel_crtc_state *crtc_state, int t)
struct scaler_filter_coeff value;
u32 coeff;
- value = crtc_state->hw.casf_params.coeff[t];
+ value = crtc_state->pch_pfit.casf.coeff[t];
value.sign = 0;
coeff = value.sign << 15 | value.exp << 12 | value.mantissa << 3;
@@ -189,7 +189,7 @@ static u32 casf_coeff(struct intel_crtc_state *crtc_state, int t)
/*
* 17 phase of 7 taps requires 119 coefficients in 60 dwords per set.
* To enable casf: program scaler coefficients with the coeffients
- * that are calculated and stored in hw.casf_params.coeff as per
+ * that are calculated and stored in pch_pfit.casf.coeff as per
* SCALER_COEFFICIENT_FORMAT
*/
static void intel_casf_write_coeff(struct intel_crtc_state *crtc_state)
@@ -247,9 +247,9 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
u16 sumcoeff = 0;
int i;
- if (crtc_state->hw.casf_params.win_size == 0)
+ if (crtc_state->pch_pfit.casf.win_size == 0)
filtercoeff = filtercoeff_1;
- else if (crtc_state->hw.casf_params.win_size == 1)
+ else if (crtc_state->pch_pfit.casf.win_size == 1)
filtercoeff = filtercoeff_2;
else
filtercoeff = filtercoeff_3;
@@ -259,7 +259,7 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
for (i = 0; i < SCALER_FILTER_NUM_TAPS; i++) {
filter_coeff[i] = (*(filtercoeff + i) * 100 / sumcoeff);
- convert_sharpness_coef_binary(&crtc_state->hw.casf_params.coeff[i],
+ convert_sharpness_coef_binary(&crtc_state->pch_pfit.casf.coeff[i],
filter_coeff[i]);
}
}
@@ -274,9 +274,9 @@ void intel_casf_enable(struct intel_crtc_state *crtc_state)
intel_casf_write_coeff(crtc_state);
- sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state->hw.casf_params.strength);
+ sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength);
- sharpness_ctl |= crtc_state->hw.casf_params.win_size;
+ sharpness_ctl |= crtc_state->pch_pfit.casf.win_size;
intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 10a9b51337fa..95993f8e5d0d 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -382,9 +382,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
intel_vdsc_state_dump(&p, 0, pipe_config);
drm_printf(&p, "sharpness strength: %d, sharpness tap size: %d, sharpness enable: %d\n",
- pipe_config->hw.casf_params.strength,
- pipe_config->hw.casf_params.win_size,
- pipe_config->hw.casf_params.enable);
+ pipe_config->pch_pfit.casf.strength,
+ pipe_config->pch_pfit.casf.win_size,
+ pipe_config->pch_pfit.casf.enable);
dump_planes:
if (!state)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a02c58b5a34d..e02e69467871 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -994,7 +994,7 @@ static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
if (!new_crtc_state->hw.active)
return false;
- return is_enabling(hw.casf_params.enable, old_crtc_state, new_crtc_state);
+ return is_enabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
}
static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
@@ -1003,7 +1003,7 @@ static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
if (!new_crtc_state->hw.active)
return false;
- return is_disabling(hw.casf_params.enable, old_crtc_state, new_crtc_state);
+ return is_disabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
}
static bool intel_crtc_lobf_enabling(const struct intel_crtc_state *old_crtc_state,
@@ -5370,12 +5370,12 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
PIPE_CONF_CHECK_RECT(pch_pfit.dst);
+ PIPE_CONF_CHECK_BOOL(pch_pfit.casf.enable);
+ PIPE_CONF_CHECK_I(pch_pfit.casf.win_size);
+ PIPE_CONF_CHECK_I(pch_pfit.casf.strength);
PIPE_CONF_CHECK_I(scaler_state.scaler_id);
PIPE_CONF_CHECK_I(pixel_rate);
- PIPE_CONF_CHECK_BOOL(hw.casf_params.enable);
- PIPE_CONF_CHECK_I(hw.casf_params.win_size);
- PIPE_CONF_CHECK_I(hw.casf_params.strength);
PIPE_CONF_CHECK_X(gamma_mode);
if (display->platform.cherryview)
@@ -6819,7 +6819,7 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
if (intel_casf_enabling(new_crtc_state, old_crtc_state))
intel_casf_enable(new_crtc_state);
- else if (new_crtc_state->hw.casf_params.strength != old_crtc_state->hw.casf_params.strength)
+ else if (new_crtc_state->pch_pfit.casf.strength != old_crtc_state->pch_pfit.casf.strength)
intel_casf_update_strength(new_crtc_state);
intel_fbc_update(state, crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index af0d870de342..ca2581fb7bbd 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1037,7 +1037,6 @@ struct intel_crtc_state {
struct drm_display_mode mode, pipe_mode, adjusted_mode;
enum drm_scaling_filter scaling_filter;
u8 sharpness_strength;
- struct intel_casf casf_params;
} hw;
/* actual state of LUTs */
@@ -1224,6 +1223,7 @@ struct intel_crtc_state {
/* Panel fitter placement and size for Ironlake+ */
struct {
+ struct intel_casf casf;
struct drm_rect dst;
bool enabled;
bool force_thru;
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index cfa17ddb4018..e9fe5c0bf6ff 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -986,13 +986,13 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
if (HAS_CASF(display) && id == 1)
intel_casf_sharpness_get_config(crtc_state);
- if (!crtc_state->hw.casf_params.enable)
+ if (!crtc_state->pch_pfit.casf.enable)
crtc_state->pch_pfit.enabled = true;
pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
- if (!crtc_state->hw.casf_params.enable)
+ if (!crtc_state->pch_pfit.casf.enable)
drm_rect_init(&crtc_state->pch_pfit.dst,
REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
--
2.52.0
^ permalink raw reply related [flat|nested] 39+ messages in thread* Re: [PATCH 3/9] drm/i915/casf: Move the casf state to better place
2026-03-26 22:31 ` [PATCH 3/9] drm/i915/casf: Move the casf state to better place Ville Syrjala
@ 2026-03-27 9:10 ` Michał Grzelak
2026-03-27 10:30 ` Ville Syrjälä
0 siblings, 1 reply; 39+ messages in thread
From: Michał Grzelak @ 2026-03-27 9:10 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx, intel-xe, Nemesa Garg
[-- Attachment #1: Type: text/plain, Size: 11347 bytes --]
On Thu, 26 Mar 2026, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The casf state is placed inside the 'hw' state for some reason.
> That is only really meant for things we have to duplicate from
> the uapi state. The rest can live on its own in our actual state.
>
> And since casf is just one aspect of the pfit/pipe scaler the
> proper place for it seems to be under pch_pfit.
>
> Cc: Nemesa Garg <nemesa.garg@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_casf.c | 40 +++++++++----------
> .../drm/i915/display/intel_crtc_state_dump.c | 6 +--
> drivers/gpu/drm/i915/display/intel_display.c | 12 +++---
> .../drm/i915/display/intel_display_types.h | 2 +-
> drivers/gpu/drm/i915/display/skl_scaler.c | 4 +-
> 5 files changed, 32 insertions(+), 32 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
> index 4316d8214e80..5a8ffb40d30d 100644
> --- a/drivers/gpu/drm/i915/display/intel_casf.c
> +++ b/drivers/gpu/drm/i915/display/intel_casf.c
> @@ -82,7 +82,7 @@ void intel_casf_update_strength(struct intel_crtc_state *crtc_state)
> int win_size;
>
> intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe), FILTER_STRENGTH_MASK,
> - FILTER_STRENGTH(crtc_state->hw.casf_params.strength));
> + FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength));
>
> win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));
>
> @@ -95,11 +95,11 @@ static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
> u32 total_pixels = mode->hdisplay * mode->vdisplay;
>
> if (total_pixels <= MAX_PIXELS_FOR_3_TAP_FILTER)
> - crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_3X3;
> + crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_3X3;
> else if (total_pixels <= MAX_PIXELS_FOR_5_TAP_FILTER)
> - crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_5X5;
> + crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_5X5;
> else
> - crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_7X7;
> + crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_7X7;
> }
>
> int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
> @@ -110,8 +110,8 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
> return 0;
>
> if (crtc_state->hw.sharpness_strength == 0) {
> - crtc_state->hw.casf_params.enable = false;
> - crtc_state->hw.casf_params.strength = 0;
> + crtc_state->pch_pfit.casf.enable = false;
> + crtc_state->pch_pfit.casf.strength = 0;
> return 0;
> }
>
> @@ -121,7 +121,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
> return -EINVAL;
> }
>
> - crtc_state->hw.casf_params.enable = true;
> + crtc_state->pch_pfit.casf.enable = true;
>
> /*
> * HW takes a value in form (1.0 + strength) in 4.4 fixed format.
> @@ -131,7 +131,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
> * 6.3125 in 4.4 format is b01100101 which is equal to 101.
> * Also 85 + 16 = 101.
> */
> - crtc_state->hw.casf_params.strength =
> + crtc_state->pch_pfit.casf.strength =
> min(crtc_state->hw.sharpness_strength, 0xEF) + 0x10;
>
> intel_casf_compute_win_size(crtc_state);
> @@ -151,19 +151,19 @@ void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state)
> if (sharp & FILTER_EN) {
> if (drm_WARN_ON(display->drm,
> REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp) < 16))
> - crtc_state->hw.casf_params.strength = 0;
> + crtc_state->pch_pfit.casf.strength = 0;
> else
> - crtc_state->hw.casf_params.strength =
> + crtc_state->pch_pfit.casf.strength =
> REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp);
> - crtc_state->hw.casf_params.enable = true;
> - crtc_state->hw.casf_params.win_size =
> + crtc_state->pch_pfit.casf.enable = true;
> + crtc_state->pch_pfit.casf.win_size =
> REG_FIELD_GET(FILTER_SIZE_MASK, sharp);
> }
> }
>
> bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state)
> {
> - if (crtc_state->hw.casf_params.enable)
> + if (crtc_state->pch_pfit.casf.enable)
> return true;
>
> return false;
> @@ -179,7 +179,7 @@ static u32 casf_coeff(struct intel_crtc_state *crtc_state, int t)
> struct scaler_filter_coeff value;
> u32 coeff;
>
> - value = crtc_state->hw.casf_params.coeff[t];
> + value = crtc_state->pch_pfit.casf.coeff[t];
Unrelated topic: how you see such renaming?:
int t -> int tap
> value.sign = 0;
>
> coeff = value.sign << 15 | value.exp << 12 | value.mantissa << 3;
> @@ -189,7 +189,7 @@ static u32 casf_coeff(struct intel_crtc_state *crtc_state, int t)
> /*
> * 17 phase of 7 taps requires 119 coefficients in 60 dwords per set.
> * To enable casf: program scaler coefficients with the coeffients
> - * that are calculated and stored in hw.casf_params.coeff as per
> + * that are calculated and stored in pch_pfit.casf.coeff as per
> * SCALER_COEFFICIENT_FORMAT
> */
> static void intel_casf_write_coeff(struct intel_crtc_state *crtc_state)
> @@ -247,9 +247,9 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
> u16 sumcoeff = 0;
Unrelated to the change: some variables have been named as sumcoeff and
others as filter_*coeff{_1,_2,_3}*. How you see renaming:
u16 sumcoeff -> u16 sum_coeff
But I might be again missing common codestyle.
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
BR,
Michał
> int i;
>
> - if (crtc_state->hw.casf_params.win_size == 0)
> + if (crtc_state->pch_pfit.casf.win_size == 0)
> filtercoeff = filtercoeff_1;
> - else if (crtc_state->hw.casf_params.win_size == 1)
> + else if (crtc_state->pch_pfit.casf.win_size == 1)
> filtercoeff = filtercoeff_2;
> else
> filtercoeff = filtercoeff_3;
> @@ -259,7 +259,7 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
>
> for (i = 0; i < SCALER_FILTER_NUM_TAPS; i++) {
> filter_coeff[i] = (*(filtercoeff + i) * 100 / sumcoeff);
> - convert_sharpness_coef_binary(&crtc_state->hw.casf_params.coeff[i],
> + convert_sharpness_coef_binary(&crtc_state->pch_pfit.casf.coeff[i],
> filter_coeff[i]);
> }
> }
> @@ -274,9 +274,9 @@ void intel_casf_enable(struct intel_crtc_state *crtc_state)
>
> intel_casf_write_coeff(crtc_state);
>
> - sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state->hw.casf_params.strength);
> + sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength);
>
> - sharpness_ctl |= crtc_state->hw.casf_params.win_size;
> + sharpness_ctl |= crtc_state->pch_pfit.casf.win_size;
>
> intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> index 10a9b51337fa..95993f8e5d0d 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> @@ -382,9 +382,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
> intel_vdsc_state_dump(&p, 0, pipe_config);
>
> drm_printf(&p, "sharpness strength: %d, sharpness tap size: %d, sharpness enable: %d\n",
> - pipe_config->hw.casf_params.strength,
> - pipe_config->hw.casf_params.win_size,
> - pipe_config->hw.casf_params.enable);
> + pipe_config->pch_pfit.casf.strength,
> + pipe_config->pch_pfit.casf.win_size,
> + pipe_config->pch_pfit.casf.enable);
>
> dump_planes:
> if (!state)
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index a02c58b5a34d..e02e69467871 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -994,7 +994,7 @@ static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
> if (!new_crtc_state->hw.active)
> return false;
>
> - return is_enabling(hw.casf_params.enable, old_crtc_state, new_crtc_state);
> + return is_enabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
> }
>
> static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
> @@ -1003,7 +1003,7 @@ static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
> if (!new_crtc_state->hw.active)
> return false;
>
> - return is_disabling(hw.casf_params.enable, old_crtc_state, new_crtc_state);
> + return is_disabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
> }
>
> static bool intel_crtc_lobf_enabling(const struct intel_crtc_state *old_crtc_state,
> @@ -5370,12 +5370,12 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>
> PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
> PIPE_CONF_CHECK_RECT(pch_pfit.dst);
> + PIPE_CONF_CHECK_BOOL(pch_pfit.casf.enable);
> + PIPE_CONF_CHECK_I(pch_pfit.casf.win_size);
> + PIPE_CONF_CHECK_I(pch_pfit.casf.strength);
>
> PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> PIPE_CONF_CHECK_I(pixel_rate);
> - PIPE_CONF_CHECK_BOOL(hw.casf_params.enable);
> - PIPE_CONF_CHECK_I(hw.casf_params.win_size);
> - PIPE_CONF_CHECK_I(hw.casf_params.strength);
>
> PIPE_CONF_CHECK_X(gamma_mode);
> if (display->platform.cherryview)
> @@ -6819,7 +6819,7 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
>
> if (intel_casf_enabling(new_crtc_state, old_crtc_state))
> intel_casf_enable(new_crtc_state);
> - else if (new_crtc_state->hw.casf_params.strength != old_crtc_state->hw.casf_params.strength)
> + else if (new_crtc_state->pch_pfit.casf.strength != old_crtc_state->pch_pfit.casf.strength)
> intel_casf_update_strength(new_crtc_state);
>
> intel_fbc_update(state, crtc);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index af0d870de342..ca2581fb7bbd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1037,7 +1037,6 @@ struct intel_crtc_state {
> struct drm_display_mode mode, pipe_mode, adjusted_mode;
> enum drm_scaling_filter scaling_filter;
> u8 sharpness_strength;
> - struct intel_casf casf_params;
> } hw;
>
> /* actual state of LUTs */
> @@ -1224,6 +1223,7 @@ struct intel_crtc_state {
>
> /* Panel fitter placement and size for Ironlake+ */
> struct {
> + struct intel_casf casf;
> struct drm_rect dst;
> bool enabled;
> bool force_thru;
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index cfa17ddb4018..e9fe5c0bf6ff 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -986,13 +986,13 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
> if (HAS_CASF(display) && id == 1)
> intel_casf_sharpness_get_config(crtc_state);
>
> - if (!crtc_state->hw.casf_params.enable)
> + if (!crtc_state->pch_pfit.casf.enable)
> crtc_state->pch_pfit.enabled = true;
>
> pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
> size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
>
> - if (!crtc_state->hw.casf_params.enable)
> + if (!crtc_state->pch_pfit.casf.enable)
> drm_rect_init(&crtc_state->pch_pfit.dst,
> REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
> REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
> --
> 2.52.0
>
>
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH 3/9] drm/i915/casf: Move the casf state to better place
2026-03-27 9:10 ` Michał Grzelak
@ 2026-03-27 10:30 ` Ville Syrjälä
2026-03-28 15:34 ` Michał Grzelak
0 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjälä @ 2026-03-27 10:30 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-gfx, intel-xe, Nemesa Garg
On Fri, Mar 27, 2026 at 10:10:26AM +0100, Michał Grzelak wrote:
> On Thu, 26 Mar 2026, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The casf state is placed inside the 'hw' state for some reason.
> > That is only really meant for things we have to duplicate from
> > the uapi state. The rest can live on its own in our actual state.
> >
> > And since casf is just one aspect of the pfit/pipe scaler the
> > proper place for it seems to be under pch_pfit.
> >
> > Cc: Nemesa Garg <nemesa.garg@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_casf.c | 40 +++++++++----------
> > .../drm/i915/display/intel_crtc_state_dump.c | 6 +--
> > drivers/gpu/drm/i915/display/intel_display.c | 12 +++---
> > .../drm/i915/display/intel_display_types.h | 2 +-
> > drivers/gpu/drm/i915/display/skl_scaler.c | 4 +-
> > 5 files changed, 32 insertions(+), 32 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
> > index 4316d8214e80..5a8ffb40d30d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_casf.c
> > +++ b/drivers/gpu/drm/i915/display/intel_casf.c
> > @@ -82,7 +82,7 @@ void intel_casf_update_strength(struct intel_crtc_state *crtc_state)
> > int win_size;
> >
> > intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe), FILTER_STRENGTH_MASK,
> > - FILTER_STRENGTH(crtc_state->hw.casf_params.strength));
> > + FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength));
> >
> > win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));
> >
> > @@ -95,11 +95,11 @@ static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
> > u32 total_pixels = mode->hdisplay * mode->vdisplay;
> >
> > if (total_pixels <= MAX_PIXELS_FOR_3_TAP_FILTER)
> > - crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_3X3;
> > + crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_3X3;
> > else if (total_pixels <= MAX_PIXELS_FOR_5_TAP_FILTER)
> > - crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_5X5;
> > + crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_5X5;
> > else
> > - crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_7X7;
> > + crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_7X7;
> > }
> >
> > int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
> > @@ -110,8 +110,8 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
> > return 0;
> >
> > if (crtc_state->hw.sharpness_strength == 0) {
> > - crtc_state->hw.casf_params.enable = false;
> > - crtc_state->hw.casf_params.strength = 0;
> > + crtc_state->pch_pfit.casf.enable = false;
> > + crtc_state->pch_pfit.casf.strength = 0;
> > return 0;
> > }
> >
> > @@ -121,7 +121,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
> > return -EINVAL;
> > }
> >
> > - crtc_state->hw.casf_params.enable = true;
> > + crtc_state->pch_pfit.casf.enable = true;
> >
> > /*
> > * HW takes a value in form (1.0 + strength) in 4.4 fixed format.
> > @@ -131,7 +131,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
> > * 6.3125 in 4.4 format is b01100101 which is equal to 101.
> > * Also 85 + 16 = 101.
> > */
> > - crtc_state->hw.casf_params.strength =
> > + crtc_state->pch_pfit.casf.strength =
> > min(crtc_state->hw.sharpness_strength, 0xEF) + 0x10;
> >
> > intel_casf_compute_win_size(crtc_state);
> > @@ -151,19 +151,19 @@ void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state)
> > if (sharp & FILTER_EN) {
> > if (drm_WARN_ON(display->drm,
> > REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp) < 16))
> > - crtc_state->hw.casf_params.strength = 0;
> > + crtc_state->pch_pfit.casf.strength = 0;
> > else
> > - crtc_state->hw.casf_params.strength =
> > + crtc_state->pch_pfit.casf.strength =
> > REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp);
> > - crtc_state->hw.casf_params.enable = true;
> > - crtc_state->hw.casf_params.win_size =
> > + crtc_state->pch_pfit.casf.enable = true;
> > + crtc_state->pch_pfit.casf.win_size =
> > REG_FIELD_GET(FILTER_SIZE_MASK, sharp);
> > }
> > }
> >
> > bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state)
> > {
> > - if (crtc_state->hw.casf_params.enable)
> > + if (crtc_state->pch_pfit.casf.enable)
> > return true;
> >
> > return false;
> > @@ -179,7 +179,7 @@ static u32 casf_coeff(struct intel_crtc_state *crtc_state, int t)
> > struct scaler_filter_coeff value;
> > u32 coeff;
> >
> > - value = crtc_state->hw.casf_params.coeff[t];
> > + value = crtc_state->pch_pfit.casf.coeff[t];
>
> Unrelated topic: how you see such renaming?:
>
> int t -> int tap
Probably a good idea. One character variable names aren't what
you'd call descriptive. This probably got copied from the
nearest neighbor filter code, so a rename should happen there too.
Or even better if someone gets rid of the duplicated code entirely
and consolidates all the filter coefficient code to one place.
>
> > value.sign = 0;
> >
> > coeff = value.sign << 15 | value.exp << 12 | value.mantissa << 3;
> > @@ -189,7 +189,7 @@ static u32 casf_coeff(struct intel_crtc_state *crtc_state, int t)
> > /*
> > * 17 phase of 7 taps requires 119 coefficients in 60 dwords per set.
> > * To enable casf: program scaler coefficients with the coeffients
> > - * that are calculated and stored in hw.casf_params.coeff as per
> > + * that are calculated and stored in pch_pfit.casf.coeff as per
> > * SCALER_COEFFICIENT_FORMAT
> > */
> > static void intel_casf_write_coeff(struct intel_crtc_state *crtc_state)
> > @@ -247,9 +247,9 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
> > u16 sumcoeff = 0;
>
> Unrelated to the change: some variables have been named as sumcoeff and
> others as filter_*coeff{_1,_2,_3}*. How you see renaming:
>
> u16 sumcoeff -> u16 sum_coeff
>
> But I might be again missing common codestyle.
We generally use the underscore_style for things. So I wouldn't
mind the rename.
>
> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
Ta.
>
> BR,
> Michał
>
> > int i;
> >
> > - if (crtc_state->hw.casf_params.win_size == 0)
> > + if (crtc_state->pch_pfit.casf.win_size == 0)
> > filtercoeff = filtercoeff_1;
> > - else if (crtc_state->hw.casf_params.win_size == 1)
> > + else if (crtc_state->pch_pfit.casf.win_size == 1)
> > filtercoeff = filtercoeff_2;
> > else
> > filtercoeff = filtercoeff_3;
> > @@ -259,7 +259,7 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
> >
> > for (i = 0; i < SCALER_FILTER_NUM_TAPS; i++) {
> > filter_coeff[i] = (*(filtercoeff + i) * 100 / sumcoeff);
> > - convert_sharpness_coef_binary(&crtc_state->hw.casf_params.coeff[i],
> > + convert_sharpness_coef_binary(&crtc_state->pch_pfit.casf.coeff[i],
> > filter_coeff[i]);
> > }
> > }
> > @@ -274,9 +274,9 @@ void intel_casf_enable(struct intel_crtc_state *crtc_state)
> >
> > intel_casf_write_coeff(crtc_state);
> >
> > - sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state->hw.casf_params.strength);
> > + sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength);
> >
> > - sharpness_ctl |= crtc_state->hw.casf_params.win_size;
> > + sharpness_ctl |= crtc_state->pch_pfit.casf.win_size;
> >
> > intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > index 10a9b51337fa..95993f8e5d0d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
> > @@ -382,9 +382,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
> > intel_vdsc_state_dump(&p, 0, pipe_config);
> >
> > drm_printf(&p, "sharpness strength: %d, sharpness tap size: %d, sharpness enable: %d\n",
> > - pipe_config->hw.casf_params.strength,
> > - pipe_config->hw.casf_params.win_size,
> > - pipe_config->hw.casf_params.enable);
> > + pipe_config->pch_pfit.casf.strength,
> > + pipe_config->pch_pfit.casf.win_size,
> > + pipe_config->pch_pfit.casf.enable);
> >
> > dump_planes:
> > if (!state)
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index a02c58b5a34d..e02e69467871 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -994,7 +994,7 @@ static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
> > if (!new_crtc_state->hw.active)
> > return false;
> >
> > - return is_enabling(hw.casf_params.enable, old_crtc_state, new_crtc_state);
> > + return is_enabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
> > }
> >
> > static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
> > @@ -1003,7 +1003,7 @@ static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
> > if (!new_crtc_state->hw.active)
> > return false;
> >
> > - return is_disabling(hw.casf_params.enable, old_crtc_state, new_crtc_state);
> > + return is_disabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
> > }
> >
> > static bool intel_crtc_lobf_enabling(const struct intel_crtc_state *old_crtc_state,
> > @@ -5370,12 +5370,12 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> >
> > PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
> > PIPE_CONF_CHECK_RECT(pch_pfit.dst);
> > + PIPE_CONF_CHECK_BOOL(pch_pfit.casf.enable);
> > + PIPE_CONF_CHECK_I(pch_pfit.casf.win_size);
> > + PIPE_CONF_CHECK_I(pch_pfit.casf.strength);
> >
> > PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> > PIPE_CONF_CHECK_I(pixel_rate);
> > - PIPE_CONF_CHECK_BOOL(hw.casf_params.enable);
> > - PIPE_CONF_CHECK_I(hw.casf_params.win_size);
> > - PIPE_CONF_CHECK_I(hw.casf_params.strength);
> >
> > PIPE_CONF_CHECK_X(gamma_mode);
> > if (display->platform.cherryview)
> > @@ -6819,7 +6819,7 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
> >
> > if (intel_casf_enabling(new_crtc_state, old_crtc_state))
> > intel_casf_enable(new_crtc_state);
> > - else if (new_crtc_state->hw.casf_params.strength != old_crtc_state->hw.casf_params.strength)
> > + else if (new_crtc_state->pch_pfit.casf.strength != old_crtc_state->pch_pfit.casf.strength)
> > intel_casf_update_strength(new_crtc_state);
> >
> > intel_fbc_update(state, crtc);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index af0d870de342..ca2581fb7bbd 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1037,7 +1037,6 @@ struct intel_crtc_state {
> > struct drm_display_mode mode, pipe_mode, adjusted_mode;
> > enum drm_scaling_filter scaling_filter;
> > u8 sharpness_strength;
> > - struct intel_casf casf_params;
> > } hw;
> >
> > /* actual state of LUTs */
> > @@ -1224,6 +1223,7 @@ struct intel_crtc_state {
> >
> > /* Panel fitter placement and size for Ironlake+ */
> > struct {
> > + struct intel_casf casf;
> > struct drm_rect dst;
> > bool enabled;
> > bool force_thru;
> > diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> > index cfa17ddb4018..e9fe5c0bf6ff 100644
> > --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> > +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> > @@ -986,13 +986,13 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
> > if (HAS_CASF(display) && id == 1)
> > intel_casf_sharpness_get_config(crtc_state);
> >
> > - if (!crtc_state->hw.casf_params.enable)
> > + if (!crtc_state->pch_pfit.casf.enable)
> > crtc_state->pch_pfit.enabled = true;
> >
> > pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
> > size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
> >
> > - if (!crtc_state->hw.casf_params.enable)
> > + if (!crtc_state->pch_pfit.casf.enable)
> > drm_rect_init(&crtc_state->pch_pfit.dst,
> > REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
> > REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
> > --
> > 2.52.0
> >
> >
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH 3/9] drm/i915/casf: Move the casf state to better place
2026-03-27 10:30 ` Ville Syrjälä
@ 2026-03-28 15:34 ` Michał Grzelak
2026-04-01 10:02 ` Michał Grzelak
0 siblings, 1 reply; 39+ messages in thread
From: Michał Grzelak @ 2026-03-28 15:34 UTC (permalink / raw)
To: Ville Syrjälä
Cc: Michał Grzelak, intel-gfx, intel-xe, Nemesa Garg
[-- Attachment #1: Type: text/plain, Size: 12987 bytes --]
On Fri, 27 Mar 2026, Ville Syrjälä wrote:
> On Fri, Mar 27, 2026 at 10:10:26AM +0100, Michał Grzelak wrote:
>> On Thu, 26 Mar 2026, Ville Syrjala wrote:
>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>
>>> The casf state is placed inside the 'hw' state for some reason.
>>> That is only really meant for things we have to duplicate from
>>> the uapi state. The rest can live on its own in our actual state.
>>>
>>> And since casf is just one aspect of the pfit/pipe scaler the
>>> proper place for it seems to be under pch_pfit.
>>>
>>> Cc: Nemesa Garg <nemesa.garg@intel.com>
>>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_casf.c | 40 +++++++++----------
>>> .../drm/i915/display/intel_crtc_state_dump.c | 6 +--
>>> drivers/gpu/drm/i915/display/intel_display.c | 12 +++---
>>> .../drm/i915/display/intel_display_types.h | 2 +-
>>> drivers/gpu/drm/i915/display/skl_scaler.c | 4 +-
>>> 5 files changed, 32 insertions(+), 32 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
>>> index 4316d8214e80..5a8ffb40d30d 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_casf.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_casf.c
>>> @@ -82,7 +82,7 @@ void intel_casf_update_strength(struct intel_crtc_state *crtc_state)
>>> int win_size;
>>>
>>> intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe), FILTER_STRENGTH_MASK,
>>> - FILTER_STRENGTH(crtc_state->hw.casf_params.strength));
>>> + FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength));
>>>
>>> win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));
>>>
>>> @@ -95,11 +95,11 @@ static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
>>> u32 total_pixels = mode->hdisplay * mode->vdisplay;
>>>
>>> if (total_pixels <= MAX_PIXELS_FOR_3_TAP_FILTER)
>>> - crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_3X3;
>>> + crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_3X3;
>>> else if (total_pixels <= MAX_PIXELS_FOR_5_TAP_FILTER)
>>> - crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_5X5;
>>> + crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_5X5;
>>> else
>>> - crtc_state->hw.casf_params.win_size = SHARPNESS_FILTER_SIZE_7X7;
>>> + crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_7X7;
>>> }
>>>
>>> int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
>>> @@ -110,8 +110,8 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
>>> return 0;
>>>
>>> if (crtc_state->hw.sharpness_strength == 0) {
>>> - crtc_state->hw.casf_params.enable = false;
>>> - crtc_state->hw.casf_params.strength = 0;
>>> + crtc_state->pch_pfit.casf.enable = false;
>>> + crtc_state->pch_pfit.casf.strength = 0;
>>> return 0;
>>> }
>>>
>>> @@ -121,7 +121,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
>>> return -EINVAL;
>>> }
>>>
>>> - crtc_state->hw.casf_params.enable = true;
>>> + crtc_state->pch_pfit.casf.enable = true;
>>>
>>> /*
>>> * HW takes a value in form (1.0 + strength) in 4.4 fixed format.
>>> @@ -131,7 +131,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
>>> * 6.3125 in 4.4 format is b01100101 which is equal to 101.
>>> * Also 85 + 16 = 101.
>>> */
>>> - crtc_state->hw.casf_params.strength =
>>> + crtc_state->pch_pfit.casf.strength =
>>> min(crtc_state->hw.sharpness_strength, 0xEF) + 0x10;
>>>
>>> intel_casf_compute_win_size(crtc_state);
>>> @@ -151,19 +151,19 @@ void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state)
>>> if (sharp & FILTER_EN) {
>>> if (drm_WARN_ON(display->drm,
>>> REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp) < 16))
>>> - crtc_state->hw.casf_params.strength = 0;
>>> + crtc_state->pch_pfit.casf.strength = 0;
>>> else
>>> - crtc_state->hw.casf_params.strength =
>>> + crtc_state->pch_pfit.casf.strength =
>>> REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp);
>>> - crtc_state->hw.casf_params.enable = true;
>>> - crtc_state->hw.casf_params.win_size =
>>> + crtc_state->pch_pfit.casf.enable = true;
>>> + crtc_state->pch_pfit.casf.win_size =
>>> REG_FIELD_GET(FILTER_SIZE_MASK, sharp);
>>> }
>>> }
>>>
>>> bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state)
>>> {
>>> - if (crtc_state->hw.casf_params.enable)
>>> + if (crtc_state->pch_pfit.casf.enable)
>>> return true;
>>>
>>> return false;
>>> @@ -179,7 +179,7 @@ static u32 casf_coeff(struct intel_crtc_state *crtc_state, int t)
>>> struct scaler_filter_coeff value;
>>> u32 coeff;
>>>
>>> - value = crtc_state->hw.casf_params.coeff[t];
>>> + value = crtc_state->pch_pfit.casf.coeff[t];
>>
>> Unrelated topic: how you see such renaming?:
>>
>> int t -> int tap
>
> Probably a good idea. One character variable names aren't what
> you'd call descriptive. This probably got copied from the
> nearest neighbor filter code, so a rename should happen there too.
>
> Or even better if someone gets rid of the duplicated code entirely
> and consolidates all the filter coefficient code to one place.
I'd give it a shot but I genuinely don't know where to search for
nearest neighbor filter. I searched for possible declarations of int t,
but it didn't show anything relevant. Can you point to where should I
start looking?
>
>>
>>> value.sign = 0;
>>>
>>> coeff = value.sign << 15 | value.exp << 12 | value.mantissa << 3;
>>> @@ -189,7 +189,7 @@ static u32 casf_coeff(struct intel_crtc_state *crtc_state, int t)
>>> /*
>>> * 17 phase of 7 taps requires 119 coefficients in 60 dwords per set.
>>> * To enable casf: program scaler coefficients with the coeffients
>>> - * that are calculated and stored in hw.casf_params.coeff as per
>>> + * that are calculated and stored in pch_pfit.casf.coeff as per
>>> * SCALER_COEFFICIENT_FORMAT
>>> */
>>> static void intel_casf_write_coeff(struct intel_crtc_state *crtc_state)
>>> @@ -247,9 +247,9 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
>>> u16 sumcoeff = 0;
>>
>> Unrelated to the change: some variables have been named as sumcoeff and
>> others as filter_*coeff{_1,_2,_3}*. How you see renaming:
>>
>> u16 sumcoeff -> u16 sum_coeff
>>
>> But I might be again missing common codestyle.
>
> We generally use the underscore_style for things. So I wouldn't
> mind the rename.
In that case I should probably rename filtercoeff as well. But since
filter_coeff is already used and global, I guess it would require more
vigilance then the simple rename above. Do you have any hints on how to
handle it without breaking everything?
BR,
Michał
>
>>
>> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
>
> Ta.
>
>>
>> BR,
>> Michał
>>
>>> int i;
>>>
>>> - if (crtc_state->hw.casf_params.win_size == 0)
>>> + if (crtc_state->pch_pfit.casf.win_size == 0)
>>> filtercoeff = filtercoeff_1;
>>> - else if (crtc_state->hw.casf_params.win_size == 1)
>>> + else if (crtc_state->pch_pfit.casf.win_size == 1)
>>> filtercoeff = filtercoeff_2;
>>> else
>>> filtercoeff = filtercoeff_3;
>>> @@ -259,7 +259,7 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
>>>
>>> for (i = 0; i < SCALER_FILTER_NUM_TAPS; i++) {
>>> filter_coeff[i] = (*(filtercoeff + i) * 100 / sumcoeff);
>>> - convert_sharpness_coef_binary(&crtc_state->hw.casf_params.coeff[i],
>>> + convert_sharpness_coef_binary(&crtc_state->pch_pfit.casf.coeff[i],
>>> filter_coeff[i]);
>>> }
>>> }
>>> @@ -274,9 +274,9 @@ void intel_casf_enable(struct intel_crtc_state *crtc_state)
>>>
>>> intel_casf_write_coeff(crtc_state);
>>>
>>> - sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state->hw.casf_params.strength);
>>> + sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength);
>>>
>>> - sharpness_ctl |= crtc_state->hw.casf_params.win_size;
>>> + sharpness_ctl |= crtc_state->pch_pfit.casf.win_size;
>>>
>>> intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>>> index 10a9b51337fa..95993f8e5d0d 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>>> @@ -382,9 +382,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
>>> intel_vdsc_state_dump(&p, 0, pipe_config);
>>>
>>> drm_printf(&p, "sharpness strength: %d, sharpness tap size: %d, sharpness enable: %d\n",
>>> - pipe_config->hw.casf_params.strength,
>>> - pipe_config->hw.casf_params.win_size,
>>> - pipe_config->hw.casf_params.enable);
>>> + pipe_config->pch_pfit.casf.strength,
>>> + pipe_config->pch_pfit.casf.win_size,
>>> + pipe_config->pch_pfit.casf.enable);
>>>
>>> dump_planes:
>>> if (!state)
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>>> index a02c58b5a34d..e02e69467871 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>> @@ -994,7 +994,7 @@ static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
>>> if (!new_crtc_state->hw.active)
>>> return false;
>>>
>>> - return is_enabling(hw.casf_params.enable, old_crtc_state, new_crtc_state);
>>> + return is_enabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
>>> }
>>>
>>> static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
>>> @@ -1003,7 +1003,7 @@ static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
>>> if (!new_crtc_state->hw.active)
>>> return false;
>>>
>>> - return is_disabling(hw.casf_params.enable, old_crtc_state, new_crtc_state);
>>> + return is_disabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
>>> }
>>>
>>> static bool intel_crtc_lobf_enabling(const struct intel_crtc_state *old_crtc_state,
>>> @@ -5370,12 +5370,12 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>>>
>>> PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
>>> PIPE_CONF_CHECK_RECT(pch_pfit.dst);
>>> + PIPE_CONF_CHECK_BOOL(pch_pfit.casf.enable);
>>> + PIPE_CONF_CHECK_I(pch_pfit.casf.win_size);
>>> + PIPE_CONF_CHECK_I(pch_pfit.casf.strength);
>>>
>>> PIPE_CONF_CHECK_I(scaler_state.scaler_id);
>>> PIPE_CONF_CHECK_I(pixel_rate);
>>> - PIPE_CONF_CHECK_BOOL(hw.casf_params.enable);
>>> - PIPE_CONF_CHECK_I(hw.casf_params.win_size);
>>> - PIPE_CONF_CHECK_I(hw.casf_params.strength);
>>>
>>> PIPE_CONF_CHECK_X(gamma_mode);
>>> if (display->platform.cherryview)
>>> @@ -6819,7 +6819,7 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
>>>
>>> if (intel_casf_enabling(new_crtc_state, old_crtc_state))
>>> intel_casf_enable(new_crtc_state);
>>> - else if (new_crtc_state->hw.casf_params.strength != old_crtc_state->hw.casf_params.strength)
>>> + else if (new_crtc_state->pch_pfit.casf.strength != old_crtc_state->pch_pfit.casf.strength)
>>> intel_casf_update_strength(new_crtc_state);
>>>
>>> intel_fbc_update(state, crtc);
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>>> index af0d870de342..ca2581fb7bbd 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>>> @@ -1037,7 +1037,6 @@ struct intel_crtc_state {
>>> struct drm_display_mode mode, pipe_mode, adjusted_mode;
>>> enum drm_scaling_filter scaling_filter;
>>> u8 sharpness_strength;
>>> - struct intel_casf casf_params;
>>> } hw;
>>>
>>> /* actual state of LUTs */
>>> @@ -1224,6 +1223,7 @@ struct intel_crtc_state {
>>>
>>> /* Panel fitter placement and size for Ironlake+ */
>>> struct {
>>> + struct intel_casf casf;
>>> struct drm_rect dst;
>>> bool enabled;
>>> bool force_thru;
>>> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
>>> index cfa17ddb4018..e9fe5c0bf6ff 100644
>>> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
>>> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
>>> @@ -986,13 +986,13 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
>>> if (HAS_CASF(display) && id == 1)
>>> intel_casf_sharpness_get_config(crtc_state);
>>>
>>> - if (!crtc_state->hw.casf_params.enable)
>>> + if (!crtc_state->pch_pfit.casf.enable)
>>> crtc_state->pch_pfit.enabled = true;
>>>
>>> pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
>>> size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
>>>
>>> - if (!crtc_state->hw.casf_params.enable)
>>> + if (!crtc_state->pch_pfit.casf.enable)
>>> drm_rect_init(&crtc_state->pch_pfit.dst,
>>> REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
>>> REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
>>> --
>>> 2.52.0
>>>
>>>
>
>
> --
> Ville Syrjälä
> Intel
>
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH 3/9] drm/i915/casf: Move the casf state to better place
2026-03-28 15:34 ` Michał Grzelak
@ 2026-04-01 10:02 ` Michał Grzelak
0 siblings, 0 replies; 39+ messages in thread
From: Michał Grzelak @ 2026-04-01 10:02 UTC (permalink / raw)
To: Michał Grzelak
Cc: Ville Syrjälä, intel-gfx, intel-xe, Nemesa Garg
[-- Attachment #1: Type: text/plain, Size: 13756 bytes --]
On Sat, 28 Mar 2026, Michał Grzelak wrote:
> On Fri, 27 Mar 2026, Ville Syrjälä wrote:
>> On Fri, Mar 27, 2026 at 10:10:26AM +0100, Michał Grzelak wrote:
>>> On Thu, 26 Mar 2026, Ville Syrjala wrote:
>>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>>
>>>> The casf state is placed inside the 'hw' state for some reason.
>>>> That is only really meant for things we have to duplicate from
>>>> the uapi state. The rest can live on its own in our actual state.
>>>>
>>>> And since casf is just one aspect of the pfit/pipe scaler the
>>>> proper place for it seems to be under pch_pfit.
>>>>
>>>> Cc: Nemesa Garg <nemesa.garg@intel.com>
>>>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/display/intel_casf.c | 40 +++++++++----------
>>>> .../drm/i915/display/intel_crtc_state_dump.c | 6 +--
>>>> drivers/gpu/drm/i915/display/intel_display.c | 12 +++---
>>>> .../drm/i915/display/intel_display_types.h | 2 +-
>>>> drivers/gpu/drm/i915/display/skl_scaler.c | 4 +-
>>>> 5 files changed, 32 insertions(+), 32 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_casf.c
>>>> b/drivers/gpu/drm/i915/display/intel_casf.c
>>>> index 4316d8214e80..5a8ffb40d30d 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_casf.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_casf.c
>>>> @@ -82,7 +82,7 @@ void intel_casf_update_strength(struct intel_crtc_state
>>>> *crtc_state)
>>>> int win_size;
>>>>
>>>> intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe),
>>>> FILTER_STRENGTH_MASK,
>>>> - FILTER_STRENGTH(crtc_state->hw.casf_params.strength));
>>>> + FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength));
>>>>
>>>> win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));
>>>>
>>>> @@ -95,11 +95,11 @@ static void intel_casf_compute_win_size(struct
>>>> intel_crtc_state *crtc_state)
>>>> u32 total_pixels = mode->hdisplay * mode->vdisplay;
>>>>
>>>> if (total_pixels <= MAX_PIXELS_FOR_3_TAP_FILTER)
>>>> - crtc_state->hw.casf_params.win_size =
>>>> SHARPNESS_FILTER_SIZE_3X3;
>>>> + crtc_state->pch_pfit.casf.win_size =
>>>> SHARPNESS_FILTER_SIZE_3X3;
>>>> else if (total_pixels <= MAX_PIXELS_FOR_5_TAP_FILTER)
>>>> - crtc_state->hw.casf_params.win_size =
>>>> SHARPNESS_FILTER_SIZE_5X5;
>>>> + crtc_state->pch_pfit.casf.win_size =
>>>> SHARPNESS_FILTER_SIZE_5X5;
>>>> else
>>>> - crtc_state->hw.casf_params.win_size =
>>>> SHARPNESS_FILTER_SIZE_7X7;
>>>> + crtc_state->pch_pfit.casf.win_size =
>>>> SHARPNESS_FILTER_SIZE_7X7;
>>>> }
>>>>
>>>> int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
>>>> @@ -110,8 +110,8 @@ int intel_casf_compute_config(struct intel_crtc_state
>>>> *crtc_state)
>>>> return 0;
>>>>
>>>> if (crtc_state->hw.sharpness_strength == 0) {
>>>> - crtc_state->hw.casf_params.enable = false;
>>>> - crtc_state->hw.casf_params.strength = 0;
>>>> + crtc_state->pch_pfit.casf.enable = false;
>>>> + crtc_state->pch_pfit.casf.strength = 0;
>>>> return 0;
>>>> }
>>>>
>>>> @@ -121,7 +121,7 @@ int intel_casf_compute_config(struct intel_crtc_state
>>>> *crtc_state)
>>>> return -EINVAL;
>>>> }
>>>>
>>>> - crtc_state->hw.casf_params.enable = true;
>>>> + crtc_state->pch_pfit.casf.enable = true;
>>>>
>>>> /*
>>>> * HW takes a value in form (1.0 + strength) in 4.4 fixed format.
>>>> @@ -131,7 +131,7 @@ int intel_casf_compute_config(struct intel_crtc_state
>>>> *crtc_state)
>>>> * 6.3125 in 4.4 format is b01100101 which is equal to 101.
>>>> * Also 85 + 16 = 101.
>>>> */
>>>> - crtc_state->hw.casf_params.strength =
>>>> + crtc_state->pch_pfit.casf.strength =
>>>> min(crtc_state->hw.sharpness_strength, 0xEF) + 0x10;
>>>>
>>>> intel_casf_compute_win_size(crtc_state);
>>>> @@ -151,19 +151,19 @@ void intel_casf_sharpness_get_config(struct
>>>> intel_crtc_state *crtc_state)
>>>> if (sharp & FILTER_EN) {
>>>> if (drm_WARN_ON(display->drm,
>>>> REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp) <
>>>> 16))
>>>> - crtc_state->hw.casf_params.strength = 0;
>>>> + crtc_state->pch_pfit.casf.strength = 0;
>>>> else
>>>> - crtc_state->hw.casf_params.strength =
>>>> + crtc_state->pch_pfit.casf.strength =
>>>> REG_FIELD_GET(FILTER_STRENGTH_MASK, sharp);
>>>> - crtc_state->hw.casf_params.enable = true;
>>>> - crtc_state->hw.casf_params.win_size =
>>>> + crtc_state->pch_pfit.casf.enable = true;
>>>> + crtc_state->pch_pfit.casf.win_size =
>>>> REG_FIELD_GET(FILTER_SIZE_MASK, sharp);
>>>> }
>>>> }
>>>>
>>>> bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state)
>>>> {
>>>> - if (crtc_state->hw.casf_params.enable)
>>>> + if (crtc_state->pch_pfit.casf.enable)
>>>> return true;
>>>>
>>>> return false;
>>>> @@ -179,7 +179,7 @@ static u32 casf_coeff(struct intel_crtc_state
>>>> *crtc_state, int t)
>>>> struct scaler_filter_coeff value;
>>>> u32 coeff;
>>>>
>>>> - value = crtc_state->hw.casf_params.coeff[t];
>>>> + value = crtc_state->pch_pfit.casf.coeff[t];
>>>
>>> Unrelated topic: how you see such renaming?:
>>>
>>> int t -> int tap
>>
>> Probably a good idea. One character variable names aren't what
>> you'd call descriptive. This probably got copied from the
>> nearest neighbor filter code, so a rename should happen there too.
>>
>> Or even better if someone gets rid of the duplicated code entirely
>> and consolidates all the filter coefficient code to one place.
>
> I'd give it a shot but I genuinely don't know where to search for
> nearest neighbor filter. I searched for possible declarations of int t,
> but it didn't show anything relevant. Can you point to where should I
> start looking?
Nevermind the question, apparently I crossed my eyes when looking at
cscope's search. *facepalm*.
BR,
Michał
>>>> value.sign = 0;
>>>>
>>>> coeff = value.sign << 15 | value.exp << 12 | value.mantissa << 3;
>>>> @@ -189,7 +189,7 @@ static u32 casf_coeff(struct intel_crtc_state
>>>> *crtc_state, int t)
>>>> /*
>>>> * 17 phase of 7 taps requires 119 coefficients in 60 dwords per set.
>>>> * To enable casf: program scaler coefficients with the coeffients
>>>> - * that are calculated and stored in hw.casf_params.coeff as per
>>>> + * that are calculated and stored in pch_pfit.casf.coeff as per
>>>> * SCALER_COEFFICIENT_FORMAT
>>>> */
>>>> static void intel_casf_write_coeff(struct intel_crtc_state *crtc_state)
>>>> @@ -247,9 +247,9 @@ void intel_casf_scaler_compute_config(struct
>>>> intel_crtc_state *crtc_state)
>>>> u16 sumcoeff = 0;
>>>
>>> Unrelated to the change: some variables have been named as sumcoeff and
>>> others as filter_*coeff{_1,_2,_3}*. How you see renaming:
>>>
>>> u16 sumcoeff -> u16 sum_coeff
>>>
>>> But I might be again missing common codestyle.
>>
>> We generally use the underscore_style for things. So I wouldn't
>> mind the rename.
>
> In that case I should probably rename filtercoeff as well. But since
> filter_coeff is already used and global, I guess it would require more
> vigilance then the simple rename above. Do you have any hints on how to
> handle it without breaking everything?
>
> BR,
> Michał
>
>>
>>>
>>> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
>>
>> Ta.
>>
>>>
>>> BR,
>>> Michał
>>>
>>>> int i;
>>>>
>>>> - if (crtc_state->hw.casf_params.win_size == 0)
>>>> + if (crtc_state->pch_pfit.casf.win_size == 0)
>>>> filtercoeff = filtercoeff_1;
>>>> - else if (crtc_state->hw.casf_params.win_size == 1)
>>>> + else if (crtc_state->pch_pfit.casf.win_size == 1)
>>>> filtercoeff = filtercoeff_2;
>>>> else
>>>> filtercoeff = filtercoeff_3;
>>>> @@ -259,7 +259,7 @@ void intel_casf_scaler_compute_config(struct
>>>> intel_crtc_state *crtc_state)
>>>>
>>>> for (i = 0; i < SCALER_FILTER_NUM_TAPS; i++) {
>>>> filter_coeff[i] = (*(filtercoeff + i) * 100 / sumcoeff);
>>>> -
>>>> convert_sharpness_coef_binary(&crtc_state->hw.casf_params.coeff[i],
>>>> +
>>>> convert_sharpness_coef_binary(&crtc_state->pch_pfit.casf.coeff[i],
>>>> filter_coeff[i]);
>>>> }
>>>> }
>>>> @@ -274,9 +274,9 @@ void intel_casf_enable(struct intel_crtc_state
>>>> *crtc_state)
>>>>
>>>> intel_casf_write_coeff(crtc_state);
>>>>
>>>> - sharpness_ctl = FILTER_EN |
>>>> FILTER_STRENGTH(crtc_state->hw.casf_params.strength);
>>>> + sharpness_ctl = FILTER_EN |
>>>> FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength);
>>>>
>>>> - sharpness_ctl |= crtc_state->hw.casf_params.win_size;
>>>> + sharpness_ctl |= crtc_state->pch_pfit.casf.win_size;
>>>>
>>>> intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>>>> b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>>>> index 10a9b51337fa..95993f8e5d0d 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
>>>> @@ -382,9 +382,9 @@ void intel_crtc_state_dump(const struct
>>>> intel_crtc_state *pipe_config,
>>>> intel_vdsc_state_dump(&p, 0, pipe_config);
>>>>
>>>> drm_printf(&p, "sharpness strength: %d, sharpness tap size: %d,
>>>> sharpness enable: %d\n",
>>>> - pipe_config->hw.casf_params.strength,
>>>> - pipe_config->hw.casf_params.win_size,
>>>> - pipe_config->hw.casf_params.enable);
>>>> + pipe_config->pch_pfit.casf.strength,
>>>> + pipe_config->pch_pfit.casf.win_size,
>>>> + pipe_config->pch_pfit.casf.enable);
>>>>
>>>> dump_planes:
>>>> if (!state)
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>>>> b/drivers/gpu/drm/i915/display/intel_display.c
>>>> index a02c58b5a34d..e02e69467871 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>>> @@ -994,7 +994,7 @@ static bool intel_casf_enabling(const struct
>>>> intel_crtc_state *new_crtc_state,
>>>> if (!new_crtc_state->hw.active)
>>>> return false;
>>>>
>>>> - return is_enabling(hw.casf_params.enable, old_crtc_state,
>>>> new_crtc_state);
>>>> + return is_enabling(pch_pfit.casf.enable, old_crtc_state,
>>>> new_crtc_state);
>>>> }
>>>>
>>>> static bool intel_casf_disabling(const struct intel_crtc_state
>>>> *old_crtc_state,
>>>> @@ -1003,7 +1003,7 @@ static bool intel_casf_disabling(const struct
>>>> intel_crtc_state *old_crtc_state,
>>>> if (!new_crtc_state->hw.active)
>>>> return false;
>>>>
>>>> - return is_disabling(hw.casf_params.enable, old_crtc_state,
>>>> new_crtc_state);
>>>> + return is_disabling(pch_pfit.casf.enable, old_crtc_state,
>>>> new_crtc_state);
>>>> }
>>>>
>>>> static bool intel_crtc_lobf_enabling(const struct intel_crtc_state
>>>> *old_crtc_state,
>>>> @@ -5370,12 +5370,12 @@ intel_pipe_config_compare(const struct
>>>> intel_crtc_state *current_config,
>>>>
>>>> PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
>>>> PIPE_CONF_CHECK_RECT(pch_pfit.dst);
>>>> + PIPE_CONF_CHECK_BOOL(pch_pfit.casf.enable);
>>>> + PIPE_CONF_CHECK_I(pch_pfit.casf.win_size);
>>>> + PIPE_CONF_CHECK_I(pch_pfit.casf.strength);
>>>>
>>>> PIPE_CONF_CHECK_I(scaler_state.scaler_id);
>>>> PIPE_CONF_CHECK_I(pixel_rate);
>>>> - PIPE_CONF_CHECK_BOOL(hw.casf_params.enable);
>>>> - PIPE_CONF_CHECK_I(hw.casf_params.win_size);
>>>> - PIPE_CONF_CHECK_I(hw.casf_params.strength);
>>>>
>>>> PIPE_CONF_CHECK_X(gamma_mode);
>>>> if (display->platform.cherryview)
>>>> @@ -6819,7 +6819,7 @@ static void intel_pre_update_crtc(struct
>>>> intel_atomic_state *state,
>>>>
>>>> if (intel_casf_enabling(new_crtc_state, old_crtc_state))
>>>> intel_casf_enable(new_crtc_state);
>>>> - else if (new_crtc_state->hw.casf_params.strength !=
>>>> old_crtc_state->hw.casf_params.strength)
>>>> + else if (new_crtc_state->pch_pfit.casf.strength !=
>>>> old_crtc_state->pch_pfit.casf.strength)
>>>> intel_casf_update_strength(new_crtc_state);
>>>>
>>>> intel_fbc_update(state, crtc);
>>>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
>>>> b/drivers/gpu/drm/i915/display/intel_display_types.h
>>>> index af0d870de342..ca2581fb7bbd 100644
>>>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>>>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>>>> @@ -1037,7 +1037,6 @@ struct intel_crtc_state {
>>>> struct drm_display_mode mode, pipe_mode, adjusted_mode;
>>>> enum drm_scaling_filter scaling_filter;
>>>> u8 sharpness_strength;
>>>> - struct intel_casf casf_params;
>>>> } hw;
>>>>
>>>> /* actual state of LUTs */
>>>> @@ -1224,6 +1223,7 @@ struct intel_crtc_state {
>>>>
>>>> /* Panel fitter placement and size for Ironlake+ */
>>>> struct {
>>>> + struct intel_casf casf;
>>>> struct drm_rect dst;
>>>> bool enabled;
>>>> bool force_thru;
>>>> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
>>>> b/drivers/gpu/drm/i915/display/skl_scaler.c
>>>> index cfa17ddb4018..e9fe5c0bf6ff 100644
>>>> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
>>>> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
>>>> @@ -986,13 +986,13 @@ void skl_scaler_get_config(struct intel_crtc_state
>>>> *crtc_state)
>>>> if (HAS_CASF(display) && id == 1)
>>>> intel_casf_sharpness_get_config(crtc_state);
>>>>
>>>> - if (!crtc_state->hw.casf_params.enable)
>>>> + if (!crtc_state->pch_pfit.casf.enable)
>>>> crtc_state->pch_pfit.enabled = true;
>>>>
>>>> pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
>>>> size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
>>>>
>>>> - if (!crtc_state->hw.casf_params.enable)
>>>> + if (!crtc_state->pch_pfit.casf.enable)
>>>> drm_rect_init(&crtc_state->pch_pfit.dst,
>>>> REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
>>>> REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
>>>> --
>>>> 2.52.0
>>>>
>>>>
>>
>>
>> --
>> Ville Syrjälä
>> Intel
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH 4/9] drm/i915/casf: Extract scaler_has_casf()
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (2 preceding siblings ...)
2026-03-26 22:31 ` [PATCH 3/9] drm/i915/casf: Move the casf state to better place Ville Syrjala
@ 2026-03-26 22:31 ` Ville Syrjala
2026-03-27 9:33 ` Michał Grzelak
2026-03-26 22:31 ` [PATCH 5/9] drm/i915/casf: Handle CASF in skl_scaler_get_filter_select() Ville Syrjala
` (9 subsequent siblings)
13 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjala @ 2026-03-26 22:31 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nemesa Garg
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Extract a small helper to determine if the scaler supports
the sharpness filter or not.
Cc: Nemesa Garg <nemesa.garg@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_scaler.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index e9fe5c0bf6ff..525afd736195 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -323,19 +323,24 @@ int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
need_scaler);
}
+static bool scaler_has_casf(struct intel_display *display, int scaler_id)
+{
+ return HAS_CASF(display) && scaler_id == 1;
+}
+
static int intel_allocate_scaler(struct intel_crtc_scaler_state *scaler_state,
struct intel_crtc *crtc,
struct intel_plane_state *plane_state,
bool casf_scaler)
{
+ struct intel_display *display = to_intel_display(crtc);
int i;
for (i = 0; i < crtc->num_scalers; i++) {
if (scaler_state->scalers[i].in_use)
continue;
- /* CASF needs second scaler */
- if (!plane_state && casf_scaler && i != 1)
+ if (casf_scaler && !scaler_has_casf(display, i))
continue;
scaler_state->scalers[i].in_use = true;
@@ -982,8 +987,7 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
id = i;
- /* Read CASF regs for second scaler */
- if (HAS_CASF(display) && id == 1)
+ if (scaler_has_casf(display, i))
intel_casf_sharpness_get_config(crtc_state);
if (!crtc_state->pch_pfit.casf.enable)
--
2.52.0
^ permalink raw reply related [flat|nested] 39+ messages in thread* Re: [PATCH 4/9] drm/i915/casf: Extract scaler_has_casf()
2026-03-26 22:31 ` [PATCH 4/9] drm/i915/casf: Extract scaler_has_casf() Ville Syrjala
@ 2026-03-27 9:33 ` Michał Grzelak
2026-03-27 10:06 ` Michał Grzelak
0 siblings, 1 reply; 39+ messages in thread
From: Michał Grzelak @ 2026-03-27 9:33 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx, intel-xe, Nemesa Garg
[-- Attachment #1: Type: text/plain, Size: 3943 bytes --]
On Thu, 26 Mar 2026, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Extract a small helper to determine if the scaler supports
> the sharpness filter or not.
>
> Cc: Nemesa Garg <nemesa.garg@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/skl_scaler.c | 12 ++++++++----
> 1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index e9fe5c0bf6ff..525afd736195 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -323,19 +323,24 @@ int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
> need_scaler);
> }
>
> +static bool scaler_has_casf(struct intel_display *display, int scaler_id)
> +{
> + return HAS_CASF(display) && scaler_id == 1;
> +}
> +
> static int intel_allocate_scaler(struct intel_crtc_scaler_state *scaler_state,
> struct intel_crtc *crtc,
> struct intel_plane_state *plane_state,
> bool casf_scaler)
> {
> + struct intel_display *display = to_intel_display(crtc);
> int i;
>
> for (i = 0; i < crtc->num_scalers; i++) {
> if (scaler_state->scalers[i].in_use)
> continue;
>
> - /* CASF needs second scaler */
> - if (!plane_state && casf_scaler && i != 1)
> + if (casf_scaler && !scaler_has_casf(display, i))
> continue;
>
> scaler_state->scalers[i].in_use = true;
> @@ -982,8 +987,7 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
>
> id = i;
>
> - /* Read CASF regs for second scaler */
> - if (HAS_CASF(display) && id == 1)
> + if (scaler_has_casf(display, i))
With that being changed I am wondering if we need int id at all. The
only user of it is outside the loop. Since id is set to i on every
loop's pass, I guess we can replace it with last value of i. And if
crtc->num_scalers == -1, we wouldn't enter the loop anyway, so the id
is still set to -1. The only scenario I see where it can break is e.g.
when crtc->num_scalers == -2, but I have no clue if it is even possible.
To be precise, I am wondering about such change (diff without your change
being applied):
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 4c4deac7f9c8..78852267e60b 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -969,7 +969,6 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
- int id = -1;
int i;
/* find scaler attached to this pipe */
@@ -980,8 +979,6 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
if ((ctl & (PS_SCALER_EN | PS_BINDING_MASK)) != (PS_SCALER_EN | PS_BINDING_PIPE))
continue;
- id = i;
-
/* Read CASF regs for second scaler */
if (HAS_CASF(display) && id == 1)
intel_casf_sharpness_get_config(crtc_state);
@@ -1003,8 +1000,8 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
break;
}
- scaler_state->scaler_id = id;
- if (id >= 0)
+ scaler_state->scaler_id = crtc->num_scalers;
+ if (scaler_state->scaler_id >= 0)
scaler_state->scaler_users |= (1 << SKL_CRTC_INDEX);
else
scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
But I don't know if the reasoning above makes any sense.
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
BR,
Michał
> intel_casf_sharpness_get_config(crtc_state);
>
> if (!crtc_state->pch_pfit.casf.enable)
> --
> 2.52.0
>
>
^ permalink raw reply related [flat|nested] 39+ messages in thread* Re: [PATCH 4/9] drm/i915/casf: Extract scaler_has_casf()
2026-03-27 9:33 ` Michał Grzelak
@ 2026-03-27 10:06 ` Michał Grzelak
2026-03-27 10:41 ` Ville Syrjälä
0 siblings, 1 reply; 39+ messages in thread
From: Michał Grzelak @ 2026-03-27 10:06 UTC (permalink / raw)
To: Michał Grzelak; +Cc: Ville Syrjala, intel-gfx, intel-xe, Nemesa Garg
[-- Attachment #1: Type: text/plain, Size: 4255 bytes --]
On Fri, 27 Mar 2026, Michał Grzelak wrote:
> On Thu, 26 Mar 2026, Ville Syrjala wrote:
>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> Extract a small helper to determine if the scaler supports
>> the sharpness filter or not.
>>
>> Cc: Nemesa Garg <nemesa.garg@intel.com>
>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/display/skl_scaler.c | 12 ++++++++----
>> 1 file changed, 8 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
>> b/drivers/gpu/drm/i915/display/skl_scaler.c
>> index e9fe5c0bf6ff..525afd736195 100644
>> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
>> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
>> @@ -323,19 +323,24 @@ int skl_update_scaler_plane(struct intel_crtc_state
>> *crtc_state,
>> need_scaler);
>> }
>>
>> +static bool scaler_has_casf(struct intel_display *display, int scaler_id)
>> +{
>> + return HAS_CASF(display) && scaler_id == 1;
>> +}
>> +
>> static int intel_allocate_scaler(struct intel_crtc_scaler_state
>> *scaler_state,
>> struct intel_crtc *crtc,
>> struct intel_plane_state *plane_state,
>> bool casf_scaler)
>> {
>> + struct intel_display *display = to_intel_display(crtc);
>> int i;
>>
>> for (i = 0; i < crtc->num_scalers; i++) {
>> if (scaler_state->scalers[i].in_use)
>> continue;
>>
>> - /* CASF needs second scaler */
>> - if (!plane_state && casf_scaler && i != 1)
>> + if (casf_scaler && !scaler_has_casf(display, i))
>> continue;
>>
>> scaler_state->scalers[i].in_use = true;
>> @@ -982,8 +987,7 @@ void skl_scaler_get_config(struct intel_crtc_state
>> *crtc_state)
>>
>> id = i;
>>
>> - /* Read CASF regs for second scaler */
>> - if (HAS_CASF(display) && id == 1)
>> + if (scaler_has_casf(display, i))
>
> With that being changed I am wondering if we need int id at all. The
> only user of it is outside the loop. Since id is set to i on every
> loop's pass, I guess we can replace it with last value of i. And if
> crtc->num_scalers == -1, we wouldn't enter the loop anyway, so the id
> is still set to -1. The only scenario I see where it can break is e.g.
> when crtc->num_scalers == -2, but I have no clue if it is even possible.
>
> To be precise, I am wondering about such change (diff without your change
> being applied):
>
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
> b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 4c4deac7f9c8..78852267e60b 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -969,7 +969,6 @@ void skl_scaler_get_config(struct intel_crtc_state
> *crtc_state)
> struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct intel_crtc_scaler_state *scaler_state =
> &crtc_state->scaler_state;
> - int id = -1;
> int i;
>
> /* find scaler attached to this pipe */
> @@ -980,8 +979,6 @@ void skl_scaler_get_config(struct intel_crtc_state
> *crtc_state)
> if ((ctl & (PS_SCALER_EN | PS_BINDING_MASK)) != (PS_SCALER_EN
> | PS_BINDING_PIPE))
> continue;
>
> - id = i;
> -
> /* Read CASF regs for second scaler */
> if (HAS_CASF(display) && id == 1)
> intel_casf_sharpness_get_config(crtc_state);
> @@ -1003,8 +1000,8 @@ void skl_scaler_get_config(struct intel_crtc_state
> *crtc_state)
> break;
> }
>
> - scaler_state->scaler_id = id;
> - if (id >= 0)
> + scaler_state->scaler_id = crtc->num_scalers;
> + if (scaler_state->scaler_id >= 0)
> scaler_state->scaler_users |= (1 << SKL_CRTC_INDEX);
> else
> scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
>
> But I don't know if the reasoning above makes any sense.
Now I see that I missed the continue-break magic, so please disregard
the whole comment.
BR,
Michał
>
> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
>
> BR,
> Michał
>
>> intel_casf_sharpness_get_config(crtc_state);
>>
>> if (!crtc_state->pch_pfit.casf.enable)
>> --
>> 2.52.0
>>
>>
>
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH 4/9] drm/i915/casf: Extract scaler_has_casf()
2026-03-27 10:06 ` Michał Grzelak
@ 2026-03-27 10:41 ` Ville Syrjälä
2026-03-28 14:52 ` Michał Grzelak
0 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjälä @ 2026-03-27 10:41 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-gfx, intel-xe, Nemesa Garg
On Fri, Mar 27, 2026 at 11:06:18AM +0100, Michał Grzelak wrote:
> On Fri, 27 Mar 2026, Michał Grzelak wrote:
> > On Thu, 26 Mar 2026, Ville Syrjala wrote:
> >> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>
> >> Extract a small helper to determine if the scaler supports
> >> the sharpness filter or not.
> >>
> >> Cc: Nemesa Garg <nemesa.garg@intel.com>
> >> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >> ---
> >> drivers/gpu/drm/i915/display/skl_scaler.c | 12 ++++++++----
> >> 1 file changed, 8 insertions(+), 4 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
> >> b/drivers/gpu/drm/i915/display/skl_scaler.c
> >> index e9fe5c0bf6ff..525afd736195 100644
> >> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> >> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> >> @@ -323,19 +323,24 @@ int skl_update_scaler_plane(struct intel_crtc_state
> >> *crtc_state,
> >> need_scaler);
> >> }
> >>
> >> +static bool scaler_has_casf(struct intel_display *display, int scaler_id)
> >> +{
> >> + return HAS_CASF(display) && scaler_id == 1;
> >> +}
> >> +
> >> static int intel_allocate_scaler(struct intel_crtc_scaler_state
> >> *scaler_state,
> >> struct intel_crtc *crtc,
> >> struct intel_plane_state *plane_state,
> >> bool casf_scaler)
> >> {
> >> + struct intel_display *display = to_intel_display(crtc);
> >> int i;
> >>
> >> for (i = 0; i < crtc->num_scalers; i++) {
> >> if (scaler_state->scalers[i].in_use)
> >> continue;
> >>
> >> - /* CASF needs second scaler */
> >> - if (!plane_state && casf_scaler && i != 1)
> >> + if (casf_scaler && !scaler_has_casf(display, i))
> >> continue;
> >>
> >> scaler_state->scalers[i].in_use = true;
> >> @@ -982,8 +987,7 @@ void skl_scaler_get_config(struct intel_crtc_state
> >> *crtc_state)
> >>
> >> id = i;
> >>
> >> - /* Read CASF regs for second scaler */
> >> - if (HAS_CASF(display) && id == 1)
> >> + if (scaler_has_casf(display, i))
> >
> > With that being changed I am wondering if we need int id at all. The
> > only user of it is outside the loop. Since id is set to i on every
> > loop's pass, I guess we can replace it with last value of i. And if
> > crtc->num_scalers == -1, we wouldn't enter the loop anyway, so the id
> > is still set to -1. The only scenario I see where it can break is e.g.
> > when crtc->num_scalers == -2, but I have no clue if it is even possible.
> >
> > To be precise, I am wondering about such change (diff without your change
> > being applied):
> >
> > diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
> > b/drivers/gpu/drm/i915/display/skl_scaler.c
> > index 4c4deac7f9c8..78852267e60b 100644
> > --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> > +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> > @@ -969,7 +969,6 @@ void skl_scaler_get_config(struct intel_crtc_state
> > *crtc_state)
> > struct intel_display *display = to_intel_display(crtc_state);
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct intel_crtc_scaler_state *scaler_state =
> > &crtc_state->scaler_state;
> > - int id = -1;
> > int i;
> >
> > /* find scaler attached to this pipe */
> > @@ -980,8 +979,6 @@ void skl_scaler_get_config(struct intel_crtc_state
> > *crtc_state)
> > if ((ctl & (PS_SCALER_EN | PS_BINDING_MASK)) != (PS_SCALER_EN
> > | PS_BINDING_PIPE))
> > continue;
> >
> > - id = i;
> > -
> > /* Read CASF regs for second scaler */
> > if (HAS_CASF(display) && id == 1)
> > intel_casf_sharpness_get_config(crtc_state);
> > @@ -1003,8 +1000,8 @@ void skl_scaler_get_config(struct intel_crtc_state
> > *crtc_state)
> > break;
> > }
> >
> > - scaler_state->scaler_id = id;
> > - if (id >= 0)
> > + scaler_state->scaler_id = crtc->num_scalers;
> > + if (scaler_state->scaler_id >= 0)
> > scaler_state->scaler_users |= (1 << SKL_CRTC_INDEX);
> > else
> > scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
> >
> > But I don't know if the reasoning above makes any sense.
>
> Now I see that I missed the continue-break magic, so please disregard
> the whole comment.
I think the correct thing is to s/i/scaler_id/ and just move the
scaler_state->scaler_id and caler_state->scaler_users assignment into
the loop.
Or even better something like this:
skl_pipe_scaler_get_hw_state()
{
for (scaler_id) {
ctl = ...
if (ctl...)
return scaler_id;
}
return -1;
}
skl_scaler_get_config()
{
scaler_id = skl_pipe_scaler_get_hw_state();
if (scaler_id < 0)
return;
// do the scaler readout
}
Feel free to go at it.
>
> BR,
> Michał
>
> >
> > Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
> >
> > BR,
> > Michał
> >
> >> intel_casf_sharpness_get_config(crtc_state);
> >>
> >> if (!crtc_state->pch_pfit.casf.enable)
> >> --
> >> 2.52.0
> >>
> >>
> >
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH 4/9] drm/i915/casf: Extract scaler_has_casf()
2026-03-27 10:41 ` Ville Syrjälä
@ 2026-03-28 14:52 ` Michał Grzelak
0 siblings, 0 replies; 39+ messages in thread
From: Michał Grzelak @ 2026-03-28 14:52 UTC (permalink / raw)
To: Ville Syrjälä
Cc: Michał Grzelak, intel-gfx, intel-xe, Nemesa Garg
[-- Attachment #1: Type: text/plain, Size: 5231 bytes --]
On Fri, 27 Mar 2026, Ville Syrjälä wrote:
> On Fri, Mar 27, 2026 at 11:06:18AM +0100, Michał Grzelak wrote:
>> On Fri, 27 Mar 2026, Michał Grzelak wrote:
>>> On Thu, 26 Mar 2026, Ville Syrjala wrote:
>>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>>
>>>> Extract a small helper to determine if the scaler supports
>>>> the sharpness filter or not.
>>>>
>>>> Cc: Nemesa Garg <nemesa.garg@intel.com>
>>>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> ---
>>>> drivers/gpu/drm/i915/display/skl_scaler.c | 12 ++++++++----
>>>> 1 file changed, 8 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
>>>> b/drivers/gpu/drm/i915/display/skl_scaler.c
>>>> index e9fe5c0bf6ff..525afd736195 100644
>>>> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
>>>> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
>>>> @@ -323,19 +323,24 @@ int skl_update_scaler_plane(struct intel_crtc_state
>>>> *crtc_state,
>>>> need_scaler);
>>>> }
>>>>
>>>> +static bool scaler_has_casf(struct intel_display *display, int scaler_id)
>>>> +{
>>>> + return HAS_CASF(display) && scaler_id == 1;
>>>> +}
>>>> +
>>>> static int intel_allocate_scaler(struct intel_crtc_scaler_state
>>>> *scaler_state,
>>>> struct intel_crtc *crtc,
>>>> struct intel_plane_state *plane_state,
>>>> bool casf_scaler)
>>>> {
>>>> + struct intel_display *display = to_intel_display(crtc);
>>>> int i;
>>>>
>>>> for (i = 0; i < crtc->num_scalers; i++) {
>>>> if (scaler_state->scalers[i].in_use)
>>>> continue;
>>>>
>>>> - /* CASF needs second scaler */
>>>> - if (!plane_state && casf_scaler && i != 1)
>>>> + if (casf_scaler && !scaler_has_casf(display, i))
>>>> continue;
>>>>
>>>> scaler_state->scalers[i].in_use = true;
>>>> @@ -982,8 +987,7 @@ void skl_scaler_get_config(struct intel_crtc_state
>>>> *crtc_state)
>>>>
>>>> id = i;
>>>>
>>>> - /* Read CASF regs for second scaler */
>>>> - if (HAS_CASF(display) && id == 1)
>>>> + if (scaler_has_casf(display, i))
>>>
>>> With that being changed I am wondering if we need int id at all. The
>>> only user of it is outside the loop. Since id is set to i on every
>>> loop's pass, I guess we can replace it with last value of i. And if
>>> crtc->num_scalers == -1, we wouldn't enter the loop anyway, so the id
>>> is still set to -1. The only scenario I see where it can break is e.g.
>>> when crtc->num_scalers == -2, but I have no clue if it is even possible.
>>>
>>> To be precise, I am wondering about such change (diff without your change
>>> being applied):
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
>>> b/drivers/gpu/drm/i915/display/skl_scaler.c
>>> index 4c4deac7f9c8..78852267e60b 100644
>>> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
>>> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
>>> @@ -969,7 +969,6 @@ void skl_scaler_get_config(struct intel_crtc_state
>>> *crtc_state)
>>> struct intel_display *display = to_intel_display(crtc_state);
>>> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>>> struct intel_crtc_scaler_state *scaler_state =
>>> &crtc_state->scaler_state;
>>> - int id = -1;
>>> int i;
>>>
>>> /* find scaler attached to this pipe */
>>> @@ -980,8 +979,6 @@ void skl_scaler_get_config(struct intel_crtc_state
>>> *crtc_state)
>>> if ((ctl & (PS_SCALER_EN | PS_BINDING_MASK)) != (PS_SCALER_EN
>>> | PS_BINDING_PIPE))
>>> continue;
>>>
>>> - id = i;
>>> -
>>> /* Read CASF regs for second scaler */
>>> if (HAS_CASF(display) && id == 1)
>>> intel_casf_sharpness_get_config(crtc_state);
>>> @@ -1003,8 +1000,8 @@ void skl_scaler_get_config(struct intel_crtc_state
>>> *crtc_state)
>>> break;
>>> }
>>>
>>> - scaler_state->scaler_id = id;
>>> - if (id >= 0)
>>> + scaler_state->scaler_id = crtc->num_scalers;
>>> + if (scaler_state->scaler_id >= 0)
>>> scaler_state->scaler_users |= (1 << SKL_CRTC_INDEX);
>>> else
>>> scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
>>>
>>> But I don't know if the reasoning above makes any sense.
>>
>> Now I see that I missed the continue-break magic, so please disregard
>> the whole comment.
>
> I think the correct thing is to s/i/scaler_id/ and just move the
> scaler_state->scaler_id and caler_state->scaler_users assignment into
> the loop.
>
> Or even better something like this:
>
> skl_pipe_scaler_get_hw_state()
> {
> for (scaler_id) {
> ctl = ...
> if (ctl...)
> return scaler_id;
> }
>
> return -1;
> }
>
> skl_scaler_get_config()
> {
> scaler_id = skl_pipe_scaler_get_hw_state();
> if (scaler_id < 0)
> return;
>
> // do the scaler readout
> }
>
> Feel free to go at it.
>
Now it makes sense, thanks. :)
I've added you to couple of Suggested-by:, please correct me if I
mishandled it.
BR,
Michał
>>>
>>> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
>>>
>>>> intel_casf_sharpness_get_config(crtc_state);
>>>>
>>>> if (!crtc_state->pch_pfit.casf.enable)
>>>> --
>>>> 2.52.0
>>>>
>>>>
>>>
>
>
> --
> Ville Syrjälä
> Intel
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH 5/9] drm/i915/casf: Handle CASF in skl_scaler_get_filter_select()
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (3 preceding siblings ...)
2026-03-26 22:31 ` [PATCH 4/9] drm/i915/casf: Extract scaler_has_casf() Ville Syrjala
@ 2026-03-26 22:31 ` Ville Syrjala
2026-03-27 9:35 ` Michał Grzelak
2026-03-26 22:31 ` [PATCH 6/9] drm/i915/casf: Constify crtc_state Ville Syrjala
` (8 subsequent siblings)
13 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjala @ 2026-03-26 22:31 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nemesa Garg
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Nuke the duplicate CASF_SCALER_FILTER_SELECT and just have
skl_scaler_get_filter_select() return the proper value for
sharpness filter use. It is the same "use programmable coefficients"
value we already use for the nearest neighbor filtering.
Cc: Nemesa Garg <nemesa.garg@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_scaler.c | 17 +++++------------
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 525afd736195..d8bf65c6b4a7 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -730,9 +730,9 @@ static void glk_program_nearest_filter_coefs(struct intel_display *display,
GLK_PS_COEF_INDEX_SET(pipe, id, set), 0);
}
-static u32 skl_scaler_get_filter_select(enum drm_scaling_filter filter)
+static u32 skl_scaler_get_filter_select(enum drm_scaling_filter filter, bool casf)
{
- if (filter == DRM_SCALING_FILTER_NEAREST_NEIGHBOR)
+ if (filter == DRM_SCALING_FILTER_NEAREST_NEIGHBOR || casf)
return (PS_FILTER_PROGRAMMED |
PS_Y_VERT_FILTER_SELECT(0) |
PS_Y_HORZ_FILTER_SELECT(0) |
@@ -757,13 +757,6 @@ static void skl_scaler_setup_filter(struct intel_display *display,
}
}
-#define CASF_SCALER_FILTER_SELECT \
- (PS_FILTER_PROGRAMMED | \
- PS_Y_VERT_FILTER_SELECT(0) | \
- PS_Y_HORZ_FILTER_SELECT(0) | \
- PS_UV_VERT_FILTER_SELECT(0) | \
- PS_UV_HORZ_FILTER_SELECT(0))
-
void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -794,7 +787,7 @@ void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state)
trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
- CASF_SCALER_FILTER_SELECT;
+ skl_scaler_get_filter_select(crtc_state->hw.scaling_filter, true);
intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
@@ -844,7 +837,7 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
id = scaler_state->scaler_id;
ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
- skl_scaler_get_filter_select(crtc_state->hw.scaling_filter);
+ skl_scaler_get_filter_select(crtc_state->hw.scaling_filter, false);
trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
@@ -910,7 +903,7 @@ skl_program_plane_scaler(struct intel_dsb *dsb,
}
ps_ctrl = PS_SCALER_EN | PS_BINDING_PLANE(plane->id) | scaler->mode |
- skl_scaler_get_filter_select(plane_state->hw.scaling_filter);
+ skl_scaler_get_filter_select(plane_state->hw.scaling_filter, false);
trace_intel_plane_scaler_update_arm(plane, scaler_id,
crtc_x, crtc_y, crtc_w, crtc_h);
--
2.52.0
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH 6/9] drm/i915/casf: Constify crtc_state
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (4 preceding siblings ...)
2026-03-26 22:31 ` [PATCH 5/9] drm/i915/casf: Handle CASF in skl_scaler_get_filter_select() Ville Syrjala
@ 2026-03-26 22:31 ` Ville Syrjala
2026-03-27 9:44 ` Michał Grzelak
2026-03-26 22:31 ` [PATCH 7/9] drn/i915/casf: Remove redundant argument from intel_casf_filter_lut_load() Ville Syrjala
` (7 subsequent siblings)
13 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjala @ 2026-03-26 22:31 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nemesa Garg
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Make the crtc_state const everywhere in the sharpness filter
code where it doesn't need to be mutated.
Cc: Nemesa Garg <nemesa.garg@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_casf.c | 8 ++++----
drivers/gpu/drm/i915/display/intel_casf.h | 4 ++--
drivers/gpu/drm/i915/display/skl_scaler.c | 8 ++++----
drivers/gpu/drm/i915/display/skl_scaler.h | 2 +-
4 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
index 5a8ffb40d30d..f777aae3fc57 100644
--- a/drivers/gpu/drm/i915/display/intel_casf.c
+++ b/drivers/gpu/drm/i915/display/intel_casf.c
@@ -75,7 +75,7 @@ static void intel_casf_filter_lut_load(struct intel_crtc *crtc,
sharpness_lut[i]);
}
-void intel_casf_update_strength(struct intel_crtc_state *crtc_state)
+void intel_casf_update_strength(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -174,7 +174,7 @@ static int casf_coeff_tap(int i)
return i % SCALER_FILTER_NUM_TAPS;
}
-static u32 casf_coeff(struct intel_crtc_state *crtc_state, int t)
+static u32 casf_coeff(const struct intel_crtc_state *crtc_state, int t)
{
struct scaler_filter_coeff value;
u32 coeff;
@@ -192,7 +192,7 @@ static u32 casf_coeff(struct intel_crtc_state *crtc_state, int t)
* that are calculated and stored in pch_pfit.casf.coeff as per
* SCALER_COEFFICIENT_FORMAT
*/
-static void intel_casf_write_coeff(struct intel_crtc_state *crtc_state)
+static void intel_casf_write_coeff(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -264,7 +264,7 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
}
}
-void intel_casf_enable(struct intel_crtc_state *crtc_state)
+void intel_casf_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_casf.h b/drivers/gpu/drm/i915/display/intel_casf.h
index b3fb0bcb3f5b..c4f984b73348 100644
--- a/drivers/gpu/drm/i915/display/intel_casf.h
+++ b/drivers/gpu/drm/i915/display/intel_casf.h
@@ -11,9 +11,9 @@
struct intel_crtc_state;
int intel_casf_compute_config(struct intel_crtc_state *crtc_state);
-void intel_casf_update_strength(struct intel_crtc_state *new_crtc_state);
+void intel_casf_update_strength(const struct intel_crtc_state *new_crtc_state);
void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state);
-void intel_casf_enable(struct intel_crtc_state *crtc_state);
+void intel_casf_enable(const struct intel_crtc_state *crtc_state);
void intel_casf_disable(const struct intel_crtc_state *crtc_state);
void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state);
bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index d8bf65c6b4a7..762f4bb46c2d 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -757,13 +757,13 @@ static void skl_scaler_setup_filter(struct intel_display *display,
}
}
-void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state)
+void skl_scaler_setup_casf(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct intel_display *display = to_intel_display(crtc);
- struct drm_display_mode *adjusted_mode =
- &crtc_state->hw.adjusted_mode;
- struct intel_crtc_scaler_state *scaler_state =
+ const struct drm_display_mode *adjusted_mode =
+ &crtc_state->hw.adjusted_mode;
+ const struct intel_crtc_scaler_state *scaler_state =
&crtc_state->scaler_state;
struct drm_rect src, dest;
int id, width, height;
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
index 7e8d819c019d..20ecf373eb19 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.h
+++ b/drivers/gpu/drm/i915/display/skl_scaler.h
@@ -36,7 +36,7 @@ void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
-void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state);
+void skl_scaler_setup_casf(const struct intel_crtc_state *crtc_state);
enum drm_mode_status
skl_scaler_mode_valid(struct intel_display *display,
--
2.52.0
^ permalink raw reply related [flat|nested] 39+ messages in thread* [PATCH 7/9] drn/i915/casf: Remove redundant argument from intel_casf_filter_lut_load()
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (5 preceding siblings ...)
2026-03-26 22:31 ` [PATCH 6/9] drm/i915/casf: Constify crtc_state Ville Syrjala
@ 2026-03-26 22:31 ` Ville Syrjala
2026-03-27 9:46 ` Michał Grzelak
2026-03-26 22:31 ` [PATCH 8/9] drm/i915/pfit: Call intel_pfit_compute_config() unconditionally on (e)DP/HDMI Ville Syrjala
` (6 subsequent siblings)
13 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjala @ 2026-03-26 22:31 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nemesa Garg
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
intel_casf_filter_lut_load() can find the crtc from the crtc_state.
No need to pass in both.
Cc: Nemesa Garg <nemesa.garg@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_casf.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
index f777aae3fc57..21e84a4f9ff5 100644
--- a/drivers/gpu/drm/i915/display/intel_casf.c
+++ b/drivers/gpu/drm/i915/display/intel_casf.c
@@ -61,10 +61,10 @@ const u16 filtercoeff_3[] = {
FILTER_COEFF_0_125,
};
-static void intel_casf_filter_lut_load(struct intel_crtc *crtc,
- const struct intel_crtc_state *crtc_state)
+static void intel_casf_filter_lut_load(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
int i;
intel_de_write(display, SHRPLUT_INDEX(crtc->pipe),
@@ -270,7 +270,7 @@ void intel_casf_enable(const struct intel_crtc_state *crtc_state)
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
u32 sharpness_ctl;
- intel_casf_filter_lut_load(crtc, crtc_state);
+ intel_casf_filter_lut_load(crtc_state);
intel_casf_write_coeff(crtc_state);
--
2.52.0
^ permalink raw reply related [flat|nested] 39+ messages in thread* Re: [PATCH 7/9] drn/i915/casf: Remove redundant argument from intel_casf_filter_lut_load()
2026-03-26 22:31 ` [PATCH 7/9] drn/i915/casf: Remove redundant argument from intel_casf_filter_lut_load() Ville Syrjala
@ 2026-03-27 9:46 ` Michał Grzelak
2026-03-28 16:04 ` Michał Grzelak
0 siblings, 1 reply; 39+ messages in thread
From: Michał Grzelak @ 2026-03-27 9:46 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx, intel-xe, Nemesa Garg
[-- Attachment #1: Type: text/plain, Size: 375 bytes --]
On Thu, 26 Mar 2026, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_casf_filter_lut_load() can find the crtc from the crtc_state.
> No need to pass in both.
>
> Cc: Nemesa Garg <nemesa.garg@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
BR,
Michał
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH 7/9] drn/i915/casf: Remove redundant argument from intel_casf_filter_lut_load()
2026-03-27 9:46 ` Michał Grzelak
@ 2026-03-28 16:04 ` Michał Grzelak
0 siblings, 0 replies; 39+ messages in thread
From: Michał Grzelak @ 2026-03-28 16:04 UTC (permalink / raw)
To: Michał Grzelak; +Cc: Ville Syrjala, intel-gfx, intel-xe, Nemesa Garg
[-- Attachment #1: Type: text/plain, Size: 472 bytes --]
On Fri, 27 Mar 2026, Michał Grzelak wrote:
> On Thu, 26 Mar 2026, Ville Syrjala wrote:
>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>
>> intel_casf_filter_lut_load() can find the crtc from the crtc_state.
>> No need to pass in both.
>>
>> Cc: Nemesa Garg <nemesa.garg@intel.com>
>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
>
Late nit: s/drn/drm in the title :)
BR,
Michał
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH 8/9] drm/i915/pfit: Call intel_pfit_compute_config() unconditionally on (e)DP/HDMI
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (6 preceding siblings ...)
2026-03-26 22:31 ` [PATCH 7/9] drn/i915/casf: Remove redundant argument from intel_casf_filter_lut_load() Ville Syrjala
@ 2026-03-26 22:31 ` Ville Syrjala
2026-03-27 9:48 ` Michał Grzelak
2026-03-26 22:31 ` [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (5 subsequent siblings)
13 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjala @ 2026-03-26 22:31 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nemesa Garg
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We now have three different reasons for calling
intel_pfit_compute_config():
- actual pfit scaling/centering
- YCbCr 4:2:0 output
- sharpness filter
So let's just all the intel_pfit_compute_config() from
both the DP and HDMI code. Both gmch and ilk+ pfit code
should be capable of judging whether anything actually
needs the pfit.
The only slightly questionable thing in the gmch code is
the dithering knob, but that's only a thing on gen2/3 which
don't even have HDMI/DP outputs, and so not an issue here.
Cc: Nemesa Garg <nemesa.garg@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 9 +++------
drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +++-----
2 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4955bd8b11d7..ff3904b77492 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3545,12 +3545,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
if (ret)
return ret;
- if ((intel_dp_is_edp(intel_dp) && fixed_mode) ||
- pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
- ret = intel_pfit_compute_config(pipe_config, conn_state);
- if (ret)
- return ret;
- }
+ ret = intel_pfit_compute_config(pipe_config, conn_state);
+ if (ret)
+ return ret;
pipe_config->limited_color_range =
intel_dp_limited_color_range(pipe_config, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 05e898d10a2b..17bd2c207453 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2380,11 +2380,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
return ret;
}
- if (intel_hdmi_is_ycbcr420(pipe_config)) {
- ret = intel_pfit_compute_config(pipe_config, conn_state);
- if (ret)
- return ret;
- }
+ ret = intel_pfit_compute_config(pipe_config, conn_state);
+ if (ret)
+ return ret;
pipe_config->limited_color_range =
intel_hdmi_limited_color_range(pipe_config, conn_state);
--
2.52.0
^ permalink raw reply related [flat|nested] 39+ messages in thread* Re: [PATCH 8/9] drm/i915/pfit: Call intel_pfit_compute_config() unconditionally on (e)DP/HDMI
2026-03-26 22:31 ` [PATCH 8/9] drm/i915/pfit: Call intel_pfit_compute_config() unconditionally on (e)DP/HDMI Ville Syrjala
@ 2026-03-27 9:48 ` Michał Grzelak
2026-03-27 10:31 ` Ville Syrjälä
0 siblings, 1 reply; 39+ messages in thread
From: Michał Grzelak @ 2026-03-27 9:48 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx, intel-xe, Nemesa Garg
[-- Attachment #1: Type: text/plain, Size: 833 bytes --]
On Thu, 26 Mar 2026, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We now have three different reasons for calling
> intel_pfit_compute_config():
> - actual pfit scaling/centering
> - YCbCr 4:2:0 output
> - sharpness filter
>
> So let's just all the intel_pfit_compute_config() from
typo: s/all/call/
> both the DP and HDMI code. Both gmch and ilk+ pfit code
> should be capable of judging whether anything actually
> needs the pfit.
>
> The only slightly questionable thing in the gmch code is
> the dithering knob, but that's only a thing on gen2/3 which
> don't even have HDMI/DP outputs, and so not an issue here.
>
> Cc: Nemesa Garg <nemesa.garg@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
BR,
Michał
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH 8/9] drm/i915/pfit: Call intel_pfit_compute_config() unconditionally on (e)DP/HDMI
2026-03-27 9:48 ` Michał Grzelak
@ 2026-03-27 10:31 ` Ville Syrjälä
0 siblings, 0 replies; 39+ messages in thread
From: Ville Syrjälä @ 2026-03-27 10:31 UTC (permalink / raw)
To: Michał Grzelak; +Cc: intel-gfx, intel-xe, Nemesa Garg
On Fri, Mar 27, 2026 at 10:48:32AM +0100, Michał Grzelak wrote:
> On Thu, 26 Mar 2026, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We now have three different reasons for calling
> > intel_pfit_compute_config():
> > - actual pfit scaling/centering
> > - YCbCr 4:2:0 output
> > - sharpness filter
> >
> > So let's just all the intel_pfit_compute_config()
"... unconditionally ..."
> from
>
> typo: s/all/call/
>
> > both the DP and HDMI code. Both gmch and ilk+ pfit code
> > should be capable of judging whether anything actually
> > needs the pfit.
> >
> > The only slightly questionable thing in the gmch code is
> > the dithering knob, but that's only a thing on gen2/3 which
> > don't even have HDMI/DP outputs, and so not an issue here.
> >
> > Cc: Nemesa Garg <nemesa.garg@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
>
> BR,
> Michał
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
* [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (7 preceding siblings ...)
2026-03-26 22:31 ` [PATCH 8/9] drm/i915/pfit: Call intel_pfit_compute_config() unconditionally on (e)DP/HDMI Ville Syrjala
@ 2026-03-26 22:31 ` Ville Syrjala
2026-03-31 8:11 ` Garg, Nemesa
2026-03-31 9:48 ` Ville Syrjälä
2026-03-26 23:27 ` ✓ CI.KUnit: success for " Patchwork
` (4 subsequent siblings)
13 siblings, 2 replies; 39+ messages in thread
From: Ville Syrjala @ 2026-03-26 22:31 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nemesa Garg
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The sharpness filter is just a special mode of the pipe scaler.
It doesn't warrant all this special casing everywhere. Just
integrate it properly into the scaler code so that it's treated
no different from the other pipe scaler uses (scaling,centering,
YCbCr 4:2:0 output).
Cc: Nemesa Garg <nemesa.garg@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_casf.c | 62 ++------------
drivers/gpu/drm/i915/display/intel_casf.h | 6 +-
drivers/gpu/drm/i915/display/intel_display.c | 34 +-------
drivers/gpu/drm/i915/display/intel_pfit.c | 13 ++-
drivers/gpu/drm/i915/display/skl_scaler.c | 85 ++++++++------------
drivers/gpu/drm/i915/display/skl_scaler.h | 2 -
6 files changed, 53 insertions(+), 149 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
index 21e84a4f9ff5..c2d2746c5f04 100644
--- a/drivers/gpu/drm/i915/display/intel_casf.c
+++ b/drivers/gpu/drm/i915/display/intel_casf.c
@@ -75,20 +75,6 @@ static void intel_casf_filter_lut_load(const struct intel_crtc_state *crtc_state
sharpness_lut[i]);
}
-void intel_casf_update_strength(const struct intel_crtc_state *crtc_state)
-{
- struct intel_display *display = to_intel_display(crtc_state);
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- int win_size;
-
- intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe), FILTER_STRENGTH_MASK,
- FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength));
-
- win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));
-
- intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, 1), win_size);
-}
-
static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
{
const struct drm_display_mode *mode = &crtc_state->hw.adjusted_mode;
@@ -102,19 +88,15 @@ static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_7X7;
}
+static void intel_casf_scaler_compute_coef(struct intel_crtc_state *crtc_state);
+
int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
- if (!HAS_CASF(display))
+ if (crtc_state->hw.sharpness_strength == 0)
return 0;
- if (crtc_state->hw.sharpness_strength == 0) {
- crtc_state->pch_pfit.casf.enable = false;
- crtc_state->pch_pfit.casf.strength = 0;
- return 0;
- }
-
/* CASF with joiner not supported in hardware */
if (crtc_state->joiner_pipes) {
drm_dbg_kms(display->drm, "CASF not supported with joiner\n");
@@ -136,7 +118,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
intel_casf_compute_win_size(crtc_state);
- intel_casf_scaler_compute_config(crtc_state);
+ intel_casf_scaler_compute_coef(crtc_state);
return 0;
}
@@ -161,14 +143,6 @@ void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state)
}
}
-bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state)
-{
- if (crtc_state->pch_pfit.casf.enable)
- return true;
-
- return false;
-}
-
static int casf_coeff_tap(int i)
{
return i % SCALER_FILTER_NUM_TAPS;
@@ -240,7 +214,7 @@ static void convert_sharpness_coef_binary(struct scaler_filter_coeff *coeff,
}
}
-void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
+static void intel_casf_scaler_compute_coef(struct intel_crtc_state *crtc_state)
{
const u16 *filtercoeff;
u16 filter_coeff[SCALER_FILTER_NUM_TAPS];
@@ -264,32 +238,8 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
}
}
-void intel_casf_enable(const struct intel_crtc_state *crtc_state)
+void intel_casf_setup(const struct intel_crtc_state *crtc_state)
{
- struct intel_display *display = to_intel_display(crtc_state);
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- u32 sharpness_ctl;
-
intel_casf_filter_lut_load(crtc_state);
-
intel_casf_write_coeff(crtc_state);
-
- sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength);
-
- sharpness_ctl |= crtc_state->pch_pfit.casf.win_size;
-
- intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
-
- skl_scaler_setup_casf(crtc_state);
-}
-
-void intel_casf_disable(const struct intel_crtc_state *crtc_state)
-{
- struct intel_display *display = to_intel_display(crtc_state);
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-
- intel_de_write(display, SKL_PS_CTRL(crtc->pipe, 1), 0);
- intel_de_write(display, SKL_PS_WIN_POS(crtc->pipe, 1), 0);
- intel_de_write(display, SHARPNESS_CTL(crtc->pipe), 0);
- intel_de_write(display, SKL_PS_WIN_SZ(crtc->pipe, 1), 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_casf.h b/drivers/gpu/drm/i915/display/intel_casf.h
index c4f984b73348..3ebb7522af0a 100644
--- a/drivers/gpu/drm/i915/display/intel_casf.h
+++ b/drivers/gpu/drm/i915/display/intel_casf.h
@@ -11,11 +11,7 @@
struct intel_crtc_state;
int intel_casf_compute_config(struct intel_crtc_state *crtc_state);
-void intel_casf_update_strength(const struct intel_crtc_state *new_crtc_state);
void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state);
-void intel_casf_enable(const struct intel_crtc_state *crtc_state);
-void intel_casf_disable(const struct intel_crtc_state *crtc_state);
-void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state);
-bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state);
+void intel_casf_setup(const struct intel_crtc_state *crtc_state);
#endif /* __INTEL_CASF_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e02e69467871..58a654ca0d20 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -58,7 +58,6 @@
#include "intel_audio.h"
#include "intel_bo.h"
#include "intel_bw.h"
-#include "intel_casf.h"
#include "intel_cdclk.h"
#include "intel_clock_gating.h"
#include "intel_color.h"
@@ -988,24 +987,6 @@ static bool audio_disabling(const struct intel_crtc_state *old_crtc_state,
memcmp(old_crtc_state->eld, new_crtc_state->eld, MAX_ELD_BYTES) != 0);
}
-static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
- const struct intel_crtc_state *old_crtc_state)
-{
- if (!new_crtc_state->hw.active)
- return false;
-
- return is_enabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
-}
-
-static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
- const struct intel_crtc_state *new_crtc_state)
-{
- if (!new_crtc_state->hw.active)
- return false;
-
- return is_disabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
-}
-
static bool intel_crtc_lobf_enabling(const struct intel_crtc_state *old_crtc_state,
const struct intel_crtc_state *new_crtc_state)
{
@@ -1187,9 +1168,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
if (audio_disabling(old_crtc_state, new_crtc_state))
intel_encoders_audio_disable(state, crtc);
- if (intel_casf_disabling(old_crtc_state, new_crtc_state))
- intel_casf_disable(new_crtc_state);
-
intel_drrs_deactivate(old_crtc_state);
if (hsw_ips_pre_update(state, crtc))
@@ -4308,14 +4286,9 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
return ret;
}
- ret = intel_casf_compute_config(crtc_state);
- if (ret)
- return ret;
-
if (DISPLAY_VER(display) >= 9) {
if (intel_crtc_needs_modeset(crtc_state) ||
- intel_crtc_needs_fastset(crtc_state) ||
- intel_casf_needs_scaler(crtc_state)) {
+ intel_crtc_needs_fastset(crtc_state)) {
ret = skl_update_scaler_crtc(crtc_state);
if (ret)
return ret;
@@ -6817,11 +6790,6 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
intel_vrr_set_transcoder_timings(new_crtc_state);
}
- if (intel_casf_enabling(new_crtc_state, old_crtc_state))
- intel_casf_enable(new_crtc_state);
- else if (new_crtc_state->pch_pfit.casf.strength != old_crtc_state->pch_pfit.casf.strength)
- intel_casf_update_strength(new_crtc_state);
-
intel_fbc_update(state, crtc);
drm_WARN_ON(display->drm, !intel_display_power_is_enabled(display, POWER_DOMAIN_DC_OFF));
diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c b/drivers/gpu/drm/i915/display/intel_pfit.c
index 6dda496190e0..e04ca960f115 100644
--- a/drivers/gpu/drm/i915/display/intel_pfit.c
+++ b/drivers/gpu/drm/i915/display/intel_pfit.c
@@ -186,6 +186,7 @@ static int pch_panel_fitting(struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
@@ -195,7 +196,8 @@ static int pch_panel_fitting(struct intel_crtc_state *crtc_state,
/* Native modes don't need fitting */
if (adjusted_mode->crtc_hdisplay == pipe_src_w &&
adjusted_mode->crtc_vdisplay == pipe_src_h &&
- crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
+ crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420 &&
+ crtc_state->hw.sharpness_strength == 0)
return 0;
switch (conn_state->scaling_mode) {
@@ -249,6 +251,15 @@ static int pch_panel_fitting(struct intel_crtc_state *crtc_state,
return -EINVAL;
}
+ if (crtc_state->hw.sharpness_strength &&
+ (width != pipe_src_w || height != pipe_src_h ||
+ crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB)) {
+ drm_dbg_kms(display->drm,
+ "[CRTC:%d:%s] no scaling/YCbCr output with sharpness filter\n",
+ crtc->base.base.id, crtc->base.name);
+ return -EINVAL;
+ }
+
drm_rect_init(&crtc_state->pch_pfit.dst,
x, y, width, height);
crtc_state->pch_pfit.enabled = true;
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 762f4bb46c2d..308b8d363bba 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -270,6 +270,11 @@ int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state)
{
const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode;
int width, height;
+ int ret;
+
+ ret = intel_casf_compute_config(crtc_state);
+ if (ret)
+ return ret;
if (crtc_state->pch_pfit.enabled) {
width = drm_rect_width(&crtc_state->pch_pfit.dst);
@@ -284,8 +289,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state)
drm_rect_width(&crtc_state->pipe_src),
drm_rect_height(&crtc_state->pipe_src),
width, height, NULL, 0,
- crtc_state->pch_pfit.enabled ||
- intel_casf_needs_scaler(crtc_state));
+ crtc_state->pch_pfit.enabled);
}
/**
@@ -534,14 +538,11 @@ static int setup_crtc_scaler(struct intel_atomic_state *state,
struct intel_crtc_scaler_state *scaler_state =
&crtc_state->scaler_state;
- if (intel_casf_needs_scaler(crtc_state) && crtc_state->pch_pfit.enabled)
- return -EINVAL;
-
return intel_atomic_setup_scaler(crtc_state,
hweight32(scaler_state->scaler_users),
crtc, "CRTC", crtc->base.base.id,
NULL, &scaler_state->scaler_id,
- intel_casf_needs_scaler(crtc_state));
+ crtc_state->pch_pfit.casf.enable);
}
static int setup_plane_scaler(struct intel_atomic_state *state,
@@ -757,43 +758,14 @@ static void skl_scaler_setup_filter(struct intel_display *display,
}
}
-void skl_scaler_setup_casf(const struct intel_crtc_state *crtc_state)
+static u32 casf_sharpness_ctl(const struct intel_crtc_state *crtc_state)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct intel_display *display = to_intel_display(crtc);
- const struct drm_display_mode *adjusted_mode =
- &crtc_state->hw.adjusted_mode;
- const struct intel_crtc_scaler_state *scaler_state =
- &crtc_state->scaler_state;
- struct drm_rect src, dest;
- int id, width, height;
- int x = 0, y = 0;
- enum pipe pipe = crtc->pipe;
- u32 ps_ctrl;
+ if (!crtc_state->pch_pfit.casf.enable)
+ return 0;
- width = adjusted_mode->crtc_hdisplay;
- height = adjusted_mode->crtc_vdisplay;
-
- drm_rect_init(&dest, x, y, width, height);
-
- width = drm_rect_width(&dest);
- height = drm_rect_height(&dest);
- id = scaler_state->scaler_id;
-
- drm_rect_init(&src, 0, 0,
- drm_rect_width(&crtc_state->pipe_src) << 16,
- drm_rect_height(&crtc_state->pipe_src) << 16);
-
- trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
-
- ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
- skl_scaler_get_filter_select(crtc_state->hw.scaling_filter, true);
-
- intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
- intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
- PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
- intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
- PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
+ return FILTER_EN |
+ FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength) |
+ crtc_state->pch_pfit.casf.win_size;
}
void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
@@ -837,12 +809,20 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
id = scaler_state->scaler_id;
ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode |
- skl_scaler_get_filter_select(crtc_state->hw.scaling_filter, false);
+ skl_scaler_get_filter_select(crtc_state->hw.scaling_filter,
+ crtc_state->pch_pfit.casf.enable);
trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
- skl_scaler_setup_filter(display, NULL, pipe, id, 0,
- crtc_state->hw.scaling_filter);
+ if (crtc_state->pch_pfit.casf.enable)
+ intel_casf_setup(crtc_state);
+ else
+ skl_scaler_setup_filter(display, NULL, pipe, id, 0,
+ crtc_state->hw.scaling_filter);
+
+ if (scaler_has_casf(display, id))
+ intel_de_write_fw(display, SHARPNESS_CTL(crtc->pipe),
+ casf_sharpness_ctl(crtc_state));
intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
@@ -930,6 +910,9 @@ static void skl_detach_scaler(struct intel_dsb *dsb,
trace_intel_scaler_disable_arm(crtc, id);
+ if (scaler_has_casf(display, id))
+ intel_de_write_dsb(display, dsb, SHARPNESS_CTL(crtc->pipe), 0);
+
intel_de_write_dsb(display, dsb, SKL_PS_CTRL(crtc->pipe, id), 0);
intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(crtc->pipe, id), 0);
intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(crtc->pipe, id), 0);
@@ -983,18 +966,16 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
if (scaler_has_casf(display, i))
intel_casf_sharpness_get_config(crtc_state);
- if (!crtc_state->pch_pfit.casf.enable)
- crtc_state->pch_pfit.enabled = true;
+ crtc_state->pch_pfit.enabled = true;
pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
- if (!crtc_state->pch_pfit.casf.enable)
- drm_rect_init(&crtc_state->pch_pfit.dst,
- REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
- REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
- REG_FIELD_GET(PS_WIN_XSIZE_MASK, size),
- REG_FIELD_GET(PS_WIN_YSIZE_MASK, size));
+ drm_rect_init(&crtc_state->pch_pfit.dst,
+ REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
+ REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
+ REG_FIELD_GET(PS_WIN_XSIZE_MASK, size),
+ REG_FIELD_GET(PS_WIN_YSIZE_MASK, size));
scaler_state->scalers[i].in_use = true;
break;
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
index 20ecf373eb19..5deabca909e6 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.h
+++ b/drivers/gpu/drm/i915/display/skl_scaler.h
@@ -36,8 +36,6 @@ void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
-void skl_scaler_setup_casf(const struct intel_crtc_state *crtc_state);
-
enum drm_mode_status
skl_scaler_mode_valid(struct intel_display *display,
const struct drm_display_mode *mode,
--
2.52.0
^ permalink raw reply related [flat|nested] 39+ messages in thread* RE: [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-26 22:31 ` [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
@ 2026-03-31 8:11 ` Garg, Nemesa
2026-03-31 9:40 ` Ville Syrjälä
2026-03-31 9:48 ` Ville Syrjälä
1 sibling, 1 reply; 39+ messages in thread
From: Garg, Nemesa @ 2026-03-31 8:11 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
> -----Original Message-----
> From: Ville Syrjala <ville.syrjala@linux.intel.com>
> Sent: Friday, March 27, 2026 4:02 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; Garg, Nemesa <nemesa.garg@intel.com>
> Subject: [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly
> into the scaler code
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The sharpness filter is just a special mode of the pipe scaler.
> It doesn't warrant all this special casing everywhere. Just integrate it properly
> into the scaler code so that it's treated no different from the other pipe scaler
> uses (scaling,centering, YCbCr 4:2:0 output).
>
> Cc: Nemesa Garg <nemesa.garg@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_casf.c | 62 ++------------
> drivers/gpu/drm/i915/display/intel_casf.h | 6 +-
> drivers/gpu/drm/i915/display/intel_display.c | 34 +-------
> drivers/gpu/drm/i915/display/intel_pfit.c | 13 ++-
> drivers/gpu/drm/i915/display/skl_scaler.c | 85 ++++++++------------
> drivers/gpu/drm/i915/display/skl_scaler.h | 2 -
> 6 files changed, 53 insertions(+), 149 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_casf.c
> b/drivers/gpu/drm/i915/display/intel_casf.c
> index 21e84a4f9ff5..c2d2746c5f04 100644
> --- a/drivers/gpu/drm/i915/display/intel_casf.c
> +++ b/drivers/gpu/drm/i915/display/intel_casf.c
> @@ -75,20 +75,6 @@ static void intel_casf_filter_lut_load(const struct
> intel_crtc_state *crtc_state
> sharpness_lut[i]);
> }
>
> -void intel_casf_update_strength(const struct intel_crtc_state *crtc_state) -{
> - struct intel_display *display = to_intel_display(crtc_state);
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - int win_size;
> -
> - intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe),
> FILTER_STRENGTH_MASK,
> - FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength));
> -
> - win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));
> -
> - intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, 1), win_size);
> -}
> -
> static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state) {
> const struct drm_display_mode *mode = &crtc_state-
> >hw.adjusted_mode; @@ -102,19 +88,15 @@ static void
> intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
> crtc_state->pch_pfit.casf.win_size =
> SHARPNESS_FILTER_SIZE_7X7; }
>
> +static void intel_casf_scaler_compute_coef(struct intel_crtc_state
> +*crtc_state);
> +
> int intel_casf_compute_config(struct intel_crtc_state *crtc_state) {
> struct intel_display *display = to_intel_display(crtc_state);
>
> - if (!HAS_CASF(display))
> + if (crtc_state->hw.sharpness_strength == 0)
> return 0;
>
> - if (crtc_state->hw.sharpness_strength == 0) {
> - crtc_state->pch_pfit.casf.enable = false;
> - crtc_state->pch_pfit.casf.strength = 0;
> - return 0;
> - }
> -
> /* CASF with joiner not supported in hardware */
> if (crtc_state->joiner_pipes) {
> drm_dbg_kms(display->drm, "CASF not supported with
> joiner\n"); @@ -136,7 +118,7 @@ int intel_casf_compute_config(struct
> intel_crtc_state *crtc_state)
>
> intel_casf_compute_win_size(crtc_state);
>
> - intel_casf_scaler_compute_config(crtc_state);
> + intel_casf_scaler_compute_coef(crtc_state);
>
> return 0;
> }
> @@ -161,14 +143,6 @@ void intel_casf_sharpness_get_config(struct
> intel_crtc_state *crtc_state)
> }
> }
>
> -bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state) -{
> - if (crtc_state->pch_pfit.casf.enable)
> - return true;
> -
> - return false;
> -}
> -
> static int casf_coeff_tap(int i)
> {
> return i % SCALER_FILTER_NUM_TAPS;
> @@ -240,7 +214,7 @@ static void convert_sharpness_coef_binary(struct
> scaler_filter_coeff *coeff,
> }
> }
>
> -void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
> +static void intel_casf_scaler_compute_coef(struct intel_crtc_state
> +*crtc_state)
> {
> const u16 *filtercoeff;
> u16 filter_coeff[SCALER_FILTER_NUM_TAPS];
> @@ -264,32 +238,8 @@ void intel_casf_scaler_compute_config(struct
> intel_crtc_state *crtc_state)
> }
> }
>
> -void intel_casf_enable(const struct intel_crtc_state *crtc_state)
> +void intel_casf_setup(const struct intel_crtc_state *crtc_state)
> {
> - struct intel_display *display = to_intel_display(crtc_state);
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - u32 sharpness_ctl;
> -
> intel_casf_filter_lut_load(crtc_state);
> -
> intel_casf_write_coeff(crtc_state);
> -
> - sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state-
> >pch_pfit.casf.strength);
> -
> - sharpness_ctl |= crtc_state->pch_pfit.casf.win_size;
> -
> - intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
> -
> - skl_scaler_setup_casf(crtc_state);
> -}
> -
> -void intel_casf_disable(const struct intel_crtc_state *crtc_state) -{
> - struct intel_display *display = to_intel_display(crtc_state);
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -
> - intel_de_write(display, SKL_PS_CTRL(crtc->pipe, 1), 0);
> - intel_de_write(display, SKL_PS_WIN_POS(crtc->pipe, 1), 0);
> - intel_de_write(display, SHARPNESS_CTL(crtc->pipe), 0);
> - intel_de_write(display, SKL_PS_WIN_SZ(crtc->pipe, 1), 0);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_casf.h
> b/drivers/gpu/drm/i915/display/intel_casf.h
> index c4f984b73348..3ebb7522af0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_casf.h
> +++ b/drivers/gpu/drm/i915/display/intel_casf.h
> @@ -11,11 +11,7 @@
> struct intel_crtc_state;
>
> int intel_casf_compute_config(struct intel_crtc_state *crtc_state); -void
> intel_casf_update_strength(const struct intel_crtc_state *new_crtc_state);
> void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state); -void
> intel_casf_enable(const struct intel_crtc_state *crtc_state); -void
> intel_casf_disable(const struct intel_crtc_state *crtc_state); -void
> intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state); -bool
> intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state);
> +void intel_casf_setup(const struct intel_crtc_state *crtc_state);
>
> #endif /* __INTEL_CASF_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e02e69467871..58a654ca0d20 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -58,7 +58,6 @@
> #include "intel_audio.h"
> #include "intel_bo.h"
> #include "intel_bw.h"
> -#include "intel_casf.h"
> #include "intel_cdclk.h"
> #include "intel_clock_gating.h"
> #include "intel_color.h"
> @@ -988,24 +987,6 @@ static bool audio_disabling(const struct
> intel_crtc_state *old_crtc_state,
> memcmp(old_crtc_state->eld, new_crtc_state->eld,
> MAX_ELD_BYTES) != 0); }
>
> -static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
> - const struct intel_crtc_state *old_crtc_state)
> -{
> - if (!new_crtc_state->hw.active)
> - return false;
> -
> - return is_enabling(pch_pfit.casf.enable, old_crtc_state,
> new_crtc_state);
> -}
> -
> -static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
> - const struct intel_crtc_state *new_crtc_state)
> -{
> - if (!new_crtc_state->hw.active)
> - return false;
> -
> - return is_disabling(pch_pfit.casf.enable, old_crtc_state,
> new_crtc_state);
> -}
> -
> static bool intel_crtc_lobf_enabling(const struct intel_crtc_state
> *old_crtc_state,
> const struct intel_crtc_state
> *new_crtc_state) { @@ -1187,9 +1168,6 @@ static void
> intel_pre_plane_update(struct intel_atomic_state *state,
> if (audio_disabling(old_crtc_state, new_crtc_state))
> intel_encoders_audio_disable(state, crtc);
>
> - if (intel_casf_disabling(old_crtc_state, new_crtc_state))
> - intel_casf_disable(new_crtc_state);
> -
> intel_drrs_deactivate(old_crtc_state);
>
> if (hsw_ips_pre_update(state, crtc))
> @@ -4308,14 +4286,9 @@ static int intel_crtc_atomic_check(struct
> intel_atomic_state *state,
> return ret;
> }
>
> - ret = intel_casf_compute_config(crtc_state);
> - if (ret)
> - return ret;
> -
> if (DISPLAY_VER(display) >= 9) {
> if (intel_crtc_needs_modeset(crtc_state) ||
> - intel_crtc_needs_fastset(crtc_state) ||
> - intel_casf_needs_scaler(crtc_state)) {
> + intel_crtc_needs_fastset(crtc_state)) {
> ret = skl_update_scaler_crtc(crtc_state);
> if (ret)
> return ret;
> @@ -6817,11 +6790,6 @@ static void intel_pre_update_crtc(struct
> intel_atomic_state *state,
> intel_vrr_set_transcoder_timings(new_crtc_state);
> }
>
> - if (intel_casf_enabling(new_crtc_state, old_crtc_state))
> - intel_casf_enable(new_crtc_state);
> - else if (new_crtc_state->pch_pfit.casf.strength != old_crtc_state-
> >pch_pfit.casf.strength)
> - intel_casf_update_strength(new_crtc_state);
> -
> intel_fbc_update(state, crtc);
>
> drm_WARN_ON(display->drm,
> !intel_display_power_is_enabled(display, POWER_DOMAIN_DC_OFF)); diff --
> git a/drivers/gpu/drm/i915/display/intel_pfit.c
> b/drivers/gpu/drm/i915/display/intel_pfit.c
> index 6dda496190e0..e04ca960f115 100644
> --- a/drivers/gpu/drm/i915/display/intel_pfit.c
> +++ b/drivers/gpu/drm/i915/display/intel_pfit.c
> @@ -186,6 +186,7 @@ static int pch_panel_fitting(struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state *conn_state) {
> struct intel_display *display = to_intel_display(crtc_state);
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
> @@ -195,7 +196,8 @@ static int pch_panel_fitting(struct intel_crtc_state
> *crtc_state,
> /* Native modes don't need fitting */
> if (adjusted_mode->crtc_hdisplay == pipe_src_w &&
> adjusted_mode->crtc_vdisplay == pipe_src_h &&
> - crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> + crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420
> &&
> + crtc_state->hw.sharpness_strength == 0)
> return 0;
>
> switch (conn_state->scaling_mode) {
> @@ -249,6 +251,15 @@ static int pch_panel_fitting(struct intel_crtc_state
> *crtc_state,
> return -EINVAL;
> }
>
> + if (crtc_state->hw.sharpness_strength &&
> + (width != pipe_src_w || height != pipe_src_h ||
> + crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB)) {
> + drm_dbg_kms(display->drm,
> + "[CRTC:%d:%s] no scaling/YCbCr output with
> sharpness filter\n",
> + crtc->base.base.id, crtc->base.name);
> + return -EINVAL;
> + }
> +
>
Hi Ville,
Earlier I couldn’t understand much about how to integrate sharpness with pch_pfit but now I got it.
Thank you for addressing this.
drm_rect_init(&crtc_state->pch_pfit.dst,
> x, y, width, height);
> crtc_state->pch_pfit.enabled = true;
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
> b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 762f4bb46c2d..308b8d363bba 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -270,6 +270,11 @@ int skl_update_scaler_crtc(struct intel_crtc_state
> *crtc_state) {
> const struct drm_display_mode *pipe_mode = &crtc_state-
> >hw.pipe_mode;
> int width, height;
> + int ret;
> +
> + ret = intel_casf_compute_config(crtc_state);
> + if (ret)
> + return ret;
>
> if (crtc_state->pch_pfit.enabled) {
> width = drm_rect_width(&crtc_state->pch_pfit.dst);
> @@ -284,8 +289,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state
> *crtc_state)
> drm_rect_width(&crtc_state->pipe_src),
> drm_rect_height(&crtc_state->pipe_src),
> width, height, NULL, 0,
> - crtc_state->pch_pfit.enabled ||
> - intel_casf_needs_scaler(crtc_state));
> + crtc_state->pch_pfit.enabled);
> }
>
> /**
> @@ -534,14 +538,11 @@ static int setup_crtc_scaler(struct intel_atomic_state
> *state,
> struct intel_crtc_scaler_state *scaler_state =
> &crtc_state->scaler_state;
>
> - if (intel_casf_needs_scaler(crtc_state) && crtc_state-
> >pch_pfit.enabled)
> - return -EINVAL;
> -
> return intel_atomic_setup_scaler(crtc_state,
> hweight32(scaler_state-
> >scaler_users),
> crtc, "CRTC", crtc->base.base.id,
> NULL, &scaler_state->scaler_id,
> - intel_casf_needs_scaler(crtc_state));
> + crtc_state->pch_pfit.casf.enable);
> }
>
> static int setup_plane_scaler(struct intel_atomic_state *state, @@ -757,43
> +758,14 @@ static void skl_scaler_setup_filter(struct intel_display *display,
> }
> }
>
> -void skl_scaler_setup_casf(const struct intel_crtc_state *crtc_state)
> +static u32 casf_sharpness_ctl(const struct intel_crtc_state
> +*crtc_state)
> {
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct intel_display *display = to_intel_display(crtc);
> - const struct drm_display_mode *adjusted_mode =
> - &crtc_state->hw.adjusted_mode;
> - const struct intel_crtc_scaler_state *scaler_state =
> - &crtc_state->scaler_state;
> - struct drm_rect src, dest;
> - int id, width, height;
> - int x = 0, y = 0;
> - enum pipe pipe = crtc->pipe;
> - u32 ps_ctrl;
> + if (!crtc_state->pch_pfit.casf.enable)
> + return 0;
>
> - width = adjusted_mode->crtc_hdisplay;
> - height = adjusted_mode->crtc_vdisplay;
> -
> - drm_rect_init(&dest, x, y, width, height);
> -
> - width = drm_rect_width(&dest);
> - height = drm_rect_height(&dest);
> - id = scaler_state->scaler_id;
> -
> - drm_rect_init(&src, 0, 0,
> - drm_rect_width(&crtc_state->pipe_src) << 16,
> - drm_rect_height(&crtc_state->pipe_src) << 16);
> -
> - trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
> -
> - ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state-
> >scalers[id].mode |
> - skl_scaler_get_filter_select(crtc_state->hw.scaling_filter, true);
> -
> - intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
> - intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
> - PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
> - intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
> - PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
> + return FILTER_EN |
> + FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength) |
> + crtc_state->pch_pfit.casf.win_size;
> }
>
> void skl_pfit_enable(const struct intel_crtc_state *crtc_state) @@ -837,12
> +809,20 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
> id = scaler_state->scaler_id;
>
> ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state-
> >scalers[id].mode |
> - skl_scaler_get_filter_select(crtc_state->hw.scaling_filter,
> false);
> + skl_scaler_get_filter_select(crtc_state->hw.scaling_filter,
> + crtc_state->pch_pfit.casf.enable);
>
> trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
>
> - skl_scaler_setup_filter(display, NULL, pipe, id, 0,
> - crtc_state->hw.scaling_filter);
> + if (crtc_state->pch_pfit.casf.enable)
> + intel_casf_setup(crtc_state);
> + else
> + skl_scaler_setup_filter(display, NULL, pipe, id, 0,
> + crtc_state->hw.scaling_filter);
> +
> + if (scaler_has_casf(display, id))
> + intel_de_write_fw(display, SHARPNESS_CTL(crtc->pipe),
> + casf_sharpness_ctl(crtc_state));
>
> intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
>
I added intel_casf_update_strength() thinking that we should update only SHARPNESS_CTL register
only whenever there is a change in sharpness strength from user side.
So is it ok if we write all other things again ie all SKL registers along with SHARPNESS register, can there be any issue with this.
What is the correct way in general, I mean we should update only required things or we can update
whole part.
Also should we write VPHASE and HPHASE registers for sharpness.
Thanks and Regards,
Nemesa
> @@ -930,6 +910,9 @@ static void skl_detach_scaler(struct intel_dsb *dsb,
>
> trace_intel_scaler_disable_arm(crtc, id);
>
> + if (scaler_has_casf(display, id))
> + intel_de_write_dsb(display, dsb, SHARPNESS_CTL(crtc->pipe),
> 0);
> +
> intel_de_write_dsb(display, dsb, SKL_PS_CTRL(crtc->pipe, id), 0);
> intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(crtc->pipe, id), 0);
> intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(crtc->pipe, id), 0);
> @@ -983,18 +966,16 @@ void skl_scaler_get_config(struct intel_crtc_state
> *crtc_state)
> if (scaler_has_casf(display, i))
> intel_casf_sharpness_get_config(crtc_state);
>
> - if (!crtc_state->pch_pfit.casf.enable)
> - crtc_state->pch_pfit.enabled = true;
> + crtc_state->pch_pfit.enabled = true;
>
> pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
> size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
>
> - if (!crtc_state->pch_pfit.casf.enable)
> - drm_rect_init(&crtc_state->pch_pfit.dst,
> - REG_FIELD_GET(PS_WIN_XPOS_MASK,
> pos),
> - REG_FIELD_GET(PS_WIN_YPOS_MASK,
> pos),
> - REG_FIELD_GET(PS_WIN_XSIZE_MASK,
> size),
> - REG_FIELD_GET(PS_WIN_YSIZE_MASK,
> size));
> + drm_rect_init(&crtc_state->pch_pfit.dst,
> + REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
> + REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
> + REG_FIELD_GET(PS_WIN_XSIZE_MASK, size),
> + REG_FIELD_GET(PS_WIN_YSIZE_MASK, size));
>
> scaler_state->scalers[i].in_use = true;
> break;
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h
> b/drivers/gpu/drm/i915/display/skl_scaler.h
> index 20ecf373eb19..5deabca909e6 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.h
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.h
> @@ -36,8 +36,6 @@ void skl_scaler_disable(const struct intel_crtc_state
> *old_crtc_state);
>
> void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
>
> -void skl_scaler_setup_casf(const struct intel_crtc_state *crtc_state);
> -
> enum drm_mode_status
> skl_scaler_mode_valid(struct intel_display *display,
> const struct drm_display_mode *mode,
> --
> 2.52.0
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-31 8:11 ` Garg, Nemesa
@ 2026-03-31 9:40 ` Ville Syrjälä
0 siblings, 0 replies; 39+ messages in thread
From: Ville Syrjälä @ 2026-03-31 9:40 UTC (permalink / raw)
To: Garg, Nemesa
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
On Tue, Mar 31, 2026 at 08:11:48AM +0000, Garg, Nemesa wrote:
>
>
> > -----Original Message-----
> > From: Ville Syrjala <ville.syrjala@linux.intel.com>
> > Sent: Friday, March 27, 2026 4:02 AM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: intel-xe@lists.freedesktop.org; Garg, Nemesa <nemesa.garg@intel.com>
> > Subject: [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly
> > into the scaler code
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The sharpness filter is just a special mode of the pipe scaler.
> > It doesn't warrant all this special casing everywhere. Just integrate it properly
> > into the scaler code so that it's treated no different from the other pipe scaler
> > uses (scaling,centering, YCbCr 4:2:0 output).
> >
> > Cc: Nemesa Garg <nemesa.garg@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_casf.c | 62 ++------------
> > drivers/gpu/drm/i915/display/intel_casf.h | 6 +-
> > drivers/gpu/drm/i915/display/intel_display.c | 34 +-------
> > drivers/gpu/drm/i915/display/intel_pfit.c | 13 ++-
> > drivers/gpu/drm/i915/display/skl_scaler.c | 85 ++++++++------------
> > drivers/gpu/drm/i915/display/skl_scaler.h | 2 -
> > 6 files changed, 53 insertions(+), 149 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_casf.c
> > b/drivers/gpu/drm/i915/display/intel_casf.c
> > index 21e84a4f9ff5..c2d2746c5f04 100644
> > --- a/drivers/gpu/drm/i915/display/intel_casf.c
> > +++ b/drivers/gpu/drm/i915/display/intel_casf.c
> > @@ -75,20 +75,6 @@ static void intel_casf_filter_lut_load(const struct
> > intel_crtc_state *crtc_state
> > sharpness_lut[i]);
> > }
> >
> > -void intel_casf_update_strength(const struct intel_crtc_state *crtc_state) -{
> > - struct intel_display *display = to_intel_display(crtc_state);
> > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > - int win_size;
> > -
> > - intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe),
> > FILTER_STRENGTH_MASK,
> > - FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength));
> > -
> > - win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));
> > -
> > - intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, 1), win_size);
> > -}
> > -
> > static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state) {
> > const struct drm_display_mode *mode = &crtc_state-
> > >hw.adjusted_mode; @@ -102,19 +88,15 @@ static void
> > intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
> > crtc_state->pch_pfit.casf.win_size =
> > SHARPNESS_FILTER_SIZE_7X7; }
> >
> > +static void intel_casf_scaler_compute_coef(struct intel_crtc_state
> > +*crtc_state);
> > +
> > int intel_casf_compute_config(struct intel_crtc_state *crtc_state) {
> > struct intel_display *display = to_intel_display(crtc_state);
> >
> > - if (!HAS_CASF(display))
> > + if (crtc_state->hw.sharpness_strength == 0)
> > return 0;
> >
> > - if (crtc_state->hw.sharpness_strength == 0) {
> > - crtc_state->pch_pfit.casf.enable = false;
> > - crtc_state->pch_pfit.casf.strength = 0;
> > - return 0;
> > - }
> > -
> > /* CASF with joiner not supported in hardware */
> > if (crtc_state->joiner_pipes) {
> > drm_dbg_kms(display->drm, "CASF not supported with
> > joiner\n"); @@ -136,7 +118,7 @@ int intel_casf_compute_config(struct
> > intel_crtc_state *crtc_state)
> >
> > intel_casf_compute_win_size(crtc_state);
> >
> > - intel_casf_scaler_compute_config(crtc_state);
> > + intel_casf_scaler_compute_coef(crtc_state);
> >
> > return 0;
> > }
> > @@ -161,14 +143,6 @@ void intel_casf_sharpness_get_config(struct
> > intel_crtc_state *crtc_state)
> > }
> > }
> >
> > -bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state) -{
> > - if (crtc_state->pch_pfit.casf.enable)
> > - return true;
> > -
> > - return false;
> > -}
> > -
> > static int casf_coeff_tap(int i)
> > {
> > return i % SCALER_FILTER_NUM_TAPS;
> > @@ -240,7 +214,7 @@ static void convert_sharpness_coef_binary(struct
> > scaler_filter_coeff *coeff,
> > }
> > }
> >
> > -void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
> > +static void intel_casf_scaler_compute_coef(struct intel_crtc_state
> > +*crtc_state)
> > {
> > const u16 *filtercoeff;
> > u16 filter_coeff[SCALER_FILTER_NUM_TAPS];
> > @@ -264,32 +238,8 @@ void intel_casf_scaler_compute_config(struct
> > intel_crtc_state *crtc_state)
> > }
> > }
> >
> > -void intel_casf_enable(const struct intel_crtc_state *crtc_state)
> > +void intel_casf_setup(const struct intel_crtc_state *crtc_state)
> > {
> > - struct intel_display *display = to_intel_display(crtc_state);
> > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > - u32 sharpness_ctl;
> > -
> > intel_casf_filter_lut_load(crtc_state);
> > -
> > intel_casf_write_coeff(crtc_state);
> > -
> > - sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state-
> > >pch_pfit.casf.strength);
> > -
> > - sharpness_ctl |= crtc_state->pch_pfit.casf.win_size;
> > -
> > - intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
> > -
> > - skl_scaler_setup_casf(crtc_state);
> > -}
> > -
> > -void intel_casf_disable(const struct intel_crtc_state *crtc_state) -{
> > - struct intel_display *display = to_intel_display(crtc_state);
> > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > -
> > - intel_de_write(display, SKL_PS_CTRL(crtc->pipe, 1), 0);
> > - intel_de_write(display, SKL_PS_WIN_POS(crtc->pipe, 1), 0);
> > - intel_de_write(display, SHARPNESS_CTL(crtc->pipe), 0);
> > - intel_de_write(display, SKL_PS_WIN_SZ(crtc->pipe, 1), 0);
> > }
> > diff --git a/drivers/gpu/drm/i915/display/intel_casf.h
> > b/drivers/gpu/drm/i915/display/intel_casf.h
> > index c4f984b73348..3ebb7522af0a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_casf.h
> > +++ b/drivers/gpu/drm/i915/display/intel_casf.h
> > @@ -11,11 +11,7 @@
> > struct intel_crtc_state;
> >
> > int intel_casf_compute_config(struct intel_crtc_state *crtc_state); -void
> > intel_casf_update_strength(const struct intel_crtc_state *new_crtc_state);
> > void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state); -void
> > intel_casf_enable(const struct intel_crtc_state *crtc_state); -void
> > intel_casf_disable(const struct intel_crtc_state *crtc_state); -void
> > intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state); -bool
> > intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state);
> > +void intel_casf_setup(const struct intel_crtc_state *crtc_state);
> >
> > #endif /* __INTEL_CASF_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index e02e69467871..58a654ca0d20 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -58,7 +58,6 @@
> > #include "intel_audio.h"
> > #include "intel_bo.h"
> > #include "intel_bw.h"
> > -#include "intel_casf.h"
> > #include "intel_cdclk.h"
> > #include "intel_clock_gating.h"
> > #include "intel_color.h"
> > @@ -988,24 +987,6 @@ static bool audio_disabling(const struct
> > intel_crtc_state *old_crtc_state,
> > memcmp(old_crtc_state->eld, new_crtc_state->eld,
> > MAX_ELD_BYTES) != 0); }
> >
> > -static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
> > - const struct intel_crtc_state *old_crtc_state)
> > -{
> > - if (!new_crtc_state->hw.active)
> > - return false;
> > -
> > - return is_enabling(pch_pfit.casf.enable, old_crtc_state,
> > new_crtc_state);
> > -}
> > -
> > -static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
> > - const struct intel_crtc_state *new_crtc_state)
> > -{
> > - if (!new_crtc_state->hw.active)
> > - return false;
> > -
> > - return is_disabling(pch_pfit.casf.enable, old_crtc_state,
> > new_crtc_state);
> > -}
> > -
> > static bool intel_crtc_lobf_enabling(const struct intel_crtc_state
> > *old_crtc_state,
> > const struct intel_crtc_state
> > *new_crtc_state) { @@ -1187,9 +1168,6 @@ static void
> > intel_pre_plane_update(struct intel_atomic_state *state,
> > if (audio_disabling(old_crtc_state, new_crtc_state))
> > intel_encoders_audio_disable(state, crtc);
> >
> > - if (intel_casf_disabling(old_crtc_state, new_crtc_state))
> > - intel_casf_disable(new_crtc_state);
> > -
> > intel_drrs_deactivate(old_crtc_state);
> >
> > if (hsw_ips_pre_update(state, crtc))
> > @@ -4308,14 +4286,9 @@ static int intel_crtc_atomic_check(struct
> > intel_atomic_state *state,
> > return ret;
> > }
> >
> > - ret = intel_casf_compute_config(crtc_state);
> > - if (ret)
> > - return ret;
> > -
> > if (DISPLAY_VER(display) >= 9) {
> > if (intel_crtc_needs_modeset(crtc_state) ||
> > - intel_crtc_needs_fastset(crtc_state) ||
> > - intel_casf_needs_scaler(crtc_state)) {
> > + intel_crtc_needs_fastset(crtc_state)) {
> > ret = skl_update_scaler_crtc(crtc_state);
> > if (ret)
> > return ret;
> > @@ -6817,11 +6790,6 @@ static void intel_pre_update_crtc(struct
> > intel_atomic_state *state,
> > intel_vrr_set_transcoder_timings(new_crtc_state);
> > }
> >
> > - if (intel_casf_enabling(new_crtc_state, old_crtc_state))
> > - intel_casf_enable(new_crtc_state);
> > - else if (new_crtc_state->pch_pfit.casf.strength != old_crtc_state-
> > >pch_pfit.casf.strength)
> > - intel_casf_update_strength(new_crtc_state);
> > -
> > intel_fbc_update(state, crtc);
> >
> > drm_WARN_ON(display->drm,
> > !intel_display_power_is_enabled(display, POWER_DOMAIN_DC_OFF)); diff --
> > git a/drivers/gpu/drm/i915/display/intel_pfit.c
> > b/drivers/gpu/drm/i915/display/intel_pfit.c
> > index 6dda496190e0..e04ca960f115 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pfit.c
> > +++ b/drivers/gpu/drm/i915/display/intel_pfit.c
> > @@ -186,6 +186,7 @@ static int pch_panel_fitting(struct intel_crtc_state
> > *crtc_state,
> > const struct drm_connector_state *conn_state) {
> > struct intel_display *display = to_intel_display(crtc_state);
> > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > const struct drm_display_mode *adjusted_mode =
> > &crtc_state->hw.adjusted_mode;
> > int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
> > @@ -195,7 +196,8 @@ static int pch_panel_fitting(struct intel_crtc_state
> > *crtc_state,
> > /* Native modes don't need fitting */
> > if (adjusted_mode->crtc_hdisplay == pipe_src_w &&
> > adjusted_mode->crtc_vdisplay == pipe_src_h &&
> > - crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> > + crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420
> > &&
> > + crtc_state->hw.sharpness_strength == 0)
> > return 0;
> >
> > switch (conn_state->scaling_mode) {
> > @@ -249,6 +251,15 @@ static int pch_panel_fitting(struct intel_crtc_state
> > *crtc_state,
> > return -EINVAL;
> > }
> >
> > + if (crtc_state->hw.sharpness_strength &&
> > + (width != pipe_src_w || height != pipe_src_h ||
> > + crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB)) {
> > + drm_dbg_kms(display->drm,
> > + "[CRTC:%d:%s] no scaling/YCbCr output with
> > sharpness filter\n",
> > + crtc->base.base.id, crtc->base.name);
> > + return -EINVAL;
> > + }
> > +
> >
>
> Hi Ville,
>
> Earlier I couldn’t understand much about how to integrate sharpness with pch_pfit but now I got it.
> Thank you for addressing this.
>
> drm_rect_init(&crtc_state->pch_pfit.dst,
> > x, y, width, height);
> > crtc_state->pch_pfit.enabled = true;
> > diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c
> > b/drivers/gpu/drm/i915/display/skl_scaler.c
> > index 762f4bb46c2d..308b8d363bba 100644
> > --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> > +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> > @@ -270,6 +270,11 @@ int skl_update_scaler_crtc(struct intel_crtc_state
> > *crtc_state) {
> > const struct drm_display_mode *pipe_mode = &crtc_state-
> > >hw.pipe_mode;
> > int width, height;
> > + int ret;
> > +
> > + ret = intel_casf_compute_config(crtc_state);
> > + if (ret)
> > + return ret;
> >
> > if (crtc_state->pch_pfit.enabled) {
> > width = drm_rect_width(&crtc_state->pch_pfit.dst);
> > @@ -284,8 +289,7 @@ int skl_update_scaler_crtc(struct intel_crtc_state
> > *crtc_state)
> > drm_rect_width(&crtc_state->pipe_src),
> > drm_rect_height(&crtc_state->pipe_src),
> > width, height, NULL, 0,
> > - crtc_state->pch_pfit.enabled ||
> > - intel_casf_needs_scaler(crtc_state));
> > + crtc_state->pch_pfit.enabled);
> > }
> >
> > /**
> > @@ -534,14 +538,11 @@ static int setup_crtc_scaler(struct intel_atomic_state
> > *state,
> > struct intel_crtc_scaler_state *scaler_state =
> > &crtc_state->scaler_state;
> >
> > - if (intel_casf_needs_scaler(crtc_state) && crtc_state-
> > >pch_pfit.enabled)
> > - return -EINVAL;
> > -
> > return intel_atomic_setup_scaler(crtc_state,
> > hweight32(scaler_state-
> > >scaler_users),
> > crtc, "CRTC", crtc->base.base.id,
> > NULL, &scaler_state->scaler_id,
> > - intel_casf_needs_scaler(crtc_state));
> > + crtc_state->pch_pfit.casf.enable);
> > }
> >
> > static int setup_plane_scaler(struct intel_atomic_state *state, @@ -757,43
> > +758,14 @@ static void skl_scaler_setup_filter(struct intel_display *display,
> > }
> > }
> >
> > -void skl_scaler_setup_casf(const struct intel_crtc_state *crtc_state)
> > +static u32 casf_sharpness_ctl(const struct intel_crtc_state
> > +*crtc_state)
> > {
> > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > - struct intel_display *display = to_intel_display(crtc);
> > - const struct drm_display_mode *adjusted_mode =
> > - &crtc_state->hw.adjusted_mode;
> > - const struct intel_crtc_scaler_state *scaler_state =
> > - &crtc_state->scaler_state;
> > - struct drm_rect src, dest;
> > - int id, width, height;
> > - int x = 0, y = 0;
> > - enum pipe pipe = crtc->pipe;
> > - u32 ps_ctrl;
> > + if (!crtc_state->pch_pfit.casf.enable)
> > + return 0;
> >
> > - width = adjusted_mode->crtc_hdisplay;
> > - height = adjusted_mode->crtc_vdisplay;
> > -
> > - drm_rect_init(&dest, x, y, width, height);
> > -
> > - width = drm_rect_width(&dest);
> > - height = drm_rect_height(&dest);
> > - id = scaler_state->scaler_id;
> > -
> > - drm_rect_init(&src, 0, 0,
> > - drm_rect_width(&crtc_state->pipe_src) << 16,
> > - drm_rect_height(&crtc_state->pipe_src) << 16);
> > -
> > - trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
> > -
> > - ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state-
> > >scalers[id].mode |
> > - skl_scaler_get_filter_select(crtc_state->hw.scaling_filter, true);
> > -
> > - intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
> > - intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id),
> > - PS_WIN_XPOS(x) | PS_WIN_YPOS(y));
> > - intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id),
> > - PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height));
> > + return FILTER_EN |
> > + FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength) |
> > + crtc_state->pch_pfit.casf.win_size;
> > }
> >
> > void skl_pfit_enable(const struct intel_crtc_state *crtc_state) @@ -837,12
> > +809,20 @@ void skl_pfit_enable(const struct intel_crtc_state *crtc_state)
> > id = scaler_state->scaler_id;
> >
> > ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state-
> > >scalers[id].mode |
> > - skl_scaler_get_filter_select(crtc_state->hw.scaling_filter,
> > false);
> > + skl_scaler_get_filter_select(crtc_state->hw.scaling_filter,
> > + crtc_state->pch_pfit.casf.enable);
> >
> > trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height);
> >
> > - skl_scaler_setup_filter(display, NULL, pipe, id, 0,
> > - crtc_state->hw.scaling_filter);
> > + if (crtc_state->pch_pfit.casf.enable)
> > + intel_casf_setup(crtc_state);
> > + else
> > + skl_scaler_setup_filter(display, NULL, pipe, id, 0,
> > + crtc_state->hw.scaling_filter);
> > +
> > + if (scaler_has_casf(display, id))
> > + intel_de_write_fw(display, SHARPNESS_CTL(crtc->pipe),
> > + casf_sharpness_ctl(crtc_state));
> >
> > intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl);
> >
>
> I added intel_casf_update_strength() thinking that we should update only SHARPNESS_CTL register
> only whenever there is a change in sharpness strength from user side.
> So is it ok if we write all other things again ie all SKL registers along with SHARPNESS register, can there be any issue with this.
Apart from the slight performance cost there is generally no problem
with rewriting most registers. Though registers with side effects
(eg. arming registers) are an exception to the rule. One must
consider the side effects before blindly writing to such registers.
That's not an issue here since we do want to write to the arming
registers as well, though we do want to make sure those are
written last.
> What is the correct way in general, I mean we should update only required things or we can update
> whole part.
For the most part we just blast in the whole thing. See eg. all
the plane .update_(no)arm() implementations. Optimizing out redundant
writes would be possible, but the complexity of figuring out what is
redundant is probably not worth it.
> Also should we write VPHASE and HPHASE registers for sharpness.
I don't know if there's some magic in the hardware to ignore the
phase registers when the sharpness filter is active. I suspect
it's still using them. In any case it's best to write everything
to make sure it's always consistent. We only skip some of the heavier
stuff like the programmable coefficients, when we know for sure that
they're not going to be used.
>
> Thanks and Regards,
> Nemesa
>
> > @@ -930,6 +910,9 @@ static void skl_detach_scaler(struct intel_dsb *dsb,
> >
> > trace_intel_scaler_disable_arm(crtc, id);
> >
> > + if (scaler_has_casf(display, id))
> > + intel_de_write_dsb(display, dsb, SHARPNESS_CTL(crtc->pipe),
> > 0);
> > +
> > intel_de_write_dsb(display, dsb, SKL_PS_CTRL(crtc->pipe, id), 0);
> > intel_de_write_dsb(display, dsb, SKL_PS_WIN_POS(crtc->pipe, id), 0);
> > intel_de_write_dsb(display, dsb, SKL_PS_WIN_SZ(crtc->pipe, id), 0);
> > @@ -983,18 +966,16 @@ void skl_scaler_get_config(struct intel_crtc_state
> > *crtc_state)
> > if (scaler_has_casf(display, i))
> > intel_casf_sharpness_get_config(crtc_state);
> >
> > - if (!crtc_state->pch_pfit.casf.enable)
> > - crtc_state->pch_pfit.enabled = true;
> > + crtc_state->pch_pfit.enabled = true;
> >
> > pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
> > size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
> >
> > - if (!crtc_state->pch_pfit.casf.enable)
> > - drm_rect_init(&crtc_state->pch_pfit.dst,
> > - REG_FIELD_GET(PS_WIN_XPOS_MASK,
> > pos),
> > - REG_FIELD_GET(PS_WIN_YPOS_MASK,
> > pos),
> > - REG_FIELD_GET(PS_WIN_XSIZE_MASK,
> > size),
> > - REG_FIELD_GET(PS_WIN_YSIZE_MASK,
> > size));
> > + drm_rect_init(&crtc_state->pch_pfit.dst,
> > + REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
> > + REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
> > + REG_FIELD_GET(PS_WIN_XSIZE_MASK, size),
> > + REG_FIELD_GET(PS_WIN_YSIZE_MASK, size));
> >
> > scaler_state->scalers[i].in_use = true;
> > break;
> > diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h
> > b/drivers/gpu/drm/i915/display/skl_scaler.h
> > index 20ecf373eb19..5deabca909e6 100644
> > --- a/drivers/gpu/drm/i915/display/skl_scaler.h
> > +++ b/drivers/gpu/drm/i915/display/skl_scaler.h
> > @@ -36,8 +36,6 @@ void skl_scaler_disable(const struct intel_crtc_state
> > *old_crtc_state);
> >
> > void skl_scaler_get_config(struct intel_crtc_state *crtc_state);
> >
> > -void skl_scaler_setup_casf(const struct intel_crtc_state *crtc_state);
> > -
> > enum drm_mode_status
> > skl_scaler_mode_valid(struct intel_display *display,
> > const struct drm_display_mode *mode,
> > --
> > 2.52.0
>
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-26 22:31 ` [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
2026-03-31 8:11 ` Garg, Nemesa
@ 2026-03-31 9:48 ` Ville Syrjälä
2026-03-31 13:33 ` Garg, Nemesa
1 sibling, 1 reply; 39+ messages in thread
From: Ville Syrjälä @ 2026-03-31 9:48 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Nemesa Garg
On Fri, Mar 27, 2026 at 12:31:39AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The sharpness filter is just a special mode of the pipe scaler.
> It doesn't warrant all this special casing everywhere. Just
> integrate it properly into the scaler code so that it's treated
> no different from the other pipe scaler uses (scaling,centering,
> YCbCr 4:2:0 output).
>
> Cc: Nemesa Garg <nemesa.garg@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_casf.c | 62 ++------------
> drivers/gpu/drm/i915/display/intel_casf.h | 6 +-
> drivers/gpu/drm/i915/display/intel_display.c | 34 +-------
> drivers/gpu/drm/i915/display/intel_pfit.c | 13 ++-
> drivers/gpu/drm/i915/display/skl_scaler.c | 85 ++++++++------------
> drivers/gpu/drm/i915/display/skl_scaler.h | 2 -
> 6 files changed, 53 insertions(+), 149 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c
> index 21e84a4f9ff5..c2d2746c5f04 100644
> --- a/drivers/gpu/drm/i915/display/intel_casf.c
> +++ b/drivers/gpu/drm/i915/display/intel_casf.c
> @@ -75,20 +75,6 @@ static void intel_casf_filter_lut_load(const struct intel_crtc_state *crtc_state
> sharpness_lut[i]);
> }
>
> -void intel_casf_update_strength(const struct intel_crtc_state *crtc_state)
> -{
> - struct intel_display *display = to_intel_display(crtc_state);
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - int win_size;
> -
> - intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe), FILTER_STRENGTH_MASK,
> - FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength));
> -
> - win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));
> -
> - intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, 1), win_size);
> -}
> -
> static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
> {
> const struct drm_display_mode *mode = &crtc_state->hw.adjusted_mode;
> @@ -102,19 +88,15 @@ static void intel_casf_compute_win_size(struct intel_crtc_state *crtc_state)
> crtc_state->pch_pfit.casf.win_size = SHARPNESS_FILTER_SIZE_7X7;
> }
>
> +static void intel_casf_scaler_compute_coef(struct intel_crtc_state *crtc_state);
> +
> int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(crtc_state);
>
> - if (!HAS_CASF(display))
> + if (crtc_state->hw.sharpness_strength == 0)
> return 0;
>
> - if (crtc_state->hw.sharpness_strength == 0) {
> - crtc_state->pch_pfit.casf.enable = false;
> - crtc_state->pch_pfit.casf.strength = 0;
> - return 0;
> - }
> -
> /* CASF with joiner not supported in hardware */
> if (crtc_state->joiner_pipes) {
> drm_dbg_kms(display->drm, "CASF not supported with joiner\n");
> @@ -136,7 +118,7 @@ int intel_casf_compute_config(struct intel_crtc_state *crtc_state)
>
> intel_casf_compute_win_size(crtc_state);
>
> - intel_casf_scaler_compute_config(crtc_state);
> + intel_casf_scaler_compute_coef(crtc_state);
>
> return 0;
> }
> @@ -161,14 +143,6 @@ void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state)
> }
> }
>
> -bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state)
> -{
> - if (crtc_state->pch_pfit.casf.enable)
> - return true;
> -
> - return false;
> -}
> -
> static int casf_coeff_tap(int i)
> {
> return i % SCALER_FILTER_NUM_TAPS;
> @@ -240,7 +214,7 @@ static void convert_sharpness_coef_binary(struct scaler_filter_coeff *coeff,
> }
> }
>
> -void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
> +static void intel_casf_scaler_compute_coef(struct intel_crtc_state *crtc_state)
> {
> const u16 *filtercoeff;
> u16 filter_coeff[SCALER_FILTER_NUM_TAPS];
> @@ -264,32 +238,8 @@ void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state)
> }
> }
>
> -void intel_casf_enable(const struct intel_crtc_state *crtc_state)
> +void intel_casf_setup(const struct intel_crtc_state *crtc_state)
> {
> - struct intel_display *display = to_intel_display(crtc_state);
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - u32 sharpness_ctl;
> -
> intel_casf_filter_lut_load(crtc_state);
> -
> intel_casf_write_coeff(crtc_state);
> -
> - sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength);
> -
> - sharpness_ctl |= crtc_state->pch_pfit.casf.win_size;
> -
> - intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
> -
> - skl_scaler_setup_casf(crtc_state);
> -}
> -
> -void intel_casf_disable(const struct intel_crtc_state *crtc_state)
> -{
> - struct intel_display *display = to_intel_display(crtc_state);
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -
> - intel_de_write(display, SKL_PS_CTRL(crtc->pipe, 1), 0);
> - intel_de_write(display, SKL_PS_WIN_POS(crtc->pipe, 1), 0);
> - intel_de_write(display, SHARPNESS_CTL(crtc->pipe), 0);
> - intel_de_write(display, SKL_PS_WIN_SZ(crtc->pipe, 1), 0);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_casf.h b/drivers/gpu/drm/i915/display/intel_casf.h
> index c4f984b73348..3ebb7522af0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_casf.h
> +++ b/drivers/gpu/drm/i915/display/intel_casf.h
> @@ -11,11 +11,7 @@
> struct intel_crtc_state;
>
> int intel_casf_compute_config(struct intel_crtc_state *crtc_state);
> -void intel_casf_update_strength(const struct intel_crtc_state *new_crtc_state);
> void intel_casf_sharpness_get_config(struct intel_crtc_state *crtc_state);
> -void intel_casf_enable(const struct intel_crtc_state *crtc_state);
> -void intel_casf_disable(const struct intel_crtc_state *crtc_state);
> -void intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state);
> -bool intel_casf_needs_scaler(const struct intel_crtc_state *crtc_state);
> +void intel_casf_setup(const struct intel_crtc_state *crtc_state);
>
> #endif /* __INTEL_CASF_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index e02e69467871..58a654ca0d20 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -58,7 +58,6 @@
> #include "intel_audio.h"
> #include "intel_bo.h"
> #include "intel_bw.h"
> -#include "intel_casf.h"
> #include "intel_cdclk.h"
> #include "intel_clock_gating.h"
> #include "intel_color.h"
> @@ -988,24 +987,6 @@ static bool audio_disabling(const struct intel_crtc_state *old_crtc_state,
> memcmp(old_crtc_state->eld, new_crtc_state->eld, MAX_ELD_BYTES) != 0);
> }
>
> -static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
> - const struct intel_crtc_state *old_crtc_state)
> -{
> - if (!new_crtc_state->hw.active)
> - return false;
> -
> - return is_enabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
> -}
> -
> -static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
> - const struct intel_crtc_state *new_crtc_state)
> -{
> - if (!new_crtc_state->hw.active)
> - return false;
> -
> - return is_disabling(pch_pfit.casf.enable, old_crtc_state, new_crtc_state);
> -}
> -
> static bool intel_crtc_lobf_enabling(const struct intel_crtc_state *old_crtc_state,
> const struct intel_crtc_state *new_crtc_state)
> {
> @@ -1187,9 +1168,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state,
> if (audio_disabling(old_crtc_state, new_crtc_state))
> intel_encoders_audio_disable(state, crtc);
>
> - if (intel_casf_disabling(old_crtc_state, new_crtc_state))
> - intel_casf_disable(new_crtc_state);
> -
> intel_drrs_deactivate(old_crtc_state);
>
> if (hsw_ips_pre_update(state, crtc))
> @@ -4308,14 +4286,9 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
> return ret;
> }
>
> - ret = intel_casf_compute_config(crtc_state);
> - if (ret)
> - return ret;
> -
> if (DISPLAY_VER(display) >= 9) {
> if (intel_crtc_needs_modeset(crtc_state) ||
> - intel_crtc_needs_fastset(crtc_state) ||
> - intel_casf_needs_scaler(crtc_state)) {
> + intel_crtc_needs_fastset(crtc_state)) {
> ret = skl_update_scaler_crtc(crtc_state);
> if (ret)
> return ret;
> @@ -6817,11 +6790,6 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
> intel_vrr_set_transcoder_timings(new_crtc_state);
> }
>
> - if (intel_casf_enabling(new_crtc_state, old_crtc_state))
> - intel_casf_enable(new_crtc_state);
> - else if (new_crtc_state->pch_pfit.casf.strength != old_crtc_state->pch_pfit.casf.strength)
> - intel_casf_update_strength(new_crtc_state);
> -
> intel_fbc_update(state, crtc);
>
> drm_WARN_ON(display->drm, !intel_display_power_is_enabled(display, POWER_DOMAIN_DC_OFF));
> diff --git a/drivers/gpu/drm/i915/display/intel_pfit.c b/drivers/gpu/drm/i915/display/intel_pfit.c
> index 6dda496190e0..e04ca960f115 100644
> --- a/drivers/gpu/drm/i915/display/intel_pfit.c
> +++ b/drivers/gpu/drm/i915/display/intel_pfit.c
> @@ -186,6 +186,7 @@ static int pch_panel_fitting(struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state)
> {
> struct intel_display *display = to_intel_display(crtc_state);
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> const struct drm_display_mode *adjusted_mode =
> &crtc_state->hw.adjusted_mode;
> int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
> @@ -195,7 +196,8 @@ static int pch_panel_fitting(struct intel_crtc_state *crtc_state,
> /* Native modes don't need fitting */
> if (adjusted_mode->crtc_hdisplay == pipe_src_w &&
> adjusted_mode->crtc_vdisplay == pipe_src_h &&
> - crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> + crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420 &&
> + crtc_state->hw.sharpness_strength == 0)
> return 0;
>
> switch (conn_state->scaling_mode) {
> @@ -249,6 +251,15 @@ static int pch_panel_fitting(struct intel_crtc_state *crtc_state,
> return -EINVAL;
> }
>
> + if (crtc_state->hw.sharpness_strength &&
> + (width != pipe_src_w || height != pipe_src_h ||
> + crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB)) {
We should probably also reject
sharpness_strength != 0 && scaling_filter != DEFAULT
I suppose it's not strictly needed because we only allow sharpness
with 1:1 scaling, and that makes the nearest neighbor filter a NOP.
But probably a good idea to make the uapi behaviour consistent,
especially if we later add other filter modes that maybe aren't
NOPs.
> + drm_dbg_kms(display->drm,
> + "[CRTC:%d:%s] no scaling/YCbCr output with sharpness filter\n",
> + crtc->base.base.id, crtc->base.name);
> + return -EINVAL;
> + }
> +
> drm_rect_init(&crtc_state->pch_pfit.dst,
> x, y, width, height);
> crtc_state->pch_pfit.enabled = true;
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 39+ messages in thread* RE: [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-31 9:48 ` Ville Syrjälä
@ 2026-03-31 13:33 ` Garg, Nemesa
0 siblings, 0 replies; 39+ messages in thread
From: Garg, Nemesa @ 2026-03-31 13:33 UTC (permalink / raw)
To: Ville Syrjälä, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Tuesday, March 31, 2026 3:18 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; Garg, Nemesa <nemesa.garg@intel.com>
> Subject: Re: [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly
> into the scaler code
>
> On Fri, Mar 27, 2026 at 12:31:39AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The sharpness filter is just a special mode of the pipe scaler.
> > It doesn't warrant all this special casing everywhere. Just integrate
> > it properly into the scaler code so that it's treated no different
> > from the other pipe scaler uses (scaling,centering, YCbCr 4:2:0
> > output).
> >
> > Cc: Nemesa Garg <nemesa.garg@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_casf.c | 62 ++------------
> > drivers/gpu/drm/i915/display/intel_casf.h | 6 +-
> > drivers/gpu/drm/i915/display/intel_display.c | 34 +-------
> > drivers/gpu/drm/i915/display/intel_pfit.c | 13 ++-
> > drivers/gpu/drm/i915/display/skl_scaler.c | 85 ++++++++------------
> > drivers/gpu/drm/i915/display/skl_scaler.h | 2 -
> > 6 files changed, 53 insertions(+), 149 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_casf.c
> > b/drivers/gpu/drm/i915/display/intel_casf.c
> > index 21e84a4f9ff5..c2d2746c5f04 100644
> > --- a/drivers/gpu/drm/i915/display/intel_casf.c
> > +++ b/drivers/gpu/drm/i915/display/intel_casf.c
> > @@ -75,20 +75,6 @@ static void intel_casf_filter_lut_load(const struct
> intel_crtc_state *crtc_state
> > sharpness_lut[i]);
> > }
> >
> > -void intel_casf_update_strength(const struct intel_crtc_state
> > *crtc_state) -{
> > - struct intel_display *display = to_intel_display(crtc_state);
> > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > - int win_size;
> > -
> > - intel_de_rmw(display, SHARPNESS_CTL(crtc->pipe),
> FILTER_STRENGTH_MASK,
> > - FILTER_STRENGTH(crtc_state->pch_pfit.casf.strength));
> > -
> > - win_size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, 1));
> > -
> > - intel_de_write_fw(display, SKL_PS_WIN_SZ(crtc->pipe, 1), win_size);
> > -}
> > -
> > static void intel_casf_compute_win_size(struct intel_crtc_state
> > *crtc_state) {
> > const struct drm_display_mode *mode = &crtc_state-
> >hw.adjusted_mode;
> > @@ -102,19 +88,15 @@ static void intel_casf_compute_win_size(struct
> intel_crtc_state *crtc_state)
> > crtc_state->pch_pfit.casf.win_size =
> SHARPNESS_FILTER_SIZE_7X7; }
> >
> > +static void intel_casf_scaler_compute_coef(struct intel_crtc_state
> > +*crtc_state);
> > +
> > int intel_casf_compute_config(struct intel_crtc_state *crtc_state) {
> > struct intel_display *display = to_intel_display(crtc_state);
> >
> > - if (!HAS_CASF(display))
> > + if (crtc_state->hw.sharpness_strength == 0)
> > return 0;
> >
> > - if (crtc_state->hw.sharpness_strength == 0) {
> > - crtc_state->pch_pfit.casf.enable = false;
> > - crtc_state->pch_pfit.casf.strength = 0;
> > - return 0;
> > - }
> > -
> > /* CASF with joiner not supported in hardware */
> > if (crtc_state->joiner_pipes) {
> > drm_dbg_kms(display->drm, "CASF not supported with
> joiner\n"); @@
> > -136,7 +118,7 @@ int intel_casf_compute_config(struct intel_crtc_state
> > *crtc_state)
> >
> > intel_casf_compute_win_size(crtc_state);
> >
> > - intel_casf_scaler_compute_config(crtc_state);
> > + intel_casf_scaler_compute_coef(crtc_state);
> >
> > return 0;
> > }
> > @@ -161,14 +143,6 @@ void intel_casf_sharpness_get_config(struct
> intel_crtc_state *crtc_state)
> > }
> > }
> >
> > -bool intel_casf_needs_scaler(const struct intel_crtc_state
> > *crtc_state) -{
> > - if (crtc_state->pch_pfit.casf.enable)
> > - return true;
> > -
> > - return false;
> > -}
> > -
> > static int casf_coeff_tap(int i)
> > {
> > return i % SCALER_FILTER_NUM_TAPS;
> > @@ -240,7 +214,7 @@ static void convert_sharpness_coef_binary(struct
> scaler_filter_coeff *coeff,
> > }
> > }
> >
> > -void intel_casf_scaler_compute_config(struct intel_crtc_state
> > *crtc_state)
> > +static void intel_casf_scaler_compute_coef(struct intel_crtc_state
> > +*crtc_state)
> > {
> > const u16 *filtercoeff;
> > u16 filter_coeff[SCALER_FILTER_NUM_TAPS];
> > @@ -264,32 +238,8 @@ void intel_casf_scaler_compute_config(struct
> intel_crtc_state *crtc_state)
> > }
> > }
> >
> > -void intel_casf_enable(const struct intel_crtc_state *crtc_state)
> > +void intel_casf_setup(const struct intel_crtc_state *crtc_state)
> > {
> > - struct intel_display *display = to_intel_display(crtc_state);
> > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > - u32 sharpness_ctl;
> > -
> > intel_casf_filter_lut_load(crtc_state);
> > -
> > intel_casf_write_coeff(crtc_state);
> > -
> > - sharpness_ctl = FILTER_EN | FILTER_STRENGTH(crtc_state-
> >pch_pfit.casf.strength);
> > -
> > - sharpness_ctl |= crtc_state->pch_pfit.casf.win_size;
> > -
> > - intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl);
> > -
> > - skl_scaler_setup_casf(crtc_state);
> > -}
> > -
> > -void intel_casf_disable(const struct intel_crtc_state *crtc_state) -{
> > - struct intel_display *display = to_intel_display(crtc_state);
> > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > -
> > - intel_de_write(display, SKL_PS_CTRL(crtc->pipe, 1), 0);
> > - intel_de_write(display, SKL_PS_WIN_POS(crtc->pipe, 1), 0);
> > - intel_de_write(display, SHARPNESS_CTL(crtc->pipe), 0);
> > - intel_de_write(display, SKL_PS_WIN_SZ(crtc->pipe, 1), 0);
> > }
> > diff --git a/drivers/gpu/drm/i915/display/intel_casf.h
> > b/drivers/gpu/drm/i915/display/intel_casf.h
> > index c4f984b73348..3ebb7522af0a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_casf.h
> > +++ b/drivers/gpu/drm/i915/display/intel_casf.h
> > @@ -11,11 +11,7 @@
> > struct intel_crtc_state;
> >
> > int intel_casf_compute_config(struct intel_crtc_state *crtc_state);
> > -void intel_casf_update_strength(const struct intel_crtc_state
> > *new_crtc_state); void intel_casf_sharpness_get_config(struct
> > intel_crtc_state *crtc_state); -void intel_casf_enable(const struct
> > intel_crtc_state *crtc_state); -void intel_casf_disable(const struct
> > intel_crtc_state *crtc_state); -void
> > intel_casf_scaler_compute_config(struct intel_crtc_state *crtc_state);
> > -bool intel_casf_needs_scaler(const struct intel_crtc_state
> > *crtc_state);
> > +void intel_casf_setup(const struct intel_crtc_state *crtc_state);
> >
> > #endif /* __INTEL_CASF_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index e02e69467871..58a654ca0d20 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -58,7 +58,6 @@
> > #include "intel_audio.h"
> > #include "intel_bo.h"
> > #include "intel_bw.h"
> > -#include "intel_casf.h"
> > #include "intel_cdclk.h"
> > #include "intel_clock_gating.h"
> > #include "intel_color.h"
> > @@ -988,24 +987,6 @@ static bool audio_disabling(const struct
> intel_crtc_state *old_crtc_state,
> > memcmp(old_crtc_state->eld, new_crtc_state->eld,
> MAX_ELD_BYTES) !=
> > 0); }
> >
> > -static bool intel_casf_enabling(const struct intel_crtc_state *new_crtc_state,
> > - const struct intel_crtc_state *old_crtc_state)
> > -{
> > - if (!new_crtc_state->hw.active)
> > - return false;
> > -
> > - return is_enabling(pch_pfit.casf.enable, old_crtc_state,
> new_crtc_state);
> > -}
> > -
> > -static bool intel_casf_disabling(const struct intel_crtc_state *old_crtc_state,
> > - const struct intel_crtc_state *new_crtc_state)
> > -{
> > - if (!new_crtc_state->hw.active)
> > - return false;
> > -
> > - return is_disabling(pch_pfit.casf.enable, old_crtc_state,
> new_crtc_state);
> > -}
> > -
> > static bool intel_crtc_lobf_enabling(const struct intel_crtc_state
> *old_crtc_state,
> > const struct intel_crtc_state
> *new_crtc_state) { @@ -1187,9
> > +1168,6 @@ static void intel_pre_plane_update(struct intel_atomic_state
> *state,
> > if (audio_disabling(old_crtc_state, new_crtc_state))
> > intel_encoders_audio_disable(state, crtc);
> >
> > - if (intel_casf_disabling(old_crtc_state, new_crtc_state))
> > - intel_casf_disable(new_crtc_state);
> > -
> > intel_drrs_deactivate(old_crtc_state);
> >
> > if (hsw_ips_pre_update(state, crtc)) @@ -4308,14 +4286,9 @@ static
> > int intel_crtc_atomic_check(struct intel_atomic_state *state,
> > return ret;
> > }
> >
> > - ret = intel_casf_compute_config(crtc_state);
> > - if (ret)
> > - return ret;
> > -
> > if (DISPLAY_VER(display) >= 9) {
> > if (intel_crtc_needs_modeset(crtc_state) ||
> > - intel_crtc_needs_fastset(crtc_state) ||
> > - intel_casf_needs_scaler(crtc_state)) {
> > + intel_crtc_needs_fastset(crtc_state)) {
> > ret = skl_update_scaler_crtc(crtc_state);
> > if (ret)
> > return ret;
> > @@ -6817,11 +6790,6 @@ static void intel_pre_update_crtc(struct
> intel_atomic_state *state,
> > intel_vrr_set_transcoder_timings(new_crtc_state);
> > }
> >
> > - if (intel_casf_enabling(new_crtc_state, old_crtc_state))
> > - intel_casf_enable(new_crtc_state);
> > - else if (new_crtc_state->pch_pfit.casf.strength != old_crtc_state-
> >pch_pfit.casf.strength)
> > - intel_casf_update_strength(new_crtc_state);
> > -
> > intel_fbc_update(state, crtc);
> >
> > drm_WARN_ON(display->drm,
> !intel_display_power_is_enabled(display,
> > POWER_DOMAIN_DC_OFF)); diff --git
> > a/drivers/gpu/drm/i915/display/intel_pfit.c
> > b/drivers/gpu/drm/i915/display/intel_pfit.c
> > index 6dda496190e0..e04ca960f115 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pfit.c
> > +++ b/drivers/gpu/drm/i915/display/intel_pfit.c
> > @@ -186,6 +186,7 @@ static int pch_panel_fitting(struct intel_crtc_state
> *crtc_state,
> > const struct drm_connector_state *conn_state) {
> > struct intel_display *display = to_intel_display(crtc_state);
> > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > const struct drm_display_mode *adjusted_mode =
> > &crtc_state->hw.adjusted_mode;
> > int pipe_src_w = drm_rect_width(&crtc_state->pipe_src);
> > @@ -195,7 +196,8 @@ static int pch_panel_fitting(struct intel_crtc_state
> *crtc_state,
> > /* Native modes don't need fitting */
> > if (adjusted_mode->crtc_hdisplay == pipe_src_w &&
> > adjusted_mode->crtc_vdisplay == pipe_src_h &&
> > - crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420)
> > + crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420
> &&
> > + crtc_state->hw.sharpness_strength == 0)
> > return 0;
> >
> > switch (conn_state->scaling_mode) {
> > @@ -249,6 +251,15 @@ static int pch_panel_fitting(struct intel_crtc_state
> *crtc_state,
> > return -EINVAL;
> > }
> >
> > + if (crtc_state->hw.sharpness_strength &&
> > + (width != pipe_src_w || height != pipe_src_h ||
> > + crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB)) {
>
> We should probably also reject
> sharpness_strength != 0 && scaling_filter != DEFAULT
>
> I suppose it's not strictly needed because we only allow sharpness with 1:1
> scaling, and that makes the nearest neighbor filter a NOP.
> But probably a good idea to make the uapi behaviour consistent, especially if
> we later add other filter modes that maybe aren't NOPs.
>
Yes for now it will work but better to add to reduce future noise.
> > + drm_dbg_kms(display->drm,
> > + "[CRTC:%d:%s] no scaling/YCbCr output with
> sharpness filter\n",
> > + crtc->base.base.id, crtc->base.name);
> > + return -EINVAL;
> > + }
> > +
> > drm_rect_init(&crtc_state->pch_pfit.dst,
> > x, y, width, height);
> > crtc_state->pch_pfit.enabled = true;
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
* ✓ CI.KUnit: success for drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (8 preceding siblings ...)
2026-03-26 22:31 ` [PATCH 9/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
@ 2026-03-26 23:27 ` Patchwork
2026-03-27 0:02 ` ✓ Xe.CI.BAT: " Patchwork
` (3 subsequent siblings)
13 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2026-03-26 23:27 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
== Series Details ==
Series: drm/i915/casf: Integrate the sharpness filter properly into the scaler code
URL : https://patchwork.freedesktop.org/series/163952/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[23:25:52] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:25:56] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:26:26] Starting KUnit Kernel (1/1)...
[23:26:26] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:26:27] ================== guc_buf (11 subtests) ===================
[23:26:27] [PASSED] test_smallest
[23:26:27] [PASSED] test_largest
[23:26:27] [PASSED] test_granular
[23:26:27] [PASSED] test_unique
[23:26:27] [PASSED] test_overlap
[23:26:27] [PASSED] test_reusable
[23:26:27] [PASSED] test_too_big
[23:26:27] [PASSED] test_flush
[23:26:27] [PASSED] test_lookup
[23:26:27] [PASSED] test_data
[23:26:27] [PASSED] test_class
[23:26:27] ===================== [PASSED] guc_buf =====================
[23:26:27] =================== guc_dbm (7 subtests) ===================
[23:26:27] [PASSED] test_empty
[23:26:27] [PASSED] test_default
[23:26:27] ======================== test_size ========================
[23:26:27] [PASSED] 4
[23:26:27] [PASSED] 8
[23:26:27] [PASSED] 32
[23:26:27] [PASSED] 256
[23:26:27] ==================== [PASSED] test_size ====================
[23:26:27] ======================= test_reuse ========================
[23:26:27] [PASSED] 4
[23:26:27] [PASSED] 8
[23:26:27] [PASSED] 32
[23:26:27] [PASSED] 256
[23:26:27] =================== [PASSED] test_reuse ====================
[23:26:27] =================== test_range_overlap ====================
[23:26:27] [PASSED] 4
[23:26:27] [PASSED] 8
[23:26:27] [PASSED] 32
[23:26:27] [PASSED] 256
[23:26:27] =============== [PASSED] test_range_overlap ================
[23:26:27] =================== test_range_compact ====================
[23:26:27] [PASSED] 4
[23:26:27] [PASSED] 8
[23:26:27] [PASSED] 32
[23:26:27] [PASSED] 256
[23:26:27] =============== [PASSED] test_range_compact ================
[23:26:27] ==================== test_range_spare =====================
[23:26:27] [PASSED] 4
[23:26:27] [PASSED] 8
[23:26:27] [PASSED] 32
[23:26:27] [PASSED] 256
[23:26:27] ================ [PASSED] test_range_spare =================
[23:26:27] ===================== [PASSED] guc_dbm =====================
[23:26:27] =================== guc_idm (6 subtests) ===================
[23:26:27] [PASSED] bad_init
[23:26:27] [PASSED] no_init
[23:26:27] [PASSED] init_fini
[23:26:27] [PASSED] check_used
[23:26:27] [PASSED] check_quota
[23:26:27] [PASSED] check_all
[23:26:27] ===================== [PASSED] guc_idm =====================
[23:26:27] ================== no_relay (3 subtests) ===================
[23:26:27] [PASSED] xe_drops_guc2pf_if_not_ready
[23:26:27] [PASSED] xe_drops_guc2vf_if_not_ready
[23:26:27] [PASSED] xe_rejects_send_if_not_ready
[23:26:27] ==================== [PASSED] no_relay =====================
[23:26:27] ================== pf_relay (14 subtests) ==================
[23:26:27] [PASSED] pf_rejects_guc2pf_too_short
[23:26:27] [PASSED] pf_rejects_guc2pf_too_long
[23:26:27] [PASSED] pf_rejects_guc2pf_no_payload
[23:26:27] [PASSED] pf_fails_no_payload
[23:26:27] [PASSED] pf_fails_bad_origin
[23:26:27] [PASSED] pf_fails_bad_type
[23:26:27] [PASSED] pf_txn_reports_error
[23:26:27] [PASSED] pf_txn_sends_pf2guc
[23:26:27] [PASSED] pf_sends_pf2guc
[23:26:27] [SKIPPED] pf_loopback_nop
[23:26:27] [SKIPPED] pf_loopback_echo
[23:26:27] [SKIPPED] pf_loopback_fail
[23:26:27] [SKIPPED] pf_loopback_busy
[23:26:27] [SKIPPED] pf_loopback_retry
[23:26:27] ==================== [PASSED] pf_relay =====================
[23:26:27] ================== vf_relay (3 subtests) ===================
[23:26:27] [PASSED] vf_rejects_guc2vf_too_short
[23:26:27] [PASSED] vf_rejects_guc2vf_too_long
[23:26:27] [PASSED] vf_rejects_guc2vf_no_payload
[23:26:27] ==================== [PASSED] vf_relay =====================
[23:26:27] ================ pf_gt_config (9 subtests) =================
[23:26:27] [PASSED] fair_contexts_1vf
[23:26:27] [PASSED] fair_doorbells_1vf
[23:26:27] [PASSED] fair_ggtt_1vf
[23:26:27] ====================== fair_vram_1vf ======================
[23:26:27] [PASSED] 3.50 GiB
[23:26:27] [PASSED] 11.5 GiB
[23:26:27] [PASSED] 15.5 GiB
[23:26:27] [PASSED] 31.5 GiB
[23:26:27] [PASSED] 63.5 GiB
[23:26:27] [PASSED] 1.91 GiB
[23:26:27] ================== [PASSED] fair_vram_1vf ==================
[23:26:27] ================ fair_vram_1vf_admin_only =================
[23:26:27] [PASSED] 3.50 GiB
[23:26:27] [PASSED] 11.5 GiB
[23:26:27] [PASSED] 15.5 GiB
[23:26:27] [PASSED] 31.5 GiB
[23:26:27] [PASSED] 63.5 GiB
[23:26:27] [PASSED] 1.91 GiB
[23:26:27] ============ [PASSED] fair_vram_1vf_admin_only =============
[23:26:27] ====================== fair_contexts ======================
[23:26:27] [PASSED] 1 VF
[23:26:27] [PASSED] 2 VFs
[23:26:27] [PASSED] 3 VFs
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[23:26:27] [PASSED] 50 VFs
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[23:26:27] [PASSED] 55 VFs
[23:26:27] [PASSED] 56 VFs
[23:26:27] [PASSED] 57 VFs
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[23:26:27] [PASSED] 61 VFs
[23:26:27] [PASSED] 62 VFs
[23:26:27] [PASSED] 63 VFs
[23:26:27] ================== [PASSED] fair_contexts ==================
[23:26:27] ===================== fair_doorbells ======================
[23:26:27] [PASSED] 1 VF
[23:26:27] [PASSED] 2 VFs
[23:26:27] [PASSED] 3 VFs
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[23:26:27] [PASSED] 61 VFs
[23:26:27] [PASSED] 62 VFs
[23:26:27] [PASSED] 63 VFs
[23:26:27] ================= [PASSED] fair_doorbells ==================
[23:26:27] ======================== fair_ggtt ========================
[23:26:27] [PASSED] 1 VF
[23:26:27] [PASSED] 2 VFs
[23:26:27] [PASSED] 3 VFs
[23:26:27] [PASSED] 4 VFs
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[23:26:27] [PASSED] 50 VFs
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[23:26:27] [PASSED] 61 VFs
[23:26:27] [PASSED] 62 VFs
[23:26:27] [PASSED] 63 VFs
[23:26:27] ==================== [PASSED] fair_ggtt ====================
[23:26:27] ======================== fair_vram ========================
[23:26:27] [PASSED] 1 VF
[23:26:27] [PASSED] 2 VFs
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[23:26:27] [PASSED] 56 VFs
[23:26:27] [PASSED] 57 VFs
[23:26:27] [PASSED] 58 VFs
[23:26:27] [PASSED] 59 VFs
[23:26:27] [PASSED] 60 VFs
[23:26:27] [PASSED] 61 VFs
[23:26:27] [PASSED] 62 VFs
[23:26:27] [PASSED] 63 VFs
[23:26:27] ==================== [PASSED] fair_vram ====================
[23:26:27] ================== [PASSED] pf_gt_config ===================
[23:26:27] ===================== lmtt (1 subtest) =====================
[23:26:27] ======================== test_ops =========================
[23:26:27] [PASSED] 2-level
[23:26:27] [PASSED] multi-level
[23:26:27] ==================== [PASSED] test_ops =====================
[23:26:27] ====================== [PASSED] lmtt =======================
[23:26:27] ================= pf_service (11 subtests) =================
[23:26:27] [PASSED] pf_negotiate_any
[23:26:27] [PASSED] pf_negotiate_base_match
[23:26:27] [PASSED] pf_negotiate_base_newer
[23:26:27] [PASSED] pf_negotiate_base_next
[23:26:27] [SKIPPED] pf_negotiate_base_older
[23:26:27] [PASSED] pf_negotiate_base_prev
[23:26:27] [PASSED] pf_negotiate_latest_match
[23:26:27] [PASSED] pf_negotiate_latest_newer
[23:26:27] [PASSED] pf_negotiate_latest_next
[23:26:27] [SKIPPED] pf_negotiate_latest_older
[23:26:27] [SKIPPED] pf_negotiate_latest_prev
[23:26:27] =================== [PASSED] pf_service ====================
[23:26:27] ================= xe_guc_g2g (2 subtests) ==================
[23:26:27] ============== xe_live_guc_g2g_kunit_default ==============
[23:26:27] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[23:26:27] ============== xe_live_guc_g2g_kunit_allmem ===============
[23:26:27] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[23:26:27] =================== [SKIPPED] xe_guc_g2g ===================
[23:26:27] =================== xe_mocs (2 subtests) ===================
[23:26:27] ================ xe_live_mocs_kernel_kunit ================
[23:26:27] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[23:26:27] ================ xe_live_mocs_reset_kunit =================
[23:26:27] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[23:26:27] ==================== [SKIPPED] xe_mocs =====================
[23:26:27] ================= xe_migrate (2 subtests) ==================
[23:26:27] ================= xe_migrate_sanity_kunit =================
[23:26:27] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[23:26:27] ================== xe_validate_ccs_kunit ==================
[23:26:27] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[23:26:27] =================== [SKIPPED] xe_migrate ===================
[23:26:27] ================== xe_dma_buf (1 subtest) ==================
[23:26:27] ==================== xe_dma_buf_kunit =====================
[23:26:27] ================ [SKIPPED] xe_dma_buf_kunit ================
[23:26:27] =================== [SKIPPED] xe_dma_buf ===================
[23:26:27] ================= xe_bo_shrink (1 subtest) =================
[23:26:27] =================== xe_bo_shrink_kunit ====================
[23:26:27] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[23:26:27] ================== [SKIPPED] xe_bo_shrink ==================
[23:26:27] ==================== xe_bo (2 subtests) ====================
[23:26:27] ================== xe_ccs_migrate_kunit ===================
[23:26:27] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[23:26:27] ==================== xe_bo_evict_kunit ====================
[23:26:27] =============== [SKIPPED] xe_bo_evict_kunit ================
[23:26:27] ===================== [SKIPPED] xe_bo ======================
[23:26:27] ==================== args (13 subtests) ====================
[23:26:27] [PASSED] count_args_test
[23:26:27] [PASSED] call_args_example
[23:26:27] [PASSED] call_args_test
[23:26:27] [PASSED] drop_first_arg_example
[23:26:27] [PASSED] drop_first_arg_test
[23:26:27] [PASSED] first_arg_example
[23:26:27] [PASSED] first_arg_test
[23:26:27] [PASSED] last_arg_example
[23:26:27] [PASSED] last_arg_test
[23:26:27] [PASSED] pick_arg_example
[23:26:27] [PASSED] if_args_example
[23:26:27] [PASSED] if_args_test
[23:26:27] [PASSED] sep_comma_example
[23:26:27] ====================== [PASSED] args =======================
[23:26:27] =================== xe_pci (3 subtests) ====================
[23:26:27] ==================== check_graphics_ip ====================
[23:26:27] [PASSED] 12.00 Xe_LP
[23:26:27] [PASSED] 12.10 Xe_LP+
[23:26:27] [PASSED] 12.55 Xe_HPG
[23:26:27] [PASSED] 12.60 Xe_HPC
[23:26:27] [PASSED] 12.70 Xe_LPG
[23:26:27] [PASSED] 12.71 Xe_LPG
[23:26:27] [PASSED] 12.74 Xe_LPG+
[23:26:27] [PASSED] 20.01 Xe2_HPG
[23:26:27] [PASSED] 20.02 Xe2_HPG
[23:26:27] [PASSED] 20.04 Xe2_LPG
[23:26:27] [PASSED] 30.00 Xe3_LPG
[23:26:27] [PASSED] 30.01 Xe3_LPG
[23:26:27] [PASSED] 30.03 Xe3_LPG
[23:26:27] [PASSED] 30.04 Xe3_LPG
[23:26:27] [PASSED] 30.05 Xe3_LPG
[23:26:27] [PASSED] 35.10 Xe3p_LPG
[23:26:27] [PASSED] 35.11 Xe3p_XPC
[23:26:27] ================ [PASSED] check_graphics_ip ================
[23:26:27] ===================== check_media_ip ======================
[23:26:27] [PASSED] 12.00 Xe_M
[23:26:27] [PASSED] 12.55 Xe_HPM
[23:26:27] [PASSED] 13.00 Xe_LPM+
[23:26:27] [PASSED] 13.01 Xe2_HPM
[23:26:27] [PASSED] 20.00 Xe2_LPM
[23:26:27] [PASSED] 30.00 Xe3_LPM
[23:26:27] [PASSED] 30.02 Xe3_LPM
[23:26:27] [PASSED] 35.00 Xe3p_LPM
[23:26:27] [PASSED] 35.03 Xe3p_HPM
[23:26:27] ================= [PASSED] check_media_ip ==================
[23:26:27] =================== check_platform_desc ===================
[23:26:27] [PASSED] 0x9A60 (TIGERLAKE)
[23:26:27] [PASSED] 0x9A68 (TIGERLAKE)
[23:26:27] [PASSED] 0x9A70 (TIGERLAKE)
[23:26:27] [PASSED] 0x9A40 (TIGERLAKE)
[23:26:27] [PASSED] 0x9A49 (TIGERLAKE)
[23:26:27] [PASSED] 0x9A59 (TIGERLAKE)
[23:26:27] [PASSED] 0x9A78 (TIGERLAKE)
[23:26:27] [PASSED] 0x9AC0 (TIGERLAKE)
[23:26:27] [PASSED] 0x9AC9 (TIGERLAKE)
[23:26:27] [PASSED] 0x9AD9 (TIGERLAKE)
[23:26:27] [PASSED] 0x9AF8 (TIGERLAKE)
[23:26:27] [PASSED] 0x4C80 (ROCKETLAKE)
[23:26:27] [PASSED] 0x4C8A (ROCKETLAKE)
[23:26:27] [PASSED] 0x4C8B (ROCKETLAKE)
[23:26:27] [PASSED] 0x4C8C (ROCKETLAKE)
[23:26:27] [PASSED] 0x4C90 (ROCKETLAKE)
[23:26:27] [PASSED] 0x4C9A (ROCKETLAKE)
[23:26:27] [PASSED] 0x4680 (ALDERLAKE_S)
[23:26:27] [PASSED] 0x4682 (ALDERLAKE_S)
[23:26:27] [PASSED] 0x4688 (ALDERLAKE_S)
[23:26:27] [PASSED] 0x468A (ALDERLAKE_S)
[23:26:27] [PASSED] 0x468B (ALDERLAKE_S)
[23:26:27] [PASSED] 0x4690 (ALDERLAKE_S)
[23:26:27] [PASSED] 0x4692 (ALDERLAKE_S)
[23:26:27] [PASSED] 0x4693 (ALDERLAKE_S)
[23:26:27] [PASSED] 0x46A0 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46A1 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46A2 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46A3 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46A6 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46A8 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46AA (ALDERLAKE_P)
[23:26:27] [PASSED] 0x462A (ALDERLAKE_P)
[23:26:27] [PASSED] 0x4626 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x4628 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46B0 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46B1 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46B2 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46B3 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46C0 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46C1 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46C2 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46C3 (ALDERLAKE_P)
[23:26:27] [PASSED] 0x46D0 (ALDERLAKE_N)
[23:26:27] [PASSED] 0x46D1 (ALDERLAKE_N)
[23:26:27] [PASSED] 0x46D2 (ALDERLAKE_N)
[23:26:27] [PASSED] 0x46D3 (ALDERLAKE_N)
[23:26:27] [PASSED] 0x46D4 (ALDERLAKE_N)
[23:26:27] [PASSED] 0xA721 (ALDERLAKE_P)
[23:26:27] [PASSED] 0xA7A1 (ALDERLAKE_P)
[23:26:27] [PASSED] 0xA7A9 (ALDERLAKE_P)
[23:26:27] [PASSED] 0xA7AC (ALDERLAKE_P)
[23:26:27] [PASSED] 0xA7AD (ALDERLAKE_P)
[23:26:27] [PASSED] 0xA720 (ALDERLAKE_P)
[23:26:27] [PASSED] 0xA7A0 (ALDERLAKE_P)
[23:26:27] [PASSED] 0xA7A8 (ALDERLAKE_P)
[23:26:27] [PASSED] 0xA7AA (ALDERLAKE_P)
[23:26:27] [PASSED] 0xA7AB (ALDERLAKE_P)
[23:26:27] [PASSED] 0xA780 (ALDERLAKE_S)
[23:26:27] [PASSED] 0xA781 (ALDERLAKE_S)
[23:26:27] [PASSED] 0xA782 (ALDERLAKE_S)
[23:26:27] [PASSED] 0xA783 (ALDERLAKE_S)
[23:26:27] [PASSED] 0xA788 (ALDERLAKE_S)
[23:26:27] [PASSED] 0xA789 (ALDERLAKE_S)
[23:26:27] [PASSED] 0xA78A (ALDERLAKE_S)
[23:26:27] [PASSED] 0xA78B (ALDERLAKE_S)
[23:26:27] [PASSED] 0x4905 (DG1)
[23:26:27] [PASSED] 0x4906 (DG1)
[23:26:27] [PASSED] 0x4907 (DG1)
[23:26:27] [PASSED] 0x4908 (DG1)
[23:26:27] [PASSED] 0x4909 (DG1)
[23:26:27] [PASSED] 0x56C0 (DG2)
[23:26:27] [PASSED] 0x56C2 (DG2)
[23:26:27] [PASSED] 0x56C1 (DG2)
[23:26:27] [PASSED] 0x7D51 (METEORLAKE)
[23:26:27] [PASSED] 0x7DD1 (METEORLAKE)
[23:26:27] [PASSED] 0x7D41 (METEORLAKE)
[23:26:27] [PASSED] 0x7D67 (METEORLAKE)
[23:26:27] [PASSED] 0xB640 (METEORLAKE)
[23:26:27] [PASSED] 0x56A0 (DG2)
[23:26:27] [PASSED] 0x56A1 (DG2)
[23:26:27] [PASSED] 0x56A2 (DG2)
[23:26:27] [PASSED] 0x56BE (DG2)
[23:26:27] [PASSED] 0x56BF (DG2)
[23:26:27] [PASSED] 0x5690 (DG2)
[23:26:27] [PASSED] 0x5691 (DG2)
[23:26:27] [PASSED] 0x5692 (DG2)
[23:26:27] [PASSED] 0x56A5 (DG2)
[23:26:27] [PASSED] 0x56A6 (DG2)
[23:26:27] [PASSED] 0x56B0 (DG2)
[23:26:27] [PASSED] 0x56B1 (DG2)
[23:26:27] [PASSED] 0x56BA (DG2)
[23:26:27] [PASSED] 0x56BB (DG2)
[23:26:27] [PASSED] 0x56BC (DG2)
[23:26:27] [PASSED] 0x56BD (DG2)
[23:26:27] [PASSED] 0x5693 (DG2)
[23:26:27] [PASSED] 0x5694 (DG2)
[23:26:27] [PASSED] 0x5695 (DG2)
[23:26:27] [PASSED] 0x56A3 (DG2)
[23:26:27] [PASSED] 0x56A4 (DG2)
[23:26:27] [PASSED] 0x56B2 (DG2)
[23:26:27] [PASSED] 0x56B3 (DG2)
[23:26:27] [PASSED] 0x5696 (DG2)
[23:26:27] [PASSED] 0x5697 (DG2)
[23:26:27] [PASSED] 0xB69 (PVC)
[23:26:27] [PASSED] 0xB6E (PVC)
[23:26:27] [PASSED] 0xBD4 (PVC)
[23:26:27] [PASSED] 0xBD5 (PVC)
[23:26:27] [PASSED] 0xBD6 (PVC)
[23:26:27] [PASSED] 0xBD7 (PVC)
[23:26:27] [PASSED] 0xBD8 (PVC)
[23:26:27] [PASSED] 0xBD9 (PVC)
[23:26:27] [PASSED] 0xBDA (PVC)
[23:26:27] [PASSED] 0xBDB (PVC)
[23:26:27] [PASSED] 0xBE0 (PVC)
[23:26:27] [PASSED] 0xBE1 (PVC)
[23:26:27] [PASSED] 0xBE5 (PVC)
[23:26:27] [PASSED] 0x7D40 (METEORLAKE)
[23:26:27] [PASSED] 0x7D45 (METEORLAKE)
[23:26:27] [PASSED] 0x7D55 (METEORLAKE)
[23:26:27] [PASSED] 0x7D60 (METEORLAKE)
[23:26:27] [PASSED] 0x7DD5 (METEORLAKE)
[23:26:27] [PASSED] 0x6420 (LUNARLAKE)
[23:26:27] [PASSED] 0x64A0 (LUNARLAKE)
[23:26:27] [PASSED] 0x64B0 (LUNARLAKE)
[23:26:27] [PASSED] 0xE202 (BATTLEMAGE)
[23:26:27] [PASSED] 0xE209 (BATTLEMAGE)
[23:26:27] [PASSED] 0xE20B (BATTLEMAGE)
[23:26:27] [PASSED] 0xE20C (BATTLEMAGE)
[23:26:27] [PASSED] 0xE20D (BATTLEMAGE)
[23:26:27] [PASSED] 0xE210 (BATTLEMAGE)
[23:26:27] [PASSED] 0xE211 (BATTLEMAGE)
[23:26:27] [PASSED] 0xE212 (BATTLEMAGE)
[23:26:27] [PASSED] 0xE216 (BATTLEMAGE)
[23:26:27] [PASSED] 0xE220 (BATTLEMAGE)
[23:26:27] [PASSED] 0xE221 (BATTLEMAGE)
[23:26:27] [PASSED] 0xE222 (BATTLEMAGE)
[23:26:27] [PASSED] 0xE223 (BATTLEMAGE)
[23:26:27] [PASSED] 0xB080 (PANTHERLAKE)
[23:26:27] [PASSED] 0xB081 (PANTHERLAKE)
[23:26:27] [PASSED] 0xB082 (PANTHERLAKE)
[23:26:27] [PASSED] 0xB083 (PANTHERLAKE)
[23:26:27] [PASSED] 0xB084 (PANTHERLAKE)
[23:26:27] [PASSED] 0xB085 (PANTHERLAKE)
[23:26:27] [PASSED] 0xB086 (PANTHERLAKE)
[23:26:27] [PASSED] 0xB087 (PANTHERLAKE)
[23:26:27] [PASSED] 0xB08F (PANTHERLAKE)
[23:26:27] [PASSED] 0xB090 (PANTHERLAKE)
[23:26:27] [PASSED] 0xB0A0 (PANTHERLAKE)
[23:26:27] [PASSED] 0xB0B0 (PANTHERLAKE)
[23:26:27] [PASSED] 0xFD80 (PANTHERLAKE)
[23:26:27] [PASSED] 0xFD81 (PANTHERLAKE)
[23:26:27] [PASSED] 0xD740 (NOVALAKE_S)
[23:26:27] [PASSED] 0xD741 (NOVALAKE_S)
[23:26:27] [PASSED] 0xD742 (NOVALAKE_S)
[23:26:27] [PASSED] 0xD743 (NOVALAKE_S)
[23:26:27] [PASSED] 0xD744 (NOVALAKE_S)
[23:26:27] [PASSED] 0xD745 (NOVALAKE_S)
[23:26:27] [PASSED] 0x674C (CRESCENTISLAND)
[23:26:27] [PASSED] 0xD750 (NOVALAKE_P)
[23:26:27] [PASSED] 0xD751 (NOVALAKE_P)
[23:26:27] [PASSED] 0xD752 (NOVALAKE_P)
[23:26:27] [PASSED] 0xD753 (NOVALAKE_P)
[23:26:27] [PASSED] 0xD754 (NOVALAKE_P)
[23:26:27] [PASSED] 0xD755 (NOVALAKE_P)
[23:26:27] [PASSED] 0xD756 (NOVALAKE_P)
[23:26:27] [PASSED] 0xD757 (NOVALAKE_P)
[23:26:27] [PASSED] 0xD75F (NOVALAKE_P)
[23:26:27] =============== [PASSED] check_platform_desc ===============
[23:26:27] ===================== [PASSED] xe_pci ======================
[23:26:27] =================== xe_rtp (2 subtests) ====================
[23:26:27] =============== xe_rtp_process_to_sr_tests ================
[23:26:27] [PASSED] coalesce-same-reg
[23:26:27] [PASSED] no-match-no-add
[23:26:27] [PASSED] match-or
[23:26:27] [PASSED] match-or-xfail
[23:26:27] [PASSED] no-match-no-add-multiple-rules
[23:26:27] [PASSED] two-regs-two-entries
[23:26:27] [PASSED] clr-one-set-other
[23:26:27] [PASSED] set-field
[23:26:27] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[23:26:27] [PASSED] conflict-not-disjoint
[23:26:27] [PASSED] conflict-reg-type
[23:26:27] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[23:26:27] ================== xe_rtp_process_tests ===================
[23:26:27] [PASSED] active1
[23:26:27] [PASSED] active2
[23:26:27] [PASSED] active-inactive
[23:26:27] [PASSED] inactive-active
[23:26:27] [PASSED] inactive-1st_or_active-inactive
[23:26:27] [PASSED] inactive-2nd_or_active-inactive
[23:26:27] [PASSED] inactive-last_or_active-inactive
[23:26:27] [PASSED] inactive-no_or_active-inactive
[23:26:27] ============== [PASSED] xe_rtp_process_tests ===============
[23:26:27] ===================== [PASSED] xe_rtp ======================
[23:26:27] ==================== xe_wa (1 subtest) =====================
[23:26:27] ======================== xe_wa_gt =========================
[23:26:27] [PASSED] TIGERLAKE B0
[23:26:27] [PASSED] DG1 A0
[23:26:27] [PASSED] DG1 B0
[23:26:27] [PASSED] ALDERLAKE_S A0
[23:26:27] [PASSED] ALDERLAKE_S B0
[23:26:27] [PASSED] ALDERLAKE_S C0
[23:26:27] [PASSED] ALDERLAKE_S D0
[23:26:27] [PASSED] ALDERLAKE_P A0
[23:26:27] [PASSED] ALDERLAKE_P B0
[23:26:27] [PASSED] ALDERLAKE_P C0
[23:26:27] [PASSED] ALDERLAKE_S RPLS D0
[23:26:27] [PASSED] ALDERLAKE_P RPLU E0
[23:26:27] [PASSED] DG2 G10 C0
[23:26:27] [PASSED] DG2 G11 B1
[23:26:27] [PASSED] DG2 G12 A1
[23:26:27] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:26:27] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[23:26:27] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[23:26:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[23:26:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[23:26:27] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[23:26:27] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[23:26:27] ==================== [PASSED] xe_wa_gt =====================
[23:26:27] ====================== [PASSED] xe_wa ======================
[23:26:27] ============================================================
[23:26:27] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[23:26:27] Elapsed time: 35.442s total, 4.191s configuring, 30.634s building, 0.610s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[23:26:27] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:26:29] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:26:53] Starting KUnit Kernel (1/1)...
[23:26:53] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:26:53] ============ drm_test_pick_cmdline (2 subtests) ============
[23:26:53] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[23:26:53] =============== drm_test_pick_cmdline_named ===============
[23:26:53] [PASSED] NTSC
[23:26:53] [PASSED] NTSC-J
[23:26:53] [PASSED] PAL
[23:26:53] [PASSED] PAL-M
[23:26:53] =========== [PASSED] drm_test_pick_cmdline_named ===========
[23:26:53] ============== [PASSED] drm_test_pick_cmdline ==============
[23:26:53] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[23:26:53] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[23:26:53] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[23:26:53] =========== drm_validate_clone_mode (2 subtests) ===========
[23:26:53] ============== drm_test_check_in_clone_mode ===============
[23:26:53] [PASSED] in_clone_mode
[23:26:53] [PASSED] not_in_clone_mode
[23:26:53] ========== [PASSED] drm_test_check_in_clone_mode ===========
[23:26:53] =============== drm_test_check_valid_clones ===============
[23:26:53] [PASSED] not_in_clone_mode
[23:26:53] [PASSED] valid_clone
[23:26:53] [PASSED] invalid_clone
[23:26:53] =========== [PASSED] drm_test_check_valid_clones ===========
[23:26:53] ============= [PASSED] drm_validate_clone_mode =============
[23:26:53] ============= drm_validate_modeset (1 subtest) =============
[23:26:53] [PASSED] drm_test_check_connector_changed_modeset
[23:26:53] ============== [PASSED] drm_validate_modeset ===============
[23:26:53] ====== drm_test_bridge_get_current_state (2 subtests) ======
[23:26:53] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[23:26:53] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[23:26:53] ======== [PASSED] drm_test_bridge_get_current_state ========
[23:26:53] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[23:26:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[23:26:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[23:26:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[23:26:53] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[23:26:53] ============== drm_bridge_alloc (2 subtests) ===============
[23:26:53] [PASSED] drm_test_drm_bridge_alloc_basic
[23:26:53] [PASSED] drm_test_drm_bridge_alloc_get_put
[23:26:53] ================ [PASSED] drm_bridge_alloc =================
[23:26:53] ============= drm_cmdline_parser (40 subtests) =============
[23:26:53] [PASSED] drm_test_cmdline_force_d_only
[23:26:53] [PASSED] drm_test_cmdline_force_D_only_dvi
[23:26:53] [PASSED] drm_test_cmdline_force_D_only_hdmi
[23:26:53] [PASSED] drm_test_cmdline_force_D_only_not_digital
[23:26:53] [PASSED] drm_test_cmdline_force_e_only
[23:26:53] [PASSED] drm_test_cmdline_res
[23:26:53] [PASSED] drm_test_cmdline_res_vesa
[23:26:53] [PASSED] drm_test_cmdline_res_vesa_rblank
[23:26:53] [PASSED] drm_test_cmdline_res_rblank
[23:26:53] [PASSED] drm_test_cmdline_res_bpp
[23:26:53] [PASSED] drm_test_cmdline_res_refresh
[23:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh
[23:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[23:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[23:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[23:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[23:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[23:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[23:26:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[23:26:53] [PASSED] drm_test_cmdline_res_margins_force_on
[23:26:53] [PASSED] drm_test_cmdline_res_vesa_margins
[23:26:53] [PASSED] drm_test_cmdline_name
[23:26:53] [PASSED] drm_test_cmdline_name_bpp
[23:26:53] [PASSED] drm_test_cmdline_name_option
[23:26:53] [PASSED] drm_test_cmdline_name_bpp_option
[23:26:53] [PASSED] drm_test_cmdline_rotate_0
[23:26:53] [PASSED] drm_test_cmdline_rotate_90
[23:26:53] [PASSED] drm_test_cmdline_rotate_180
[23:26:53] [PASSED] drm_test_cmdline_rotate_270
[23:26:53] [PASSED] drm_test_cmdline_hmirror
[23:26:53] [PASSED] drm_test_cmdline_vmirror
[23:26:53] [PASSED] drm_test_cmdline_margin_options
[23:26:53] [PASSED] drm_test_cmdline_multiple_options
[23:26:53] [PASSED] drm_test_cmdline_bpp_extra_and_option
[23:26:53] [PASSED] drm_test_cmdline_extra_and_option
[23:26:53] [PASSED] drm_test_cmdline_freestanding_options
[23:26:53] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[23:26:53] [PASSED] drm_test_cmdline_panel_orientation
[23:26:53] ================ drm_test_cmdline_invalid =================
[23:26:53] [PASSED] margin_only
[23:26:53] [PASSED] interlace_only
[23:26:53] [PASSED] res_missing_x
[23:26:53] [PASSED] res_missing_y
[23:26:53] [PASSED] res_bad_y
[23:26:53] [PASSED] res_missing_y_bpp
[23:26:53] [PASSED] res_bad_bpp
[23:26:53] [PASSED] res_bad_refresh
[23:26:53] [PASSED] res_bpp_refresh_force_on_off
[23:26:53] [PASSED] res_invalid_mode
[23:26:53] [PASSED] res_bpp_wrong_place_mode
[23:26:53] [PASSED] name_bpp_refresh
[23:26:53] [PASSED] name_refresh
[23:26:53] [PASSED] name_refresh_wrong_mode
[23:26:53] [PASSED] name_refresh_invalid_mode
[23:26:53] [PASSED] rotate_multiple
[23:26:53] [PASSED] rotate_invalid_val
[23:26:53] [PASSED] rotate_truncated
[23:26:53] [PASSED] invalid_option
[23:26:53] [PASSED] invalid_tv_option
[23:26:53] [PASSED] truncated_tv_option
[23:26:53] ============ [PASSED] drm_test_cmdline_invalid =============
[23:26:53] =============== drm_test_cmdline_tv_options ===============
[23:26:53] [PASSED] NTSC
[23:26:53] [PASSED] NTSC_443
[23:26:53] [PASSED] NTSC_J
[23:26:53] [PASSED] PAL
[23:26:53] [PASSED] PAL_M
[23:26:53] [PASSED] PAL_N
[23:26:53] [PASSED] SECAM
[23:26:53] [PASSED] MONO_525
[23:26:53] [PASSED] MONO_625
[23:26:53] =========== [PASSED] drm_test_cmdline_tv_options ===========
[23:26:53] =============== [PASSED] drm_cmdline_parser ================
[23:26:53] ========== drmm_connector_hdmi_init (20 subtests) ==========
[23:26:53] [PASSED] drm_test_connector_hdmi_init_valid
[23:26:53] [PASSED] drm_test_connector_hdmi_init_bpc_8
[23:26:53] [PASSED] drm_test_connector_hdmi_init_bpc_10
[23:26:53] [PASSED] drm_test_connector_hdmi_init_bpc_12
[23:26:53] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[23:26:53] [PASSED] drm_test_connector_hdmi_init_bpc_null
[23:26:53] [PASSED] drm_test_connector_hdmi_init_formats_empty
[23:26:53] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[23:26:53] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:26:53] [PASSED] supported_formats=0x9 yuv420_allowed=1
[23:26:53] [PASSED] supported_formats=0x9 yuv420_allowed=0
[23:26:53] [PASSED] supported_formats=0x5 yuv420_allowed=1
[23:26:53] [PASSED] supported_formats=0x5 yuv420_allowed=0
[23:26:53] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[23:26:53] [PASSED] drm_test_connector_hdmi_init_null_ddc
[23:26:53] [PASSED] drm_test_connector_hdmi_init_null_product
[23:26:53] [PASSED] drm_test_connector_hdmi_init_null_vendor
[23:26:53] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[23:26:53] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[23:26:53] [PASSED] drm_test_connector_hdmi_init_product_valid
[23:26:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[23:26:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[23:26:53] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[23:26:53] ========= drm_test_connector_hdmi_init_type_valid =========
[23:26:53] [PASSED] HDMI-A
[23:26:53] [PASSED] HDMI-B
[23:26:53] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[23:26:53] ======== drm_test_connector_hdmi_init_type_invalid ========
[23:26:53] [PASSED] Unknown
[23:26:53] [PASSED] VGA
[23:26:53] [PASSED] DVI-I
[23:26:53] [PASSED] DVI-D
[23:26:53] [PASSED] DVI-A
[23:26:53] [PASSED] Composite
[23:26:53] [PASSED] SVIDEO
[23:26:53] [PASSED] LVDS
[23:26:53] [PASSED] Component
[23:26:53] [PASSED] DIN
[23:26:53] [PASSED] DP
[23:26:53] [PASSED] TV
[23:26:53] [PASSED] eDP
[23:26:53] [PASSED] Virtual
[23:26:53] [PASSED] DSI
[23:26:53] [PASSED] DPI
[23:26:53] [PASSED] Writeback
[23:26:53] [PASSED] SPI
[23:26:53] [PASSED] USB
[23:26:53] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[23:26:53] ============ [PASSED] drmm_connector_hdmi_init =============
[23:26:53] ============= drmm_connector_init (3 subtests) =============
[23:26:53] [PASSED] drm_test_drmm_connector_init
[23:26:53] [PASSED] drm_test_drmm_connector_init_null_ddc
[23:26:53] ========= drm_test_drmm_connector_init_type_valid =========
[23:26:53] [PASSED] Unknown
[23:26:53] [PASSED] VGA
[23:26:53] [PASSED] DVI-I
[23:26:53] [PASSED] DVI-D
[23:26:53] [PASSED] DVI-A
[23:26:53] [PASSED] Composite
[23:26:53] [PASSED] SVIDEO
[23:26:53] [PASSED] LVDS
[23:26:53] [PASSED] Component
[23:26:53] [PASSED] DIN
[23:26:53] [PASSED] DP
[23:26:53] [PASSED] HDMI-A
[23:26:53] [PASSED] HDMI-B
[23:26:53] [PASSED] TV
[23:26:53] [PASSED] eDP
[23:26:53] [PASSED] Virtual
[23:26:53] [PASSED] DSI
[23:26:53] [PASSED] DPI
[23:26:53] [PASSED] Writeback
[23:26:53] [PASSED] SPI
[23:26:53] [PASSED] USB
[23:26:53] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[23:26:53] =============== [PASSED] drmm_connector_init ===============
[23:26:53] ========= drm_connector_dynamic_init (6 subtests) ==========
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_init
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_init_properties
[23:26:53] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[23:26:53] [PASSED] Unknown
[23:26:53] [PASSED] VGA
[23:26:53] [PASSED] DVI-I
[23:26:53] [PASSED] DVI-D
[23:26:53] [PASSED] DVI-A
[23:26:53] [PASSED] Composite
[23:26:53] [PASSED] SVIDEO
[23:26:53] [PASSED] LVDS
[23:26:53] [PASSED] Component
[23:26:53] [PASSED] DIN
[23:26:53] [PASSED] DP
[23:26:53] [PASSED] HDMI-A
[23:26:53] [PASSED] HDMI-B
[23:26:53] [PASSED] TV
[23:26:53] [PASSED] eDP
[23:26:53] [PASSED] Virtual
[23:26:53] [PASSED] DSI
[23:26:53] [PASSED] DPI
[23:26:53] [PASSED] Writeback
[23:26:53] [PASSED] SPI
[23:26:53] [PASSED] USB
[23:26:53] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[23:26:53] ======== drm_test_drm_connector_dynamic_init_name =========
[23:26:53] [PASSED] Unknown
[23:26:53] [PASSED] VGA
[23:26:53] [PASSED] DVI-I
[23:26:53] [PASSED] DVI-D
[23:26:53] [PASSED] DVI-A
[23:26:53] [PASSED] Composite
[23:26:53] [PASSED] SVIDEO
[23:26:53] [PASSED] LVDS
[23:26:53] [PASSED] Component
[23:26:53] [PASSED] DIN
[23:26:53] [PASSED] DP
[23:26:53] [PASSED] HDMI-A
[23:26:53] [PASSED] HDMI-B
[23:26:53] [PASSED] TV
[23:26:53] [PASSED] eDP
[23:26:53] [PASSED] Virtual
[23:26:53] [PASSED] DSI
[23:26:53] [PASSED] DPI
[23:26:53] [PASSED] Writeback
[23:26:53] [PASSED] SPI
[23:26:53] [PASSED] USB
[23:26:53] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[23:26:53] =========== [PASSED] drm_connector_dynamic_init ============
[23:26:53] ==== drm_connector_dynamic_register_early (4 subtests) =====
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[23:26:53] ====== [PASSED] drm_connector_dynamic_register_early =======
[23:26:53] ======= drm_connector_dynamic_register (7 subtests) ========
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[23:26:53] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[23:26:53] ========= [PASSED] drm_connector_dynamic_register ==========
[23:26:53] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[23:26:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[23:26:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[23:26:53] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[23:26:53] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[23:26:53] ========== drm_test_get_tv_mode_from_name_valid ===========
[23:26:53] [PASSED] NTSC
[23:26:53] [PASSED] NTSC-443
[23:26:53] [PASSED] NTSC-J
[23:26:53] [PASSED] PAL
[23:26:53] [PASSED] PAL-M
[23:26:53] [PASSED] PAL-N
[23:26:53] [PASSED] SECAM
[23:26:53] [PASSED] Mono
[23:26:53] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[23:26:53] [PASSED] drm_test_get_tv_mode_from_name_truncated
[23:26:53] ============ [PASSED] drm_get_tv_mode_from_name ============
[23:26:53] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[23:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[23:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[23:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[23:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[23:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[23:26:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[23:26:53] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[23:26:53] [PASSED] VIC 96
[23:26:53] [PASSED] VIC 97
[23:26:53] [PASSED] VIC 101
[23:26:53] [PASSED] VIC 102
[23:26:53] [PASSED] VIC 106
[23:26:53] [PASSED] VIC 107
[23:26:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[23:26:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[23:26:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[23:26:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[23:26:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[23:26:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[23:26:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[23:26:53] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[23:26:53] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[23:26:53] [PASSED] Automatic
[23:26:53] [PASSED] Full
[23:26:53] [PASSED] Limited 16:235
[23:26:53] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[23:26:53] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[23:26:53] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[23:26:53] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[23:26:53] === drm_test_drm_hdmi_connector_get_output_format_name ====
[23:26:53] [PASSED] RGB
[23:26:53] [PASSED] YUV 4:2:0
[23:26:53] [PASSED] YUV 4:2:2
[23:26:53] [PASSED] YUV 4:4:4
[23:26:53] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[23:26:53] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[23:26:53] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[23:26:53] ============= drm_damage_helper (21 subtests) ==============
[23:26:53] [PASSED] drm_test_damage_iter_no_damage
[23:26:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[23:26:53] [PASSED] drm_test_damage_iter_no_damage_src_moved
[23:26:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[23:26:53] [PASSED] drm_test_damage_iter_no_damage_not_visible
[23:26:53] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[23:26:53] [PASSED] drm_test_damage_iter_no_damage_no_fb
[23:26:53] [PASSED] drm_test_damage_iter_simple_damage
[23:26:53] [PASSED] drm_test_damage_iter_single_damage
[23:26:53] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[23:26:53] [PASSED] drm_test_damage_iter_single_damage_outside_src
[23:26:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[23:26:53] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[23:26:53] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[23:26:53] [PASSED] drm_test_damage_iter_single_damage_src_moved
[23:26:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[23:26:53] [PASSED] drm_test_damage_iter_damage
[23:26:53] [PASSED] drm_test_damage_iter_damage_one_intersect
[23:26:53] [PASSED] drm_test_damage_iter_damage_one_outside
[23:26:53] [PASSED] drm_test_damage_iter_damage_src_moved
[23:26:53] [PASSED] drm_test_damage_iter_damage_not_visible
[23:26:53] ================ [PASSED] drm_damage_helper ================
[23:26:53] ============== drm_dp_mst_helper (3 subtests) ==============
[23:26:53] ============== drm_test_dp_mst_calc_pbn_mode ==============
[23:26:53] [PASSED] Clock 154000 BPP 30 DSC disabled
[23:26:53] [PASSED] Clock 234000 BPP 30 DSC disabled
[23:26:53] [PASSED] Clock 297000 BPP 24 DSC disabled
[23:26:53] [PASSED] Clock 332880 BPP 24 DSC enabled
[23:26:53] [PASSED] Clock 324540 BPP 24 DSC enabled
[23:26:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[23:26:53] ============== drm_test_dp_mst_calc_pbn_div ===============
[23:26:53] [PASSED] Link rate 2000000 lane count 4
[23:26:53] [PASSED] Link rate 2000000 lane count 2
[23:26:53] [PASSED] Link rate 2000000 lane count 1
[23:26:53] [PASSED] Link rate 1350000 lane count 4
[23:26:53] [PASSED] Link rate 1350000 lane count 2
[23:26:53] [PASSED] Link rate 1350000 lane count 1
[23:26:53] [PASSED] Link rate 1000000 lane count 4
[23:26:53] [PASSED] Link rate 1000000 lane count 2
[23:26:53] [PASSED] Link rate 1000000 lane count 1
[23:26:53] [PASSED] Link rate 810000 lane count 4
[23:26:53] [PASSED] Link rate 810000 lane count 2
[23:26:53] [PASSED] Link rate 810000 lane count 1
[23:26:53] [PASSED] Link rate 540000 lane count 4
[23:26:53] [PASSED] Link rate 540000 lane count 2
[23:26:53] [PASSED] Link rate 540000 lane count 1
[23:26:53] [PASSED] Link rate 270000 lane count 4
[23:26:53] [PASSED] Link rate 270000 lane count 2
[23:26:53] [PASSED] Link rate 270000 lane count 1
[23:26:53] [PASSED] Link rate 162000 lane count 4
[23:26:53] [PASSED] Link rate 162000 lane count 2
[23:26:53] [PASSED] Link rate 162000 lane count 1
[23:26:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[23:26:53] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[23:26:53] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[23:26:53] [PASSED] DP_POWER_UP_PHY with port number
[23:26:53] [PASSED] DP_POWER_DOWN_PHY with port number
[23:26:53] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[23:26:53] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[23:26:53] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[23:26:53] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[23:26:53] [PASSED] DP_QUERY_PAYLOAD with port number
[23:26:53] [PASSED] DP_QUERY_PAYLOAD with VCPI
[23:26:53] [PASSED] DP_REMOTE_DPCD_READ with port number
[23:26:53] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[23:26:53] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[23:26:53] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[23:26:53] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[23:26:53] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[23:26:53] [PASSED] DP_REMOTE_I2C_READ with port number
[23:26:53] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[23:26:53] [PASSED] DP_REMOTE_I2C_READ with transactions array
[23:26:53] [PASSED] DP_REMOTE_I2C_WRITE with port number
[23:26:53] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[23:26:53] [PASSED] DP_REMOTE_I2C_WRITE with data array
[23:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[23:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[23:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[23:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[23:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[23:26:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[23:26:53] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[23:26:53] ================ [PASSED] drm_dp_mst_helper ================
[23:26:53] ================== drm_exec (7 subtests) ===================
[23:26:53] [PASSED] sanitycheck
[23:26:53] [PASSED] test_lock
[23:26:53] [PASSED] test_lock_unlock
[23:26:53] [PASSED] test_duplicates
[23:26:53] [PASSED] test_prepare
[23:26:53] [PASSED] test_prepare_array
[23:26:53] [PASSED] test_multiple_loops
[23:26:53] ==================== [PASSED] drm_exec =====================
[23:26:53] =========== drm_format_helper_test (17 subtests) ===========
[23:26:53] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[23:26:53] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[23:26:53] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[23:26:53] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[23:26:53] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[23:26:53] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[23:26:53] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[23:26:53] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[23:26:53] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[23:26:53] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[23:26:53] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[23:26:53] ============== drm_test_fb_xrgb8888_to_mono ===============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[23:26:53] ==================== drm_test_fb_swab =====================
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ================ [PASSED] drm_test_fb_swab =================
[23:26:53] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[23:26:53] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[23:26:53] [PASSED] single_pixel_source_buffer
[23:26:53] [PASSED] single_pixel_clip_rectangle
[23:26:53] [PASSED] well_known_colors
[23:26:53] [PASSED] destination_pitch
[23:26:53] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[23:26:53] ================= drm_test_fb_clip_offset =================
[23:26:53] [PASSED] pass through
[23:26:53] [PASSED] horizontal offset
[23:26:53] [PASSED] vertical offset
[23:26:53] [PASSED] horizontal and vertical offset
[23:26:53] [PASSED] horizontal offset (custom pitch)
[23:26:53] [PASSED] vertical offset (custom pitch)
[23:26:53] [PASSED] horizontal and vertical offset (custom pitch)
[23:26:53] ============= [PASSED] drm_test_fb_clip_offset =============
[23:26:53] =================== drm_test_fb_memcpy ====================
[23:26:53] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[23:26:53] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[23:26:53] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[23:26:53] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[23:26:53] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[23:26:53] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[23:26:53] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[23:26:53] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[23:26:53] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[23:26:53] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[23:26:53] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[23:26:53] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[23:26:53] =============== [PASSED] drm_test_fb_memcpy ================
[23:26:53] ============= [PASSED] drm_format_helper_test ==============
[23:26:53] ================= drm_format (18 subtests) =================
[23:26:53] [PASSED] drm_test_format_block_width_invalid
[23:26:53] [PASSED] drm_test_format_block_width_one_plane
[23:26:53] [PASSED] drm_test_format_block_width_two_plane
[23:26:53] [PASSED] drm_test_format_block_width_three_plane
[23:26:53] [PASSED] drm_test_format_block_width_tiled
[23:26:53] [PASSED] drm_test_format_block_height_invalid
[23:26:53] [PASSED] drm_test_format_block_height_one_plane
[23:26:53] [PASSED] drm_test_format_block_height_two_plane
[23:26:53] [PASSED] drm_test_format_block_height_three_plane
[23:26:53] [PASSED] drm_test_format_block_height_tiled
[23:26:53] [PASSED] drm_test_format_min_pitch_invalid
[23:26:53] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[23:26:53] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[23:26:53] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[23:26:53] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[23:26:53] [PASSED] drm_test_format_min_pitch_two_plane
[23:26:53] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[23:26:53] [PASSED] drm_test_format_min_pitch_tiled
[23:26:53] =================== [PASSED] drm_format ====================
[23:26:53] ============== drm_framebuffer (10 subtests) ===============
[23:26:53] ========== drm_test_framebuffer_check_src_coords ==========
[23:26:53] [PASSED] Success: source fits into fb
[23:26:53] [PASSED] Fail: overflowing fb with x-axis coordinate
[23:26:53] [PASSED] Fail: overflowing fb with y-axis coordinate
[23:26:53] [PASSED] Fail: overflowing fb with source width
[23:26:53] [PASSED] Fail: overflowing fb with source height
[23:26:53] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[23:26:53] [PASSED] drm_test_framebuffer_cleanup
[23:26:53] =============== drm_test_framebuffer_create ===============
[23:26:53] [PASSED] ABGR8888 normal sizes
[23:26:53] [PASSED] ABGR8888 max sizes
[23:26:53] [PASSED] ABGR8888 pitch greater than min required
[23:26:53] [PASSED] ABGR8888 pitch less than min required
[23:26:53] [PASSED] ABGR8888 Invalid width
[23:26:53] [PASSED] ABGR8888 Invalid buffer handle
[23:26:53] [PASSED] No pixel format
[23:26:53] [PASSED] ABGR8888 Width 0
[23:26:53] [PASSED] ABGR8888 Height 0
[23:26:53] [PASSED] ABGR8888 Out of bound height * pitch combination
[23:26:53] [PASSED] ABGR8888 Large buffer offset
[23:26:53] [PASSED] ABGR8888 Buffer offset for inexistent plane
[23:26:53] [PASSED] ABGR8888 Invalid flag
[23:26:53] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[23:26:53] [PASSED] ABGR8888 Valid buffer modifier
[23:26:53] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[23:26:53] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[23:26:53] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[23:26:53] [PASSED] NV12 Normal sizes
[23:26:53] [PASSED] NV12 Max sizes
[23:26:53] [PASSED] NV12 Invalid pitch
[23:26:53] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[23:26:53] [PASSED] NV12 different modifier per-plane
[23:26:53] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[23:26:53] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[23:26:53] [PASSED] NV12 Modifier for inexistent plane
[23:26:53] [PASSED] NV12 Handle for inexistent plane
[23:26:53] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[23:26:53] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[23:26:53] [PASSED] YVU420 Normal sizes
[23:26:53] [PASSED] YVU420 Max sizes
[23:26:53] [PASSED] YVU420 Invalid pitch
[23:26:53] [PASSED] YVU420 Different pitches
[23:26:53] [PASSED] YVU420 Different buffer offsets/pitches
[23:26:53] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[23:26:53] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[23:26:53] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[23:26:53] [PASSED] YVU420 Valid modifier
[23:26:53] [PASSED] YVU420 Different modifiers per plane
[23:26:53] [PASSED] YVU420 Modifier for inexistent plane
[23:26:53] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[23:26:53] [PASSED] X0L2 Normal sizes
[23:26:53] [PASSED] X0L2 Max sizes
[23:26:53] [PASSED] X0L2 Invalid pitch
[23:26:53] [PASSED] X0L2 Pitch greater than minimum required
[23:26:53] [PASSED] X0L2 Handle for inexistent plane
[23:26:53] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[23:26:53] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[23:26:53] [PASSED] X0L2 Valid modifier
[23:26:53] [PASSED] X0L2 Modifier for inexistent plane
[23:26:53] =========== [PASSED] drm_test_framebuffer_create ===========
[23:26:53] [PASSED] drm_test_framebuffer_free
[23:26:53] [PASSED] drm_test_framebuffer_init
[23:26:53] [PASSED] drm_test_framebuffer_init_bad_format
[23:26:53] [PASSED] drm_test_framebuffer_init_dev_mismatch
[23:26:53] [PASSED] drm_test_framebuffer_lookup
[23:26:53] [PASSED] drm_test_framebuffer_lookup_inexistent
[23:26:53] [PASSED] drm_test_framebuffer_modifiers_not_supported
[23:26:53] ================= [PASSED] drm_framebuffer =================
[23:26:53] ================ drm_gem_shmem (8 subtests) ================
[23:26:53] [PASSED] drm_gem_shmem_test_obj_create
[23:26:53] [PASSED] drm_gem_shmem_test_obj_create_private
[23:26:53] [PASSED] drm_gem_shmem_test_pin_pages
[23:26:53] [PASSED] drm_gem_shmem_test_vmap
[23:26:53] [PASSED] drm_gem_shmem_test_get_sg_table
[23:26:53] [PASSED] drm_gem_shmem_test_get_pages_sgt
[23:26:53] [PASSED] drm_gem_shmem_test_madvise
[23:26:53] [PASSED] drm_gem_shmem_test_purge
[23:26:53] ================== [PASSED] drm_gem_shmem ==================
[23:26:53] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[23:26:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[23:26:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[23:26:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[23:26:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[23:26:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[23:26:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[23:26:53] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[23:26:53] [PASSED] Automatic
[23:26:53] [PASSED] Full
[23:26:53] [PASSED] Limited 16:235
[23:26:53] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[23:26:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[23:26:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[23:26:53] [PASSED] drm_test_check_disable_connector
[23:26:53] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[23:26:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[23:26:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[23:26:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[23:26:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[23:26:53] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[23:26:53] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[23:26:53] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[23:26:53] [PASSED] drm_test_check_output_bpc_dvi
[23:26:53] [PASSED] drm_test_check_output_bpc_format_vic_1
[23:26:53] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[23:26:53] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[23:26:53] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[23:26:53] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[23:26:53] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[23:26:53] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[23:26:53] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[23:26:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[23:26:53] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[23:26:53] [PASSED] drm_test_check_broadcast_rgb_value
[23:26:53] [PASSED] drm_test_check_bpc_8_value
[23:26:53] [PASSED] drm_test_check_bpc_10_value
[23:26:53] [PASSED] drm_test_check_bpc_12_value
[23:26:53] [PASSED] drm_test_check_format_value
[23:26:53] [PASSED] drm_test_check_tmds_char_value
[23:26:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[23:26:53] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[23:26:53] [PASSED] drm_test_check_mode_valid
[23:26:53] [PASSED] drm_test_check_mode_valid_reject
[23:26:53] [PASSED] drm_test_check_mode_valid_reject_rate
[23:26:53] [PASSED] drm_test_check_mode_valid_reject_max_clock
[23:26:53] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[23:26:53] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[23:26:53] [PASSED] drm_test_check_infoframes
[23:26:53] [PASSED] drm_test_check_reject_avi_infoframe
[23:26:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[23:26:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[23:26:53] [PASSED] drm_test_check_reject_audio_infoframe
[23:26:53] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[23:26:53] ================= drm_managed (2 subtests) =================
[23:26:53] [PASSED] drm_test_managed_release_action
[23:26:53] [PASSED] drm_test_managed_run_action
[23:26:53] =================== [PASSED] drm_managed ===================
[23:26:53] =================== drm_mm (6 subtests) ====================
[23:26:53] [PASSED] drm_test_mm_init
[23:26:53] [PASSED] drm_test_mm_debug
[23:26:53] [PASSED] drm_test_mm_align32
[23:26:53] [PASSED] drm_test_mm_align64
[23:26:53] [PASSED] drm_test_mm_lowest
[23:26:53] [PASSED] drm_test_mm_highest
[23:26:53] ===================== [PASSED] drm_mm ======================
[23:26:53] ============= drm_modes_analog_tv (5 subtests) =============
[23:26:53] [PASSED] drm_test_modes_analog_tv_mono_576i
[23:26:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[23:26:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[23:26:53] [PASSED] drm_test_modes_analog_tv_pal_576i
[23:26:53] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[23:26:53] =============== [PASSED] drm_modes_analog_tv ===============
[23:26:53] ============== drm_plane_helper (2 subtests) ===============
[23:26:53] =============== drm_test_check_plane_state ================
[23:26:53] [PASSED] clipping_simple
[23:26:53] [PASSED] clipping_rotate_reflect
[23:26:53] [PASSED] positioning_simple
[23:26:53] [PASSED] upscaling
[23:26:53] [PASSED] downscaling
[23:26:53] [PASSED] rounding1
[23:26:53] [PASSED] rounding2
[23:26:53] [PASSED] rounding3
[23:26:53] [PASSED] rounding4
[23:26:53] =========== [PASSED] drm_test_check_plane_state ============
[23:26:53] =========== drm_test_check_invalid_plane_state ============
[23:26:53] [PASSED] positioning_invalid
[23:26:53] [PASSED] upscaling_invalid
[23:26:53] [PASSED] downscaling_invalid
[23:26:53] ======= [PASSED] drm_test_check_invalid_plane_state ========
[23:26:53] ================ [PASSED] drm_plane_helper =================
[23:26:53] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[23:26:53] ====== drm_test_connector_helper_tv_get_modes_check =======
[23:26:53] [PASSED] None
[23:26:53] [PASSED] PAL
[23:26:53] [PASSED] NTSC
[23:26:53] [PASSED] Both, NTSC Default
[23:26:53] [PASSED] Both, PAL Default
[23:26:53] [PASSED] Both, NTSC Default, with PAL on command-line
[23:26:53] [PASSED] Both, PAL Default, with NTSC on command-line
[23:26:53] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[23:26:53] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[23:26:53] ================== drm_rect (9 subtests) ===================
[23:26:53] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[23:26:53] [PASSED] drm_test_rect_clip_scaled_not_clipped
[23:26:53] [PASSED] drm_test_rect_clip_scaled_clipped
[23:26:53] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[23:26:53] ================= drm_test_rect_intersect =================
[23:26:53] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[23:26:53] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[23:26:53] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[23:26:53] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[23:26:53] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[23:26:53] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[23:26:53] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[23:26:53] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[23:26:53] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[23:26:53] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[23:26:53] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[23:26:53] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[23:26:53] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[23:26:53] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[23:26:53] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[23:26:53] ============= [PASSED] drm_test_rect_intersect =============
[23:26:53] ================ drm_test_rect_calc_hscale ================
[23:26:53] [PASSED] normal use
[23:26:53] [PASSED] out of max range
[23:26:53] [PASSED] out of min range
[23:26:53] [PASSED] zero dst
[23:26:53] [PASSED] negative src
[23:26:53] [PASSED] negative dst
[23:26:53] ============ [PASSED] drm_test_rect_calc_hscale ============
[23:26:53] ================ drm_test_rect_calc_vscale ================
[23:26:53] [PASSED] normal use
[23:26:53] [PASSED] out of max range
[23:26:53] [PASSED] out of min range
[23:26:53] [PASSED] zero dst
[23:26:53] [PASSED] negative src
[23:26:53] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[23:26:53] ============ [PASSED] drm_test_rect_calc_vscale ============
[23:26:53] ================== drm_test_rect_rotate ===================
[23:26:53] [PASSED] reflect-x
[23:26:53] [PASSED] reflect-y
[23:26:53] [PASSED] rotate-0
[23:26:53] [PASSED] rotate-90
[23:26:53] [PASSED] rotate-180
[23:26:53] [PASSED] rotate-270
[23:26:53] ============== [PASSED] drm_test_rect_rotate ===============
[23:26:53] ================ drm_test_rect_rotate_inv =================
[23:26:53] [PASSED] reflect-x
[23:26:53] [PASSED] reflect-y
[23:26:53] [PASSED] rotate-0
[23:26:53] [PASSED] rotate-90
[23:26:53] [PASSED] rotate-180
[23:26:53] [PASSED] rotate-270
[23:26:53] ============ [PASSED] drm_test_rect_rotate_inv =============
[23:26:53] ==================== [PASSED] drm_rect =====================
[23:26:53] ============ drm_sysfb_modeset_test (1 subtest) ============
[23:26:53] ============ drm_test_sysfb_build_fourcc_list =============
[23:26:53] [PASSED] no native formats
[23:26:53] [PASSED] XRGB8888 as native format
[23:26:53] [PASSED] remove duplicates
[23:26:53] [PASSED] convert alpha formats
[23:26:53] [PASSED] random formats
[23:26:53] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[23:26:53] ============= [PASSED] drm_sysfb_modeset_test ==============
[23:26:53] ================== drm_fixp (2 subtests) ===================
[23:26:53] [PASSED] drm_test_int2fixp
[23:26:53] [PASSED] drm_test_sm2fixp
[23:26:53] ==================== [PASSED] drm_fixp =====================
[23:26:53] ============================================================
[23:26:53] Testing complete. Ran 621 tests: passed: 621
[23:26:53] Elapsed time: 26.247s total, 1.691s configuring, 24.389s building, 0.134s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[23:26:53] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[23:26:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[23:27:05] Starting KUnit Kernel (1/1)...
[23:27:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[23:27:05] ================= ttm_device (5 subtests) ==================
[23:27:05] [PASSED] ttm_device_init_basic
[23:27:05] [PASSED] ttm_device_init_multiple
[23:27:05] [PASSED] ttm_device_fini_basic
[23:27:05] [PASSED] ttm_device_init_no_vma_man
[23:27:05] ================== ttm_device_init_pools ==================
[23:27:05] [PASSED] No DMA allocations, no DMA32 required
[23:27:05] [PASSED] DMA allocations, DMA32 required
[23:27:05] [PASSED] No DMA allocations, DMA32 required
[23:27:05] [PASSED] DMA allocations, no DMA32 required
[23:27:05] ============== [PASSED] ttm_device_init_pools ==============
[23:27:05] =================== [PASSED] ttm_device ====================
[23:27:05] ================== ttm_pool (8 subtests) ===================
[23:27:05] ================== ttm_pool_alloc_basic ===================
[23:27:05] [PASSED] One page
[23:27:05] [PASSED] More than one page
[23:27:05] [PASSED] Above the allocation limit
[23:27:05] [PASSED] One page, with coherent DMA mappings enabled
[23:27:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:27:05] ============== [PASSED] ttm_pool_alloc_basic ===============
[23:27:05] ============== ttm_pool_alloc_basic_dma_addr ==============
[23:27:05] [PASSED] One page
[23:27:05] [PASSED] More than one page
[23:27:05] [PASSED] Above the allocation limit
[23:27:05] [PASSED] One page, with coherent DMA mappings enabled
[23:27:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[23:27:05] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[23:27:05] [PASSED] ttm_pool_alloc_order_caching_match
[23:27:05] [PASSED] ttm_pool_alloc_caching_mismatch
[23:27:05] [PASSED] ttm_pool_alloc_order_mismatch
[23:27:05] [PASSED] ttm_pool_free_dma_alloc
[23:27:05] [PASSED] ttm_pool_free_no_dma_alloc
[23:27:05] [PASSED] ttm_pool_fini_basic
[23:27:05] ==================== [PASSED] ttm_pool =====================
[23:27:05] ================ ttm_resource (8 subtests) =================
[23:27:05] ================= ttm_resource_init_basic =================
[23:27:05] [PASSED] Init resource in TTM_PL_SYSTEM
[23:27:05] [PASSED] Init resource in TTM_PL_VRAM
[23:27:05] [PASSED] Init resource in a private placement
[23:27:05] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[23:27:05] ============= [PASSED] ttm_resource_init_basic =============
[23:27:05] [PASSED] ttm_resource_init_pinned
[23:27:05] [PASSED] ttm_resource_fini_basic
[23:27:05] [PASSED] ttm_resource_manager_init_basic
[23:27:05] [PASSED] ttm_resource_manager_usage_basic
[23:27:05] [PASSED] ttm_resource_manager_set_used_basic
[23:27:05] [PASSED] ttm_sys_man_alloc_basic
[23:27:05] [PASSED] ttm_sys_man_free_basic
[23:27:05] ================== [PASSED] ttm_resource ===================
[23:27:05] =================== ttm_tt (15 subtests) ===================
[23:27:05] ==================== ttm_tt_init_basic ====================
[23:27:05] [PASSED] Page-aligned size
[23:27:05] [PASSED] Extra pages requested
[23:27:05] ================ [PASSED] ttm_tt_init_basic ================
[23:27:05] [PASSED] ttm_tt_init_misaligned
[23:27:05] [PASSED] ttm_tt_fini_basic
[23:27:05] [PASSED] ttm_tt_fini_sg
[23:27:05] [PASSED] ttm_tt_fini_shmem
[23:27:05] [PASSED] ttm_tt_create_basic
[23:27:05] [PASSED] ttm_tt_create_invalid_bo_type
[23:27:05] [PASSED] ttm_tt_create_ttm_exists
[23:27:05] [PASSED] ttm_tt_create_failed
[23:27:05] [PASSED] ttm_tt_destroy_basic
[23:27:05] [PASSED] ttm_tt_populate_null_ttm
[23:27:05] [PASSED] ttm_tt_populate_populated_ttm
[23:27:05] [PASSED] ttm_tt_unpopulate_basic
[23:27:05] [PASSED] ttm_tt_unpopulate_empty_ttm
[23:27:05] [PASSED] ttm_tt_swapin_basic
[23:27:05] ===================== [PASSED] ttm_tt ======================
[23:27:05] =================== ttm_bo (14 subtests) ===================
[23:27:05] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[23:27:05] [PASSED] Cannot be interrupted and sleeps
[23:27:05] [PASSED] Cannot be interrupted, locks straight away
[23:27:05] [PASSED] Can be interrupted, sleeps
[23:27:05] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[23:27:05] [PASSED] ttm_bo_reserve_locked_no_sleep
[23:27:05] [PASSED] ttm_bo_reserve_no_wait_ticket
[23:27:05] [PASSED] ttm_bo_reserve_double_resv
[23:27:05] [PASSED] ttm_bo_reserve_interrupted
[23:27:05] [PASSED] ttm_bo_reserve_deadlock
[23:27:05] [PASSED] ttm_bo_unreserve_basic
[23:27:05] [PASSED] ttm_bo_unreserve_pinned
[23:27:05] [PASSED] ttm_bo_unreserve_bulk
[23:27:05] [PASSED] ttm_bo_fini_basic
[23:27:05] [PASSED] ttm_bo_fini_shared_resv
[23:27:05] [PASSED] ttm_bo_pin_basic
[23:27:05] [PASSED] ttm_bo_pin_unpin_resource
[23:27:05] [PASSED] ttm_bo_multiple_pin_one_unpin
[23:27:05] ===================== [PASSED] ttm_bo ======================
[23:27:05] ============== ttm_bo_validate (22 subtests) ===============
[23:27:05] ============== ttm_bo_init_reserved_sys_man ===============
[23:27:05] [PASSED] Buffer object for userspace
[23:27:05] [PASSED] Kernel buffer object
[23:27:05] [PASSED] Shared buffer object
[23:27:05] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[23:27:05] ============== ttm_bo_init_reserved_mock_man ==============
[23:27:05] [PASSED] Buffer object for userspace
[23:27:05] [PASSED] Kernel buffer object
[23:27:05] [PASSED] Shared buffer object
[23:27:05] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[23:27:05] [PASSED] ttm_bo_init_reserved_resv
[23:27:05] ================== ttm_bo_validate_basic ==================
[23:27:05] [PASSED] Buffer object for userspace
[23:27:05] [PASSED] Kernel buffer object
[23:27:05] [PASSED] Shared buffer object
[23:27:05] ============== [PASSED] ttm_bo_validate_basic ==============
[23:27:05] [PASSED] ttm_bo_validate_invalid_placement
[23:27:05] ============= ttm_bo_validate_same_placement ==============
[23:27:05] [PASSED] System manager
[23:27:05] [PASSED] VRAM manager
[23:27:05] ========= [PASSED] ttm_bo_validate_same_placement ==========
[23:27:05] [PASSED] ttm_bo_validate_failed_alloc
[23:27:05] [PASSED] ttm_bo_validate_pinned
[23:27:05] [PASSED] ttm_bo_validate_busy_placement
[23:27:05] ================ ttm_bo_validate_multihop =================
[23:27:05] [PASSED] Buffer object for userspace
[23:27:05] [PASSED] Kernel buffer object
[23:27:05] [PASSED] Shared buffer object
[23:27:05] ============ [PASSED] ttm_bo_validate_multihop =============
[23:27:05] ========== ttm_bo_validate_no_placement_signaled ==========
[23:27:05] [PASSED] Buffer object in system domain, no page vector
[23:27:05] [PASSED] Buffer object in system domain with an existing page vector
[23:27:05] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[23:27:05] ======== ttm_bo_validate_no_placement_not_signaled ========
[23:27:05] [PASSED] Buffer object for userspace
[23:27:05] [PASSED] Kernel buffer object
[23:27:05] [PASSED] Shared buffer object
[23:27:05] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[23:27:05] [PASSED] ttm_bo_validate_move_fence_signaled
[23:27:05] ========= ttm_bo_validate_move_fence_not_signaled =========
[23:27:05] [PASSED] Waits for GPU
[23:27:05] [PASSED] Tries to lock straight away
[23:27:05] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[23:27:05] [PASSED] ttm_bo_validate_swapout
[23:27:05] [PASSED] ttm_bo_validate_happy_evict
[23:27:05] [PASSED] ttm_bo_validate_all_pinned_evict
[23:27:05] [PASSED] ttm_bo_validate_allowed_only_evict
[23:27:05] [PASSED] ttm_bo_validate_deleted_evict
[23:27:05] [PASSED] ttm_bo_validate_busy_domain_evict
[23:27:05] [PASSED] ttm_bo_validate_evict_gutting
[23:27:05] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[23:27:05] ================= [PASSED] ttm_bo_validate =================
[23:27:05] ============================================================
[23:27:05] Testing complete. Ran 102 tests: passed: 102
[23:27:05] Elapsed time: 11.380s total, 1.716s configuring, 9.448s building, 0.187s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 39+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (9 preceding siblings ...)
2026-03-26 23:27 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-03-27 0:02 ` Patchwork
2026-03-27 18:27 ` ✗ Xe.CI.FULL: failure " Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2026-03-27 0:02 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 898 bytes --]
== Series Details ==
Series: drm/i915/casf: Integrate the sharpness filter properly into the scaler code
URL : https://patchwork.freedesktop.org/series/163952/
State : success
== Summary ==
CI Bug Log - changes from xe-4799-e7f370d78d32ed29cc3f100fbc3d1fe1a844978f_BAT -> xe-pw-163952v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (14 -> 14)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-4799-e7f370d78d32ed29cc3f100fbc3d1fe1a844978f -> xe-pw-163952v1
IGT_8834: 8834
xe-4799-e7f370d78d32ed29cc3f100fbc3d1fe1a844978f: e7f370d78d32ed29cc3f100fbc3d1fe1a844978f
xe-pw-163952v1: 163952v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/index.html
[-- Attachment #2: Type: text/html, Size: 1446 bytes --]
^ permalink raw reply [flat|nested] 39+ messages in thread* ✗ Xe.CI.FULL: failure for drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (10 preceding siblings ...)
2026-03-27 0:02 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-03-27 18:27 ` Patchwork
2026-03-31 11:40 ` [PATCH 0/9] " Sharma, Swati2
2026-03-31 16:44 ` Garg, Nemesa
13 siblings, 0 replies; 39+ messages in thread
From: Patchwork @ 2026-03-27 18:27 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 15050 bytes --]
== Series Details ==
Series: drm/i915/casf: Integrate the sharpness filter properly into the scaler code
URL : https://patchwork.freedesktop.org/series/163952/
State : failure
== Summary ==
CI Bug Log - changes from xe-4799-e7f370d78d32ed29cc3f100fbc3d1fe1a844978f_FULL -> xe-pw-163952v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-163952v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-163952v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-163952v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_sharpness_filter@invalid-filter-with-scaling-mode@pipe-c-edp-1-invalid-filter-with-scaling-mode-cente:
- shard-lnl: [PASS][1] -> [FAIL][2] +3 other tests fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4799-e7f370d78d32ed29cc3f100fbc3d1fe1a844978f/shard-lnl-1/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode@pipe-c-edp-1-invalid-filter-with-scaling-mode-cente.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-3/igt@kms_sharpness_filter@invalid-filter-with-scaling-mode@pipe-c-edp-1-invalid-filter-with-scaling-mode-cente.html
Known issues
------------
Here are the changes found in xe-pw-163952v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-lnl: NOTRUN -> [SKIP][3] ([Intel XE#1124]) +1 other test skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#2887]) +2 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode:
- shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#373]) +2 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode.html
* igt@kms_cursor_crc@cursor-sliding-32x32:
- shard-lnl: NOTRUN -> [SKIP][6] ([Intel XE#1424]) +1 other test skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@kms_cursor_crc@cursor-sliding-32x32.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
- shard-lnl: NOTRUN -> [SKIP][7] ([Intel XE#309] / [Intel XE#7343])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#4354] / [Intel XE#7386])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-indfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#6312])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][10] ([Intel XE#7061] / [Intel XE#7356])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#6312] / [Intel XE#651]) +2 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][12] ([Intel XE#656]) +7 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier:
- shard-lnl: NOTRUN -> [SKIP][13] ([Intel XE#7283])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@kms_plane@pixel-format-4-tiled-dg2-mc-ccs-modifier.html
* igt@kms_plane_lowres@tiling-y:
- shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#599])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-b:
- shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#2763] / [Intel XE#6886]) +3 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-b.html
* igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area:
- shard-lnl: NOTRUN -> [SKIP][16] ([Intel XE#2893] / [Intel XE#7304])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#4608])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#4608] / [Intel XE#7304])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-b-edp-1.html
* igt@kms_psr@fbc-pr-primary-render:
- shard-lnl: NOTRUN -> [SKIP][20] ([Intel XE#1406])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@kms_psr@fbc-pr-primary-render.html
* igt@xe_evict@evict-mixed-many-threads-large:
- shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#6540] / [Intel XE#688]) +2 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@xe_evict@evict-mixed-many-threads-large.html
* igt@xe_exec_balancer@no-exec-parallel-rebind:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#7482]) +5 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@xe_exec_balancer@no-exec-parallel-rebind.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-lnl: NOTRUN -> [SKIP][23] ([Intel XE#1392])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_fault_mode@twice-multi-queue-userptr:
- shard-lnl: NOTRUN -> [SKIP][24] ([Intel XE#7136])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@xe_exec_fault_mode@twice-multi-queue-userptr.html
* igt@xe_exec_multi_queue@many-execs-preempt-mode-close-fd-smem:
- shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#6874]) +6 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@xe_exec_multi_queue@many-execs-preempt-mode-close-fd-smem.html
* igt@xe_exec_sip_eudebug@wait-writesip-nodebug:
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#7636]) +3 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@xe_exec_sip_eudebug@wait-writesip-nodebug.html
* igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr-invalidate:
- shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#7138]) +1 other test skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr-invalidate.html
* igt@xe_mmap@small-bar:
- shard-lnl: NOTRUN -> [SKIP][28] ([Intel XE#512] / [Intel XE#7323] / [Intel XE#7384])
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@xe_mmap@small-bar.html
* igt@xe_multigpu_svm@mgpu-atomic-op-prefetch:
- shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#6964])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@xe_multigpu_svm@mgpu-atomic-op-prefetch.html
* igt@xe_pm@s3-basic-exec:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#584] / [Intel XE#7369])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@xe_pm@s3-basic-exec.html
* igt@xe_pmu@engine-activity-accuracy-90:
- shard-lnl: [PASS][31] -> [FAIL][32] ([Intel XE#7072]) +1 other test fail
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4799-e7f370d78d32ed29cc3f100fbc3d1fe1a844978f/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@xe_pmu@engine-activity-accuracy-90.html
* igt@xe_prefetch_fault@prefetch-fault:
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#7599])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@xe_prefetch_fault@prefetch-fault.html
* igt@xe_query@multigpu-query-topology:
- shard-lnl: NOTRUN -> [SKIP][34] ([Intel XE#944])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@xe_query@multigpu-query-topology.html
* igt@xe_sriov_vram@vf-access-after-resize-up:
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#6376] / [Intel XE#7330] / [Intel XE#7422])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-6/igt@xe_sriov_vram@vf-access-after-resize-up.html
#### Possible fixes ####
* igt@xe_exec_system_allocator@many-large-mmap-remap-dontunmap-eocheck:
- shard-lnl: [INCOMPLETE][36] -> [PASS][37]
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4799-e7f370d78d32ed29cc3f100fbc3d1fe1a844978f/shard-lnl-8/igt@xe_exec_system_allocator@many-large-mmap-remap-dontunmap-eocheck.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-2/igt@xe_exec_system_allocator@many-large-mmap-remap-dontunmap-eocheck.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
- shard-lnl: [FAIL][38] ([Intel XE#5625]) -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4799-e7f370d78d32ed29cc3f100fbc3d1fe1a844978f/shard-lnl-7/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7072]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7072
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
[Intel XE#7323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7323
[Intel XE#7330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7330
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
[Intel XE#7384]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7384
[Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
[Intel XE#7422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7422
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-4799-e7f370d78d32ed29cc3f100fbc3d1fe1a844978f -> xe-pw-163952v1
IGT_8834: 8834
xe-4799-e7f370d78d32ed29cc3f100fbc3d1fe1a844978f: e7f370d78d32ed29cc3f100fbc3d1fe1a844978f
xe-pw-163952v1: 163952v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/index.html
[-- Attachment #2: Type: text/html, Size: 16772 bytes --]
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (11 preceding siblings ...)
2026-03-27 18:27 ` ✗ Xe.CI.FULL: failure " Patchwork
@ 2026-03-31 11:40 ` Sharma, Swati2
2026-03-31 12:34 ` Ville Syrjälä
2026-03-31 16:44 ` Garg, Nemesa
13 siblings, 1 reply; 39+ messages in thread
From: Sharma, Swati2 @ 2026-03-31 11:40 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Nemesa Garg, ankit.k.nautiyal
Hi Ville,
On 27-03-2026 04:01 am, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The sharpness filter isn't anything special. It's just another
> mode of the pipe scaler, so treat is as such.
>
> This gets rid of tons of special casing all over the place,
> and will allow me to finally land the pending pipe prefill
> series: https://patchwork.freedesktop.org/series/156137/
>
> Note that this will fail some kms_sharpness_filter tests,
> because those tests are basically incorrect. But I couldn't
> decide yet how much of that entire test should be nuked. It
> seems to be doing a *lot* of things, most of which have
> nothing to do with the sharpness filter...
With your series I could see only 1 negative test failing -
invalid-filter-with-scaling-mode-center
https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shards-all.html?testfilter=sharpness
Is it sharpness and scaling-mode-center can work together? Since
scaler-mode-center doesn't require
scaler.
You rightly said, all tests are not related to sharpness but covering
valid scenarios for scaler + sharpness.
Apart from invalid-filter-with-scaling-mode-center, which other tests do
you think are incorrect? We tried covering all valid scenarios as per HAS.
>
> Cc: Nemesa Garg <nemesa.garg@intel.com>
>
> Ville Syrjälä (9):
> drm/i915/casf: s/casf_enable/enable/
> drm/i915/casf: Make a proper hw state copy of the sharpness_strength
> drm/i915/casf: Move the casf state to better place
> drm/i915/casf: Extract scaler_has_casf()
> drm/i915/casf: Handle CASF in skl_scaler_get_filter_select()
> drm/i915/casf: Constify crtc_state
> drn/i915/casf: Remove redundant argument from
> intel_casf_filter_lut_load()
> drm/i915/pfit: Call intel_pfit_compute_config() unconditionally on
> (e)DP/HDMI
> drm/i915/casf: Integrate the sharpness filter properly into the scaler
> code
>
> drivers/gpu/drm/i915/display/intel_casf.c | 102 +++++-----------
> drivers/gpu/drm/i915/display/intel_casf.h | 6 +-
> .../drm/i915/display/intel_crtc_state_dump.c | 11 +-
> drivers/gpu/drm/i915/display/intel_display.c | 46 ++------
> .../drm/i915/display/intel_display_debugfs.c | 5 +-
> .../drm/i915/display/intel_display_types.h | 5 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 9 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +-
> .../drm/i915/display/intel_modeset_setup.c | 1 +
> drivers/gpu/drm/i915/display/intel_pfit.c | 13 ++-
> drivers/gpu/drm/i915/display/skl_scaler.c | 110 +++++++-----------
> drivers/gpu/drm/i915/display/skl_scaler.h | 2 -
> 12 files changed, 112 insertions(+), 206 deletions(-)
>
^ permalink raw reply [flat|nested] 39+ messages in thread* Re: [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-31 11:40 ` [PATCH 0/9] " Sharma, Swati2
@ 2026-03-31 12:34 ` Ville Syrjälä
2026-04-01 6:02 ` Sharma, Swati2
0 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjälä @ 2026-03-31 12:34 UTC (permalink / raw)
To: Sharma, Swati2; +Cc: intel-gfx, intel-xe, Nemesa Garg, ankit.k.nautiyal
On Tue, Mar 31, 2026 at 05:10:42PM +0530, Sharma, Swati2 wrote:
> Hi Ville,
>
> On 27-03-2026 04:01 am, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The sharpness filter isn't anything special. It's just another
> > mode of the pipe scaler, so treat is as such.
> >
> > This gets rid of tons of special casing all over the place,
> > and will allow me to finally land the pending pipe prefill
> > series: https://patchwork.freedesktop.org/series/156137/
> >
> > Note that this will fail some kms_sharpness_filter tests,
> > because those tests are basically incorrect. But I couldn't
> > decide yet how much of that entire test should be nuked. It
> > seems to be doing a *lot* of things, most of which have
> > nothing to do with the sharpness filter...
>
> With your series I could see only 1 negative test failing -
> invalid-filter-with-scaling-mode-center
>
> https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shards-all.html?testfilter=sharpness
>
> Is it sharpness and scaling-mode-center can work together? Since
> scaler-mode-center doesn't require
>
> scaler.
>
> You rightly said, all tests are not related to sharpness but covering
> valid scenarios for scaler + sharpness.
>
> Apart from invalid-filter-with-scaling-mode-center, which other tests do
> you think are incorrect? We tried covering all valid scenarios as per HAS.
I would probably nuke all these:
Nothing to do with the sharpness filter since
it's on the pipe scaler, not plane scaler:
- filter-modifiers
- filter-rotations
- filter-formats
Doesn't seem to test anything at all:
- filter-tap
Maybe a decent idea, but really wasteful to have these kinds
of things for every little feature, as opposed to just
some generic "did we restore everything after dpms/suspend
correctly" test:
- filter-suspend
- filter-dpms
And I guess we're missing a test for sharpness filter vs.
scaling filter.
And the CRC stuff is really limited, so we have no idea if
the thing even works from these tests. But I guess we don't
really know the secret sauce algorithm, so generating a
reference image is hard :/
If/when we get writeback we should be able vary the sharpness
strength and do a diff on the resulting images, and based on
that confirm that it actually did something that looks
reasonable.
>
> >
> > Cc: Nemesa Garg <nemesa.garg@intel.com>
> >
> > Ville Syrjälä (9):
> > drm/i915/casf: s/casf_enable/enable/
> > drm/i915/casf: Make a proper hw state copy of the sharpness_strength
> > drm/i915/casf: Move the casf state to better place
> > drm/i915/casf: Extract scaler_has_casf()
> > drm/i915/casf: Handle CASF in skl_scaler_get_filter_select()
> > drm/i915/casf: Constify crtc_state
> > drn/i915/casf: Remove redundant argument from
> > intel_casf_filter_lut_load()
> > drm/i915/pfit: Call intel_pfit_compute_config() unconditionally on
> > (e)DP/HDMI
> > drm/i915/casf: Integrate the sharpness filter properly into the scaler
> > code
> >
> > drivers/gpu/drm/i915/display/intel_casf.c | 102 +++++-----------
> > drivers/gpu/drm/i915/display/intel_casf.h | 6 +-
> > .../drm/i915/display/intel_crtc_state_dump.c | 11 +-
> > drivers/gpu/drm/i915/display/intel_display.c | 46 ++------
> > .../drm/i915/display/intel_display_debugfs.c | 5 +-
> > .../drm/i915/display/intel_display_types.h | 5 +-
> > drivers/gpu/drm/i915/display/intel_dp.c | 9 +-
> > drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +-
> > .../drm/i915/display/intel_modeset_setup.c | 1 +
> > drivers/gpu/drm/i915/display/intel_pfit.c | 13 ++-
> > drivers/gpu/drm/i915/display/skl_scaler.c | 110 +++++++-----------
> > drivers/gpu/drm/i915/display/skl_scaler.h | 2 -
> > 12 files changed, 112 insertions(+), 206 deletions(-)
> >
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-31 12:34 ` Ville Syrjälä
@ 2026-04-01 6:02 ` Sharma, Swati2
2026-04-01 11:54 ` Ville Syrjälä
0 siblings, 1 reply; 39+ messages in thread
From: Sharma, Swati2 @ 2026-04-01 6:02 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, Nemesa Garg, ankit.k.nautiyal
Hi Ville,
On 31-03-2026 06:04 pm, Ville Syrjälä wrote:
> On Tue, Mar 31, 2026 at 05:10:42PM +0530, Sharma, Swati2 wrote:
>> Hi Ville,
>>
>> On 27-03-2026 04:01 am, Ville Syrjala wrote:
>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>
>>> The sharpness filter isn't anything special. It's just another
>>> mode of the pipe scaler, so treat is as such.
>>>
>>> This gets rid of tons of special casing all over the place,
>>> and will allow me to finally land the pending pipe prefill
>>> series: https://patchwork.freedesktop.org/series/156137/
>>>
>>> Note that this will fail some kms_sharpness_filter tests,
>>> because those tests are basically incorrect. But I couldn't
>>> decide yet how much of that entire test should be nuked. It
>>> seems to be doing a *lot* of things, most of which have
>>> nothing to do with the sharpness filter...
>> With your series I could see only 1 negative test failing -
>> invalid-filter-with-scaling-mode-center
>>
>> https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shards-all.html?testfilter=sharpness
>>
>> Is it sharpness and scaling-mode-center can work together? Since
>> scaler-mode-center doesn't require
>>
>> scaler.
>>
>> You rightly said, all tests are not related to sharpness but covering
>> valid scenarios for scaler + sharpness.
>>
>> Apart from invalid-filter-with-scaling-mode-center, which other tests do
>> you think are incorrect? We tried covering all valid scenarios as per HAS.
> I would probably nuke all these:
>
> Nothing to do with the sharpness filter since
> it's on the pipe scaler, not plane scaler:
> - filter-modifiers
> - filter-rotations
> - filter-formats
Ack.
>
> Doesn't seem to test anything at all:
> - filter-tap
Intention of this test is to validate different taps. As per spec,
different TAPS will be selected based on different resolution selected.
TAP 3: mode->hdisplay <= 1920 && mode->vdisplay <= 1080
TAP 5: (mode->hdisplay > 1920 && mode->hdisplay < 3840) &&
(mode->vdisplay > 1080 && mode->vdisplay < 2160)
TAP 7: mode->hdisplay >= 3840 && mode->vdisplay >= 2160
>
> Maybe a decent idea, but really wasteful to have these kinds
> of things for every little feature, as opposed to just
> some generic "did we restore everything after dpms/suspend
> correctly" test:
> - filter-suspend
> - filter-dpms
True, but we did caught an issue during local testing with this test
where we were not able
to retain sharpness after S/R.
>
> And I guess we're missing a test for sharpness filter vs.
> scaling filter.
Can you please little bit elaborate more?
>
> And the CRC stuff is really limited, so we have no idea if
> the thing even works from these tests. But I guess we don't
> really know the secret sauce algorithm, so generating a
> reference image is hard :/
Yes, right. For this we created chamelium specific test
tests/chamelium/kms_chamelium_sharpness_filter.c
where we are comparing frame dumps with and w/o sharpness enabled
and you can clearly see difference when sharpness is applied. Though we
can't check
degree of sharpness but can check if there was some change wrt reference.
Test summary:
This test validates the content adaptive sharpness filter functionality
by toggling the sharpness property on the CRTC and capturing frames
using Chamelium. It ensures that the filter visually alters the
output as
expected.
step 1. Display a test image with no sharpness filter.
step 2. Capture output (Frame 0).
step 3. Enable sharpness filter at mid strength.
step 4. Capture output (Frame 1).
step 5. Disable the filter again.
step 6. Capture output (Frame 2).
step 7. Re-enable filter with same strength.
step 8. Capture output (Frame 3).
step 9. Compare frame pairs:
- Frame 0 vs Frame 1 → should differ
- Frame 1 vs Frame 2 → should differ
- Frame 0 vs Frame 2 → should match
- Frame 1 vs Frame 3 → should match
> If/when we get writeback we should be able vary the sharpness
> strength and do a diff on the resulting images, and based on
> that confirm that it actually did something that looks
> reasonable.
Sure, we do have plans to verify sharpness and colorops once WB is enabled.
So, for time being we are relying on chamelium with frame dumps.
>
>>> Cc: Nemesa Garg <nemesa.garg@intel.com>
>>>
>>> Ville Syrjälä (9):
>>> drm/i915/casf: s/casf_enable/enable/
>>> drm/i915/casf: Make a proper hw state copy of the sharpness_strength
>>> drm/i915/casf: Move the casf state to better place
>>> drm/i915/casf: Extract scaler_has_casf()
>>> drm/i915/casf: Handle CASF in skl_scaler_get_filter_select()
>>> drm/i915/casf: Constify crtc_state
>>> drn/i915/casf: Remove redundant argument from
>>> intel_casf_filter_lut_load()
>>> drm/i915/pfit: Call intel_pfit_compute_config() unconditionally on
>>> (e)DP/HDMI
>>> drm/i915/casf: Integrate the sharpness filter properly into the scaler
>>> code
>>>
>>> drivers/gpu/drm/i915/display/intel_casf.c | 102 +++++-----------
>>> drivers/gpu/drm/i915/display/intel_casf.h | 6 +-
>>> .../drm/i915/display/intel_crtc_state_dump.c | 11 +-
>>> drivers/gpu/drm/i915/display/intel_display.c | 46 ++------
>>> .../drm/i915/display/intel_display_debugfs.c | 5 +-
>>> .../drm/i915/display/intel_display_types.h | 5 +-
>>> drivers/gpu/drm/i915/display/intel_dp.c | 9 +-
>>> drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +-
>>> .../drm/i915/display/intel_modeset_setup.c | 1 +
>>> drivers/gpu/drm/i915/display/intel_pfit.c | 13 ++-
>>> drivers/gpu/drm/i915/display/skl_scaler.c | 110 +++++++-----------
>>> drivers/gpu/drm/i915/display/skl_scaler.h | 2 -
>>> 12 files changed, 112 insertions(+), 206 deletions(-)
>>>
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-04-01 6:02 ` Sharma, Swati2
@ 2026-04-01 11:54 ` Ville Syrjälä
2026-04-02 6:04 ` Sharma, Swati2
0 siblings, 1 reply; 39+ messages in thread
From: Ville Syrjälä @ 2026-04-01 11:54 UTC (permalink / raw)
To: Sharma, Swati2; +Cc: intel-gfx, intel-xe, Nemesa Garg, ankit.k.nautiyal
On Wed, Apr 01, 2026 at 11:32:30AM +0530, Sharma, Swati2 wrote:
> Hi Ville,
>
> On 31-03-2026 06:04 pm, Ville Syrjälä wrote:
> > On Tue, Mar 31, 2026 at 05:10:42PM +0530, Sharma, Swati2 wrote:
> >> Hi Ville,
> >>
> >> On 27-03-2026 04:01 am, Ville Syrjala wrote:
> >>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>>
> >>> The sharpness filter isn't anything special. It's just another
> >>> mode of the pipe scaler, so treat is as such.
> >>>
> >>> This gets rid of tons of special casing all over the place,
> >>> and will allow me to finally land the pending pipe prefill
> >>> series: https://patchwork.freedesktop.org/series/156137/
> >>>
> >>> Note that this will fail some kms_sharpness_filter tests,
> >>> because those tests are basically incorrect. But I couldn't
> >>> decide yet how much of that entire test should be nuked. It
> >>> seems to be doing a *lot* of things, most of which have
> >>> nothing to do with the sharpness filter...
> >> With your series I could see only 1 negative test failing -
> >> invalid-filter-with-scaling-mode-center
> >>
> >> https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shards-all.html?testfilter=sharpness
> >>
> >> Is it sharpness and scaling-mode-center can work together? Since
> >> scaler-mode-center doesn't require
> >>
> >> scaler.
> >>
> >> You rightly said, all tests are not related to sharpness but covering
> >> valid scenarios for scaler + sharpness.
> >>
> >> Apart from invalid-filter-with-scaling-mode-center, which other tests do
> >> you think are incorrect? We tried covering all valid scenarios as per HAS.
> > I would probably nuke all these:
> >
> > Nothing to do with the sharpness filter since
> > it's on the pipe scaler, not plane scaler:
> > - filter-modifiers
> > - filter-rotations
> > - filter-formats
> Ack.
> >
> > Doesn't seem to test anything at all:
> > - filter-tap
>
> Intention of this test is to validate different taps. As per spec,
>
> different TAPS will be selected based on different resolution selected.
>
>
> TAP 3: mode->hdisplay <= 1920 && mode->vdisplay <= 1080
> TAP 5: (mode->hdisplay > 1920 && mode->hdisplay < 3840) &&
> (mode->vdisplay > 1080 && mode->vdisplay < 2160)
> TAP 7: mode->hdisplay >= 3840 && mode->vdisplay >= 2160
AFAIK all it does is try three different modes on the CRTC,
and then nothing. How does that verify anything (other
than the driver didn't explode)?
I suppose it could be verified with the chamelium/writeback
based test. But right now this test doesn't seem to do anything.
>
> >
> > Maybe a decent idea, but really wasteful to have these kinds
> > of things for every little feature, as opposed to just
> > some generic "did we restore everything after dpms/suspend
> > correctly" test:
> > - filter-suspend
> > - filter-dpms
>
> True, but we did caught an issue during local testing with this test
> where we were not able
>
> to retain sharpness after S/R.
That was likely due to the poor integration with the actual
pfit code. So the sharpness filter needed all kinds of special
cases everywhere in the driver. I'm fixing that now.
These kind of tests burn a lot of CI time. We really don't
want them separately for every little individual feature.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 39+ messages in thread
* Re: [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-04-01 11:54 ` Ville Syrjälä
@ 2026-04-02 6:04 ` Sharma, Swati2
0 siblings, 0 replies; 39+ messages in thread
From: Sharma, Swati2 @ 2026-04-02 6:04 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, Nemesa Garg, ankit.k.nautiyal
Hi Ville,
On 01-04-2026 05:24 pm, Ville Syrjälä wrote:
> On Wed, Apr 01, 2026 at 11:32:30AM +0530, Sharma, Swati2 wrote:
>> Hi Ville,
>>
>> On 31-03-2026 06:04 pm, Ville Syrjälä wrote:
>>> On Tue, Mar 31, 2026 at 05:10:42PM +0530, Sharma, Swati2 wrote:
>>>> Hi Ville,
>>>>
>>>> On 27-03-2026 04:01 am, Ville Syrjala wrote:
>>>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>>>
>>>>> The sharpness filter isn't anything special. It's just another
>>>>> mode of the pipe scaler, so treat is as such.
>>>>>
>>>>> This gets rid of tons of special casing all over the place,
>>>>> and will allow me to finally land the pending pipe prefill
>>>>> series: https://patchwork.freedesktop.org/series/156137/
>>>>>
>>>>> Note that this will fail some kms_sharpness_filter tests,
>>>>> because those tests are basically incorrect. But I couldn't
>>>>> decide yet how much of that entire test should be nuked. It
>>>>> seems to be doing a *lot* of things, most of which have
>>>>> nothing to do with the sharpness filter...
>>>> With your series I could see only 1 negative test failing -
>>>> invalid-filter-with-scaling-mode-center
>>>>
>>>> https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163952v1/shards-all.html?testfilter=sharpness
>>>>
>>>> Is it sharpness and scaling-mode-center can work together? Since
>>>> scaler-mode-center doesn't require
>>>>
>>>> scaler.
>>>>
>>>> You rightly said, all tests are not related to sharpness but covering
>>>> valid scenarios for scaler + sharpness.
>>>>
>>>> Apart from invalid-filter-with-scaling-mode-center, which other tests do
>>>> you think are incorrect? We tried covering all valid scenarios as per HAS.
>>> I would probably nuke all these:
>>>
>>> Nothing to do with the sharpness filter since
>>> it's on the pipe scaler, not plane scaler:
>>> - filter-modifiers
>>> - filter-rotations
>>> - filter-formats
>> Ack.
>>> Doesn't seem to test anything at all:
>>> - filter-tap
>> Intention of this test is to validate different taps. As per spec,
>>
>> different TAPS will be selected based on different resolution selected.
>>
>>
>> TAP 3: mode->hdisplay <= 1920 && mode->vdisplay <= 1080
>> TAP 5: (mode->hdisplay > 1920 && mode->hdisplay < 3840) &&
>> (mode->vdisplay > 1080 && mode->vdisplay < 2160)
>> TAP 7: mode->hdisplay >= 3840 && mode->vdisplay >= 2160
> AFAIK all it does is try three different modes on the CRTC,
> and then nothing. How does that verify anything (other
> than the driver didn't explode)?
Right, when we are trying with different resolutions; though from driver
different taps are
being selected but from IGT we don't know if its correct or not.
> I suppose it could be verified with the chamelium/writeback
> based test. But right now this test doesn't seem to do anything.
You mean, shall i add this test on kms_chamelium_sharpness_filter.c ?
Currently we have only
basic test enabled there.
>>> Maybe a decent idea, but really wasteful to have these kinds
>>> of things for every little feature, as opposed to just
>>> some generic "did we restore everything after dpms/suspend
>>> correctly" test:
>>> - filter-suspend
>>> - filter-dpms
>> True, but we did caught an issue during local testing with this test
>> where we were not able
>>
>> to retain sharpness after S/R.
> That was likely due to the poor integration with the actual
> pfit code. So the sharpness filter needed all kinds of special
> cases everywhere in the driver. I'm fixing that now.
>
> These kind of tests burn a lot of CI time. We really don't
> want them separately for every little individual feature.
Ack.
>
^ permalink raw reply [flat|nested] 39+ messages in thread
* RE: [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code
2026-03-26 22:31 [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly into the scaler code Ville Syrjala
` (12 preceding siblings ...)
2026-03-31 11:40 ` [PATCH 0/9] " Sharma, Swati2
@ 2026-03-31 16:44 ` Garg, Nemesa
13 siblings, 0 replies; 39+ messages in thread
From: Garg, Nemesa @ 2026-03-31 16:44 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
> -----Original Message-----
> From: Ville Syrjala <ville.syrjala@linux.intel.com>
> Sent: Friday, March 27, 2026 4:02 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; Garg, Nemesa <nemesa.garg@intel.com>
> Subject: [PATCH 0/9] drm/i915/casf: Integrate the sharpness filter properly
> into the scaler code
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The sharpness filter isn't anything special. It's just another mode of the pipe
> scaler, so treat is as such.
>
> This gets rid of tons of special casing all over the place, and will allow me to
> finally land the pending pipe prefill
> series: https://patchwork.freedesktop.org/series/156137/
>
> Note that this will fail some kms_sharpness_filter tests, because those tests
> are basically incorrect. But I couldn't decide yet how much of that entire test
> should be nuked. It seems to be doing a *lot* of things, most of which have
> nothing to do with the sharpness filter...
>
I will drop this series [1], as the changes have already been taken care of in the current series.
[1] https://patchwork.freedesktop.org/series/158667/
With this, series look good to me.
Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>
> Cc: Nemesa Garg <nemesa.garg@intel.com>
>
> Ville Syrjälä (9):
> drm/i915/casf: s/casf_enable/enable/
> drm/i915/casf: Make a proper hw state copy of the sharpness_strength
> drm/i915/casf: Move the casf state to better place
> drm/i915/casf: Extract scaler_has_casf()
> drm/i915/casf: Handle CASF in skl_scaler_get_filter_select()
> drm/i915/casf: Constify crtc_state
> drn/i915/casf: Remove redundant argument from
> intel_casf_filter_lut_load()
> drm/i915/pfit: Call intel_pfit_compute_config() unconditionally on
> (e)DP/HDMI
> drm/i915/casf: Integrate the sharpness filter properly into the scaler
> code
>
> drivers/gpu/drm/i915/display/intel_casf.c | 102 +++++-----------
> drivers/gpu/drm/i915/display/intel_casf.h | 6 +-
> .../drm/i915/display/intel_crtc_state_dump.c | 11 +-
> drivers/gpu/drm/i915/display/intel_display.c | 46 ++------
> .../drm/i915/display/intel_display_debugfs.c | 5 +-
> .../drm/i915/display/intel_display_types.h | 5 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 9 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 8 +-
> .../drm/i915/display/intel_modeset_setup.c | 1 +
> drivers/gpu/drm/i915/display/intel_pfit.c | 13 ++-
> drivers/gpu/drm/i915/display/skl_scaler.c | 110 +++++++-----------
> drivers/gpu/drm/i915/display/skl_scaler.h | 2 -
> 12 files changed, 112 insertions(+), 206 deletions(-)
>
> --
> 2.52.0
^ permalink raw reply [flat|nested] 39+ messages in thread