[PATCH v4 0/9] Introduce Xe PCIe FLR

[PATCH v4 0/9] Introduce Xe PCIe FLR

[Raag Jadav]

Here's my humble attempt at introducing PCIe Function Level Reset (FLR)
support in xe driver. This is ofcourse a half baked implementation and
only limited to re-initializing GT. This needs to be extended for a lot
of different components which I've skipped here for my lack of competence,
so feel free to join in and support them.

PS: All xe_exec_basic tests and clpeak run smoothly after FLR. Give it
a spin and let me know if any regressions.

Trigger it with:

$ echo 1 > /sys/bus/pci/devices/<BDF>/reset

v2: Re-initialize migrate context (Matthew Brost)
    Add kernel doc (Matthew Brost)
    Spell out Function Level Reset (Jani)

v3: Cancel in-flight jobs before FLR

v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)

Raag Jadav (9):
  drm/xe/uc_fw: Allow re-initializing firmware
  drm/xe/guc_submit: Introduce xe_guc_submit_reinit()
  drm/xe/gt: Introduce FLR helpers
  drm/xe/irq: Introduce xe_irq_disable()
  drm/xe: Introduce xe_device_assert_lmem_ready()
  drm/xe/bo_evict: Introduce xe_bo_restore_map()
  drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
  drm/xe/migrate: Introduce xe_migrate_reinit()
  drm/xe/pci: Introduce PCIe FLR

 drivers/gpu/drm/xe/Makefile           |   1 +
 drivers/gpu/drm/xe/xe_bo_evict.c      |  51 +++++++--
 drivers/gpu/drm/xe/xe_bo_evict.h      |   2 +
 drivers/gpu/drm/xe/xe_device.c        |  10 +-
 drivers/gpu/drm/xe/xe_device.h        |   1 +
 drivers/gpu/drm/xe/xe_exec_queue.c    |  34 +++++-
 drivers/gpu/drm/xe/xe_exec_queue.h    |   1 +
 drivers/gpu/drm/xe/xe_gpu_scheduler.h |   5 +
 drivers/gpu/drm/xe/xe_gsc.c           |  14 +++
 drivers/gpu/drm/xe/xe_gsc.h           |   1 +
 drivers/gpu/drm/xe/xe_gt.c            |  47 ++++++++
 drivers/gpu/drm/xe/xe_gt.h            |   2 +
 drivers/gpu/drm/xe/xe_gt_types.h      |   9 ++
 drivers/gpu/drm/xe/xe_guc.c           |  36 ++++++
 drivers/gpu/drm/xe/xe_guc.h           |   2 +
 drivers/gpu/drm/xe/xe_guc_submit.c    |  35 ++++++
 drivers/gpu/drm/xe/xe_guc_submit.h    |   1 +
 drivers/gpu/drm/xe/xe_huc.c           |  14 +++
 drivers/gpu/drm/xe/xe_huc.h           |   1 +
 drivers/gpu/drm/xe/xe_irq.c           |  13 ++-
 drivers/gpu/drm/xe/xe_irq.h           |   1 +
 drivers/gpu/drm/xe/xe_lrc.c           |  17 +++
 drivers/gpu/drm/xe/xe_lrc.h           |   2 +
 drivers/gpu/drm/xe/xe_migrate.c       |  12 ++
 drivers/gpu/drm/xe/xe_migrate.h       |   1 +
 drivers/gpu/drm/xe/xe_pci.c           |   1 +
 drivers/gpu/drm/xe/xe_pci.h           |   2 +
 drivers/gpu/drm/xe/xe_pci_err.c       | 151 ++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_uc.c            |  37 +++++++
 drivers/gpu/drm/xe/xe_uc.h            |   2 +
 drivers/gpu/drm/xe/xe_uc_fw.c         |  39 ++++++-
 drivers/gpu/drm/xe/xe_uc_fw.h         |   1 +
 32 files changed, 525 insertions(+), 21 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c

-- 
2.43.0

[PATCH v4 1/9] drm/xe/uc_fw: Allow re-initializing firmware

[Raag Jadav]

In preparation of usecases which require re-initializing firmware without
reloading the driver, introduce xe_uc_fw_reinit(). The uC firmware bo
already exists but since it's contents are on VRAM, they are lost on PCIe
FLR. Copy the firmware back to it's bo and mark it as loadable as part of
re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_uc_fw.c | 39 +++++++++++++++++++++++++++++------
 drivers/gpu/drm/xe/xe_uc_fw.h |  1 +
 2 files changed, 34 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index 9cebb2490245..57701c6d18e0 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -704,13 +704,7 @@ static int uc_fw_request(struct xe_uc_fw *uc_fw, const struct firmware **firmwar
 	const struct firmware *fw = NULL;
 	int err;
 
-	/*
-	 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status
-	 * before we're looked at the HW caps to see if we have uc support
-	 */
 	BUILD_BUG_ON(XE_UC_FIRMWARE_UNINITIALIZED);
-	xe_gt_assert(gt, !uc_fw->status);
-	xe_gt_assert(gt, !uc_fw->path);
 
 	uc_fw_auto_select(xe, uc_fw);
 
@@ -823,6 +817,14 @@ static int uc_fw_copy(struct xe_uc_fw *uc_fw, const void *data, size_t size, u32
 	return err;
 }
 
+static void uc_fw_reinit(struct xe_uc_fw *uc_fw, const void *data)
+{
+	struct xe_device *xe = uc_fw_to_xe(uc_fw);
+
+	xe_map_memcpy_to(xe, &uc_fw->bo->vmap, 0, data, uc_fw->size);
+	xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_LOADABLE);
+}
+
 int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
 {
 	const struct firmware *fw = NULL;
@@ -846,6 +848,31 @@ int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
 }
 ALLOW_ERROR_INJECTION(xe_uc_fw_init, ERRNO); /* See xe_pci_probe() */
 
+/**
+ * xe_uc_fw_reinit() - Re-initialize uC firmware into its bo
+ * @uc_fw: uC firmware
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw)
+{
+	const struct firmware *fw = NULL;
+	int err;
+
+	err = uc_fw_request(uc_fw, &fw);
+	if (err)
+		return err;
+
+	/* no error and no firmware means nothing to copy */
+	if (!fw)
+		return 0;
+
+	uc_fw_reinit(uc_fw, fw->data);
+	uc_fw_release(fw);
+
+	return err;
+}
+
 static u32 uc_fw_ggtt_offset(struct xe_uc_fw *uc_fw)
 {
 	return xe_bo_ggtt_addr(uc_fw->bo);
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.h b/drivers/gpu/drm/xe/xe_uc_fw.h
index 6195e353f269..a73935b976d5 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw.h
@@ -15,6 +15,7 @@
 struct drm_printer;
 
 int xe_uc_fw_init(struct xe_uc_fw *uc_fw);
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw);
 size_t xe_uc_fw_copy_rsa(struct xe_uc_fw *uc_fw, void *dst, u32 max_len);
 int xe_uc_fw_upload(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags);
 int xe_uc_fw_check_version_requirements(struct xe_uc_fw *uc_fw);
-- 
2.43.0

[PATCH v4 2/9] drm/xe/guc_submit: Introduce xe_guc_submit_reinit()

[Raag Jadav]

In preparation of usecases which require re-initializing GuC submission
after PCIe FLR, introduce xe_guc_submit_reinit() helper. This will restore
exec queues which might have been killed before PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_gpu_scheduler.h |  5 ++++
 drivers/gpu/drm/xe/xe_guc_submit.c    | 35 +++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_guc_submit.h    |  1 +
 3 files changed, 41 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
index 664c2db56af3..1e079ca3891c 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
@@ -51,6 +51,11 @@ static inline void xe_sched_tdr_queue_imm(struct xe_gpu_scheduler *sched)
 	drm_sched_tdr_queue_imm(&sched->base);
 }
 
+static inline void xe_sched_update_timeout(struct xe_gpu_scheduler *sched, long timeout)
+{
+	sched->base.timeout = timeout;
+}
+
 static inline void xe_sched_resubmit_jobs(struct xe_gpu_scheduler *sched)
 {
 	struct drm_sched_job *s_job;
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index a145234f662b..c92bf42b8d3d 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -193,6 +193,11 @@ static void set_exec_queue_killed(struct xe_exec_queue *q)
 	atomic_or(EXEC_QUEUE_STATE_KILLED, &q->guc->state);
 }
 
+static void clear_exec_queue_killed(struct xe_exec_queue *q)
+{
+	atomic_and(~EXEC_QUEUE_STATE_KILLED, &q->guc->state);
+}
+
 static bool exec_queue_wedged(struct xe_exec_queue *q)
 {
 	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_WEDGED;
@@ -347,6 +352,36 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
 	return devm_add_action_or_reset(xe->drm.dev, guc_submit_fini, guc);
 }
 
+/**
+ * xe_guc_submit_reinit() - Re-initialize GuC submission.
+ * @guc: the &xe_guc to re-initialize
+ */
+void xe_guc_submit_reinit(struct xe_guc *guc)
+{
+	struct xe_exec_queue *q;
+	unsigned long index;
+
+	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
+
+	mutex_lock(&guc->submission_state.lock);
+
+	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
+		struct xe_gpu_scheduler *sched = &q->guc->sched;
+		long timeout;
+
+		/* Prevent redundant attempts to reinit parallel queues */
+		if (q->guc->id != index)
+			continue;
+
+		timeout = (q->vm && xe_vm_in_lr_mode(q->vm)) ? MAX_SCHEDULE_TIMEOUT :
+			   msecs_to_jiffies(q->sched_props.job_timeout_ms);
+		xe_sched_update_timeout(sched, timeout);
+		clear_exec_queue_killed(q);
+	}
+
+	mutex_unlock(&guc->submission_state.lock);
+}
+
 /*
  * Given that we want to guarantee enough RCS throughput to avoid missing
  * frames, we set the yield policy to 20% of each 80ms interval.
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
index b3839a90c142..a40aef196cbf 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.h
+++ b/drivers/gpu/drm/xe/xe_guc_submit.h
@@ -13,6 +13,7 @@ struct xe_exec_queue;
 struct xe_guc;
 
 int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
+void xe_guc_submit_reinit(struct xe_guc *guc);
 int xe_guc_submit_enable(struct xe_guc *guc);
 void xe_guc_submit_disable(struct xe_guc *guc);
 
-- 
2.43.0

Re: [PATCH v4 2/9] drm/xe/guc_submit: Introduce xe_guc_submit_reinit()

[Matthew Brost]

On Sat, Mar 28, 2026 at 02:06:13AM +0530, Raag Jadav wrote:
> In preparation of usecases which require re-initializing GuC submission
> after PCIe FLR, introduce xe_guc_submit_reinit() helper. This will restore
> exec queues which might have been killed before PCIe FLR.
> 
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> ---
> v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
> ---
>  drivers/gpu/drm/xe/xe_gpu_scheduler.h |  5 ++++
>  drivers/gpu/drm/xe/xe_guc_submit.c    | 35 +++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_guc_submit.h    |  1 +
>  3 files changed, 41 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> index 664c2db56af3..1e079ca3891c 100644
> --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> @@ -51,6 +51,11 @@ static inline void xe_sched_tdr_queue_imm(struct xe_gpu_scheduler *sched)
>  	drm_sched_tdr_queue_imm(&sched->base);
>  }
>  
> +static inline void xe_sched_update_timeout(struct xe_gpu_scheduler *sched, long timeout)
> +{
> +	sched->base.timeout = timeout;
> +}
> +
>  static inline void xe_sched_resubmit_jobs(struct xe_gpu_scheduler *sched)
>  {
>  	struct drm_sched_job *s_job;
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index a145234f662b..c92bf42b8d3d 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -193,6 +193,11 @@ static void set_exec_queue_killed(struct xe_exec_queue *q)
>  	atomic_or(EXEC_QUEUE_STATE_KILLED, &q->guc->state);
>  }
>  
> +static void clear_exec_queue_killed(struct xe_exec_queue *q)
> +{
> +	atomic_and(~EXEC_QUEUE_STATE_KILLED, &q->guc->state);
> +}

I think you'd want to do an atomic_set(&q->guc->state, 0) as we need
clear everything.

> +
>  static bool exec_queue_wedged(struct xe_exec_queue *q)
>  {
>  	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_WEDGED;
> @@ -347,6 +352,36 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
>  	return devm_add_action_or_reset(xe->drm.dev, guc_submit_fini, guc);
>  }
>  
> +/**
> + * xe_guc_submit_reinit() - Re-initialize GuC submission.
> + * @guc: the &xe_guc to re-initialize
> + */
> +void xe_guc_submit_reinit(struct xe_guc *guc)
> +{
> +	struct xe_exec_queue *q;
> +	unsigned long index;
> +
> +	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
> +
> +	mutex_lock(&guc->submission_state.lock);
> +
> +	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {

This is will reset user queues too which I don't think is desired as
those should be torn down and cannot be reused.

We really only to reset kernel queues.

So how about a xe_exec_queue_ops reinit...

Something like:

static void guc_exec_queue_active(struct xe_exec_queue *q)
{
	xe_sched_update_timeout(sched, timeout);
	atomic_set(&q->guc->state, 0);
}

Matt

> +		struct xe_gpu_scheduler *sched = &q->guc->sched;
> +		long timeout;
> +
> +		/* Prevent redundant attempts to reinit parallel queues */
> +		if (q->guc->id != index)
> +			continue;
> +
> +		timeout = (q->vm && xe_vm_in_lr_mode(q->vm)) ? MAX_SCHEDULE_TIMEOUT :
> +			   msecs_to_jiffies(q->sched_props.job_timeout_ms);
> +		xe_sched_update_timeout(sched, timeout);
> +		clear_exec_queue_killed(q);
> +	}
> +
> +	mutex_unlock(&guc->submission_state.lock);
> +}
> +
>  /*
>   * Given that we want to guarantee enough RCS throughput to avoid missing
>   * frames, we set the yield policy to 20% of each 80ms interval.
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
> index b3839a90c142..a40aef196cbf 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.h
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
> @@ -13,6 +13,7 @@ struct xe_exec_queue;
>  struct xe_guc;
>  
>  int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
> +void xe_guc_submit_reinit(struct xe_guc *guc);
>  int xe_guc_submit_enable(struct xe_guc *guc);
>  void xe_guc_submit_disable(struct xe_guc *guc);
>  
> -- 
> 2.43.0
> 

Re: [PATCH v4 2/9] drm/xe/guc_submit: Introduce xe_guc_submit_reinit()

[Matthew Brost]

On Fri, Mar 27, 2026 at 03:11:46PM -0700, Matthew Brost wrote:
> On Sat, Mar 28, 2026 at 02:06:13AM +0530, Raag Jadav wrote:
> > In preparation of usecases which require re-initializing GuC submission
> > after PCIe FLR, introduce xe_guc_submit_reinit() helper. This will restore
> > exec queues which might have been killed before PCIe FLR.
> > 
> > Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> > ---
> > v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
> > ---
> >  drivers/gpu/drm/xe/xe_gpu_scheduler.h |  5 ++++
> >  drivers/gpu/drm/xe/xe_guc_submit.c    | 35 +++++++++++++++++++++++++++
> >  drivers/gpu/drm/xe/xe_guc_submit.h    |  1 +
> >  3 files changed, 41 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> > index 664c2db56af3..1e079ca3891c 100644
> > --- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> > +++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
> > @@ -51,6 +51,11 @@ static inline void xe_sched_tdr_queue_imm(struct xe_gpu_scheduler *sched)
> >  	drm_sched_tdr_queue_imm(&sched->base);
> >  }
> >  
> > +static inline void xe_sched_update_timeout(struct xe_gpu_scheduler *sched, long timeout)
> > +{
> > +	sched->base.timeout = timeout;
> > +}
> > +
> >  static inline void xe_sched_resubmit_jobs(struct xe_gpu_scheduler *sched)
> >  {
> >  	struct drm_sched_job *s_job;
> > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> > index a145234f662b..c92bf42b8d3d 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> > @@ -193,6 +193,11 @@ static void set_exec_queue_killed(struct xe_exec_queue *q)
> >  	atomic_or(EXEC_QUEUE_STATE_KILLED, &q->guc->state);
> >  }
> >  
> > +static void clear_exec_queue_killed(struct xe_exec_queue *q)
> > +{
> > +	atomic_and(~EXEC_QUEUE_STATE_KILLED, &q->guc->state);
> > +}
> 
> I think you'd want to do an atomic_set(&q->guc->state, 0) as we need
> clear everything.
> 
> > +
> >  static bool exec_queue_wedged(struct xe_exec_queue *q)
> >  {
> >  	return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_WEDGED;
> > @@ -347,6 +352,36 @@ int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids)
> >  	return devm_add_action_or_reset(xe->drm.dev, guc_submit_fini, guc);
> >  }
> >  
> > +/**
> > + * xe_guc_submit_reinit() - Re-initialize GuC submission.
> > + * @guc: the &xe_guc to re-initialize
> > + */
> > +void xe_guc_submit_reinit(struct xe_guc *guc)
> > +{
> > +	struct xe_exec_queue *q;
> > +	unsigned long index;
> > +
> > +	xe_gt_assert(guc_to_gt(guc), xe_guc_read_stopped(guc) == 1);
> > +
> > +	mutex_lock(&guc->submission_state.lock);
> > +
> > +	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
> 
> This is will reset user queues too which I don't think is desired as
> those should be torn down and cannot be reused.
> 
> We really only to reset kernel queues.
> 
> So how about a xe_exec_queue_ops reinit...
> 
> Something like:
> 
> static void guc_exec_queue_active(struct xe_exec_queue *q)
> {
> 	xe_sched_update_timeout(sched, timeout);
> 	atomic_set(&q->guc->state, 0);
> }
> 

Opps, typo... s/guc_exec_queue_active/guc_exec_queue_reinit

Matt

> Matt
> 
> > +		struct xe_gpu_scheduler *sched = &q->guc->sched;
> > +		long timeout;
> > +
> > +		/* Prevent redundant attempts to reinit parallel queues */
> > +		if (q->guc->id != index)
> > +			continue;
> > +
> > +		timeout = (q->vm && xe_vm_in_lr_mode(q->vm)) ? MAX_SCHEDULE_TIMEOUT :
> > +			   msecs_to_jiffies(q->sched_props.job_timeout_ms);
> > +		xe_sched_update_timeout(sched, timeout);
> > +		clear_exec_queue_killed(q);
> > +	}
> > +
> > +	mutex_unlock(&guc->submission_state.lock);
> > +}
> > +
> >  /*
> >   * Given that we want to guarantee enough RCS throughput to avoid missing
> >   * frames, we set the yield policy to 20% of each 80ms interval.
> > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
> > index b3839a90c142..a40aef196cbf 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_submit.h
> > +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
> > @@ -13,6 +13,7 @@ struct xe_exec_queue;
> >  struct xe_guc;
> >  
> >  int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
> > +void xe_guc_submit_reinit(struct xe_guc *guc);
> >  int xe_guc_submit_enable(struct xe_guc *guc);
> >  void xe_guc_submit_disable(struct xe_guc *guc);
> >  
> > -- 
> > 2.43.0
> > 

[PATCH v4 3/9] drm/xe/gt: Introduce FLR helpers

[Raag Jadav]

In preparation of usecases which require preparing/re-initializing GT and
all its uCs before/after PCIe FLR, introduce flr_prepare/done() helpers.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_gsc.c      | 14 ++++++++++++
 drivers/gpu/drm/xe/xe_gsc.h      |  1 +
 drivers/gpu/drm/xe/xe_gt.c       | 37 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_gt.h       |  2 ++
 drivers/gpu/drm/xe/xe_gt_types.h |  9 ++++++++
 drivers/gpu/drm/xe/xe_guc.c      | 36 +++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_guc.h      |  2 ++
 drivers/gpu/drm/xe/xe_huc.c      | 14 ++++++++++++
 drivers/gpu/drm/xe/xe_huc.h      |  1 +
 drivers/gpu/drm/xe/xe_uc.c       | 37 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_uc.h       |  2 ++
 11 files changed, 155 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c
index e5c234f3d795..7bf6a90ea1a2 100644
--- a/drivers/gpu/drm/xe/xe_gsc.c
+++ b/drivers/gpu/drm/xe/xe_gsc.c
@@ -552,6 +552,20 @@ void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc)
 		flush_work(&gsc->work);
 }
 
+/**
+ * xe_gsc_flr_done() - Re-initialize GSC after FLR
+ * @gsc: The GSC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gsc_flr_done(struct xe_gsc *gsc)
+{
+	if (!xe_uc_fw_is_loadable(&gsc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&gsc->fw);
+}
+
 void xe_gsc_stop_prepare(struct xe_gsc *gsc)
 {
 	struct xe_gt *gt = gsc_to_gt(gsc);
diff --git a/drivers/gpu/drm/xe/xe_gsc.h b/drivers/gpu/drm/xe/xe_gsc.h
index b8b8e0810ad9..8b7fd98f0be6 100644
--- a/drivers/gpu/drm/xe/xe_gsc.h
+++ b/drivers/gpu/drm/xe/xe_gsc.h
@@ -13,6 +13,7 @@ struct xe_gsc;
 struct xe_gt;
 struct xe_hw_engine;
 
+int xe_gsc_flr_done(struct xe_gsc *gsc);
 int xe_gsc_init(struct xe_gsc *gsc);
 int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc);
 void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 8a31c963c372..c395d8cc3b5a 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -991,6 +991,43 @@ void xe_gt_reset_async(struct xe_gt *gt)
 		xe_pm_runtime_put(gt_to_xe(gt));
 }
 
+static void xe_gt_flr_prepare_work(struct work_struct *w)
+{
+	struct xe_gt *gt = container_of(w, typeof(*gt), flr.worker);
+
+	xe_uc_flr_prepare(&gt->uc);
+}
+
+/**
+ * xe_gt_flr_prepare() - Prepare GT for FLR
+ * @gt: the GT object
+ *
+ * Prepare all GT uCs for FLR.
+ */
+void xe_gt_flr_prepare(struct xe_gt *gt)
+{
+	/*
+	 * We'll be tearing down exec queues which signals all fences and frees the
+	 * jobs but all of that happens asynchronously, so make sure we don't disrupt
+	 * the scheduler while jobs are still in-flight.
+	 */
+	INIT_WORK_ONSTACK(&gt->flr.worker, xe_gt_flr_prepare_work);
+	queue_work(gt->ordered_wq, &gt->flr.worker);
+	flush_work(&gt->flr.worker);
+	destroy_work_on_stack(&gt->flr.worker);
+}
+
+/**
+ * xe_gt_flr_done() - Re-initialize GT after FLR
+ * @gt: the GT object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gt_flr_done(struct xe_gt *gt)
+{
+	return xe_uc_flr_done(&gt->uc);
+}
+
 void xe_gt_suspend_prepare(struct xe_gt *gt)
 {
 	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FORCEWAKE_ALL);
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index de7e47763411..5e6e4eb09efe 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -63,6 +63,8 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt);
  */
 void xe_gt_record_user_engines(struct xe_gt *gt);
 
+int xe_gt_flr_done(struct xe_gt *gt);
+void xe_gt_flr_prepare(struct xe_gt *gt);
 void xe_gt_suspend_prepare(struct xe_gt *gt);
 int xe_gt_suspend(struct xe_gt *gt);
 void xe_gt_shutdown(struct xe_gt *gt);
diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
index 8b55cf25a75f..f6694cc90582 100644
--- a/drivers/gpu/drm/xe/xe_gt_types.h
+++ b/drivers/gpu/drm/xe/xe_gt_types.h
@@ -201,6 +201,15 @@ struct xe_gt {
 		struct work_struct worker;
 	} reset;
 
+	/** @flr: state for FLR */
+	struct {
+		/**
+		 * @flr.worker: worker for FLR to be done async allowing to safely
+		 * flush all code paths
+		 */
+		struct work_struct worker;
+	} flr;
+
 	/** @tlb_inval: TLB invalidation state */
 	struct xe_tlb_inval tlb_inval;
 
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index ccebb437e37f..7db1fb8fea2b 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1681,6 +1681,42 @@ void xe_guc_sanitize(struct xe_guc *guc)
 	xe_guc_submit_disable(guc);
 }
 
+/**
+ * xe_guc_flr_prepare() - Prepare GuC for FLR
+ * @guc: The GuC object
+ *
+ * Stop GuC submission and tear down exec queues.
+ */
+void xe_guc_flr_prepare(struct xe_guc *guc)
+{
+	if (!xe_uc_fw_is_loadable(&guc->fw))
+		return;
+
+	xe_guc_submit_stop(guc);
+	xe_guc_submit_pause_abort(guc);
+}
+
+/**
+ * xe_guc_flr_done() - Re-initialize GuC after FLR
+ * @guc: The GuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_guc_flr_done(struct xe_guc *guc)
+{
+	int err;
+
+	if (!xe_uc_fw_is_loadable(&guc->fw))
+		return 0;
+
+	err = xe_uc_fw_reinit(&guc->fw);
+	if (err)
+		return err;
+
+	xe_guc_submit_reinit(guc);
+	return 0;
+}
+
 int xe_guc_reset_prepare(struct xe_guc *guc)
 {
 	return xe_guc_submit_reset_prepare(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 02514914f404..1fcc623cf24e 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -32,6 +32,8 @@
 struct drm_printer;
 
 void xe_guc_comm_init_early(struct xe_guc *guc);
+int xe_guc_flr_done(struct xe_guc *guc);
+void xe_guc_flr_prepare(struct xe_guc *guc);
 int xe_guc_init_noalloc(struct xe_guc *guc);
 int xe_guc_init(struct xe_guc *guc);
 int xe_guc_init_post_hwconfig(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_huc.c b/drivers/gpu/drm/xe/xe_huc.c
index 57afe21444b1..96c1bbb6f52c 100644
--- a/drivers/gpu/drm/xe/xe_huc.c
+++ b/drivers/gpu/drm/xe/xe_huc.c
@@ -296,6 +296,20 @@ void xe_huc_sanitize(struct xe_huc *huc)
 	xe_uc_fw_sanitize(&huc->fw);
 }
 
+/**
+ * xe_huc_flr_done() - Re-initialize HuC after FLR
+ * @huc: The HuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_huc_flr_done(struct xe_huc *huc)
+{
+	if (!xe_uc_fw_is_loadable(&huc->fw))
+		return 0;
+
+	return xe_uc_fw_reinit(&huc->fw);
+}
+
 void xe_huc_print_info(struct xe_huc *huc, struct drm_printer *p)
 {
 	struct xe_gt *gt = huc_to_gt(huc);
diff --git a/drivers/gpu/drm/xe/xe_huc.h b/drivers/gpu/drm/xe/xe_huc.h
index fa1c45e70443..7600ea196908 100644
--- a/drivers/gpu/drm/xe/xe_huc.h
+++ b/drivers/gpu/drm/xe/xe_huc.h
@@ -17,6 +17,7 @@ enum xe_huc_auth_types {
 	XE_HUC_AUTH_TYPES_COUNT
 };
 
+int xe_huc_flr_done(struct xe_huc *huc);
 int xe_huc_init(struct xe_huc *huc);
 int xe_huc_init_post_hwconfig(struct xe_huc *huc);
 int xe_huc_upload(struct xe_huc *huc);
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 75091bde0d50..e41aa95a4322 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -15,6 +15,7 @@
 #include "xe_guc_pc.h"
 #include "xe_guc_rc.h"
 #include "xe_guc_engine_activity.h"
+#include "xe_guc_submit.h"
 #include "xe_huc.h"
 #include "xe_sriov.h"
 #include "xe_wopcm.h"
@@ -275,6 +276,42 @@ static void uc_reset_wait(struct xe_uc *uc)
 		goto again;
 }
 
+/**
+ * xe_uc_flr_prepare() - Prepare uCs for FLR
+ * @uc: The uC object
+ *
+ * Tear down pending work and stop all uCs.
+ */
+void xe_uc_flr_prepare(struct xe_uc *uc)
+{
+	xe_gsc_wait_for_worker_completion(&uc->gsc);
+	xe_uc_reset_prepare(uc);
+	xe_guc_flr_prepare(&uc->guc);
+	xe_uc_stop(uc);
+	xe_uc_sanitize(uc);
+}
+
+/**
+ * xe_uc_flr_done() - Re-initialize uCs after FLR
+ * @uc: The uC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_flr_done(struct xe_uc *uc)
+{
+	int ret;
+
+	ret = xe_guc_flr_done(&uc->guc);
+	if (ret)
+		return ret;
+
+	ret = xe_huc_flr_done(&uc->huc);
+	if (ret)
+		return ret;
+
+	return xe_gsc_flr_done(&uc->gsc);
+}
+
 void xe_uc_suspend_prepare(struct xe_uc *uc)
 {
 	xe_gsc_wait_for_worker_completion(&uc->gsc);
diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
index 255a54a8f876..1756821edea1 100644
--- a/drivers/gpu/drm/xe/xe_uc.h
+++ b/drivers/gpu/drm/xe/xe_uc.h
@@ -8,6 +8,8 @@
 
 struct xe_uc;
 
+int xe_uc_flr_done(struct xe_uc *uc);
+void xe_uc_flr_prepare(struct xe_uc *uc);
 int xe_uc_init_noalloc(struct xe_uc *uc);
 int xe_uc_init(struct xe_uc *uc);
 int xe_uc_init_post_hwconfig(struct xe_uc *uc);
-- 
2.43.0

[PATCH v4 4/9] drm/xe/irq: Introduce xe_irq_disable()

[Raag Jadav]

In preparation of usecases which require disabling interrupts before
PCIe FLR, introduce xe_irq_disable() helper. With this we avoid any
side-effects of unwarranted irqs.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_irq.c | 13 ++++++++++++-
 drivers/gpu/drm/xe/xe_irq.h |  1 +
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 7560a45f7f64..9a775c6588dc 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -841,7 +841,13 @@ static void xe_irq_msi_synchronize_irq(struct xe_device *xe)
 	synchronize_irq(to_pci_dev(xe->drm.dev)->irq);
 }
 
-void xe_irq_suspend(struct xe_device *xe)
+/**
+ * xe_irq_disable() - Disable irqs
+ * @xe: xe device instance
+ *
+ * Synchronize pending irqs and disable them.
+ */
+void xe_irq_disable(struct xe_device *xe)
 {
 	atomic_set(&xe->irq.enabled, 0); /* no new irqs */
 
@@ -850,6 +856,11 @@ void xe_irq_suspend(struct xe_device *xe)
 		xe_irq_msix_synchronize_irq(xe);
 	else
 		xe_irq_msi_synchronize_irq(xe);
+}
+
+void xe_irq_suspend(struct xe_device *xe)
+{
+	xe_irq_disable(xe);
 	xe_irq_reset(xe); /* turn irqs off */
 }
 
diff --git a/drivers/gpu/drm/xe/xe_irq.h b/drivers/gpu/drm/xe/xe_irq.h
index a28bd577ba52..abda0592a105 100644
--- a/drivers/gpu/drm/xe/xe_irq.h
+++ b/drivers/gpu/drm/xe/xe_irq.h
@@ -14,6 +14,7 @@ struct xe_device;
 struct xe_tile;
 struct xe_gt;
 
+void xe_irq_disable(struct xe_device *xe);
 int xe_irq_init(struct xe_device *xe);
 int xe_irq_install(struct xe_device *xe);
 void xe_irq_suspend(struct xe_device *xe);
-- 
2.43.0

[PATCH v4 5/9] drm/xe: Introduce xe_device_assert_lmem_ready()

[Raag Jadav]

In preparation of usecases which require verifying LMEM readiness after
PCIe FLR, introduce xe_device_assert_lmem_ready() helper.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_device.c | 10 ++++++++--
 drivers/gpu/drm/xe/xe_device.h |  1 +
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 9b0540e3e289..7e58b01dfb9b 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -648,7 +648,13 @@ static int xe_set_dma_info(struct xe_device *xe)
 	return err;
 }
 
-static void assert_lmem_ready(struct xe_device *xe)
+/**
+ * xe_device_assert_lmem_ready() - Verify LMEM readiness
+ * @xe: xe device instance
+ *
+ * Verify LMEM readiness and assert on failure.
+ */
+void xe_device_assert_lmem_ready(struct xe_device *xe)
 {
 	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe))
 		return;
@@ -736,7 +742,7 @@ int xe_device_probe_early(struct xe_device *xe)
 	 * is flagged after full initialization is complete. Assert if lmem is
 	 * not initialized.
 	 */
-	assert_lmem_ready(xe);
+	xe_device_assert_lmem_ready(xe);
 
 	xe->wedged.mode = xe_device_validate_wedged_mode(xe, xe_modparam.wedged_mode) ?
 			  XE_DEFAULT_WEDGED_MODE : xe_modparam.wedged_mode;
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index e4b9de8d8e95..6e9a478c3b7a 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -144,6 +144,7 @@ static inline struct xe_force_wake *gt_to_fw(struct xe_gt *gt)
 	return &gt->pm.fw;
 }
 
+void xe_device_assert_lmem_ready(struct xe_device *xe);
 void xe_device_assert_mem_access(struct xe_device *xe);
 
 static inline bool xe_device_has_flat_ccs(struct xe_device *xe)
-- 
2.43.0

[PATCH v4 6/9] drm/xe/bo_evict: Introduce xe_bo_restore_map()

[Raag Jadav]

PCIe FLR clears all hardware state along with GGTT mappings of all
existing bos. Iterate over early and late kernel bo list and restore
their GGTT mappings in hardware, so that kernel can make use of them
during re-initialization after PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_bo_evict.c | 51 +++++++++++++++++++++++++++-----
 drivers/gpu/drm/xe/xe_bo_evict.h |  2 ++
 2 files changed, 45 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_bo_evict.c b/drivers/gpu/drm/xe/xe_bo_evict.c
index 7661fca7f278..6d7d6e67565e 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.c
+++ b/drivers/gpu/drm/xe/xe_bo_evict.c
@@ -189,14 +189,8 @@ int xe_bo_evict_all(struct xe_device *xe)
 				     xe_bo_evict_pinned);
 }
 
-static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+static int xe_bo_map_ggtt(struct xe_bo *bo)
 {
-	int ret;
-
-	ret = xe_bo_restore_pinned(bo);
-	if (ret)
-		return ret;
-
 	if (bo->flags & XE_BO_FLAG_GGTT) {
 		struct xe_tile *tile;
 		u8 id;
@@ -212,6 +206,41 @@ static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
 	return 0;
 }
 
+/**
+ * xe_bo_restore_map() - Restore GGTT mappings of kernel bos
+ * @xe: xe device
+ *
+ * PCIe FLR clears all hardware state along with GGTT mappings of all
+ * existing bos. Iterate over early and late kernel bo list and restore
+ * their GGTT mappings in hardware, so that kernel can make use of them
+ * during re-initialization after PCIe FLR.
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_bo_restore_map(struct xe_device *xe)
+{
+	int ret;
+
+	ret = xe_bo_apply_to_pinned(xe, &xe->pinned.early.kernel_bo_present,
+				    &xe->pinned.early.kernel_bo_present, xe_bo_map_ggtt);
+	if (!ret)
+		ret = xe_bo_apply_to_pinned(xe, &xe->pinned.late.kernel_bo_present,
+					    &xe->pinned.late.kernel_bo_present, xe_bo_map_ggtt);
+
+	return ret;
+}
+
+static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+{
+	int ret;
+
+	ret = xe_bo_restore_pinned(bo);
+	if (ret)
+		return ret;
+
+	return xe_bo_map_ggtt(bo);
+}
+
 /**
  * xe_bo_restore_early - restore early phase kernel BOs to VRAM
  *
@@ -270,7 +299,13 @@ int xe_bo_restore_late(struct xe_device *xe)
 	return ret;
 }
 
-static void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
+/**
+ * xe_bo_pci_dev_remove_pinned() - Unmap external bos
+ * @xe: xe device
+ *
+ * Drop dma mappings of all external pinned bos.
+ */
+void xe_bo_pci_dev_remove_pinned(struct xe_device *xe)
 {
 	struct xe_tile *tile;
 	unsigned int id;
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.h b/drivers/gpu/drm/xe/xe_bo_evict.h
index e8385cb7f5e9..d4f5b87243e7 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.h
+++ b/drivers/gpu/drm/xe/xe_bo_evict.h
@@ -14,7 +14,9 @@ int xe_bo_notifier_prepare_all_pinned(struct xe_device *xe);
 void xe_bo_notifier_unprepare_all_pinned(struct xe_device *xe);
 int xe_bo_restore_early(struct xe_device *xe);
 int xe_bo_restore_late(struct xe_device *xe);
+int xe_bo_restore_map(struct xe_device *xe);
 
+void xe_bo_pci_dev_remove_pinned(struct xe_device *xe);
 void xe_bo_pci_dev_remove_all(struct xe_device *xe);
 
 int xe_bo_pinned_init(struct xe_device *xe);
-- 
2.43.0

[PATCH v4 7/9] drm/xe/exec_queue: Introduce xe_exec_queue_reinit()

[Raag Jadav]

In preparation of usecases which require re-initializing an exec queue
after PCIe FLR, introduce xe_exec_queue_reinit() helper. All the exec
queue LCRs already exist but the context is lost on PCIe FLR and needs
re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_exec_queue.c | 34 ++++++++++++++++++++++++++----
 drivers/gpu/drm/xe/xe_exec_queue.h |  1 +
 drivers/gpu/drm/xe/xe_lrc.c        | 17 +++++++++++++++
 drivers/gpu/drm/xe/xe_lrc.h        |  2 ++
 4 files changed, 50 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index b287d0e0e60a..43fd09c10187 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -331,9 +331,8 @@ static void __xe_exec_queue_fini(struct xe_exec_queue *q)
 		xe_lrc_put(q->lrc[i]);
 }
 
-static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+static u32 xe_lrc_init_flags(struct xe_exec_queue *q, u32 exec_queue_flags)
 {
-	int i, err;
 	u32 flags = 0;
 
 	/*
@@ -356,6 +355,13 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	if (q->flags & EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX)
 		flags |= XE_LRC_DISABLE_STATE_CACHE_PERF_FIX;
 
+	return flags;
+}
+
+static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+{
+	int i, err;
+
 	err = q->ops->init(q);
 	if (err)
 		return err;
@@ -379,8 +385,8 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 
 			marker = xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
 
-			lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
-					    xe_lrc_ring_size(), q->msix_vec, flags);
+			lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state, xe_lrc_ring_size(),
+					    q->msix_vec, xe_lrc_init_flags(q, exec_queue_flags));
 			if (IS_ERR(lrc)) {
 				err = PTR_ERR(lrc);
 				goto err_lrc;
@@ -402,6 +408,26 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 	return err;
 }
 
+/**
+ * xe_exec_queue_reinit() - Re-initialize exec queue
+ * @q: exec queue to re-initialize
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_exec_queue_reinit(struct xe_exec_queue *q)
+{
+	int i, err;
+
+	for (i = 0; i < q->width; i++) {
+		err = xe_lrc_reinit(q->lrc[i], q->hwe, q->vm, q->replay_state,
+				    q->msix_vec, xe_lrc_init_flags(q, q->flags));
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
 /**
  * xe_exec_queue_create() - Create an exec queue
  * @xe: Xe device
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index a82d99bd77bc..445867d4da26 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -34,6 +34,7 @@ struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
 void xe_exec_queue_fini(struct xe_exec_queue *q);
 void xe_exec_queue_destroy(struct kref *ref);
 void xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance);
+int xe_exec_queue_reinit(struct xe_exec_queue *q);
 
 static inline struct xe_exec_queue *
 xe_exec_queue_get_unless_zero(struct xe_exec_queue *q)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 9d12a0d2f0b5..a6421ac3765b 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1593,6 +1593,23 @@ static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct
 	return err;
 }
 
+/**
+ * xe_lrc_reinit() - Re-initialize LRC
+ * @lrc: Pointer to the LRC
+ * @hwe: Hardware Engine
+ * @vm: The VM (address space)
+ * @replay_state: GPU hang replay state
+ * @msix_vec: MSI-X interrupt vector (for platforms that support it)
+ * @init_flags: LRC initialization flags
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_lrc_reinit(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+		  void *replay_state, u16 msix_vec, u32 init_flags)
+{
+	return xe_lrc_ctx_init(lrc, hwe, vm, replay_state, msix_vec, init_flags);
+}
+
 static int xe_lrc_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
 		       void *replay_state, u32 ring_size, u16 msix_vec, u32 init_flags)
 {
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index e7c975f9e2d9..514355ce3d6a 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -53,6 +53,8 @@ struct xe_lrc_snapshot {
 
 struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
 			     void *replay_state, u32 ring_size, u16 msix_vec, u32 flags);
+int xe_lrc_reinit(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+		  void *replay_state, u16 msix_vec, u32 init_flags);
 void xe_lrc_destroy(struct kref *ref);
 
 /**
-- 
2.43.0

[PATCH v4 8/9] drm/xe/migrate: Introduce xe_migrate_reinit()

[Raag Jadav]

In preparation of usecases which require re-initializing migrate context
after PCIe FLR, introduce xe_migrate_reinit() helper. Migrate exec queue
and pt_bo already exist in migrate structure but since their contents live
on VRAM, they are lost on PCIe FLR and need re-initialization.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
---
 drivers/gpu/drm/xe/xe_gt.c      | 10 ++++++++++
 drivers/gpu/drm/xe/xe_migrate.c | 12 ++++++++++++
 drivers/gpu/drm/xe/xe_migrate.h |  1 +
 3 files changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index c395d8cc3b5a..eb0045f33d55 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -1025,6 +1025,16 @@ void xe_gt_flr_prepare(struct xe_gt *gt)
  */
 int xe_gt_flr_done(struct xe_gt *gt)
 {
+	int err;
+
+	if (xe_gt_is_main_type(gt)) {
+		struct xe_tile *tile = gt_to_tile(gt);
+
+		err = xe_migrate_reinit(tile->migrate);
+		if (err)
+			return err;
+	}
+
 	return xe_uc_flr_done(&gt->uc);
 }
 
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index fc918b4fba54..ffe7e3e3b919 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -452,6 +452,18 @@ static int xe_migrate_lock_prepare_vm(struct xe_tile *tile, struct xe_migrate *m
 	return err;
 }
 
+/**
+ * xe_migrate_reinit() - Re-initialize a migrate context
+ * @m: The migration context
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_migrate_reinit(struct xe_migrate *m)
+{
+	xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
+	return xe_exec_queue_reinit(m->q);
+}
+
 /**
  * xe_migrate_init() - Initialize a migrate context
  * @m: The migration context
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 169279d9d8c2..41e06bf398b1 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -112,6 +112,7 @@ struct xe_migrate_pt_update {
 
 struct xe_migrate *xe_migrate_alloc(struct xe_tile *tile);
 int xe_migrate_init(struct xe_migrate *m);
+int xe_migrate_reinit(struct xe_migrate *m);
 
 struct dma_fence *xe_migrate_to_vram(struct xe_migrate *m,
 				     unsigned long npages,
-- 
2.43.0

[PATCH v4 9/9] drm/xe/pci: Introduce PCIe FLR

[Raag Jadav]

With bare minimum pieces in place, we can finally introduce PCIe Function
Level Reset (FLR) handling which re-initializes hardware state without the
need for reloading the driver from userspace. All VRAM contents are lost
along with hardware state and driver takes care of recreating the required
kernel bos as part of re-initialization, but user still needs to recreate
user bos and reload context after PCIe FLR.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v2: Spell out Function Level Reset (Jani)
---
 drivers/gpu/drm/xe/Makefile     |   1 +
 drivers/gpu/drm/xe/xe_pci.c     |   1 +
 drivers/gpu/drm/xe/xe_pci.h     |   2 +
 drivers/gpu/drm/xe/xe_pci_err.c | 151 ++++++++++++++++++++++++++++++++
 4 files changed, 155 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index dab979287a96..996b43680f84 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -100,6 +100,7 @@ xe-y += xe_bb.o \
 	xe_page_reclaim.o \
 	xe_pat.o \
 	xe_pci.o \
+	xe_pci_err.o \
 	xe_pci_rebar.o \
 	xe_pcode.o \
 	xe_pm.o \
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 01673d2b2464..f252ac3ea82c 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1324,6 +1324,7 @@ static struct pci_driver xe_pci_driver = {
 #ifdef CONFIG_PM_SLEEP
 	.driver.pm = &xe_pm_ops,
 #endif
+	.err_handler = &xe_pci_err_handlers,
 };
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_pci.h b/drivers/gpu/drm/xe/xe_pci.h
index 11bcc5fe2c5b..85e85e8508c3 100644
--- a/drivers/gpu/drm/xe/xe_pci.h
+++ b/drivers/gpu/drm/xe/xe_pci.h
@@ -8,6 +8,8 @@
 
 struct pci_dev;
 
+extern const struct pci_error_handlers xe_pci_err_handlers;
+
 int xe_register_pci_driver(void);
 void xe_unregister_pci_driver(void);
 struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev);
diff --git a/drivers/gpu/drm/xe/xe_pci_err.c b/drivers/gpu/drm/xe/xe_pci_err.c
new file mode 100644
index 000000000000..b6ae1d6d85f6
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_pci_err.c
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_bo_evict.h"
+#include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_gt_idle.h"
+#include "xe_i2c.h"
+#include "xe_irq.h"
+#include "xe_late_bind_fw.h"
+#include "xe_pci.h"
+#include "xe_pcode.h"
+#include "xe_printk.h"
+#include "xe_pxp.h"
+#include "xe_wa.h"
+
+static int xe_flr_prepare(struct xe_device *xe)
+{
+	struct xe_gt *gt;
+	int err;
+	u8 id;
+
+	err = xe_pxp_pm_suspend(xe->pxp);
+	if (err)
+		return err;
+
+	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
+
+	xe_irq_disable(xe);
+
+	for_each_gt(gt, xe, id)
+		xe_gt_flr_prepare(gt);
+
+	// TODO: Drop all user bos
+	unmap_mapping_range(xe->drm.anon_inode->i_mapping, 0, 0, 1);
+	xe_bo_pci_dev_remove_pinned(xe);
+
+	return 0;
+}
+
+static int xe_flr_done(struct xe_device *xe)
+{
+	struct xe_tile *tile;
+	struct xe_gt *gt;
+	int err;
+	u8 id;
+
+	for_each_gt(gt, xe, id)
+		xe_gt_idle_disable_c6(gt);
+
+	for_each_tile(tile, xe, id)
+		xe_wa_apply_tile_workarounds(tile);
+
+	err = xe_pcode_ready(xe, true);
+	if (err)
+		return err;
+
+	xe_device_assert_lmem_ready(xe);
+
+	err = xe_bo_restore_map(xe);
+	if (err)
+		return err;
+
+	for_each_gt(gt, xe, id) {
+		err = xe_gt_flr_done(gt);
+		if (err)
+			return err;
+	}
+
+	xe_i2c_pm_resume(xe, true);
+
+	xe_irq_resume(xe);
+
+	for_each_gt(gt, xe, id) {
+		err = xe_gt_resume(gt);
+		if (err)
+			return err;
+	}
+
+	xe_pxp_pm_resume(xe->pxp);
+
+	xe_late_bind_fw_load(&xe->late_bind);
+
+	return 0;
+}
+
+static void xe_pci_reset_prepare(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	/* TODO: Extend support as a follow-up */
+	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || pci_num_vf(pdev) || xe->info.probe_display) {
+		xe_err(xe, "PCIe FLR not supported\n");
+		return;
+	}
+
+	/* Wedge the device to prevent userspace access but don't send the event yet */
+	atomic_set(&xe->wedged.flag, 1);
+
+	/*
+	 * The hardware could be in corrupted state and access unreliable, but we try to
+	 * update data structures and cleanup any pending work to avoid side effects during
+	 * PCIe FLR. This will be similar to xe_pm_suspend() flow but without migration.
+	 */
+	if (xe_flr_prepare(xe)) {
+		xe_err(xe, "Failed to prepare for PCIe FLR\n");
+		return;
+	}
+
+	xe_info(xe, "Prepared for PCIe FLR\n");
+}
+
+static void xe_pci_reset_done(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	/* TODO: Extend support as a follow-up */
+	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || pci_num_vf(pdev) || xe->info.probe_display)
+		return;
+
+	if (!xe_device_wedged(xe)) {
+		xe_err(xe, "Device in unexpected state, re-initialization aborted\n");
+		return;
+	}
+
+	/*
+	 * We already have the data structures intact, so try to re-initialize the device.
+	 * This will be similar to xe_pm_resume() flow, except we'll also need to recreate
+	 * all VRAM contents.
+	 */
+	if (xe_flr_done(xe)) {
+		xe_err(xe, "Re-initialization failed\n");
+		return;
+	}
+
+	/* Unwedge to allow userspace access */
+	atomic_set(&xe->wedged.flag, 0);
+
+	xe_info(xe, "Re-initialization success\n");
+}
+
+/*
+ * PCIe Function Level Reset (FLR) support only.
+ * TODO: Add PCIe error handlers using similar flow.
+ */
+const struct pci_error_handlers xe_pci_err_handlers = {
+	.reset_prepare = xe_pci_reset_prepare,
+	.reset_done = xe_pci_reset_done,
+};
-- 
2.43.0

Re: [PATCH v4 9/9] drm/xe/pci: Introduce PCIe FLR

[Matthew Brost]

On Sat, Mar 28, 2026 at 02:06:20AM +0530, Raag Jadav wrote:
> With bare minimum pieces in place, we can finally introduce PCIe Function
> Level Reset (FLR) handling which re-initializes hardware state without the
> need for reloading the driver from userspace. All VRAM contents are lost
> along with hardware state and driver takes care of recreating the required
> kernel bos as part of re-initialization, but user still needs to recreate
> user bos and reload context after PCIe FLR.
> 
> Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> ---
> v2: Spell out Function Level Reset (Jani)
> ---
>  drivers/gpu/drm/xe/Makefile     |   1 +
>  drivers/gpu/drm/xe/xe_pci.c     |   1 +
>  drivers/gpu/drm/xe/xe_pci.h     |   2 +
>  drivers/gpu/drm/xe/xe_pci_err.c | 151 ++++++++++++++++++++++++++++++++
>  4 files changed, 155 insertions(+)
>  create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c
> 
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index dab979287a96..996b43680f84 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -100,6 +100,7 @@ xe-y += xe_bb.o \
>  	xe_page_reclaim.o \
>  	xe_pat.o \
>  	xe_pci.o \
> +	xe_pci_err.o \
>  	xe_pci_rebar.o \
>  	xe_pcode.o \
>  	xe_pm.o \
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 01673d2b2464..f252ac3ea82c 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -1324,6 +1324,7 @@ static struct pci_driver xe_pci_driver = {
>  #ifdef CONFIG_PM_SLEEP
>  	.driver.pm = &xe_pm_ops,
>  #endif
> +	.err_handler = &xe_pci_err_handlers,
>  };
>  
>  /**
> diff --git a/drivers/gpu/drm/xe/xe_pci.h b/drivers/gpu/drm/xe/xe_pci.h
> index 11bcc5fe2c5b..85e85e8508c3 100644
> --- a/drivers/gpu/drm/xe/xe_pci.h
> +++ b/drivers/gpu/drm/xe/xe_pci.h
> @@ -8,6 +8,8 @@
>  
>  struct pci_dev;
>  
> +extern const struct pci_error_handlers xe_pci_err_handlers;
> +
>  int xe_register_pci_driver(void);
>  void xe_unregister_pci_driver(void);
>  struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev);
> diff --git a/drivers/gpu/drm/xe/xe_pci_err.c b/drivers/gpu/drm/xe/xe_pci_err.c
> new file mode 100644
> index 000000000000..b6ae1d6d85f6
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_pci_err.c
> @@ -0,0 +1,151 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#include "xe_bo_evict.h"
> +#include "xe_device.h"
> +#include "xe_gt.h"
> +#include "xe_gt_idle.h"
> +#include "xe_i2c.h"
> +#include "xe_irq.h"
> +#include "xe_late_bind_fw.h"
> +#include "xe_pci.h"
> +#include "xe_pcode.h"
> +#include "xe_printk.h"
> +#include "xe_pxp.h"
> +#include "xe_wa.h"
> +
> +static int xe_flr_prepare(struct xe_device *xe)
> +{
> +	struct xe_gt *gt;
> +	int err;
> +	u8 id;
> +
> +	err = xe_pxp_pm_suspend(xe->pxp);
> +	if (err)
> +		return err;
> +
> +	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
> +
> +	xe_irq_disable(xe);
> +
> +	for_each_gt(gt, xe, id)
> +		xe_gt_flr_prepare(gt);
> +
> +	// TODO: Drop all user bos
> +	unmap_mapping_range(xe->drm.anon_inode->i_mapping, 0, 0, 1);
> +	xe_bo_pci_dev_remove_pinned(xe);
> +
> +	return 0;
> +}
> +
> +static int xe_flr_done(struct xe_device *xe)
> +{
> +	struct xe_tile *tile;
> +	struct xe_gt *gt;
> +	int err;
> +	u8 id;
> +
> +	for_each_gt(gt, xe, id)
> +		xe_gt_idle_disable_c6(gt);
> +
> +	for_each_tile(tile, xe, id)
> +		xe_wa_apply_tile_workarounds(tile);
> +
> +	err = xe_pcode_ready(xe, true);
> +	if (err)
> +		return err;
> +
> +	xe_device_assert_lmem_ready(xe);
> +
> +	err = xe_bo_restore_map(xe);
> +	if (err)
> +		return err;
> +
> +	for_each_gt(gt, xe, id) {
> +		err = xe_gt_flr_done(gt);
> +		if (err)
> +			return err;
> +	}
> +
> +	xe_i2c_pm_resume(xe, true);
> +
> +	xe_irq_resume(xe);
> +
> +	for_each_gt(gt, xe, id) {
> +		err = xe_gt_resume(gt);
> +		if (err)
> +			return err;
> +	}
> +
> +	xe_pxp_pm_resume(xe->pxp);
> +
> +	xe_late_bind_fw_load(&xe->late_bind);
> +
> +	return 0;
> +}
> +
> +static void xe_pci_reset_prepare(struct pci_dev *pdev)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +
> +	/* TODO: Extend support as a follow-up */
> +	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || pci_num_vf(pdev) || xe->info.probe_display) {
> +		xe_err(xe, "PCIe FLR not supported\n");
> +		return;
> +	}
> +
> +	/* Wedge the device to prevent userspace access but don't send the event yet */
> +	atomic_set(&xe->wedged.flag, 1);
> +
> +	/*
> +	 * The hardware could be in corrupted state and access unreliable, but we try to
> +	 * update data structures and cleanup any pending work to avoid side effects during
> +	 * PCIe FLR. This will be similar to xe_pm_suspend() flow but without migration.
> +	 */
> +	if (xe_flr_prepare(xe)) {
> +		xe_err(xe, "Failed to prepare for PCIe FLR\n");
> +		return;
> +	}
> +
> +	xe_info(xe, "Prepared for PCIe FLR\n");
> +}
> +
> +static void xe_pci_reset_done(struct pci_dev *pdev)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +
> +	/* TODO: Extend support as a follow-up */
> +	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || pci_num_vf(pdev) || xe->info.probe_display)
> +		return;
> +
> +	if (!xe_device_wedged(xe)) {
> +		xe_err(xe, "Device in unexpected state, re-initialization aborted\n");
> +		return;
> +	}
> +
> +	/*
> +	 * We already have the data structures intact, so try to re-initialize the device.
> +	 * This will be similar to xe_pm_resume() flow, except we'll also need to recreate
> +	 * all VRAM contents.
> +	 */
> +	if (xe_flr_done(xe)) {
> +		xe_err(xe, "Re-initialization failed\n");
> +		return;
> +	}
> +
> +	/* Unwedge to allow userspace access */
> +	atomic_set(&xe->wedged.flag, 0);

I think this will leak a PM ref which we take wedge the device. I just
fixed a recalim bug here related to this [1], so this is fresh in my
mind.

What I think you want do this is in xe_pci_reset_prepare()...

xe->wedged.pm_ref = !!atomic_xchg(&xe->wedged.flag, 1);

Then in xe_pci_reset_done()...

if (xe->wedged.pm_ref) {
	xe_pm_runtime_put(xe);
	xe->wedged.pm_ref = false;
}

Or you change the structure in [1] mess with 'xe->wedged.pm_ref',
multiple ways to do this.

Matt

[1] https://patchwork.freedesktop.org/patch/714622/?series=163948&rev=1

> +
> +	xe_info(xe, "Re-initialization success\n");
> +}
> +
> +/*
> + * PCIe Function Level Reset (FLR) support only.
> + * TODO: Add PCIe error handlers using similar flow.
> + */
> +const struct pci_error_handlers xe_pci_err_handlers = {
> +	.reset_prepare = xe_pci_reset_prepare,
> +	.reset_done = xe_pci_reset_done,
> +};
> -- 
> 2.43.0
> 

Re: [PATCH v4 9/9] drm/xe/pci: Introduce PCIe FLR

[Raag Jadav]

On Fri, Mar 27, 2026 at 02:00:52PM -0700, Matthew Brost wrote:
> On Sat, Mar 28, 2026 at 02:06:20AM +0530, Raag Jadav wrote:
> > With bare minimum pieces in place, we can finally introduce PCIe Function
> > Level Reset (FLR) handling which re-initializes hardware state without the
> > need for reloading the driver from userspace. All VRAM contents are lost
> > along with hardware state and driver takes care of recreating the required
> > kernel bos as part of re-initialization, but user still needs to recreate
> > user bos and reload context after PCIe FLR.
> > 
> > Signed-off-by: Raag Jadav <raag.jadav@intel.com>
> > ---
> > v2: Spell out Function Level Reset (Jani)
> > ---
> >  drivers/gpu/drm/xe/Makefile     |   1 +
> >  drivers/gpu/drm/xe/xe_pci.c     |   1 +
> >  drivers/gpu/drm/xe/xe_pci.h     |   2 +
> >  drivers/gpu/drm/xe/xe_pci_err.c | 151 ++++++++++++++++++++++++++++++++
> >  4 files changed, 155 insertions(+)
> >  create mode 100644 drivers/gpu/drm/xe/xe_pci_err.c
> > 
> > diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> > index dab979287a96..996b43680f84 100644
> > --- a/drivers/gpu/drm/xe/Makefile
> > +++ b/drivers/gpu/drm/xe/Makefile
> > @@ -100,6 +100,7 @@ xe-y += xe_bb.o \
> >  	xe_page_reclaim.o \
> >  	xe_pat.o \
> >  	xe_pci.o \
> > +	xe_pci_err.o \
> >  	xe_pci_rebar.o \
> >  	xe_pcode.o \
> >  	xe_pm.o \
> > diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> > index 01673d2b2464..f252ac3ea82c 100644
> > --- a/drivers/gpu/drm/xe/xe_pci.c
> > +++ b/drivers/gpu/drm/xe/xe_pci.c
> > @@ -1324,6 +1324,7 @@ static struct pci_driver xe_pci_driver = {
> >  #ifdef CONFIG_PM_SLEEP
> >  	.driver.pm = &xe_pm_ops,
> >  #endif
> > +	.err_handler = &xe_pci_err_handlers,
> >  };
> >  
> >  /**
> > diff --git a/drivers/gpu/drm/xe/xe_pci.h b/drivers/gpu/drm/xe/xe_pci.h
> > index 11bcc5fe2c5b..85e85e8508c3 100644
> > --- a/drivers/gpu/drm/xe/xe_pci.h
> > +++ b/drivers/gpu/drm/xe/xe_pci.h
> > @@ -8,6 +8,8 @@
> >  
> >  struct pci_dev;
> >  
> > +extern const struct pci_error_handlers xe_pci_err_handlers;
> > +
> >  int xe_register_pci_driver(void);
> >  void xe_unregister_pci_driver(void);
> >  struct xe_device *xe_pci_to_pf_device(struct pci_dev *pdev);
> > diff --git a/drivers/gpu/drm/xe/xe_pci_err.c b/drivers/gpu/drm/xe/xe_pci_err.c
> > new file mode 100644
> > index 000000000000..b6ae1d6d85f6
> > --- /dev/null
> > +++ b/drivers/gpu/drm/xe/xe_pci_err.c
> > @@ -0,0 +1,151 @@
> > +// SPDX-License-Identifier: MIT
> > +/*
> > + * Copyright © 2026 Intel Corporation
> > + */
> > +
> > +#include "xe_bo_evict.h"
> > +#include "xe_device.h"
> > +#include "xe_gt.h"
> > +#include "xe_gt_idle.h"
> > +#include "xe_i2c.h"
> > +#include "xe_irq.h"
> > +#include "xe_late_bind_fw.h"
> > +#include "xe_pci.h"
> > +#include "xe_pcode.h"
> > +#include "xe_printk.h"
> > +#include "xe_pxp.h"
> > +#include "xe_wa.h"
> > +
> > +static int xe_flr_prepare(struct xe_device *xe)
> > +{
> > +	struct xe_gt *gt;
> > +	int err;
> > +	u8 id;
> > +
> > +	err = xe_pxp_pm_suspend(xe->pxp);
> > +	if (err)
> > +		return err;
> > +
> > +	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
> > +
> > +	xe_irq_disable(xe);
> > +
> > +	for_each_gt(gt, xe, id)
> > +		xe_gt_flr_prepare(gt);
> > +
> > +	// TODO: Drop all user bos
> > +	unmap_mapping_range(xe->drm.anon_inode->i_mapping, 0, 0, 1);
> > +	xe_bo_pci_dev_remove_pinned(xe);
> > +
> > +	return 0;
> > +}
> > +
> > +static int xe_flr_done(struct xe_device *xe)
> > +{
> > +	struct xe_tile *tile;
> > +	struct xe_gt *gt;
> > +	int err;
> > +	u8 id;
> > +
> > +	for_each_gt(gt, xe, id)
> > +		xe_gt_idle_disable_c6(gt);
> > +
> > +	for_each_tile(tile, xe, id)
> > +		xe_wa_apply_tile_workarounds(tile);
> > +
> > +	err = xe_pcode_ready(xe, true);
> > +	if (err)
> > +		return err;
> > +
> > +	xe_device_assert_lmem_ready(xe);
> > +
> > +	err = xe_bo_restore_map(xe);
> > +	if (err)
> > +		return err;
> > +
> > +	for_each_gt(gt, xe, id) {
> > +		err = xe_gt_flr_done(gt);
> > +		if (err)
> > +			return err;
> > +	}
> > +
> > +	xe_i2c_pm_resume(xe, true);
> > +
> > +	xe_irq_resume(xe);
> > +
> > +	for_each_gt(gt, xe, id) {
> > +		err = xe_gt_resume(gt);
> > +		if (err)
> > +			return err;
> > +	}
> > +
> > +	xe_pxp_pm_resume(xe->pxp);
> > +
> > +	xe_late_bind_fw_load(&xe->late_bind);
> > +
> > +	return 0;
> > +}
> > +
> > +static void xe_pci_reset_prepare(struct pci_dev *pdev)
> > +{
> > +	struct xe_device *xe = pdev_to_xe_device(pdev);
> > +
> > +	/* TODO: Extend support as a follow-up */
> > +	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || pci_num_vf(pdev) || xe->info.probe_display) {
> > +		xe_err(xe, "PCIe FLR not supported\n");
> > +		return;
> > +	}
> > +
> > +	/* Wedge the device to prevent userspace access but don't send the event yet */
> > +	atomic_set(&xe->wedged.flag, 1);
> > +
> > +	/*
> > +	 * The hardware could be in corrupted state and access unreliable, but we try to
> > +	 * update data structures and cleanup any pending work to avoid side effects during
> > +	 * PCIe FLR. This will be similar to xe_pm_suspend() flow but without migration.
> > +	 */
> > +	if (xe_flr_prepare(xe)) {
> > +		xe_err(xe, "Failed to prepare for PCIe FLR\n");
> > +		return;
> > +	}
> > +
> > +	xe_info(xe, "Prepared for PCIe FLR\n");
> > +}
> > +
> > +static void xe_pci_reset_done(struct pci_dev *pdev)
> > +{
> > +	struct xe_device *xe = pdev_to_xe_device(pdev);
> > +
> > +	/* TODO: Extend support as a follow-up */
> > +	if (!IS_DGFX(xe) || IS_SRIOV_VF(xe) || pci_num_vf(pdev) || xe->info.probe_display)
> > +		return;
> > +
> > +	if (!xe_device_wedged(xe)) {
> > +		xe_err(xe, "Device in unexpected state, re-initialization aborted\n");
> > +		return;
> > +	}
> > +
> > +	/*
> > +	 * We already have the data structures intact, so try to re-initialize the device.
> > +	 * This will be similar to xe_pm_resume() flow, except we'll also need to recreate
> > +	 * all VRAM contents.
> > +	 */
> > +	if (xe_flr_done(xe)) {
> > +		xe_err(xe, "Re-initialization failed\n");
> > +		return;
> > +	}
> > +
> > +	/* Unwedge to allow userspace access */
> > +	atomic_set(&xe->wedged.flag, 0);
> 
> I think this will leak a PM ref which we take wedge the device. I just
> fixed a recalim bug here related to this [1], so this is fresh in my
> mind.
> 
> What I think you want do this is in xe_pci_reset_prepare()...
> 
> xe->wedged.pm_ref = !!atomic_xchg(&xe->wedged.flag, 1);
> 
> Then in xe_pci_reset_done()...
> 
> if (xe->wedged.pm_ref) {
> 	xe_pm_runtime_put(xe);
> 	xe->wedged.pm_ref = false;
> }
> 
> Or you change the structure in [1] mess with 'xe->wedged.pm_ref',
> multiple ways to do this.

Sure, will explore this. Although I'm wondering if we should allow FLR
flow if the device is already wedged? As per uapi doc we should be
rejecting new accesses to the device until it is recovered through the
method of choice.

Raag

> [1] https://patchwork.freedesktop.org/patch/714622/?series=163948&rev=1
> 
> > +
> > +	xe_info(xe, "Re-initialization success\n");
> > +}
> > +
> > +/*
> > + * PCIe Function Level Reset (FLR) support only.
> > + * TODO: Add PCIe error handlers using similar flow.
> > + */
> > +const struct pci_error_handlers xe_pci_err_handlers = {
> > +	.reset_prepare = xe_pci_reset_prepare,
> > +	.reset_done = xe_pci_reset_done,
> > +};
> > -- 
> > 2.43.0
> > 

✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev4)

[Patchwork]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev4)
URL   : https://patchwork.freedesktop.org/series/162055/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 990a324ff3e47f6bb1ffba82dd6500e321344f85
Author: Raag Jadav <raag.jadav@intel.com>
Date:   Sat Mar 28 02:06:20 2026 +0530

    drm/xe/pci: Introduce PCIe FLR
    
    With bare minimum pieces in place, we can finally introduce PCIe Function
    Level Reset (FLR) handling which re-initializes hardware state without the
    need for reloading the driver from userspace. All VRAM contents are lost
    along with hardware state and driver takes care of recreating the required
    kernel bos as part of re-initialization, but user still needs to recreate
    user bos and reload context after PCIe FLR.
    
    Signed-off-by: Raag Jadav <raag.jadav@intel.com>
+ /mt/dim checkpatch b8c1f8bc16b8aeff4f912cf2d7d0bf385d5ae026 drm-intel
ef5b81fb66d6 drm/xe/uc_fw: Allow re-initializing firmware
834aaa647500 drm/xe/guc_submit: Introduce xe_guc_submit_reinit()
410d3eafa568 drm/xe/gt: Introduce FLR helpers
a9b4a6f4c3a3 drm/xe/irq: Introduce xe_irq_disable()
2c8eccb5fa57 drm/xe: Introduce xe_device_assert_lmem_ready()
a1c900acbb54 drm/xe/bo_evict: Introduce xe_bo_restore_map()
3f31f395c41c drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
370a9fd8b1e1 drm/xe/migrate: Introduce xe_migrate_reinit()
990a324ff3e4 drm/xe/pci: Introduce PCIe FLR
-:53: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#53: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 173 lines checked

✓ CI.KUnit: success for Introduce Xe PCIe FLR (rev4)

[Patchwork]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev4)
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[22:06:32] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:06:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:07:07] Starting KUnit Kernel (1/1)...
[22:07:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:07:07] ================== guc_buf (11 subtests) ===================
[22:07:07] [PASSED] test_smallest
[22:07:07] [PASSED] test_largest
[22:07:07] [PASSED] test_granular
[22:07:07] [PASSED] test_unique
[22:07:07] [PASSED] test_overlap
[22:07:07] [PASSED] test_reusable
[22:07:07] [PASSED] test_too_big
[22:07:07] [PASSED] test_flush
[22:07:07] [PASSED] test_lookup
[22:07:07] [PASSED] test_data
[22:07:07] [PASSED] test_class
[22:07:07] ===================== [PASSED] guc_buf =====================
[22:07:07] =================== guc_dbm (7 subtests) ===================
[22:07:07] [PASSED] test_empty
[22:07:07] [PASSED] test_default
[22:07:07] ======================== test_size  ========================
[22:07:07] [PASSED] 4
[22:07:07] [PASSED] 8
[22:07:07] [PASSED] 32
[22:07:07] [PASSED] 256
[22:07:07] ==================== [PASSED] test_size ====================
[22:07:07] ======================= test_reuse  ========================
[22:07:07] [PASSED] 4
[22:07:07] [PASSED] 8
[22:07:07] [PASSED] 32
[22:07:07] [PASSED] 256
[22:07:07] =================== [PASSED] test_reuse ====================
[22:07:07] =================== test_range_overlap  ====================
[22:07:07] [PASSED] 4
[22:07:07] [PASSED] 8
[22:07:07] [PASSED] 32
[22:07:07] [PASSED] 256
[22:07:07] =============== [PASSED] test_range_overlap ================
[22:07:07] =================== test_range_compact  ====================
[22:07:07] [PASSED] 4
[22:07:07] [PASSED] 8
[22:07:07] [PASSED] 32
[22:07:07] [PASSED] 256
[22:07:07] =============== [PASSED] test_range_compact ================
[22:07:07] ==================== test_range_spare  =====================
[22:07:07] [PASSED] 4
[22:07:07] [PASSED] 8
[22:07:07] [PASSED] 32
[22:07:07] [PASSED] 256
[22:07:07] ================ [PASSED] test_range_spare =================
[22:07:07] ===================== [PASSED] guc_dbm =====================
[22:07:07] =================== guc_idm (6 subtests) ===================
[22:07:07] [PASSED] bad_init
[22:07:07] [PASSED] no_init
[22:07:07] [PASSED] init_fini
[22:07:07] [PASSED] check_used
[22:07:07] [PASSED] check_quota
[22:07:07] [PASSED] check_all
[22:07:07] ===================== [PASSED] guc_idm =====================
[22:07:07] ================== no_relay (3 subtests) ===================
[22:07:07] [PASSED] xe_drops_guc2pf_if_not_ready
[22:07:07] [PASSED] xe_drops_guc2vf_if_not_ready
[22:07:07] [PASSED] xe_rejects_send_if_not_ready
[22:07:07] ==================== [PASSED] no_relay =====================
[22:07:07] ================== pf_relay (14 subtests) ==================
[22:07:07] [PASSED] pf_rejects_guc2pf_too_short
[22:07:07] [PASSED] pf_rejects_guc2pf_too_long
[22:07:07] [PASSED] pf_rejects_guc2pf_no_payload
[22:07:07] [PASSED] pf_fails_no_payload
[22:07:07] [PASSED] pf_fails_bad_origin
[22:07:07] [PASSED] pf_fails_bad_type
[22:07:07] [PASSED] pf_txn_reports_error
[22:07:07] [PASSED] pf_txn_sends_pf2guc
[22:07:07] [PASSED] pf_sends_pf2guc
[22:07:07] [SKIPPED] pf_loopback_nop
[22:07:07] [SKIPPED] pf_loopback_echo
[22:07:07] [SKIPPED] pf_loopback_fail
[22:07:07] [SKIPPED] pf_loopback_busy
[22:07:07] [SKIPPED] pf_loopback_retry
[22:07:07] ==================== [PASSED] pf_relay =====================
[22:07:07] ================== vf_relay (3 subtests) ===================
[22:07:07] [PASSED] vf_rejects_guc2vf_too_short
[22:07:07] [PASSED] vf_rejects_guc2vf_too_long
[22:07:07] [PASSED] vf_rejects_guc2vf_no_payload
[22:07:07] ==================== [PASSED] vf_relay =====================
[22:07:07] ================ pf_gt_config (9 subtests) =================
[22:07:07] [PASSED] fair_contexts_1vf
[22:07:07] [PASSED] fair_doorbells_1vf
[22:07:07] [PASSED] fair_ggtt_1vf
[22:07:07] ====================== fair_vram_1vf  ======================
[22:07:07] [PASSED] 3.50 GiB
[22:07:07] [PASSED] 11.5 GiB
[22:07:07] [PASSED] 15.5 GiB
[22:07:07] [PASSED] 31.5 GiB
[22:07:07] [PASSED] 63.5 GiB
[22:07:07] [PASSED] 1.91 GiB
[22:07:07] ================== [PASSED] fair_vram_1vf ==================
[22:07:07] ================ fair_vram_1vf_admin_only  =================
[22:07:07] [PASSED] 3.50 GiB
[22:07:07] [PASSED] 11.5 GiB
[22:07:07] [PASSED] 15.5 GiB
[22:07:07] [PASSED] 31.5 GiB
[22:07:07] [PASSED] 63.5 GiB
[22:07:07] [PASSED] 1.91 GiB
[22:07:07] ============ [PASSED] fair_vram_1vf_admin_only =============
[22:07:07] ====================== fair_contexts  ======================
[22:07:07] [PASSED] 1 VF
[22:07:07] [PASSED] 2 VFs
[22:07:07] [PASSED] 3 VFs
[22:07:07] [PASSED] 4 VFs
[22:07:07] [PASSED] 5 VFs
[22:07:07] [PASSED] 6 VFs
[22:07:07] [PASSED] 7 VFs
[22:07:07] [PASSED] 8 VFs
[22:07:07] [PASSED] 9 VFs
[22:07:07] [PASSED] 10 VFs
[22:07:07] [PASSED] 11 VFs
[22:07:07] [PASSED] 12 VFs
[22:07:07] [PASSED] 13 VFs
[22:07:07] [PASSED] 14 VFs
[22:07:07] [PASSED] 15 VFs
[22:07:07] [PASSED] 16 VFs
[22:07:07] [PASSED] 17 VFs
[22:07:07] [PASSED] 18 VFs
[22:07:07] [PASSED] 19 VFs
[22:07:07] [PASSED] 20 VFs
[22:07:07] [PASSED] 21 VFs
[22:07:07] [PASSED] 22 VFs
[22:07:07] [PASSED] 23 VFs
[22:07:07] [PASSED] 24 VFs
[22:07:07] [PASSED] 25 VFs
[22:07:07] [PASSED] 26 VFs
[22:07:07] [PASSED] 27 VFs
[22:07:07] [PASSED] 28 VFs
[22:07:07] [PASSED] 29 VFs
[22:07:07] [PASSED] 30 VFs
[22:07:07] [PASSED] 31 VFs
[22:07:07] [PASSED] 32 VFs
[22:07:07] [PASSED] 33 VFs
[22:07:07] [PASSED] 34 VFs
[22:07:07] [PASSED] 35 VFs
[22:07:07] [PASSED] 36 VFs
[22:07:07] [PASSED] 37 VFs
[22:07:07] [PASSED] 38 VFs
[22:07:07] [PASSED] 39 VFs
[22:07:07] [PASSED] 40 VFs
[22:07:07] [PASSED] 41 VFs
[22:07:07] [PASSED] 42 VFs
[22:07:07] [PASSED] 43 VFs
[22:07:07] [PASSED] 44 VFs
[22:07:07] [PASSED] 45 VFs
[22:07:07] [PASSED] 46 VFs
[22:07:07] [PASSED] 47 VFs
[22:07:07] [PASSED] 48 VFs
[22:07:07] [PASSED] 49 VFs
[22:07:07] [PASSED] 50 VFs
[22:07:07] [PASSED] 51 VFs
[22:07:07] [PASSED] 52 VFs
[22:07:07] [PASSED] 53 VFs
[22:07:07] [PASSED] 54 VFs
[22:07:07] [PASSED] 55 VFs
[22:07:07] [PASSED] 56 VFs
[22:07:07] [PASSED] 57 VFs
[22:07:07] [PASSED] 58 VFs
[22:07:07] [PASSED] 59 VFs
[22:07:07] [PASSED] 60 VFs
[22:07:07] [PASSED] 61 VFs
[22:07:07] [PASSED] 62 VFs
[22:07:07] [PASSED] 63 VFs
[22:07:07] ================== [PASSED] fair_contexts ==================
[22:07:07] ===================== fair_doorbells  ======================
[22:07:07] [PASSED] 1 VF
[22:07:07] [PASSED] 2 VFs
[22:07:07] [PASSED] 3 VFs
[22:07:07] [PASSED] 4 VFs
[22:07:07] [PASSED] 5 VFs
[22:07:07] [PASSED] 6 VFs
[22:07:07] [PASSED] 7 VFs
[22:07:07] [PASSED] 8 VFs
[22:07:07] [PASSED] 9 VFs
[22:07:07] [PASSED] 10 VFs
[22:07:07] [PASSED] 11 VFs
[22:07:07] [PASSED] 12 VFs
[22:07:07] [PASSED] 13 VFs
[22:07:07] [PASSED] 14 VFs
[22:07:07] [PASSED] 15 VFs
[22:07:07] [PASSED] 16 VFs
[22:07:07] [PASSED] 17 VFs
[22:07:07] [PASSED] 18 VFs
[22:07:07] [PASSED] 19 VFs
[22:07:07] [PASSED] 20 VFs
[22:07:07] [PASSED] 21 VFs
[22:07:07] [PASSED] 22 VFs
[22:07:07] [PASSED] 23 VFs
[22:07:07] [PASSED] 24 VFs
[22:07:07] [PASSED] 25 VFs
[22:07:07] [PASSED] 26 VFs
[22:07:07] [PASSED] 27 VFs
[22:07:07] [PASSED] 28 VFs
[22:07:07] [PASSED] 29 VFs
[22:07:07] [PASSED] 30 VFs
[22:07:07] [PASSED] 31 VFs
[22:07:07] [PASSED] 32 VFs
[22:07:07] [PASSED] 33 VFs
[22:07:07] [PASSED] 34 VFs
[22:07:07] [PASSED] 35 VFs
[22:07:07] [PASSED] 36 VFs
[22:07:07] [PASSED] 37 VFs
[22:07:07] [PASSED] 38 VFs
[22:07:07] [PASSED] 39 VFs
[22:07:07] [PASSED] 40 VFs
[22:07:07] [PASSED] 41 VFs
[22:07:07] [PASSED] 42 VFs
[22:07:07] [PASSED] 43 VFs
[22:07:07] [PASSED] 44 VFs
[22:07:07] [PASSED] 45 VFs
[22:07:07] [PASSED] 46 VFs
[22:07:07] [PASSED] 47 VFs
[22:07:07] [PASSED] 48 VFs
[22:07:07] [PASSED] 49 VFs
[22:07:07] [PASSED] 50 VFs
[22:07:07] [PASSED] 51 VFs
[22:07:07] [PASSED] 52 VFs
[22:07:07] [PASSED] 53 VFs
[22:07:07] [PASSED] 54 VFs
[22:07:07] [PASSED] 55 VFs
[22:07:07] [PASSED] 56 VFs
[22:07:07] [PASSED] 57 VFs
[22:07:07] [PASSED] 58 VFs
[22:07:07] [PASSED] 59 VFs
[22:07:07] [PASSED] 60 VFs
[22:07:07] [PASSED] 61 VFs
[22:07:07] [PASSED] 62 VFs
[22:07:07] [PASSED] 63 VFs
[22:07:07] ================= [PASSED] fair_doorbells ==================
[22:07:07] ======================== fair_ggtt  ========================
[22:07:07] [PASSED] 1 VF
[22:07:07] [PASSED] 2 VFs
[22:07:07] [PASSED] 3 VFs
[22:07:07] [PASSED] 4 VFs
[22:07:07] [PASSED] 5 VFs
[22:07:07] [PASSED] 6 VFs
[22:07:07] [PASSED] 7 VFs
[22:07:07] [PASSED] 8 VFs
[22:07:07] [PASSED] 9 VFs
[22:07:07] [PASSED] 10 VFs
[22:07:07] [PASSED] 11 VFs
[22:07:07] [PASSED] 12 VFs
[22:07:07] [PASSED] 13 VFs
[22:07:07] [PASSED] 14 VFs
[22:07:07] [PASSED] 15 VFs
[22:07:07] [PASSED] 16 VFs
[22:07:07] [PASSED] 17 VFs
[22:07:07] [PASSED] 18 VFs
[22:07:07] [PASSED] 19 VFs
[22:07:07] [PASSED] 20 VFs
[22:07:07] [PASSED] 21 VFs
[22:07:07] [PASSED] 22 VFs
[22:07:07] [PASSED] 23 VFs
[22:07:07] [PASSED] 24 VFs
[22:07:07] [PASSED] 25 VFs
[22:07:07] [PASSED] 26 VFs
[22:07:07] [PASSED] 27 VFs
[22:07:07] [PASSED] 28 VFs
[22:07:07] [PASSED] 29 VFs
[22:07:07] [PASSED] 30 VFs
[22:07:07] [PASSED] 31 VFs
[22:07:07] [PASSED] 32 VFs
[22:07:07] [PASSED] 33 VFs
[22:07:07] [PASSED] 34 VFs
[22:07:07] [PASSED] 35 VFs
[22:07:07] [PASSED] 36 VFs
[22:07:07] [PASSED] 37 VFs
[22:07:07] [PASSED] 38 VFs
[22:07:07] [PASSED] 39 VFs
[22:07:07] [PASSED] 40 VFs
[22:07:07] [PASSED] 41 VFs
[22:07:07] [PASSED] 42 VFs
[22:07:07] [PASSED] 43 VFs
[22:07:07] [PASSED] 44 VFs
[22:07:07] [PASSED] 45 VFs
[22:07:07] [PASSED] 46 VFs
[22:07:07] [PASSED] 47 VFs
[22:07:07] [PASSED] 48 VFs
[22:07:07] [PASSED] 49 VFs
[22:07:07] [PASSED] 50 VFs
[22:07:07] [PASSED] 51 VFs
[22:07:07] [PASSED] 52 VFs
[22:07:07] [PASSED] 53 VFs
[22:07:07] [PASSED] 54 VFs
[22:07:07] [PASSED] 55 VFs
[22:07:07] [PASSED] 56 VFs
[22:07:07] [PASSED] 57 VFs
[22:07:07] [PASSED] 58 VFs
[22:07:07] [PASSED] 59 VFs
[22:07:07] [PASSED] 60 VFs
[22:07:07] [PASSED] 61 VFs
[22:07:07] [PASSED] 62 VFs
[22:07:07] [PASSED] 63 VFs
[22:07:07] ==================== [PASSED] fair_ggtt ====================
[22:07:07] ======================== fair_vram  ========================
[22:07:07] [PASSED] 1 VF
[22:07:07] [PASSED] 2 VFs
[22:07:07] [PASSED] 3 VFs
[22:07:07] [PASSED] 4 VFs
[22:07:07] [PASSED] 5 VFs
[22:07:07] [PASSED] 6 VFs
[22:07:07] [PASSED] 7 VFs
[22:07:07] [PASSED] 8 VFs
[22:07:07] [PASSED] 9 VFs
[22:07:07] [PASSED] 10 VFs
[22:07:07] [PASSED] 11 VFs
[22:07:07] [PASSED] 12 VFs
[22:07:07] [PASSED] 13 VFs
[22:07:07] [PASSED] 14 VFs
[22:07:07] [PASSED] 15 VFs
[22:07:07] [PASSED] 16 VFs
[22:07:07] [PASSED] 17 VFs
[22:07:07] [PASSED] 18 VFs
[22:07:07] [PASSED] 19 VFs
[22:07:07] [PASSED] 20 VFs
[22:07:07] [PASSED] 21 VFs
[22:07:07] [PASSED] 22 VFs
[22:07:07] [PASSED] 23 VFs
[22:07:07] [PASSED] 24 VFs
[22:07:07] [PASSED] 25 VFs
[22:07:07] [PASSED] 26 VFs
[22:07:07] [PASSED] 27 VFs
[22:07:07] [PASSED] 28 VFs
[22:07:07] [PASSED] 29 VFs
[22:07:07] [PASSED] 30 VFs
[22:07:07] [PASSED] 31 VFs
[22:07:07] [PASSED] 32 VFs
[22:07:07] [PASSED] 33 VFs
[22:07:07] [PASSED] 34 VFs
[22:07:07] [PASSED] 35 VFs
[22:07:07] [PASSED] 36 VFs
[22:07:07] [PASSED] 37 VFs
[22:07:07] [PASSED] 38 VFs
[22:07:07] [PASSED] 39 VFs
[22:07:07] [PASSED] 40 VFs
[22:07:07] [PASSED] 41 VFs
[22:07:07] [PASSED] 42 VFs
[22:07:07] [PASSED] 43 VFs
[22:07:07] [PASSED] 44 VFs
[22:07:07] [PASSED] 45 VFs
[22:07:07] [PASSED] 46 VFs
[22:07:07] [PASSED] 47 VFs
[22:07:07] [PASSED] 48 VFs
[22:07:07] [PASSED] 49 VFs
[22:07:07] [PASSED] 50 VFs
[22:07:07] [PASSED] 51 VFs
[22:07:07] [PASSED] 52 VFs
[22:07:07] [PASSED] 53 VFs
[22:07:07] [PASSED] 54 VFs
[22:07:07] [PASSED] 55 VFs
[22:07:07] [PASSED] 56 VFs
[22:07:07] [PASSED] 57 VFs
[22:07:07] [PASSED] 58 VFs
[22:07:07] [PASSED] 59 VFs
[22:07:07] [PASSED] 60 VFs
[22:07:07] [PASSED] 61 VFs
[22:07:07] [PASSED] 62 VFs
[22:07:07] [PASSED] 63 VFs
[22:07:07] ==================== [PASSED] fair_vram ====================
[22:07:07] ================== [PASSED] pf_gt_config ===================
[22:07:07] ===================== lmtt (1 subtest) =====================
[22:07:07] ======================== test_ops  =========================
[22:07:07] [PASSED] 2-level
[22:07:07] [PASSED] multi-level
[22:07:07] ==================== [PASSED] test_ops =====================
[22:07:07] ====================== [PASSED] lmtt =======================
[22:07:07] ================= pf_service (11 subtests) =================
[22:07:07] [PASSED] pf_negotiate_any
[22:07:07] [PASSED] pf_negotiate_base_match
[22:07:07] [PASSED] pf_negotiate_base_newer
[22:07:07] [PASSED] pf_negotiate_base_next
[22:07:07] [SKIPPED] pf_negotiate_base_older
[22:07:07] [PASSED] pf_negotiate_base_prev
[22:07:07] [PASSED] pf_negotiate_latest_match
[22:07:07] [PASSED] pf_negotiate_latest_newer
[22:07:07] [PASSED] pf_negotiate_latest_next
[22:07:07] [SKIPPED] pf_negotiate_latest_older
[22:07:07] [SKIPPED] pf_negotiate_latest_prev
[22:07:07] =================== [PASSED] pf_service ====================
[22:07:07] ================= xe_guc_g2g (2 subtests) ==================
[22:07:07] ============== xe_live_guc_g2g_kunit_default  ==============
[22:07:07] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[22:07:07] ============== xe_live_guc_g2g_kunit_allmem  ===============
[22:07:07] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[22:07:07] =================== [SKIPPED] xe_guc_g2g ===================
[22:07:07] =================== xe_mocs (2 subtests) ===================
[22:07:07] ================ xe_live_mocs_kernel_kunit  ================
[22:07:07] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[22:07:07] ================ xe_live_mocs_reset_kunit  =================
[22:07:07] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[22:07:07] ==================== [SKIPPED] xe_mocs =====================
[22:07:07] ================= xe_migrate (2 subtests) ==================
[22:07:07] ================= xe_migrate_sanity_kunit  =================
[22:07:07] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[22:07:07] ================== xe_validate_ccs_kunit  ==================
[22:07:07] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[22:07:07] =================== [SKIPPED] xe_migrate ===================
[22:07:07] ================== xe_dma_buf (1 subtest) ==================
[22:07:07] ==================== xe_dma_buf_kunit  =====================
[22:07:07] ================ [SKIPPED] xe_dma_buf_kunit ================
[22:07:07] =================== [SKIPPED] xe_dma_buf ===================
[22:07:07] ================= xe_bo_shrink (1 subtest) =================
[22:07:07] =================== xe_bo_shrink_kunit  ====================
[22:07:07] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[22:07:07] ================== [SKIPPED] xe_bo_shrink ==================
[22:07:07] ==================== xe_bo (2 subtests) ====================
[22:07:07] ================== xe_ccs_migrate_kunit  ===================
[22:07:07] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[22:07:07] ==================== xe_bo_evict_kunit  ====================
[22:07:07] =============== [SKIPPED] xe_bo_evict_kunit ================
[22:07:07] ===================== [SKIPPED] xe_bo ======================
[22:07:07] ==================== args (13 subtests) ====================
[22:07:07] [PASSED] count_args_test
[22:07:07] [PASSED] call_args_example
[22:07:07] [PASSED] call_args_test
[22:07:07] [PASSED] drop_first_arg_example
[22:07:07] [PASSED] drop_first_arg_test
[22:07:07] [PASSED] first_arg_example
[22:07:07] [PASSED] first_arg_test
[22:07:07] [PASSED] last_arg_example
[22:07:07] [PASSED] last_arg_test
[22:07:07] [PASSED] pick_arg_example
[22:07:07] [PASSED] if_args_example
[22:07:07] [PASSED] if_args_test
[22:07:07] [PASSED] sep_comma_example
[22:07:07] ====================== [PASSED] args =======================
[22:07:07] =================== xe_pci (3 subtests) ====================
[22:07:07] ==================== check_graphics_ip  ====================
[22:07:07] [PASSED] 12.00 Xe_LP
[22:07:07] [PASSED] 12.10 Xe_LP+
[22:07:07] [PASSED] 12.55 Xe_HPG
[22:07:07] [PASSED] 12.60 Xe_HPC
[22:07:07] [PASSED] 12.70 Xe_LPG
[22:07:07] [PASSED] 12.71 Xe_LPG
[22:07:07] [PASSED] 12.74 Xe_LPG+
[22:07:07] [PASSED] 20.01 Xe2_HPG
[22:07:07] [PASSED] 20.02 Xe2_HPG
[22:07:07] [PASSED] 20.04 Xe2_LPG
[22:07:07] [PASSED] 30.00 Xe3_LPG
[22:07:07] [PASSED] 30.01 Xe3_LPG
[22:07:07] [PASSED] 30.03 Xe3_LPG
[22:07:07] [PASSED] 30.04 Xe3_LPG
[22:07:07] [PASSED] 30.05 Xe3_LPG
[22:07:07] [PASSED] 35.10 Xe3p_LPG
[22:07:07] [PASSED] 35.11 Xe3p_XPC
[22:07:07] ================ [PASSED] check_graphics_ip ================
[22:07:07] ===================== check_media_ip  ======================
[22:07:07] [PASSED] 12.00 Xe_M
[22:07:07] [PASSED] 12.55 Xe_HPM
[22:07:07] [PASSED] 13.00 Xe_LPM+
[22:07:07] [PASSED] 13.01 Xe2_HPM
[22:07:07] [PASSED] 20.00 Xe2_LPM
[22:07:07] [PASSED] 30.00 Xe3_LPM
[22:07:07] [PASSED] 30.02 Xe3_LPM
[22:07:07] [PASSED] 35.00 Xe3p_LPM
[22:07:07] [PASSED] 35.03 Xe3p_HPM
[22:07:07] ================= [PASSED] check_media_ip ==================
[22:07:07] =================== check_platform_desc  ===================
[22:07:07] [PASSED] 0x9A60 (TIGERLAKE)
[22:07:07] [PASSED] 0x9A68 (TIGERLAKE)
[22:07:07] [PASSED] 0x9A70 (TIGERLAKE)
[22:07:07] [PASSED] 0x9A40 (TIGERLAKE)
[22:07:07] [PASSED] 0x9A49 (TIGERLAKE)
[22:07:07] [PASSED] 0x9A59 (TIGERLAKE)
[22:07:07] [PASSED] 0x9A78 (TIGERLAKE)
[22:07:07] [PASSED] 0x9AC0 (TIGERLAKE)
[22:07:07] [PASSED] 0x9AC9 (TIGERLAKE)
[22:07:07] [PASSED] 0x9AD9 (TIGERLAKE)
[22:07:07] [PASSED] 0x9AF8 (TIGERLAKE)
[22:07:07] [PASSED] 0x4C80 (ROCKETLAKE)
[22:07:07] [PASSED] 0x4C8A (ROCKETLAKE)
[22:07:07] [PASSED] 0x4C8B (ROCKETLAKE)
[22:07:07] [PASSED] 0x4C8C (ROCKETLAKE)
[22:07:07] [PASSED] 0x4C90 (ROCKETLAKE)
[22:07:07] [PASSED] 0x4C9A (ROCKETLAKE)
[22:07:07] [PASSED] 0x4680 (ALDERLAKE_S)
[22:07:07] [PASSED] 0x4682 (ALDERLAKE_S)
[22:07:07] [PASSED] 0x4688 (ALDERLAKE_S)
[22:07:07] [PASSED] 0x468A (ALDERLAKE_S)
[22:07:07] [PASSED] 0x468B (ALDERLAKE_S)
[22:07:07] [PASSED] 0x4690 (ALDERLAKE_S)
[22:07:07] [PASSED] 0x4692 (ALDERLAKE_S)
[22:07:07] [PASSED] 0x4693 (ALDERLAKE_S)
[22:07:07] [PASSED] 0x46A0 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46A1 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46A2 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46A3 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46A6 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46A8 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46AA (ALDERLAKE_P)
[22:07:07] [PASSED] 0x462A (ALDERLAKE_P)
[22:07:07] [PASSED] 0x4626 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x4628 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46B0 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46B1 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46B2 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46B3 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46C0 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46C1 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46C2 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46C3 (ALDERLAKE_P)
[22:07:07] [PASSED] 0x46D0 (ALDERLAKE_N)
[22:07:07] [PASSED] 0x46D1 (ALDERLAKE_N)
[22:07:07] [PASSED] 0x46D2 (ALDERLAKE_N)
[22:07:07] [PASSED] 0x46D3 (ALDERLAKE_N)
[22:07:07] [PASSED] 0x46D4 (ALDERLAKE_N)
[22:07:07] [PASSED] 0xA721 (ALDERLAKE_P)
[22:07:07] [PASSED] 0xA7A1 (ALDERLAKE_P)
[22:07:07] [PASSED] 0xA7A9 (ALDERLAKE_P)
[22:07:07] [PASSED] 0xA7AC (ALDERLAKE_P)
[22:07:07] [PASSED] 0xA7AD (ALDERLAKE_P)
[22:07:07] [PASSED] 0xA720 (ALDERLAKE_P)
[22:07:07] [PASSED] 0xA7A0 (ALDERLAKE_P)
[22:07:07] [PASSED] 0xA7A8 (ALDERLAKE_P)
[22:07:07] [PASSED] 0xA7AA (ALDERLAKE_P)
[22:07:07] [PASSED] 0xA7AB (ALDERLAKE_P)
[22:07:07] [PASSED] 0xA780 (ALDERLAKE_S)
[22:07:07] [PASSED] 0xA781 (ALDERLAKE_S)
[22:07:07] [PASSED] 0xA782 (ALDERLAKE_S)
[22:07:07] [PASSED] 0xA783 (ALDERLAKE_S)
[22:07:07] [PASSED] 0xA788 (ALDERLAKE_S)
[22:07:07] [PASSED] 0xA789 (ALDERLAKE_S)
[22:07:07] [PASSED] 0xA78A (ALDERLAKE_S)
[22:07:07] [PASSED] 0xA78B (ALDERLAKE_S)
[22:07:07] [PASSED] 0x4905 (DG1)
[22:07:07] [PASSED] 0x4906 (DG1)
[22:07:07] [PASSED] 0x4907 (DG1)
[22:07:07] [PASSED] 0x4908 (DG1)
[22:07:07] [PASSED] 0x4909 (DG1)
[22:07:07] [PASSED] 0x56C0 (DG2)
[22:07:07] [PASSED] 0x56C2 (DG2)
[22:07:07] [PASSED] 0x56C1 (DG2)
[22:07:07] [PASSED] 0x7D51 (METEORLAKE)
[22:07:07] [PASSED] 0x7DD1 (METEORLAKE)
[22:07:07] [PASSED] 0x7D41 (METEORLAKE)
[22:07:07] [PASSED] 0x7D67 (METEORLAKE)
[22:07:07] [PASSED] 0xB640 (METEORLAKE)
[22:07:07] [PASSED] 0x56A0 (DG2)
[22:07:07] [PASSED] 0x56A1 (DG2)
[22:07:07] [PASSED] 0x56A2 (DG2)
[22:07:07] [PASSED] 0x56BE (DG2)
[22:07:07] [PASSED] 0x56BF (DG2)
[22:07:07] [PASSED] 0x5690 (DG2)
[22:07:07] [PASSED] 0x5691 (DG2)
[22:07:07] [PASSED] 0x5692 (DG2)
[22:07:07] [PASSED] 0x56A5 (DG2)
[22:07:07] [PASSED] 0x56A6 (DG2)
[22:07:07] [PASSED] 0x56B0 (DG2)
[22:07:07] [PASSED] 0x56B1 (DG2)
[22:07:07] [PASSED] 0x56BA (DG2)
[22:07:07] [PASSED] 0x56BB (DG2)
[22:07:07] [PASSED] 0x56BC (DG2)
[22:07:07] [PASSED] 0x56BD (DG2)
[22:07:07] [PASSED] 0x5693 (DG2)
[22:07:07] [PASSED] 0x5694 (DG2)
[22:07:07] [PASSED] 0x5695 (DG2)
[22:07:07] [PASSED] 0x56A3 (DG2)
[22:07:07] [PASSED] 0x56A4 (DG2)
[22:07:07] [PASSED] 0x56B2 (DG2)
[22:07:07] [PASSED] 0x56B3 (DG2)
[22:07:07] [PASSED] 0x5696 (DG2)
[22:07:07] [PASSED] 0x5697 (DG2)
[22:07:07] [PASSED] 0xB69 (PVC)
[22:07:07] [PASSED] 0xB6E (PVC)
[22:07:07] [PASSED] 0xBD4 (PVC)
[22:07:07] [PASSED] 0xBD5 (PVC)
[22:07:07] [PASSED] 0xBD6 (PVC)
[22:07:07] [PASSED] 0xBD7 (PVC)
[22:07:07] [PASSED] 0xBD8 (PVC)
[22:07:07] [PASSED] 0xBD9 (PVC)
[22:07:07] [PASSED] 0xBDA (PVC)
[22:07:07] [PASSED] 0xBDB (PVC)
[22:07:07] [PASSED] 0xBE0 (PVC)
[22:07:07] [PASSED] 0xBE1 (PVC)
[22:07:07] [PASSED] 0xBE5 (PVC)
[22:07:07] [PASSED] 0x7D40 (METEORLAKE)
[22:07:07] [PASSED] 0x7D45 (METEORLAKE)
[22:07:07] [PASSED] 0x7D55 (METEORLAKE)
[22:07:07] [PASSED] 0x7D60 (METEORLAKE)
[22:07:07] [PASSED] 0x7DD5 (METEORLAKE)
[22:07:07] [PASSED] 0x6420 (LUNARLAKE)
[22:07:07] [PASSED] 0x64A0 (LUNARLAKE)
[22:07:07] [PASSED] 0x64B0 (LUNARLAKE)
[22:07:07] [PASSED] 0xE202 (BATTLEMAGE)
[22:07:07] [PASSED] 0xE209 (BATTLEMAGE)
[22:07:07] [PASSED] 0xE20B (BATTLEMAGE)
[22:07:07] [PASSED] 0xE20C (BATTLEMAGE)
[22:07:07] [PASSED] 0xE20D (BATTLEMAGE)
[22:07:07] [PASSED] 0xE210 (BATTLEMAGE)
[22:07:07] [PASSED] 0xE211 (BATTLEMAGE)
[22:07:07] [PASSED] 0xE212 (BATTLEMAGE)
[22:07:07] [PASSED] 0xE216 (BATTLEMAGE)
[22:07:07] [PASSED] 0xE220 (BATTLEMAGE)
[22:07:07] [PASSED] 0xE221 (BATTLEMAGE)
[22:07:07] [PASSED] 0xE222 (BATTLEMAGE)
[22:07:07] [PASSED] 0xE223 (BATTLEMAGE)
[22:07:07] [PASSED] 0xB080 (PANTHERLAKE)
[22:07:07] [PASSED] 0xB081 (PANTHERLAKE)
[22:07:07] [PASSED] 0xB082 (PANTHERLAKE)
[22:07:07] [PASSED] 0xB083 (PANTHERLAKE)
[22:07:07] [PASSED] 0xB084 (PANTHERLAKE)
[22:07:07] [PASSED] 0xB085 (PANTHERLAKE)
[22:07:07] [PASSED] 0xB086 (PANTHERLAKE)
[22:07:07] [PASSED] 0xB087 (PANTHERLAKE)
[22:07:07] [PASSED] 0xB08F (PANTHERLAKE)
[22:07:07] [PASSED] 0xB090 (PANTHERLAKE)
[22:07:07] [PASSED] 0xB0A0 (PANTHERLAKE)
[22:07:07] [PASSED] 0xB0B0 (PANTHERLAKE)
[22:07:07] [PASSED] 0xFD80 (PANTHERLAKE)
[22:07:07] [PASSED] 0xFD81 (PANTHERLAKE)
[22:07:07] [PASSED] 0xD740 (NOVALAKE_S)
[22:07:07] [PASSED] 0xD741 (NOVALAKE_S)
[22:07:07] [PASSED] 0xD742 (NOVALAKE_S)
[22:07:07] [PASSED] 0xD743 (NOVALAKE_S)
[22:07:07] [PASSED] 0xD744 (NOVALAKE_S)
[22:07:07] [PASSED] 0xD745 (NOVALAKE_S)
[22:07:07] [PASSED] 0x674C (CRESCENTISLAND)
[22:07:07] [PASSED] 0xD750 (NOVALAKE_P)
[22:07:07] [PASSED] 0xD751 (NOVALAKE_P)
[22:07:07] [PASSED] 0xD752 (NOVALAKE_P)
[22:07:07] [PASSED] 0xD753 (NOVALAKE_P)
[22:07:07] [PASSED] 0xD754 (NOVALAKE_P)
[22:07:07] [PASSED] 0xD755 (NOVALAKE_P)
[22:07:07] [PASSED] 0xD756 (NOVALAKE_P)
[22:07:07] [PASSED] 0xD757 (NOVALAKE_P)
[22:07:07] [PASSED] 0xD75F (NOVALAKE_P)
[22:07:07] =============== [PASSED] check_platform_desc ===============
[22:07:07] ===================== [PASSED] xe_pci ======================
[22:07:07] =================== xe_rtp (2 subtests) ====================
[22:07:07] =============== xe_rtp_process_to_sr_tests  ================
[22:07:07] [PASSED] coalesce-same-reg
[22:07:07] [PASSED] no-match-no-add
[22:07:07] [PASSED] match-or
[22:07:07] [PASSED] match-or-xfail
[22:07:07] [PASSED] no-match-no-add-multiple-rules
[22:07:07] [PASSED] two-regs-two-entries
[22:07:07] [PASSED] clr-one-set-other
[22:07:07] [PASSED] set-field
[22:07:07] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[22:07:07] [PASSED] conflict-not-disjoint
[22:07:07] [PASSED] conflict-reg-type
[22:07:07] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[22:07:07] ================== xe_rtp_process_tests  ===================
[22:07:07] [PASSED] active1
[22:07:07] [PASSED] active2
[22:07:07] [PASSED] active-inactive
[22:07:07] [PASSED] inactive-active
[22:07:07] [PASSED] inactive-1st_or_active-inactive
[22:07:07] [PASSED] inactive-2nd_or_active-inactive
[22:07:07] [PASSED] inactive-last_or_active-inactive
[22:07:07] [PASSED] inactive-no_or_active-inactive
[22:07:07] ============== [PASSED] xe_rtp_process_tests ===============
[22:07:07] ===================== [PASSED] xe_rtp ======================
[22:07:07] ==================== xe_wa (1 subtest) =====================
[22:07:07] ======================== xe_wa_gt  =========================
[22:07:07] [PASSED] TIGERLAKE B0
[22:07:07] [PASSED] DG1 A0
[22:07:07] [PASSED] DG1 B0
[22:07:07] [PASSED] ALDERLAKE_S A0
[22:07:07] [PASSED] ALDERLAKE_S B0
[22:07:07] [PASSED] ALDERLAKE_S C0
[22:07:07] [PASSED] ALDERLAKE_S D0
[22:07:07] [PASSED] ALDERLAKE_P A0
[22:07:07] [PASSED] ALDERLAKE_P B0
[22:07:07] [PASSED] ALDERLAKE_P C0
[22:07:07] [PASSED] ALDERLAKE_S RPLS D0
[22:07:07] [PASSED] ALDERLAKE_P RPLU E0
[22:07:07] [PASSED] DG2 G10 C0
[22:07:07] [PASSED] DG2 G11 B1
[22:07:07] [PASSED] DG2 G12 A1
[22:07:07] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:07:07] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[22:07:07] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[22:07:07] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[22:07:07] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[22:07:07] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[22:07:07] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[22:07:07] ==================== [PASSED] xe_wa_gt =====================
[22:07:07] ====================== [PASSED] xe_wa ======================
[22:07:07] ============================================================
[22:07:07] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[22:07:07] Elapsed time: 35.703s total, 4.247s configuring, 30.839s building, 0.605s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[22:07:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:07:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:07:33] Starting KUnit Kernel (1/1)...
[22:07:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:07:33] ============ drm_test_pick_cmdline (2 subtests) ============
[22:07:33] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[22:07:33] =============== drm_test_pick_cmdline_named  ===============
[22:07:33] [PASSED] NTSC
[22:07:33] [PASSED] NTSC-J
[22:07:33] [PASSED] PAL
[22:07:33] [PASSED] PAL-M
[22:07:33] =========== [PASSED] drm_test_pick_cmdline_named ===========
[22:07:33] ============== [PASSED] drm_test_pick_cmdline ==============
[22:07:33] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[22:07:33] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[22:07:33] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[22:07:33] =========== drm_validate_clone_mode (2 subtests) ===========
[22:07:33] ============== drm_test_check_in_clone_mode  ===============
[22:07:33] [PASSED] in_clone_mode
[22:07:33] [PASSED] not_in_clone_mode
[22:07:33] ========== [PASSED] drm_test_check_in_clone_mode ===========
[22:07:33] =============== drm_test_check_valid_clones  ===============
[22:07:33] [PASSED] not_in_clone_mode
[22:07:33] [PASSED] valid_clone
[22:07:33] [PASSED] invalid_clone
[22:07:33] =========== [PASSED] drm_test_check_valid_clones ===========
[22:07:33] ============= [PASSED] drm_validate_clone_mode =============
[22:07:33] ============= drm_validate_modeset (1 subtest) =============
[22:07:33] [PASSED] drm_test_check_connector_changed_modeset
[22:07:33] ============== [PASSED] drm_validate_modeset ===============
[22:07:33] ====== drm_test_bridge_get_current_state (2 subtests) ======
[22:07:33] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[22:07:33] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[22:07:33] ======== [PASSED] drm_test_bridge_get_current_state ========
[22:07:33] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[22:07:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[22:07:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[22:07:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[22:07:33] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[22:07:33] ============== drm_bridge_alloc (2 subtests) ===============
[22:07:33] [PASSED] drm_test_drm_bridge_alloc_basic
[22:07:33] [PASSED] drm_test_drm_bridge_alloc_get_put
[22:07:33] ================ [PASSED] drm_bridge_alloc =================
[22:07:33] ============= drm_cmdline_parser (40 subtests) =============
[22:07:33] [PASSED] drm_test_cmdline_force_d_only
[22:07:33] [PASSED] drm_test_cmdline_force_D_only_dvi
[22:07:33] [PASSED] drm_test_cmdline_force_D_only_hdmi
[22:07:33] [PASSED] drm_test_cmdline_force_D_only_not_digital
[22:07:33] [PASSED] drm_test_cmdline_force_e_only
[22:07:33] [PASSED] drm_test_cmdline_res
[22:07:33] [PASSED] drm_test_cmdline_res_vesa
[22:07:33] [PASSED] drm_test_cmdline_res_vesa_rblank
[22:07:33] [PASSED] drm_test_cmdline_res_rblank
[22:07:33] [PASSED] drm_test_cmdline_res_bpp
[22:07:33] [PASSED] drm_test_cmdline_res_refresh
[22:07:33] [PASSED] drm_test_cmdline_res_bpp_refresh
[22:07:33] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[22:07:33] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[22:07:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[22:07:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[22:07:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[22:07:33] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[22:07:33] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[22:07:33] [PASSED] drm_test_cmdline_res_margins_force_on
[22:07:33] [PASSED] drm_test_cmdline_res_vesa_margins
[22:07:33] [PASSED] drm_test_cmdline_name
[22:07:33] [PASSED] drm_test_cmdline_name_bpp
[22:07:33] [PASSED] drm_test_cmdline_name_option
[22:07:33] [PASSED] drm_test_cmdline_name_bpp_option
[22:07:33] [PASSED] drm_test_cmdline_rotate_0
[22:07:33] [PASSED] drm_test_cmdline_rotate_90
[22:07:33] [PASSED] drm_test_cmdline_rotate_180
[22:07:33] [PASSED] drm_test_cmdline_rotate_270
[22:07:33] [PASSED] drm_test_cmdline_hmirror
[22:07:33] [PASSED] drm_test_cmdline_vmirror
[22:07:33] [PASSED] drm_test_cmdline_margin_options
[22:07:33] [PASSED] drm_test_cmdline_multiple_options
[22:07:33] [PASSED] drm_test_cmdline_bpp_extra_and_option
[22:07:33] [PASSED] drm_test_cmdline_extra_and_option
[22:07:33] [PASSED] drm_test_cmdline_freestanding_options
[22:07:33] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[22:07:33] [PASSED] drm_test_cmdline_panel_orientation
[22:07:33] ================ drm_test_cmdline_invalid  =================
[22:07:33] [PASSED] margin_only
[22:07:33] [PASSED] interlace_only
[22:07:33] [PASSED] res_missing_x
[22:07:33] [PASSED] res_missing_y
[22:07:33] [PASSED] res_bad_y
[22:07:33] [PASSED] res_missing_y_bpp
[22:07:33] [PASSED] res_bad_bpp
[22:07:33] [PASSED] res_bad_refresh
[22:07:33] [PASSED] res_bpp_refresh_force_on_off
[22:07:33] [PASSED] res_invalid_mode
[22:07:33] [PASSED] res_bpp_wrong_place_mode
[22:07:33] [PASSED] name_bpp_refresh
[22:07:33] [PASSED] name_refresh
[22:07:33] [PASSED] name_refresh_wrong_mode
[22:07:33] [PASSED] name_refresh_invalid_mode
[22:07:33] [PASSED] rotate_multiple
[22:07:33] [PASSED] rotate_invalid_val
[22:07:33] [PASSED] rotate_truncated
[22:07:33] [PASSED] invalid_option
[22:07:33] [PASSED] invalid_tv_option
[22:07:33] [PASSED] truncated_tv_option
[22:07:33] ============ [PASSED] drm_test_cmdline_invalid =============
[22:07:33] =============== drm_test_cmdline_tv_options  ===============
[22:07:33] [PASSED] NTSC
[22:07:33] [PASSED] NTSC_443
[22:07:33] [PASSED] NTSC_J
[22:07:33] [PASSED] PAL
[22:07:33] [PASSED] PAL_M
[22:07:33] [PASSED] PAL_N
[22:07:33] [PASSED] SECAM
[22:07:33] [PASSED] MONO_525
[22:07:33] [PASSED] MONO_625
[22:07:33] =========== [PASSED] drm_test_cmdline_tv_options ===========
[22:07:33] =============== [PASSED] drm_cmdline_parser ================
[22:07:33] ========== drmm_connector_hdmi_init (20 subtests) ==========
[22:07:33] [PASSED] drm_test_connector_hdmi_init_valid
[22:07:33] [PASSED] drm_test_connector_hdmi_init_bpc_8
[22:07:33] [PASSED] drm_test_connector_hdmi_init_bpc_10
[22:07:33] [PASSED] drm_test_connector_hdmi_init_bpc_12
[22:07:33] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[22:07:33] [PASSED] drm_test_connector_hdmi_init_bpc_null
[22:07:33] [PASSED] drm_test_connector_hdmi_init_formats_empty
[22:07:33] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[22:07:33] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[22:07:33] [PASSED] supported_formats=0x9 yuv420_allowed=1
[22:07:33] [PASSED] supported_formats=0x9 yuv420_allowed=0
[22:07:33] [PASSED] supported_formats=0x5 yuv420_allowed=1
[22:07:33] [PASSED] supported_formats=0x5 yuv420_allowed=0
[22:07:33] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[22:07:33] [PASSED] drm_test_connector_hdmi_init_null_ddc
[22:07:33] [PASSED] drm_test_connector_hdmi_init_null_product
[22:07:33] [PASSED] drm_test_connector_hdmi_init_null_vendor
[22:07:33] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[22:07:33] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[22:07:33] [PASSED] drm_test_connector_hdmi_init_product_valid
[22:07:33] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[22:07:33] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[22:07:33] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[22:07:33] ========= drm_test_connector_hdmi_init_type_valid  =========
[22:07:33] [PASSED] HDMI-A
[22:07:33] [PASSED] HDMI-B
[22:07:33] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[22:07:33] ======== drm_test_connector_hdmi_init_type_invalid  ========
[22:07:33] [PASSED] Unknown
[22:07:33] [PASSED] VGA
[22:07:33] [PASSED] DVI-I
[22:07:33] [PASSED] DVI-D
[22:07:33] [PASSED] DVI-A
[22:07:33] [PASSED] Composite
[22:07:33] [PASSED] SVIDEO
[22:07:33] [PASSED] LVDS
[22:07:33] [PASSED] Component
[22:07:33] [PASSED] DIN
[22:07:33] [PASSED] DP
[22:07:33] [PASSED] TV
[22:07:33] [PASSED] eDP
[22:07:33] [PASSED] Virtual
[22:07:33] [PASSED] DSI
[22:07:33] [PASSED] DPI
[22:07:33] [PASSED] Writeback
[22:07:33] [PASSED] SPI
[22:07:33] [PASSED] USB
[22:07:33] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[22:07:33] ============ [PASSED] drmm_connector_hdmi_init =============
[22:07:33] ============= drmm_connector_init (3 subtests) =============
[22:07:33] [PASSED] drm_test_drmm_connector_init
[22:07:33] [PASSED] drm_test_drmm_connector_init_null_ddc
[22:07:33] ========= drm_test_drmm_connector_init_type_valid  =========
[22:07:33] [PASSED] Unknown
[22:07:33] [PASSED] VGA
[22:07:33] [PASSED] DVI-I
[22:07:33] [PASSED] DVI-D
[22:07:33] [PASSED] DVI-A
[22:07:33] [PASSED] Composite
[22:07:33] [PASSED] SVIDEO
[22:07:33] [PASSED] LVDS
[22:07:33] [PASSED] Component
[22:07:33] [PASSED] DIN
[22:07:33] [PASSED] DP
[22:07:33] [PASSED] HDMI-A
[22:07:33] [PASSED] HDMI-B
[22:07:33] [PASSED] TV
[22:07:33] [PASSED] eDP
[22:07:33] [PASSED] Virtual
[22:07:33] [PASSED] DSI
[22:07:33] [PASSED] DPI
[22:07:33] [PASSED] Writeback
[22:07:33] [PASSED] SPI
[22:07:33] [PASSED] USB
[22:07:33] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[22:07:33] =============== [PASSED] drmm_connector_init ===============
[22:07:33] ========= drm_connector_dynamic_init (6 subtests) ==========
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_init
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_init_properties
[22:07:33] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[22:07:33] [PASSED] Unknown
[22:07:33] [PASSED] VGA
[22:07:33] [PASSED] DVI-I
[22:07:33] [PASSED] DVI-D
[22:07:33] [PASSED] DVI-A
[22:07:33] [PASSED] Composite
[22:07:33] [PASSED] SVIDEO
[22:07:33] [PASSED] LVDS
[22:07:33] [PASSED] Component
[22:07:33] [PASSED] DIN
[22:07:33] [PASSED] DP
[22:07:33] [PASSED] HDMI-A
[22:07:33] [PASSED] HDMI-B
[22:07:33] [PASSED] TV
[22:07:33] [PASSED] eDP
[22:07:33] [PASSED] Virtual
[22:07:33] [PASSED] DSI
[22:07:33] [PASSED] DPI
[22:07:33] [PASSED] Writeback
[22:07:33] [PASSED] SPI
[22:07:33] [PASSED] USB
[22:07:33] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[22:07:33] ======== drm_test_drm_connector_dynamic_init_name  =========
[22:07:33] [PASSED] Unknown
[22:07:33] [PASSED] VGA
[22:07:33] [PASSED] DVI-I
[22:07:33] [PASSED] DVI-D
[22:07:33] [PASSED] DVI-A
[22:07:33] [PASSED] Composite
[22:07:33] [PASSED] SVIDEO
[22:07:33] [PASSED] LVDS
[22:07:33] [PASSED] Component
[22:07:33] [PASSED] DIN
[22:07:33] [PASSED] DP
[22:07:33] [PASSED] HDMI-A
[22:07:33] [PASSED] HDMI-B
[22:07:33] [PASSED] TV
[22:07:33] [PASSED] eDP
[22:07:33] [PASSED] Virtual
[22:07:33] [PASSED] DSI
[22:07:33] [PASSED] DPI
[22:07:33] [PASSED] Writeback
[22:07:33] [PASSED] SPI
[22:07:33] [PASSED] USB
[22:07:33] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[22:07:33] =========== [PASSED] drm_connector_dynamic_init ============
[22:07:33] ==== drm_connector_dynamic_register_early (4 subtests) =====
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[22:07:33] ====== [PASSED] drm_connector_dynamic_register_early =======
[22:07:33] ======= drm_connector_dynamic_register (7 subtests) ========
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[22:07:33] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[22:07:33] ========= [PASSED] drm_connector_dynamic_register ==========
[22:07:33] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[22:07:33] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[22:07:33] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[22:07:33] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[22:07:33] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[22:07:33] ========== drm_test_get_tv_mode_from_name_valid  ===========
[22:07:33] [PASSED] NTSC
[22:07:33] [PASSED] NTSC-443
[22:07:33] [PASSED] NTSC-J
[22:07:33] [PASSED] PAL
[22:07:33] [PASSED] PAL-M
[22:07:33] [PASSED] PAL-N
[22:07:33] [PASSED] SECAM
[22:07:33] [PASSED] Mono
[22:07:33] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[22:07:33] [PASSED] drm_test_get_tv_mode_from_name_truncated
[22:07:33] ============ [PASSED] drm_get_tv_mode_from_name ============
[22:07:33] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[22:07:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[22:07:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[22:07:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[22:07:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[22:07:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[22:07:33] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[22:07:33] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[22:07:33] [PASSED] VIC 96
[22:07:33] [PASSED] VIC 97
[22:07:33] [PASSED] VIC 101
[22:07:33] [PASSED] VIC 102
[22:07:33] [PASSED] VIC 106
[22:07:33] [PASSED] VIC 107
[22:07:33] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[22:07:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[22:07:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[22:07:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[22:07:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[22:07:33] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[22:07:33] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[22:07:33] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[22:07:33] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[22:07:33] [PASSED] Automatic
[22:07:33] [PASSED] Full
[22:07:33] [PASSED] Limited 16:235
[22:07:33] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[22:07:33] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[22:07:33] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[22:07:33] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[22:07:34] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[22:07:34] [PASSED] RGB
[22:07:34] [PASSED] YUV 4:2:0
[22:07:34] [PASSED] YUV 4:2:2
[22:07:34] [PASSED] YUV 4:4:4
[22:07:34] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[22:07:34] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[22:07:34] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[22:07:34] ============= drm_damage_helper (21 subtests) ==============
[22:07:34] [PASSED] drm_test_damage_iter_no_damage
[22:07:34] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[22:07:34] [PASSED] drm_test_damage_iter_no_damage_src_moved
[22:07:34] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[22:07:34] [PASSED] drm_test_damage_iter_no_damage_not_visible
[22:07:34] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[22:07:34] [PASSED] drm_test_damage_iter_no_damage_no_fb
[22:07:34] [PASSED] drm_test_damage_iter_simple_damage
[22:07:34] [PASSED] drm_test_damage_iter_single_damage
[22:07:34] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[22:07:34] [PASSED] drm_test_damage_iter_single_damage_outside_src
[22:07:34] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[22:07:34] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[22:07:34] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[22:07:34] [PASSED] drm_test_damage_iter_single_damage_src_moved
[22:07:34] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[22:07:34] [PASSED] drm_test_damage_iter_damage
[22:07:34] [PASSED] drm_test_damage_iter_damage_one_intersect
[22:07:34] [PASSED] drm_test_damage_iter_damage_one_outside
[22:07:34] [PASSED] drm_test_damage_iter_damage_src_moved
[22:07:34] [PASSED] drm_test_damage_iter_damage_not_visible
[22:07:34] ================ [PASSED] drm_damage_helper ================
[22:07:34] ============== drm_dp_mst_helper (3 subtests) ==============
[22:07:34] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[22:07:34] [PASSED] Clock 154000 BPP 30 DSC disabled
[22:07:34] [PASSED] Clock 234000 BPP 30 DSC disabled
[22:07:34] [PASSED] Clock 297000 BPP 24 DSC disabled
[22:07:34] [PASSED] Clock 332880 BPP 24 DSC enabled
[22:07:34] [PASSED] Clock 324540 BPP 24 DSC enabled
[22:07:34] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[22:07:34] ============== drm_test_dp_mst_calc_pbn_div  ===============
[22:07:34] [PASSED] Link rate 2000000 lane count 4
[22:07:34] [PASSED] Link rate 2000000 lane count 2
[22:07:34] [PASSED] Link rate 2000000 lane count 1
[22:07:34] [PASSED] Link rate 1350000 lane count 4
[22:07:34] [PASSED] Link rate 1350000 lane count 2
[22:07:34] [PASSED] Link rate 1350000 lane count 1
[22:07:34] [PASSED] Link rate 1000000 lane count 4
[22:07:34] [PASSED] Link rate 1000000 lane count 2
[22:07:34] [PASSED] Link rate 1000000 lane count 1
[22:07:34] [PASSED] Link rate 810000 lane count 4
[22:07:34] [PASSED] Link rate 810000 lane count 2
[22:07:34] [PASSED] Link rate 810000 lane count 1
[22:07:34] [PASSED] Link rate 540000 lane count 4
[22:07:34] [PASSED] Link rate 540000 lane count 2
[22:07:34] [PASSED] Link rate 540000 lane count 1
[22:07:34] [PASSED] Link rate 270000 lane count 4
[22:07:34] [PASSED] Link rate 270000 lane count 2
[22:07:34] [PASSED] Link rate 270000 lane count 1
[22:07:34] [PASSED] Link rate 162000 lane count 4
[22:07:34] [PASSED] Link rate 162000 lane count 2
[22:07:34] [PASSED] Link rate 162000 lane count 1
[22:07:34] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[22:07:34] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[22:07:34] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[22:07:34] [PASSED] DP_POWER_UP_PHY with port number
[22:07:34] [PASSED] DP_POWER_DOWN_PHY with port number
[22:07:34] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[22:07:34] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[22:07:34] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[22:07:34] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[22:07:34] [PASSED] DP_QUERY_PAYLOAD with port number
[22:07:34] [PASSED] DP_QUERY_PAYLOAD with VCPI
[22:07:34] [PASSED] DP_REMOTE_DPCD_READ with port number
[22:07:34] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[22:07:34] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[22:07:34] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[22:07:34] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[22:07:34] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[22:07:34] [PASSED] DP_REMOTE_I2C_READ with port number
[22:07:34] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[22:07:34] [PASSED] DP_REMOTE_I2C_READ with transactions array
[22:07:34] [PASSED] DP_REMOTE_I2C_WRITE with port number
[22:07:34] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[22:07:34] [PASSED] DP_REMOTE_I2C_WRITE with data array
[22:07:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[22:07:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[22:07:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[22:07:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[22:07:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[22:07:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[22:07:34] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[22:07:34] ================ [PASSED] drm_dp_mst_helper ================
[22:07:34] ================== drm_exec (7 subtests) ===================
[22:07:34] [PASSED] sanitycheck
[22:07:34] [PASSED] test_lock
[22:07:34] [PASSED] test_lock_unlock
[22:07:34] [PASSED] test_duplicates
[22:07:34] [PASSED] test_prepare
[22:07:34] [PASSED] test_prepare_array
[22:07:34] [PASSED] test_multiple_loops
[22:07:34] ==================== [PASSED] drm_exec =====================
[22:07:34] =========== drm_format_helper_test (17 subtests) ===========
[22:07:34] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[22:07:34] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[22:07:34] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[22:07:34] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[22:07:34] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[22:07:34] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[22:07:34] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[22:07:34] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[22:07:34] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[22:07:34] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[22:07:34] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[22:07:34] ============== drm_test_fb_xrgb8888_to_mono  ===============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[22:07:34] ==================== drm_test_fb_swab  =====================
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ================ [PASSED] drm_test_fb_swab =================
[22:07:34] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[22:07:34] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[22:07:34] [PASSED] single_pixel_source_buffer
[22:07:34] [PASSED] single_pixel_clip_rectangle
[22:07:34] [PASSED] well_known_colors
[22:07:34] [PASSED] destination_pitch
[22:07:34] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[22:07:34] ================= drm_test_fb_clip_offset  =================
[22:07:34] [PASSED] pass through
[22:07:34] [PASSED] horizontal offset
[22:07:34] [PASSED] vertical offset
[22:07:34] [PASSED] horizontal and vertical offset
[22:07:34] [PASSED] horizontal offset (custom pitch)
[22:07:34] [PASSED] vertical offset (custom pitch)
[22:07:34] [PASSED] horizontal and vertical offset (custom pitch)
[22:07:34] ============= [PASSED] drm_test_fb_clip_offset =============
[22:07:34] =================== drm_test_fb_memcpy  ====================
[22:07:34] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[22:07:34] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[22:07:34] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[22:07:34] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[22:07:34] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[22:07:34] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[22:07:34] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[22:07:34] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[22:07:34] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[22:07:34] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[22:07:34] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[22:07:34] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[22:07:34] =============== [PASSED] drm_test_fb_memcpy ================
[22:07:34] ============= [PASSED] drm_format_helper_test ==============
[22:07:34] ================= drm_format (18 subtests) =================
[22:07:34] [PASSED] drm_test_format_block_width_invalid
[22:07:34] [PASSED] drm_test_format_block_width_one_plane
[22:07:34] [PASSED] drm_test_format_block_width_two_plane
[22:07:34] [PASSED] drm_test_format_block_width_three_plane
[22:07:34] [PASSED] drm_test_format_block_width_tiled
[22:07:34] [PASSED] drm_test_format_block_height_invalid
[22:07:34] [PASSED] drm_test_format_block_height_one_plane
[22:07:34] [PASSED] drm_test_format_block_height_two_plane
[22:07:34] [PASSED] drm_test_format_block_height_three_plane
[22:07:34] [PASSED] drm_test_format_block_height_tiled
[22:07:34] [PASSED] drm_test_format_min_pitch_invalid
[22:07:34] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[22:07:34] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[22:07:34] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[22:07:34] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[22:07:34] [PASSED] drm_test_format_min_pitch_two_plane
[22:07:34] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[22:07:34] [PASSED] drm_test_format_min_pitch_tiled
[22:07:34] =================== [PASSED] drm_format ====================
[22:07:34] ============== drm_framebuffer (10 subtests) ===============
[22:07:34] ========== drm_test_framebuffer_check_src_coords  ==========
[22:07:34] [PASSED] Success: source fits into fb
[22:07:34] [PASSED] Fail: overflowing fb with x-axis coordinate
[22:07:34] [PASSED] Fail: overflowing fb with y-axis coordinate
[22:07:34] [PASSED] Fail: overflowing fb with source width
[22:07:34] [PASSED] Fail: overflowing fb with source height
[22:07:34] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[22:07:34] [PASSED] drm_test_framebuffer_cleanup
[22:07:34] =============== drm_test_framebuffer_create  ===============
[22:07:34] [PASSED] ABGR8888 normal sizes
[22:07:34] [PASSED] ABGR8888 max sizes
[22:07:34] [PASSED] ABGR8888 pitch greater than min required
[22:07:34] [PASSED] ABGR8888 pitch less than min required
[22:07:34] [PASSED] ABGR8888 Invalid width
[22:07:34] [PASSED] ABGR8888 Invalid buffer handle
[22:07:34] [PASSED] No pixel format
[22:07:34] [PASSED] ABGR8888 Width 0
[22:07:34] [PASSED] ABGR8888 Height 0
[22:07:34] [PASSED] ABGR8888 Out of bound height * pitch combination
[22:07:34] [PASSED] ABGR8888 Large buffer offset
[22:07:34] [PASSED] ABGR8888 Buffer offset for inexistent plane
[22:07:34] [PASSED] ABGR8888 Invalid flag
[22:07:34] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[22:07:34] [PASSED] ABGR8888 Valid buffer modifier
[22:07:34] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[22:07:34] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[22:07:34] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[22:07:34] [PASSED] NV12 Normal sizes
[22:07:34] [PASSED] NV12 Max sizes
[22:07:34] [PASSED] NV12 Invalid pitch
[22:07:34] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[22:07:34] [PASSED] NV12 different  modifier per-plane
[22:07:34] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[22:07:34] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[22:07:34] [PASSED] NV12 Modifier for inexistent plane
[22:07:34] [PASSED] NV12 Handle for inexistent plane
[22:07:34] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[22:07:34] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[22:07:34] [PASSED] YVU420 Normal sizes
[22:07:34] [PASSED] YVU420 Max sizes
[22:07:34] [PASSED] YVU420 Invalid pitch
[22:07:34] [PASSED] YVU420 Different pitches
[22:07:34] [PASSED] YVU420 Different buffer offsets/pitches
[22:07:34] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[22:07:34] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[22:07:34] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[22:07:34] [PASSED] YVU420 Valid modifier
[22:07:34] [PASSED] YVU420 Different modifiers per plane
[22:07:34] [PASSED] YVU420 Modifier for inexistent plane
[22:07:34] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[22:07:34] [PASSED] X0L2 Normal sizes
[22:07:34] [PASSED] X0L2 Max sizes
[22:07:34] [PASSED] X0L2 Invalid pitch
[22:07:34] [PASSED] X0L2 Pitch greater than minimum required
[22:07:34] [PASSED] X0L2 Handle for inexistent plane
[22:07:34] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[22:07:34] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[22:07:34] [PASSED] X0L2 Valid modifier
[22:07:34] [PASSED] X0L2 Modifier for inexistent plane
[22:07:34] =========== [PASSED] drm_test_framebuffer_create ===========
[22:07:34] [PASSED] drm_test_framebuffer_free
[22:07:34] [PASSED] drm_test_framebuffer_init
[22:07:34] [PASSED] drm_test_framebuffer_init_bad_format
[22:07:34] [PASSED] drm_test_framebuffer_init_dev_mismatch
[22:07:34] [PASSED] drm_test_framebuffer_lookup
[22:07:34] [PASSED] drm_test_framebuffer_lookup_inexistent
[22:07:34] [PASSED] drm_test_framebuffer_modifiers_not_supported
[22:07:34] ================= [PASSED] drm_framebuffer =================
[22:07:34] ================ drm_gem_shmem (8 subtests) ================
[22:07:34] [PASSED] drm_gem_shmem_test_obj_create
[22:07:34] [PASSED] drm_gem_shmem_test_obj_create_private
[22:07:34] [PASSED] drm_gem_shmem_test_pin_pages
[22:07:34] [PASSED] drm_gem_shmem_test_vmap
[22:07:34] [PASSED] drm_gem_shmem_test_get_sg_table
[22:07:34] [PASSED] drm_gem_shmem_test_get_pages_sgt
[22:07:34] [PASSED] drm_gem_shmem_test_madvise
[22:07:34] [PASSED] drm_gem_shmem_test_purge
[22:07:34] ================== [PASSED] drm_gem_shmem ==================
[22:07:34] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[22:07:34] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[22:07:34] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[22:07:34] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[22:07:34] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[22:07:34] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[22:07:34] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[22:07:34] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[22:07:34] [PASSED] Automatic
[22:07:34] [PASSED] Full
[22:07:34] [PASSED] Limited 16:235
[22:07:34] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[22:07:34] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[22:07:34] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[22:07:34] [PASSED] drm_test_check_disable_connector
[22:07:34] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[22:07:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[22:07:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[22:07:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[22:07:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[22:07:34] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[22:07:34] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[22:07:34] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[22:07:34] [PASSED] drm_test_check_output_bpc_dvi
[22:07:34] [PASSED] drm_test_check_output_bpc_format_vic_1
[22:07:34] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[22:07:34] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[22:07:34] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[22:07:34] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[22:07:34] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[22:07:34] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[22:07:34] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[22:07:34] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[22:07:34] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[22:07:34] [PASSED] drm_test_check_broadcast_rgb_value
[22:07:34] [PASSED] drm_test_check_bpc_8_value
[22:07:34] [PASSED] drm_test_check_bpc_10_value
[22:07:34] [PASSED] drm_test_check_bpc_12_value
[22:07:34] [PASSED] drm_test_check_format_value
[22:07:34] [PASSED] drm_test_check_tmds_char_value
[22:07:34] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[22:07:34] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[22:07:34] [PASSED] drm_test_check_mode_valid
[22:07:34] [PASSED] drm_test_check_mode_valid_reject
[22:07:34] [PASSED] drm_test_check_mode_valid_reject_rate
[22:07:34] [PASSED] drm_test_check_mode_valid_reject_max_clock
[22:07:34] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[22:07:34] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[22:07:34] [PASSED] drm_test_check_infoframes
[22:07:34] [PASSED] drm_test_check_reject_avi_infoframe
[22:07:34] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[22:07:34] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[22:07:34] [PASSED] drm_test_check_reject_audio_infoframe
[22:07:34] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[22:07:34] ================= drm_managed (2 subtests) =================
[22:07:34] [PASSED] drm_test_managed_release_action
[22:07:34] [PASSED] drm_test_managed_run_action
[22:07:34] =================== [PASSED] drm_managed ===================
[22:07:34] =================== drm_mm (6 subtests) ====================
[22:07:34] [PASSED] drm_test_mm_init
[22:07:34] [PASSED] drm_test_mm_debug
[22:07:34] [PASSED] drm_test_mm_align32
[22:07:34] [PASSED] drm_test_mm_align64
[22:07:34] [PASSED] drm_test_mm_lowest
[22:07:34] [PASSED] drm_test_mm_highest
[22:07:34] ===================== [PASSED] drm_mm ======================
[22:07:34] ============= drm_modes_analog_tv (5 subtests) =============
[22:07:34] [PASSED] drm_test_modes_analog_tv_mono_576i
[22:07:34] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[22:07:34] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[22:07:34] [PASSED] drm_test_modes_analog_tv_pal_576i
[22:07:34] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[22:07:34] =============== [PASSED] drm_modes_analog_tv ===============
[22:07:34] ============== drm_plane_helper (2 subtests) ===============
[22:07:34] =============== drm_test_check_plane_state  ================
[22:07:34] [PASSED] clipping_simple
[22:07:34] [PASSED] clipping_rotate_reflect
[22:07:34] [PASSED] positioning_simple
[22:07:34] [PASSED] upscaling
[22:07:34] [PASSED] downscaling
[22:07:34] [PASSED] rounding1
[22:07:34] [PASSED] rounding2
[22:07:34] [PASSED] rounding3
[22:07:34] [PASSED] rounding4
[22:07:34] =========== [PASSED] drm_test_check_plane_state ============
[22:07:34] =========== drm_test_check_invalid_plane_state  ============
[22:07:34] [PASSED] positioning_invalid
[22:07:34] [PASSED] upscaling_invalid
[22:07:34] [PASSED] downscaling_invalid
[22:07:34] ======= [PASSED] drm_test_check_invalid_plane_state ========
[22:07:34] ================ [PASSED] drm_plane_helper =================
[22:07:34] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[22:07:34] ====== drm_test_connector_helper_tv_get_modes_check  =======
[22:07:34] [PASSED] None
[22:07:34] [PASSED] PAL
[22:07:34] [PASSED] NTSC
[22:07:34] [PASSED] Both, NTSC Default
[22:07:34] [PASSED] Both, PAL Default
[22:07:34] [PASSED] Both, NTSC Default, with PAL on command-line
[22:07:34] [PASSED] Both, PAL Default, with NTSC on command-line
[22:07:34] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[22:07:34] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[22:07:34] ================== drm_rect (9 subtests) ===================
[22:07:34] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[22:07:34] [PASSED] drm_test_rect_clip_scaled_not_clipped
[22:07:34] [PASSED] drm_test_rect_clip_scaled_clipped
[22:07:34] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[22:07:34] ================= drm_test_rect_intersect  =================
[22:07:34] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[22:07:34] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[22:07:34] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[22:07:34] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[22:07:34] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[22:07:34] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[22:07:34] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[22:07:34] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[22:07:34] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[22:07:34] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[22:07:34] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[22:07:34] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[22:07:34] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[22:07:34] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[22:07:34] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[22:07:34] ============= [PASSED] drm_test_rect_intersect =============
[22:07:34] ================ drm_test_rect_calc_hscale  ================
[22:07:34] [PASSED] normal use
[22:07:34] [PASSED] out of max range
[22:07:34] [PASSED] out of min range
[22:07:34] [PASSED] zero dst
[22:07:34] [PASSED] negative src
[22:07:34] [PASSED] negative dst
[22:07:34] ============ [PASSED] drm_test_rect_calc_hscale ============
[22:07:34] ================ drm_test_rect_calc_vscale  ================
[22:07:34] [PASSED] normal use
[22:07:34] [PASSED] out of max range
[22:07:34] [PASSED] out of min range
[22:07:34] [PASSED] zero dst
[22:07:34] [PASSED] negative src
[22:07:34] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[22:07:34] ============ [PASSED] drm_test_rect_calc_vscale ============
[22:07:34] ================== drm_test_rect_rotate  ===================
[22:07:34] [PASSED] reflect-x
[22:07:34] [PASSED] reflect-y
[22:07:34] [PASSED] rotate-0
[22:07:34] [PASSED] rotate-90
[22:07:34] [PASSED] rotate-180
[22:07:34] [PASSED] rotate-270
[22:07:34] ============== [PASSED] drm_test_rect_rotate ===============
[22:07:34] ================ drm_test_rect_rotate_inv  =================
[22:07:34] [PASSED] reflect-x
[22:07:34] [PASSED] reflect-y
[22:07:34] [PASSED] rotate-0
[22:07:34] [PASSED] rotate-90
[22:07:34] [PASSED] rotate-180
[22:07:34] [PASSED] rotate-270
[22:07:34] ============ [PASSED] drm_test_rect_rotate_inv =============
[22:07:34] ==================== [PASSED] drm_rect =====================
[22:07:34] ============ drm_sysfb_modeset_test (1 subtest) ============
[22:07:34] ============ drm_test_sysfb_build_fourcc_list  =============
[22:07:34] [PASSED] no native formats
[22:07:34] [PASSED] XRGB8888 as native format
[22:07:34] [PASSED] remove duplicates
[22:07:34] [PASSED] convert alpha formats
[22:07:34] [PASSED] random formats
[22:07:34] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[22:07:34] ============= [PASSED] drm_sysfb_modeset_test ==============
[22:07:34] ================== drm_fixp (2 subtests) ===================
[22:07:34] [PASSED] drm_test_int2fixp
[22:07:34] [PASSED] drm_test_sm2fixp
[22:07:34] ==================== [PASSED] drm_fixp =====================
[22:07:34] ============================================================
[22:07:34] Testing complete. Ran 621 tests: passed: 621
[22:07:34] Elapsed time: 26.216s total, 1.686s configuring, 24.361s building, 0.134s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[22:07:34] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[22:07:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[22:07:45] Starting KUnit Kernel (1/1)...
[22:07:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[22:07:45] ================= ttm_device (5 subtests) ==================
[22:07:45] [PASSED] ttm_device_init_basic
[22:07:45] [PASSED] ttm_device_init_multiple
[22:07:45] [PASSED] ttm_device_fini_basic
[22:07:45] [PASSED] ttm_device_init_no_vma_man
[22:07:45] ================== ttm_device_init_pools  ==================
[22:07:45] [PASSED] No DMA allocations, no DMA32 required
[22:07:45] [PASSED] DMA allocations, DMA32 required
[22:07:45] [PASSED] No DMA allocations, DMA32 required
[22:07:45] [PASSED] DMA allocations, no DMA32 required
[22:07:45] ============== [PASSED] ttm_device_init_pools ==============
[22:07:45] =================== [PASSED] ttm_device ====================
[22:07:45] ================== ttm_pool (8 subtests) ===================
[22:07:45] ================== ttm_pool_alloc_basic  ===================
[22:07:45] [PASSED] One page
[22:07:45] [PASSED] More than one page
[22:07:45] [PASSED] Above the allocation limit
[22:07:45] [PASSED] One page, with coherent DMA mappings enabled
[22:07:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:07:45] ============== [PASSED] ttm_pool_alloc_basic ===============
[22:07:45] ============== ttm_pool_alloc_basic_dma_addr  ==============
[22:07:45] [PASSED] One page
[22:07:45] [PASSED] More than one page
[22:07:45] [PASSED] Above the allocation limit
[22:07:45] [PASSED] One page, with coherent DMA mappings enabled
[22:07:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[22:07:45] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[22:07:45] [PASSED] ttm_pool_alloc_order_caching_match
[22:07:45] [PASSED] ttm_pool_alloc_caching_mismatch
[22:07:45] [PASSED] ttm_pool_alloc_order_mismatch
[22:07:45] [PASSED] ttm_pool_free_dma_alloc
[22:07:45] [PASSED] ttm_pool_free_no_dma_alloc
[22:07:45] [PASSED] ttm_pool_fini_basic
[22:07:45] ==================== [PASSED] ttm_pool =====================
[22:07:45] ================ ttm_resource (8 subtests) =================
[22:07:45] ================= ttm_resource_init_basic  =================
[22:07:45] [PASSED] Init resource in TTM_PL_SYSTEM
[22:07:45] [PASSED] Init resource in TTM_PL_VRAM
[22:07:45] [PASSED] Init resource in a private placement
[22:07:45] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[22:07:45] ============= [PASSED] ttm_resource_init_basic =============
[22:07:45] [PASSED] ttm_resource_init_pinned
[22:07:45] [PASSED] ttm_resource_fini_basic
[22:07:45] [PASSED] ttm_resource_manager_init_basic
[22:07:45] [PASSED] ttm_resource_manager_usage_basic
[22:07:45] [PASSED] ttm_resource_manager_set_used_basic
[22:07:45] [PASSED] ttm_sys_man_alloc_basic
[22:07:45] [PASSED] ttm_sys_man_free_basic
[22:07:45] ================== [PASSED] ttm_resource ===================
[22:07:45] =================== ttm_tt (15 subtests) ===================
[22:07:45] ==================== ttm_tt_init_basic  ====================
[22:07:45] [PASSED] Page-aligned size
[22:07:45] [PASSED] Extra pages requested
[22:07:45] ================ [PASSED] ttm_tt_init_basic ================
[22:07:45] [PASSED] ttm_tt_init_misaligned
[22:07:45] [PASSED] ttm_tt_fini_basic
[22:07:45] [PASSED] ttm_tt_fini_sg
[22:07:45] [PASSED] ttm_tt_fini_shmem
[22:07:45] [PASSED] ttm_tt_create_basic
[22:07:45] [PASSED] ttm_tt_create_invalid_bo_type
[22:07:45] [PASSED] ttm_tt_create_ttm_exists
[22:07:45] [PASSED] ttm_tt_create_failed
[22:07:45] [PASSED] ttm_tt_destroy_basic
[22:07:45] [PASSED] ttm_tt_populate_null_ttm
[22:07:45] [PASSED] ttm_tt_populate_populated_ttm
[22:07:45] [PASSED] ttm_tt_unpopulate_basic
[22:07:45] [PASSED] ttm_tt_unpopulate_empty_ttm
[22:07:45] [PASSED] ttm_tt_swapin_basic
[22:07:45] ===================== [PASSED] ttm_tt ======================
[22:07:45] =================== ttm_bo (14 subtests) ===================
[22:07:45] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[22:07:45] [PASSED] Cannot be interrupted and sleeps
[22:07:45] [PASSED] Cannot be interrupted, locks straight away
[22:07:45] [PASSED] Can be interrupted, sleeps
[22:07:45] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[22:07:45] [PASSED] ttm_bo_reserve_locked_no_sleep
[22:07:45] [PASSED] ttm_bo_reserve_no_wait_ticket
[22:07:45] [PASSED] ttm_bo_reserve_double_resv
[22:07:45] [PASSED] ttm_bo_reserve_interrupted
[22:07:45] [PASSED] ttm_bo_reserve_deadlock
[22:07:45] [PASSED] ttm_bo_unreserve_basic
[22:07:45] [PASSED] ttm_bo_unreserve_pinned
[22:07:45] [PASSED] ttm_bo_unreserve_bulk
[22:07:45] [PASSED] ttm_bo_fini_basic
[22:07:45] [PASSED] ttm_bo_fini_shared_resv
[22:07:45] [PASSED] ttm_bo_pin_basic
[22:07:45] [PASSED] ttm_bo_pin_unpin_resource
[22:07:45] [PASSED] ttm_bo_multiple_pin_one_unpin
[22:07:45] ===================== [PASSED] ttm_bo ======================
[22:07:45] ============== ttm_bo_validate (22 subtests) ===============
[22:07:45] ============== ttm_bo_init_reserved_sys_man  ===============
[22:07:45] [PASSED] Buffer object for userspace
[22:07:45] [PASSED] Kernel buffer object
[22:07:45] [PASSED] Shared buffer object
[22:07:45] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[22:07:45] ============== ttm_bo_init_reserved_mock_man  ==============
[22:07:45] [PASSED] Buffer object for userspace
[22:07:45] [PASSED] Kernel buffer object
[22:07:45] [PASSED] Shared buffer object
[22:07:45] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[22:07:45] [PASSED] ttm_bo_init_reserved_resv
[22:07:45] ================== ttm_bo_validate_basic  ==================
[22:07:45] [PASSED] Buffer object for userspace
[22:07:45] [PASSED] Kernel buffer object
[22:07:45] [PASSED] Shared buffer object
[22:07:45] ============== [PASSED] ttm_bo_validate_basic ==============
[22:07:45] [PASSED] ttm_bo_validate_invalid_placement
[22:07:45] ============= ttm_bo_validate_same_placement  ==============
[22:07:45] [PASSED] System manager
[22:07:45] [PASSED] VRAM manager
[22:07:45] ========= [PASSED] ttm_bo_validate_same_placement ==========
[22:07:45] [PASSED] ttm_bo_validate_failed_alloc
[22:07:45] [PASSED] ttm_bo_validate_pinned
[22:07:45] [PASSED] ttm_bo_validate_busy_placement
[22:07:45] ================ ttm_bo_validate_multihop  =================
[22:07:45] [PASSED] Buffer object for userspace
[22:07:45] [PASSED] Kernel buffer object
[22:07:45] [PASSED] Shared buffer object
[22:07:45] ============ [PASSED] ttm_bo_validate_multihop =============
[22:07:45] ========== ttm_bo_validate_no_placement_signaled  ==========
[22:07:45] [PASSED] Buffer object in system domain, no page vector
[22:07:45] [PASSED] Buffer object in system domain with an existing page vector
[22:07:45] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[22:07:45] ======== ttm_bo_validate_no_placement_not_signaled  ========
[22:07:45] [PASSED] Buffer object for userspace
[22:07:45] [PASSED] Kernel buffer object
[22:07:45] [PASSED] Shared buffer object
[22:07:45] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[22:07:45] [PASSED] ttm_bo_validate_move_fence_signaled
[22:07:45] ========= ttm_bo_validate_move_fence_not_signaled  =========
[22:07:45] [PASSED] Waits for GPU
[22:07:45] [PASSED] Tries to lock straight away
[22:07:45] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[22:07:45] [PASSED] ttm_bo_validate_swapout
[22:07:45] [PASSED] ttm_bo_validate_happy_evict
[22:07:45] [PASSED] ttm_bo_validate_all_pinned_evict
[22:07:45] [PASSED] ttm_bo_validate_allowed_only_evict
[22:07:45] [PASSED] ttm_bo_validate_deleted_evict
[22:07:45] [PASSED] ttm_bo_validate_busy_domain_evict
[22:07:45] [PASSED] ttm_bo_validate_evict_gutting
[22:07:45] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[22:07:45] ================= [PASSED] ttm_bo_validate =================
[22:07:45] ============================================================
[22:07:45] Testing complete. Ran 102 tests: passed: 102
[22:07:45] Elapsed time: 11.241s total, 1.733s configuring, 9.292s building, 0.189s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Introduce Xe PCIe FLR (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1392 bytes --]

== Series Details ==

Series: Introduce Xe PCIe FLR (rev4)
URL   : https://patchwork.freedesktop.org/series/162055/
State : success

== Summary ==

CI Bug Log - changes from xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e_BAT -> xe-pw-162055v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (14 -> 14)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-162055v4_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [PASS][1] -> [FAIL][2] ([Intel XE#6520])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v4/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520


Build changes
-------------

  * Linux: xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e -> xe-pw-162055v4

  IGT_8834: 8834
  xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e: 7556ae31e73dcad3716592bbdfd19068164c6a0e
  xe-pw-162055v4: 162055v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v4/index.html

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✗ Xe.CI.FULL: failure for Introduce Xe PCIe FLR (rev4)

[Patchwork]

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== Series Details ==

Series: Introduce Xe PCIe FLR (rev4)
URL   : https://patchwork.freedesktop.org/series/162055/
State : failure

== Summary ==

CI Bug Log - changes from xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e_FULL -> xe-pw-162055v4_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-162055v4_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-162055v4_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-162055v4_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_vblank@ts-continuation-suspend:
    - shard-lnl:          [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e/shard-lnl-3/igt@kms_vblank@ts-continuation-suspend.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v4/shard-lnl-7/igt@kms_vblank@ts-continuation-suspend.html

  
Known issues
------------

  Here are the changes found in xe-pw-162055v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
    - shard-lnl:          [PASS][3] -> [FAIL][4] ([Intel XE#5625])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e/shard-lnl-7/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v4/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [FAIL][5] ([Intel XE#301]) -> [PASS][6] +1 other test pass
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v4/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-lnl:          [FAIL][7] ([Intel XE#7340]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e/shard-lnl-1/igt@kms_pm_dc@dc5-psr.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v4/shard-lnl-3/igt@kms_pm_dc@dc5-psr.html

  
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#7340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7340


Build changes
-------------

  * Linux: xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e -> xe-pw-162055v4

  IGT_8834: 8834
  xe-4812-7556ae31e73dcad3716592bbdfd19068164c6a0e: 7556ae31e73dcad3716592bbdfd19068164c6a0e
  xe-pw-162055v4: 162055v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v4/index.html

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