From: Raag Jadav <raag.jadav@intel.com>
To: Riana Tauro <riana.tauro@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, aravind.iddamsetty@linux.intel.com,
badal.nilawar@intel.com, ravi.kishore.koppuravuri@intel.com,
mallesh.koujalagi@intel.com, soham.purkait@intel.com
Subject: Re: [PATCH v3 08/10] drm/xe/xe_ras: Add structures for SoC Internal errors
Date: Wed, 8 Apr 2026 13:18:28 +0200 [thread overview]
Message-ID: <adY5hH7l-HiXt-Fu@black.igk.intel.com> (raw)
In-Reply-To: <20260402070131.1603828-20-riana.tauro@intel.com>
On Thu, Apr 02, 2026 at 12:31:39PM +0530, Riana Tauro wrote:
> Add response structures for SoC Internal errors.
This looks like should be squashed with next patch, or did I miss something?
Raag
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> v2: simplify soc structures
> ---
> drivers/gpu/drm/xe/xe_ras_types.h | 51 +++++++++++++++++++++++++++++++
> 1 file changed, 51 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
> index e37dd12bffa3..65158bf716a7 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -10,6 +10,7 @@
>
> #define XE_RAS_NUM_ERROR_ARR 3
> #define XE_RAS_MAX_ERROR_DETAILS 16
> +#define XE_RAS_IEH_PUNIT_ERROR BIT(1)
>
> /**
> * enum xe_ras_recovery_action - RAS recovery actions
> @@ -149,4 +150,54 @@ struct xe_ras_compute_error {
> u32 spare_log3;
> } __packed;
>
> +/**
> + * struct xe_ras_soc_error_source - Source of SOC error
> + */
> +struct xe_ras_soc_error_source {
> + /** @csc: CSC error */
> + u32 csc:1;
> + /** @soc: SOC error */
> + u32 soc:1;
> + /** @reserved: Reserved for future use */
> + u32 reserved:30;
> +} __packed;
> +
> +/**
> + * struct xe_ras_soc_error - SOC error details
> + */
> +struct xe_ras_soc_error {
> + /** @error_source: Error Source */
> + struct xe_ras_soc_error_source error_source;
> + /** @additional_details: Additional details */
> + u32 additional_details[15];
> +} __packed;
> +
> +/**
> + * struct xe_ras_csc_error - CSC error details
> + */
> +struct xe_ras_csc_error {
> + /** @hec_uncorr_err_status: CSC error */
> + u32 hec_uncorr_err_status;
> + /** @hec_uncorr_fw_err_dw0: CSC f/w error */
> + u32 hec_uncorr_fw_err_dw0;
> +} __packed;
> +
> +/**
> + * struct xe_ras_ieh_error - SoC IEH (Integrated Error Handler) details
> + */
> +struct xe_ras_ieh_error {
> + /** @ieh_instance: IEH instance */
> + u32 ieh_instance:2;
> + /** @reserved: Reserved for future use */
> + u32 reserved:30;
> + /** @global_error_status: Global error status */
> + u32 global_error_status;
> + /** @local_error_status: Local error status */
> + u32 local_error_status;
> + /** @gerr_mask: Global error mask */
> + u32 gerr_mask;
> + /** @additional_info: Additional information */
> + u32 additional_info[10];
> +} __packed;
> +
> #endif
> --
> 2.47.1
>
next prev parent reply other threads:[~2026-04-08 11:18 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-02 7:01 [PATCH v3 00/10] Introduce Xe Uncorrectable Error Handling Riana Tauro
2026-04-02 7:01 ` [PATCH v3 01/10] drm/xe/xe_survivability: Decouple survivability info from boot survivability Riana Tauro
2026-04-02 7:01 ` [PATCH v3 02/10] drm/xe/xe_pci_error: Implement PCI error recovery callbacks Riana Tauro
2026-04-07 4:50 ` Matthew Brost
2026-04-02 7:01 ` [PATCH v3 03/10] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset Riana Tauro
2026-04-02 7:01 ` [PATCH v3 04/10] drm/xe: Skip device access during PCI error recovery Riana Tauro
2026-04-02 7:01 ` [PATCH v3 05/10] drm/xe/xe_ras: Initialize Uncorrectable AER Registers Riana Tauro
2026-04-07 5:50 ` Raag Jadav
2026-04-02 7:01 ` [PATCH v3 06/10] drm/xe/xe_ras: Add structures and commands for Uncorrectable Core Compute Errors Riana Tauro
2026-04-07 5:59 ` Raag Jadav
2026-04-02 7:01 ` [PATCH v3 07/10] drm/xe/xe_ras: Add support for Uncorrectable Core-Compute errors Riana Tauro
2026-04-08 11:15 ` Raag Jadav
2026-04-02 7:01 ` [PATCH v3 08/10] drm/xe/xe_ras: Add structures for SoC Internal errors Riana Tauro
2026-04-08 11:18 ` Raag Jadav [this message]
2026-04-02 7:01 ` [PATCH v3 09/10] drm/xe/xe_ras: Handle Uncorrectable " Riana Tauro
2026-04-02 7:01 ` [PATCH v3 10/10] drm/xe/xe_pci_error: Process errors in mmio_enabled Riana Tauro
2026-04-02 8:01 ` ✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev3) Patchwork
2026-04-02 8:02 ` ✓ CI.KUnit: success " Patchwork
2026-04-02 8:50 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-02 15:08 ` ✓ Xe.CI.FULL: " Patchwork
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