[PATCH v3 00/10] Introduce Xe Uncorrectable Error Handling

[PATCH v3 00/10] Introduce Xe Uncorrectable Error Handling

[Riana Tauro]

This series adds the base support for XE Uncorrectable Error Handling
on top of the system controller patch [1].

The first four patches implement PCI error recovery callbacks for AER events.
On fatal errors, the device is wedged in error_detected and a Secondary
Bus reset (SBR) is requested from PCI core by returning
PCI_ERS_RESULT_NEED_RESET.

On non-fatal errors, the mmio_enabled callback is invoked to query the
error and attempt the required recovery.

This series adds support for handling Uncorrectable Core compute
and SoC internal errors.

Core Compute Errors: Uncorrectable Core-Compute errors are classified
into Global and Local errors.
Global error is an error that affects the entire device requiring
a reset to recover. When an AER is reported and error_detected is invoked
return PCI_ERS_RESULT_NEED_RESET.
A Local error is confined to a specific component or context like a
engine. These errors can be contained and recovered by resetting
only the affected part without distrupting the rest of the device.

SoC Internal errors: Most of the uncorrectable SoC internal errors
are recovered using a SBR apart from CSC firmware and Punit errors.
CSC firmware errors requires a firmware flash to be recovered whereas
Punit error requires cold-reset.

Rev2: Add support for SoC internal errors
      fix review comments

Rev3: remove in_recovery flag for disconnect error
      prevent sysctrl flooding
      use minimal logging
      simplify soc structures
      add error_count to GT structures

Riana Tauro (10):
  drm/xe/xe_survivability: Decouple survivability info from boot
    survivability
  drm/xe/xe_pci_error: Implement PCI error recovery callbacks
  drm/xe/xe_pci_error: Group all devres to release them on PCIe slot
    reset
  drm/xe: Skip device access during PCI error recovery
  drm/xe/xe_ras: Initialize Uncorrectable AER Registers
  drm/xe/xe_ras: Add structures and commands for Uncorrectable Core
    Compute Errors
  drm/xe/xe_ras: Add support for Uncorrectable Core-Compute errors
  drm/xe/xe_ras: Add structures for SoC Internal errors
  drm/xe/xe_ras: Handle Uncorrectable SoC Internal errors
  drm/xe/xe_pci_error: Process errors in mmio_enabled

 drivers/gpu/drm/xe/Makefile                   |   2 +
 drivers/gpu/drm/xe/xe_device.c                |  10 +
 drivers/gpu/drm/xe/xe_device.h                |  15 +
 drivers/gpu/drm/xe/xe_device_types.h          |   6 +
 drivers/gpu/drm/xe/xe_gt.c                    |  14 +-
 drivers/gpu/drm/xe/xe_guc_submit.c            |   9 +-
 drivers/gpu/drm/xe/xe_pci.c                   |   3 +
 drivers/gpu/drm/xe/xe_pci_error.c             | 118 +++++++
 drivers/gpu/drm/xe/xe_ras.c                   | 313 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h                   |  16 +
 drivers/gpu/drm/xe/xe_ras_types.h             | 203 ++++++++++++
 drivers/gpu/drm/xe/xe_survivability_mode.c    |  12 +-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  13 +
 13 files changed, 726 insertions(+), 8 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c
 create mode 100644 drivers/gpu/drm/xe/xe_ras.c
 create mode 100644 drivers/gpu/drm/xe/xe_ras.h
 create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h

-- 
2.47.1

[PATCH v3 01/10] drm/xe/xe_survivability: Decouple survivability info from boot survivability

[Riana Tauro]

On CSC runtime firmware errors that requires firmware flash through SPI,
PCODE sets the FDO mode bit in the Capability register.
Currently the survivability_info group is created only for boot
survivability.

Create survivability_info group even for runtime survivability to allow
userspace to check FDO mode sysfs.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: Fix typo (Mallesh)
---
 drivers/gpu/drm/xe/xe_survivability_mode.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
index db64cac39c94..ad51a58831b0 100644
--- a/drivers/gpu/drm/xe/xe_survivability_mode.c
+++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
@@ -98,6 +98,15 @@
  *	# cat /sys/bus/pci/devices/<device>/survivability_mode
  *	  Runtime
  *
+ * On some CSC firmware errors, PCODE sets FDO mode and the only recovery possible is through
+ * firmware flash using SPI driver. Userspace can check if FDO mode is set by checking the below
+ * sysfs entry.
+ *
+ * .. code-block:: shell
+ *
+ *	# cat /sys/bus/pci/devices/<device>/survivability_info/fdo_mode
+ *       enabled
+ *
  * When such errors occur, userspace is notified with the drm device wedged uevent and runtime
  * survivability mode. User can then initiate a firmware flash using userspace tools like fwupd
  * to restore device to normal operation.
@@ -296,7 +305,8 @@ static int create_survivability_sysfs(struct pci_dev *pdev)
 	if (ret)
 		return ret;
 
-	if (check_boot_failure(xe)) {
+	/* Survivability info is not required if enabled via configfs */
+	if (!xe_configfs_get_survivability_mode(pdev)) {
 		ret = devm_device_add_group(dev, &survivability_info_group);
 		if (ret)
 			return ret;
-- 
2.47.1

[PATCH v3 02/10] drm/xe/xe_pci_error: Implement PCI error recovery callbacks

[Riana Tauro]

Add error_detected, mmio_enabled, slot_reset and resume
recovery callbacks to handle PCIe Advanced Error Reporting
(AER) errors.

For fatal errors, the device is wedged and becomes
inaccessible. Return PCI_ERS_RESULT_SLOT_RESET from
error_detected to request a Secondary Bus Reset (SBR).

For non-fatal errors, return PCI_ERS_RESULT_CAN_RECOVER from
error_detected to trigger the mmio_enabled callback. In this callback,
the device is queried to determine the error cause and attempt
recovery based on the error type.

Once the secondary bus reset(SBR) is completed the slot_reset callback
cleanly removes and reprobe the device to restore functionality.

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: re-order linux headers
    reword error messages
    do not clear in_recovery after remove
    return PCI_ERS_RESULT_DISCONNECT if probe fails (Michal)
    only wedge device do not send uevent (Raag)
    set recovery flag in error_detected and clear on resume
    add default switch case (Mallesh)

v3: do not set in_recovery for disconnect (Mallesh)
    return if already wedged or in survivability mode
---
 drivers/gpu/drm/xe/Makefile          |   1 +
 drivers/gpu/drm/xe/xe_device.h       |  15 ++++
 drivers/gpu/drm/xe/xe_device_types.h |   3 +
 drivers/gpu/drm/xe/xe_pci.c          |   3 +
 drivers/gpu/drm/xe/xe_pci_error.c    | 104 +++++++++++++++++++++++++++
 5 files changed, 126 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 9dacb0579a7d..7f03f06df186 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -100,6 +100,7 @@ xe-y += xe_bb.o \
 	xe_page_reclaim.o \
 	xe_pat.o \
 	xe_pci.o \
+	xe_pci_error.o \
 	xe_pci_rebar.o \
 	xe_pcode.o \
 	xe_pm.o \
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index e4b9de8d8e95..60db2492cb92 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -43,6 +43,21 @@ static inline struct xe_device *ttm_to_xe_device(struct ttm_device *ttm)
 	return container_of(ttm, struct xe_device, ttm);
 }
 
+static inline bool xe_device_is_in_recovery(struct xe_device *xe)
+{
+	return atomic_read(&xe->in_recovery);
+}
+
+static inline void xe_device_set_in_recovery(struct xe_device *xe)
+{
+	atomic_set(&xe->in_recovery, 1);
+}
+
+static inline void xe_device_clear_in_recovery(struct xe_device *xe)
+{
+	 atomic_set(&xe->in_recovery, 0);
+}
+
 struct xe_device *xe_device_create(struct pci_dev *pdev,
 				   const struct pci_device_id *ent);
 int xe_device_probe_early(struct xe_device *xe);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 150c76b2acaf..c9fe86b670bd 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -494,6 +494,9 @@ struct xe_device {
 		bool inconsistent_reset;
 	} wedged;
 
+	/** @in_recovery: Indicates if device is in recovery */
+	atomic_t in_recovery;
+
 	/** @bo_device: Struct to control async free of BOs */
 	struct xe_bo_dev {
 		/** @bo_device.async_free: Free worker */
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 1df3f08e2e1c..30d71795dd2e 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1323,6 +1323,8 @@ static const struct dev_pm_ops xe_pm_ops = {
 };
 #endif
 
+extern const struct pci_error_handlers xe_pci_error_handlers;
+
 static struct pci_driver xe_pci_driver = {
 	.name = DRIVER_NAME,
 	.id_table = pciidlist,
@@ -1330,6 +1332,7 @@ static struct pci_driver xe_pci_driver = {
 	.remove = xe_pci_remove,
 	.shutdown = xe_pci_shutdown,
 	.sriov_configure = xe_pci_sriov_configure,
+	.err_handler = &xe_pci_error_handlers,
 #ifdef CONFIG_PM_SLEEP
 	.driver.pm = &xe_pm_ops,
 #endif
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
new file mode 100644
index 000000000000..cd9f39010278
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -0,0 +1,104 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+#include <linux/pci.h>
+
+#include <drm/drm_drv.h>
+
+#include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_pci.h"
+#include "xe_survivability_mode.h"
+#include "xe_uc.h"
+
+static void xe_pci_error_handling(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	struct xe_gt *gt;
+	u8 id;
+
+	/* Return if device is wedged or in survivability mode */
+	if (xe_survivability_mode_is_boot_enabled(xe) || xe_device_wedged(xe))
+		return;
+
+	/* Wedge the device to prevent userspace access but don't send the event yet */
+	atomic_set(&xe->wedged.flag, 1);
+
+	for_each_gt(gt, xe, id)
+		xe_gt_declare_wedged(gt);
+
+	pci_disable_device(pdev);
+}
+
+static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	dev_err(&pdev->dev, "Xe Pci error recovery: error detected state %d\n", state);
+
+	if (state == pci_channel_io_perm_failure)
+		return PCI_ERS_RESULT_DISCONNECT;
+
+	xe_device_set_in_recovery(xe);
+
+	switch (state) {
+	case pci_channel_io_normal:
+		return PCI_ERS_RESULT_CAN_RECOVER;
+	case pci_channel_io_frozen:
+		xe_pci_error_handling(pdev);
+		return PCI_ERS_RESULT_NEED_RESET;
+	default:
+		dev_err(&pdev->dev, "Unknown state %d\n", state);
+		return PCI_ERS_RESULT_NEED_RESET;
+	}
+}
+
+static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
+{
+	dev_err(&pdev->dev, "Xe Pci error recovery: MMIO enabled\n");
+
+	return PCI_ERS_RESULT_NEED_RESET;
+}
+
+static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
+{
+	const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
+
+	dev_err(&pdev->dev, "Xe Pci error recovery: Slot reset\n");
+
+	pci_restore_state(pdev);
+
+	if (pci_enable_device(pdev)) {
+		dev_err(&pdev->dev,
+			"Cannot re-enable PCI device after reset\n");
+		return PCI_ERS_RESULT_DISCONNECT;
+	}
+
+	/*
+	 * Secondary Bus Reset wipes out all device memory
+	 * requiring XE KMD to perform a device removal and reprobe.
+	 */
+	pdev->driver->remove(pdev);
+
+	if (!pdev->driver->probe(pdev, ent))
+		return PCI_ERS_RESULT_RECOVERED;
+
+	return PCI_ERS_RESULT_DISCONNECT;
+}
+
+static void xe_pci_error_resume(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	dev_info(&pdev->dev, "Xe Pci error recovery: Recovered\n");
+
+	xe_device_clear_in_recovery(xe);
+}
+
+const struct pci_error_handlers xe_pci_error_handlers = {
+	.error_detected	= xe_pci_error_detected,
+	.mmio_enabled	= xe_pci_error_mmio_enabled,
+	.slot_reset	= xe_pci_error_slot_reset,
+	.resume		= xe_pci_error_resume,
+};
-- 
2.47.1

Re: [PATCH v3 02/10] drm/xe/xe_pci_error: Implement PCI error recovery callbacks

[Matthew Brost]

On Thu, Apr 02, 2026 at 12:31:33PM +0530, Riana Tauro wrote:
> Add error_detected, mmio_enabled, slot_reset and resume
> recovery callbacks to handle PCIe Advanced Error Reporting
> (AER) errors.
> 
> For fatal errors, the device is wedged and becomes
> inaccessible. Return PCI_ERS_RESULT_SLOT_RESET from
> error_detected to request a Secondary Bus Reset (SBR).
> 
> For non-fatal errors, return PCI_ERS_RESULT_CAN_RECOVER from
> error_detected to trigger the mmio_enabled callback. In this callback,
> the device is queried to determine the error cause and attempt
> recovery based on the error type.
> 
> Once the secondary bus reset(SBR) is completed the slot_reset callback
> cleanly removes and reprobe the device to restore functionality.
> 
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> v2: re-order linux headers
>     reword error messages
>     do not clear in_recovery after remove
>     return PCI_ERS_RESULT_DISCONNECT if probe fails (Michal)
>     only wedge device do not send uevent (Raag)
>     set recovery flag in error_detected and clear on resume
>     add default switch case (Mallesh)
> 
> v3: do not set in_recovery for disconnect (Mallesh)
>     return if already wedged or in survivability mode
> ---
>  drivers/gpu/drm/xe/Makefile          |   1 +
>  drivers/gpu/drm/xe/xe_device.h       |  15 ++++
>  drivers/gpu/drm/xe/xe_device_types.h |   3 +
>  drivers/gpu/drm/xe/xe_pci.c          |   3 +
>  drivers/gpu/drm/xe/xe_pci_error.c    | 104 +++++++++++++++++++++++++++
>  5 files changed, 126 insertions(+)
>  create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c
> 
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 9dacb0579a7d..7f03f06df186 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -100,6 +100,7 @@ xe-y += xe_bb.o \
>  	xe_page_reclaim.o \
>  	xe_pat.o \
>  	xe_pci.o \
> +	xe_pci_error.o \
>  	xe_pci_rebar.o \
>  	xe_pcode.o \
>  	xe_pm.o \
> diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
> index e4b9de8d8e95..60db2492cb92 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -43,6 +43,21 @@ static inline struct xe_device *ttm_to_xe_device(struct ttm_device *ttm)
>  	return container_of(ttm, struct xe_device, ttm);
>  }
>  
> +static inline bool xe_device_is_in_recovery(struct xe_device *xe)
> +{
> +	return atomic_read(&xe->in_recovery);
> +}
> +
> +static inline void xe_device_set_in_recovery(struct xe_device *xe)
> +{
> +	atomic_set(&xe->in_recovery, 1);
> +}
> +
> +static inline void xe_device_clear_in_recovery(struct xe_device *xe)
> +{
> +	 atomic_set(&xe->in_recovery, 0);
> +}
> +
>  struct xe_device *xe_device_create(struct pci_dev *pdev,
>  				   const struct pci_device_id *ent);
>  int xe_device_probe_early(struct xe_device *xe);
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 150c76b2acaf..c9fe86b670bd 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -494,6 +494,9 @@ struct xe_device {
>  		bool inconsistent_reset;
>  	} wedged;
>  
> +	/** @in_recovery: Indicates if device is in recovery */
> +	atomic_t in_recovery;
> +
>  	/** @bo_device: Struct to control async free of BOs */
>  	struct xe_bo_dev {
>  		/** @bo_device.async_free: Free worker */
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 1df3f08e2e1c..30d71795dd2e 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -1323,6 +1323,8 @@ static const struct dev_pm_ops xe_pm_ops = {
>  };
>  #endif
>  
> +extern const struct pci_error_handlers xe_pci_error_handlers;
> +
>  static struct pci_driver xe_pci_driver = {
>  	.name = DRIVER_NAME,
>  	.id_table = pciidlist,
> @@ -1330,6 +1332,7 @@ static struct pci_driver xe_pci_driver = {
>  	.remove = xe_pci_remove,
>  	.shutdown = xe_pci_shutdown,
>  	.sriov_configure = xe_pci_sriov_configure,
> +	.err_handler = &xe_pci_error_handlers,
>  #ifdef CONFIG_PM_SLEEP
>  	.driver.pm = &xe_pm_ops,
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> new file mode 100644
> index 000000000000..cd9f39010278
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -0,0 +1,104 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +#include <linux/pci.h>
> +
> +#include <drm/drm_drv.h>
> +
> +#include "xe_device.h"
> +#include "xe_gt.h"
> +#include "xe_pci.h"
> +#include "xe_survivability_mode.h"
> +#include "xe_uc.h"
> +
> +static void xe_pci_error_handling(struct pci_dev *pdev)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +	struct xe_gt *gt;
> +	u8 id;
> +
> +	/* Return if device is wedged or in survivability mode */
> +	if (xe_survivability_mode_is_boot_enabled(xe) || xe_device_wedged(xe))
> +		return;
> +
> +	/* Wedge the device to prevent userspace access but don't send the event yet */
> +	atomic_set(&xe->wedged.flag, 1);

We can't blindly set '&xe->wedged.flag, 1' as this is tied to a PM ref
[1], [2]. The existing sematic might be wrong but we to normalize
adjustmets to the '&xe->wedged.flag' field with uniform rules, or the
cases when we wedge we also take a PM ref.

Matt

[1] https://patchwork.freedesktop.org/patch/714622/?series=163948&rev=1
[2] https://patchwork.freedesktop.org/patch/715028/?series=162055&rev=4#comment_1315905

> +
> +	for_each_gt(gt, xe, id)
> +		xe_gt_declare_wedged(gt);
> +
> +	pci_disable_device(pdev);
> +}
> +
> +static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +
> +	dev_err(&pdev->dev, "Xe Pci error recovery: error detected state %d\n", state);
> +
> +	if (state == pci_channel_io_perm_failure)
> +		return PCI_ERS_RESULT_DISCONNECT;
> +
> +	xe_device_set_in_recovery(xe);
> +
> +	switch (state) {
> +	case pci_channel_io_normal:
> +		return PCI_ERS_RESULT_CAN_RECOVER;
> +	case pci_channel_io_frozen:
> +		xe_pci_error_handling(pdev);
> +		return PCI_ERS_RESULT_NEED_RESET;
> +	default:
> +		dev_err(&pdev->dev, "Unknown state %d\n", state);
> +		return PCI_ERS_RESULT_NEED_RESET;
> +	}
> +}
> +
> +static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
> +{
> +	dev_err(&pdev->dev, "Xe Pci error recovery: MMIO enabled\n");
> +
> +	return PCI_ERS_RESULT_NEED_RESET;
> +}
> +
> +static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
> +{
> +	const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
> +
> +	dev_err(&pdev->dev, "Xe Pci error recovery: Slot reset\n");
> +
> +	pci_restore_state(pdev);
> +
> +	if (pci_enable_device(pdev)) {
> +		dev_err(&pdev->dev,
> +			"Cannot re-enable PCI device after reset\n");
> +		return PCI_ERS_RESULT_DISCONNECT;
> +	}
> +
> +	/*
> +	 * Secondary Bus Reset wipes out all device memory
> +	 * requiring XE KMD to perform a device removal and reprobe.
> +	 */
> +	pdev->driver->remove(pdev);
> +
> +	if (!pdev->driver->probe(pdev, ent))
> +		return PCI_ERS_RESULT_RECOVERED;
> +
> +	return PCI_ERS_RESULT_DISCONNECT;
> +}
> +
> +static void xe_pci_error_resume(struct pci_dev *pdev)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +
> +	dev_info(&pdev->dev, "Xe Pci error recovery: Recovered\n");
> +
> +	xe_device_clear_in_recovery(xe);
> +}
> +
> +const struct pci_error_handlers xe_pci_error_handlers = {
> +	.error_detected	= xe_pci_error_detected,
> +	.mmio_enabled	= xe_pci_error_mmio_enabled,
> +	.slot_reset	= xe_pci_error_slot_reset,
> +	.resume		= xe_pci_error_resume,
> +};
> -- 
> 2.47.1
> 

[PATCH v3 03/10] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset

[Riana Tauro]

Add devres grouping to handle device resource cleanup during
PCI error recovery.

Secondary Bus Reset (SBR) is triggered by PCI core when the
error_detected/mmio_enabled callbacks return PCI_ERS_RESULT_NEED_RESET.

Once SBR is complete, the slot_reset callback is triggered. SBR wipes
out all device memory requiring XE KMD to perform a device removal and
reprobe.
Calling xe_pci_remove() alone does not free the devres allocated.
Since there are no exported functions to release all devres, group the
devres allocations and release the entire group during slot reset to
ensure proper cleanup.

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_device.c       | 7 +++++++
 drivers/gpu/drm/xe/xe_device_types.h | 3 +++
 drivers/gpu/drm/xe/xe_pci_error.c    | 2 ++
 3 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index cbce1d0ffe48..d0b29d94edd2 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -440,6 +440,7 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
 				   const struct pci_device_id *ent)
 {
 	struct xe_device *xe;
+	void *devres_id;
 	int err;
 
 	xe_display_driver_set_hooks(&driver);
@@ -448,10 +449,16 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
 	if (err)
 		return ERR_PTR(err);
 
+	devres_id = devres_open_group(&pdev->dev, NULL, GFP_KERNEL);
+	if (!devres_id)
+		return ERR_PTR(-ENOMEM);
+
 	xe = devm_drm_dev_alloc(&pdev->dev, &driver, struct xe_device, drm);
 	if (IS_ERR(xe))
 		return xe;
 
+	xe->devres_group_id = devres_id;
+
 	err = ttm_device_init(&xe->ttm, &xe_ttm_funcs, xe->drm.dev,
 			      xe->drm.anon_inode->i_mapping,
 			      xe->drm.vma_offset_manager, 0);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index c9fe86b670bd..c89e2d31583c 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -497,6 +497,9 @@ struct xe_device {
 	/** @in_recovery: Indicates if device is in recovery */
 	atomic_t in_recovery;
 
+	/** @devres_group_id: id for devres group */
+	void *devres_group_id;
+
 	/** @bo_device: Struct to control async free of BOs */
 	struct xe_bo_dev {
 		/** @bo_device.async_free: Free worker */
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index cd9f39010278..28b2f4f7c24b 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -64,6 +64,7 @@ static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
 static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
 {
 	const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
+	struct xe_device *xe = pdev_to_xe_device(pdev);
 
 	dev_err(&pdev->dev, "Xe Pci error recovery: Slot reset\n");
 
@@ -80,6 +81,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
 	 * requiring XE KMD to perform a device removal and reprobe.
 	 */
 	pdev->driver->remove(pdev);
+	devres_release_group(&pdev->dev, xe->devres_group_id);
 
 	if (!pdev->driver->probe(pdev, ent))
 		return PCI_ERS_RESULT_RECOVERED;
-- 
2.47.1

[PATCH v3 04/10] drm/xe: Skip device access during PCI error recovery

[Riana Tauro]

When a fatal error occurs and the error_detected callback is
invoked the device is inaccessible. The error_detected callback
wedges the device causing the jobs to timeout.

The timedout handler acquires forcewake to dump devcoredump and
triggers a GT reset. Since the device is inacessible this causes
errors. Skip all mmio accesses and gt reset when the device
is in recovery.

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: add check in worker (Mallesh)
---
 drivers/gpu/drm/xe/xe_gt.c         | 14 +++++++++++---
 drivers/gpu/drm/xe/xe_guc_submit.c |  9 +++++----
 2 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 8a31c963c372..5ea5524d83af 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -917,6 +917,9 @@ static void gt_reset_worker(struct work_struct *w)
 	if (xe_device_wedged(gt_to_xe(gt)))
 		goto err_pm_put;
 
+	if (xe_device_is_in_recovery(gt_to_xe(gt)))
+		goto err_pm_put;
+
 	/* We only support GT resets with GuC submission */
 	if (!xe_device_uc_enabled(gt_to_xe(gt)))
 		goto err_pm_put;
@@ -977,18 +980,23 @@ static void gt_reset_worker(struct work_struct *w)
 
 void xe_gt_reset_async(struct xe_gt *gt)
 {
-	xe_gt_info(gt, "trying reset from %ps\n", __builtin_return_address(0));
+	struct xe_device *xe = gt_to_xe(gt);
+
+	if (xe_device_is_in_recovery(xe))
+		return;
 
 	/* Don't do a reset while one is already in flight */
 	if (!xe_fault_inject_gt_reset() && xe_uc_reset_prepare(&gt->uc))
 		return;
 
+	xe_gt_info(gt, "trying reset from %ps\n", __builtin_return_address(0));
+
 	xe_gt_info(gt, "reset queued\n");
 
 	/* Pair with put in gt_reset_worker() if work is enqueued */
-	xe_pm_runtime_get_noresume(gt_to_xe(gt));
+	xe_pm_runtime_get_noresume(xe);
 	if (!queue_work(gt->ordered_wq, &gt->reset.worker))
-		xe_pm_runtime_put(gt_to_xe(gt));
+		xe_pm_runtime_put(xe);
 }
 
 void xe_gt_suspend_prepare(struct xe_gt *gt)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 10556156eaad..1f32fb14a5c1 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1522,7 +1522,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 	 * If devcoredump not captured and GuC capture for the job is not ready
 	 * do manual capture first and decide later if we need to use it
 	 */
-	if (!exec_queue_killed(q) && !xe->devcoredump.captured &&
+	if (!xe_device_is_in_recovery(xe) && !exec_queue_killed(q) && !xe->devcoredump.captured &&
 	    !xe_guc_capture_get_matching_and_lock(q)) {
 		/* take force wake before engine register manual capture */
 		CLASS(xe_force_wake, fw_ref)(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
@@ -1544,8 +1544,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 	set_exec_queue_banned(q);
 
 	/* Kick job / queue off hardware */
-	if (!wedged && (exec_queue_enabled(primary) ||
-			exec_queue_pending_disable(primary))) {
+	if (!xe_device_is_in_recovery(xe) && !wedged &&
+	    (exec_queue_enabled(primary) || exec_queue_pending_disable(primary))) {
 		int ret;
 
 		if (exec_queue_reset(primary))
@@ -1613,7 +1613,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 
 	trace_xe_sched_job_timedout(job);
 
-	if (!exec_queue_killed(q))
+	/* Do not access device if in recovery */
+	if (!xe_device_is_in_recovery(xe) && !exec_queue_killed(q))
 		xe_devcoredump(q, job,
 			       "Timedout job - seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx",
 			       xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
-- 
2.47.1

[PATCH v3 05/10] drm/xe/xe_ras: Initialize Uncorrectable AER Registers

[Riana Tauro]

Uncorrectable errors from different endpoints in the device are steered to
the USP which is a PCI Advanced Error Reporting (AER) Compliant device.
Downgrade all the errors to non-fatal to prevent PCIe bus driver
from triggering a Secondary Bus Reset (SBR). This allows error
detection, containment and recovery in the driver.

The Uncorrectable Error Severity Register has the 'Uncorrectable
Internal Error Severity' set to fatal by default. Set this to
non-fatal and unmask the error.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: clear stale uncorrectable internal status in status register
(Aravind)
---
 drivers/gpu/drm/xe/Makefile    |  1 +
 drivers/gpu/drm/xe/xe_device.c |  3 ++
 drivers/gpu/drm/xe/xe_ras.c    | 78 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h    | 13 ++++++
 4 files changed, 95 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_ras.c
 create mode 100644 drivers/gpu/drm/xe/xe_ras.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 7f03f06df186..64b2a21239cb 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -112,6 +112,7 @@ xe-y += xe_bb.o \
 	xe_pxp_debugfs.o \
 	xe_pxp_submit.o \
 	xe_query.o \
+	xe_ras.o \
 	xe_range_fence.o \
 	xe_reg_sr.o \
 	xe_reg_whitelist.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index d0b29d94edd2..32892a1a7377 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -60,6 +60,7 @@
 #include "xe_psmi.h"
 #include "xe_pxp.h"
 #include "xe_query.h"
+#include "xe_ras.h"
 #include "xe_shrinker.h"
 #include "xe_soc_remapper.h"
 #include "xe_survivability_mode.h"
@@ -1023,6 +1024,8 @@ int xe_device_probe(struct xe_device *xe)
 
 	xe_vsec_init(xe);
 
+	xe_ras_init(xe);
+
 	err = xe_sriov_init_late(xe);
 	if (err)
 		goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
new file mode 100644
index 000000000000..bc7615c6c1be
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -0,0 +1,78 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "xe_device_types.h"
+#include "xe_ras.h"
+
+#ifdef CONFIG_PCIEAER
+static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
+{
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	struct pci_dev *vsp, *usp;
+	u32 aer_uncorr_mask, aer_uncorr_sev, aer_uncorr_status;
+	u16 aer_cap;
+
+	 /* Gfx Device Hierarchy: USP-->VSP-->SGunit */
+	vsp = pci_upstream_bridge(pdev);
+	if (!vsp)
+		return;
+
+	usp = pci_upstream_bridge(vsp);
+	if (!usp)
+		return;
+
+	aer_cap = usp->aer_cap;
+
+	if (!aer_cap)
+		return;
+
+	/*
+	 * Clear any stale Uncorrectable Internal Error Status event in Uncorrectable Error
+	 * Status Register.
+	 */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &aer_uncorr_status);
+	if (aer_uncorr_status & PCI_ERR_UNC_INTN)
+		pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, PCI_ERR_UNC_INTN);
+
+	/*
+	 * All errors are steered to USP which is a PCIe AER Compliant device.
+	 * Downgrade all the errors to non-fatal to prevent PCIe bus driver
+	 * from triggering a Secondary Bus Reset (SBR). This allows error
+	 * detection, containment and recovery in the driver.
+	 *
+	 * The Uncorrectable Error Severity Register has the 'Uncorrectable
+	 * Internal Error Severity' set to fatal by default. Set this to
+	 * non-fatal and unmask the error.
+	 */
+
+	/* Initialize Uncorrectable Error Severity Register */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, &aer_uncorr_sev);
+	aer_uncorr_sev &= ~PCI_ERR_UNC_INTN;
+	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, aer_uncorr_sev);
+
+	/* Initialize Uncorrectable Error Mask Register */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, &aer_uncorr_mask);
+	aer_uncorr_mask &= ~PCI_ERR_UNC_INTN;
+	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, aer_uncorr_mask);
+
+	pci_save_state(usp);
+}
+#endif
+
+/**
+ * xe_ras_init - Initialize Xe RAS
+ * @xe: xe device instance
+ *
+ * Initialize Xe RAS
+ */
+void xe_ras_init(struct xe_device *xe)
+{
+	if (!xe->info.has_sysctrl)
+		return;
+
+#ifdef CONFIG_PCIEAER
+	aer_unmask_and_downgrade_internal_error(xe);
+#endif
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
new file mode 100644
index 000000000000..14cb973603e7
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_H_
+#define _XE_RAS_H_
+
+struct xe_device;
+
+void xe_ras_init(struct xe_device *xe);
+
+#endif
-- 
2.47.1

Re: [PATCH v3 05/10] drm/xe/xe_ras: Initialize Uncorrectable AER Registers

[Raag Jadav]

On Thu, Apr 02, 2026 at 12:31:36PM +0530, Riana Tauro wrote:
> Uncorrectable errors from different endpoints in the device are steered to
> the USP which is a PCI Advanced Error Reporting (AER) Compliant device.

See below.

> Downgrade all the errors to non-fatal to prevent PCIe bus driver
> from triggering a Secondary Bus Reset (SBR). This allows error
> detection, containment and recovery in the driver.
> 
> The Uncorrectable Error Severity Register has the 'Uncorrectable
> Internal Error Severity' set to fatal by default. Set this to
> non-fatal and unmask the error.

...

> +static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
> +{
> +	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +	struct pci_dev *vsp, *usp;
> +	u32 aer_uncorr_mask, aer_uncorr_sev, aer_uncorr_status;
> +	u16 aer_cap;
> +
> +	 /* Gfx Device Hierarchy: USP-->VSP-->SGunit */

What are these TLAs and why is everyone expected to know them?

> +	vsp = pci_upstream_bridge(pdev);
> +	if (!vsp)
> +		return;
> +
> +	usp = pci_upstream_bridge(vsp);
> +	if (!usp)
> +		return;
> +
> +	aer_cap = usp->aer_cap;
> +
> +	if (!aer_cap)
> +		return;
> +
> +	/*
> +	 * Clear any stale Uncorrectable Internal Error Status event in Uncorrectable Error
> +	 * Status Register.
> +	 */
> +	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &aer_uncorr_status);
> +	if (aer_uncorr_status & PCI_ERR_UNC_INTN)
> +		pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, PCI_ERR_UNC_INTN);
> +
> +	/*
> +	 * All errors are steered to USP which is a PCIe AER Compliant device.

Ditto.

Raag

> +	 * Downgrade all the errors to non-fatal to prevent PCIe bus driver
> +	 * from triggering a Secondary Bus Reset (SBR). This allows error
> +	 * detection, containment and recovery in the driver.
> +	 *
> +	 * The Uncorrectable Error Severity Register has the 'Uncorrectable
> +	 * Internal Error Severity' set to fatal by default. Set this to
> +	 * non-fatal and unmask the error.
> +	 */

[PATCH v3 06/10] drm/xe/xe_ras: Add structures and commands for Uncorrectable Core Compute Errors

[Riana Tauro]

Add the sysctrl commands and response structures for Uncorrectable
Core Compute errors.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: use macro max error details (Mallesh)
    use static_assert
    fix kernel-doc

v3: simplify check (Raag)
    add counter value
---
 drivers/gpu/drm/xe/xe_ras.c                   |  55 +++++++
 drivers/gpu/drm/xe/xe_ras_types.h             | 134 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  13 ++
 3 files changed, 202 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_ras_types.h

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index bc7615c6c1be..515c28167a69 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -3,9 +3,64 @@
  * Copyright © 2026 Intel Corporation
  */
 
+#include "xe_assert.h"
 #include "xe_device_types.h"
 #include "xe_ras.h"
 
+/* Severity classification of detected errors */
+enum xe_ras_severity {
+	XE_RAS_SEVERITY_NOT_SUPPORTED = 0,
+	XE_RAS_SEVERITY_CORRECTABLE,
+	XE_RAS_SEVERITY_UNCORRECTABLE,
+	XE_RAS_SEVERITY_INFORMATIONAL,
+	XE_RAS_SEVERITY_MAX
+};
+
+/* major IP blocks where errors can originate */
+enum xe_ras_component {
+	XE_RAS_COMPONENT_NOT_SUPPORTED = 0,
+	XE_RAS_COMPONENT_DEVICE_MEMORY,
+	XE_RAS_COMPONENT_CORE_COMPUTE,
+	XE_RAS_COMPONENT_RESERVED,
+	XE_RAS_COMPONENT_PCIE,
+	XE_RAS_COMPONENT_FABRIC,
+	XE_RAS_COMPONENT_SOC_INTERNAL,
+	XE_RAS_COMPONENT_MAX
+};
+
+static const char * const xe_ras_severities[] = {
+	[XE_RAS_SEVERITY_NOT_SUPPORTED]		= "Not Supported",
+	[XE_RAS_SEVERITY_CORRECTABLE]		= "Correctable",
+	[XE_RAS_SEVERITY_UNCORRECTABLE]		= "Uncorrectable",
+	[XE_RAS_SEVERITY_INFORMATIONAL]		= "Informational",
+};
+static_assert(ARRAY_SIZE(xe_ras_severities) == XE_RAS_SEVERITY_MAX);
+
+static const char * const xe_ras_components[] = {
+	[XE_RAS_COMPONENT_NOT_SUPPORTED]	= "Not Supported",
+	[XE_RAS_COMPONENT_DEVICE_MEMORY]	= "Device Memory",
+	[XE_RAS_COMPONENT_CORE_COMPUTE]		= "Core Compute",
+	[XE_RAS_COMPONENT_RESERVED]		= "Reserved",
+	[XE_RAS_COMPONENT_PCIE]			= "PCIe",
+	[XE_RAS_COMPONENT_FABRIC]		= "Fabric",
+	[XE_RAS_COMPONENT_SOC_INTERNAL]		= "SoC Internal",
+};
+static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMPONENT_MAX);
+
+static inline const char *severity_to_str(struct xe_device *xe, u32 severity)
+{
+	xe_assert(xe, severity < XE_RAS_SEVERITY_MAX);
+
+	return severity < XE_RAS_SEVERITY_MAX ? xe_ras_severities[severity] : "Unknown";
+}
+
+static inline const char *comp_to_str(struct xe_device *xe, u32 comp)
+{
+	xe_assert(xe, comp < XE_RAS_COMPONENT_MAX);
+
+	return comp < XE_RAS_COMPONENT_MAX ? xe_ras_components[comp] : "Unknown";
+}
+
 #ifdef CONFIG_PCIEAER
 static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
 {
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
new file mode 100644
index 000000000000..ed69654e5bae
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef _XE_RAS_TYPES_H_
+#define _XE_RAS_TYPES_H_
+
+#include <linux/types.h>
+
+#define XE_RAS_NUM_ERROR_ARR		3
+#define XE_RAS_MAX_ERROR_DETAILS	16
+
+/**
+ * struct xe_ras_error_common - Common RAS error class
+ *
+ * This structure contains error severity and component information
+ * across all products
+ */
+struct xe_ras_error_common {
+	/** @severity: Error Severity */
+	u8 severity;
+	/** @component: IP where the error originated */
+	u8 component;
+} __packed;
+
+/**
+ * struct xe_ras_error_unit - Error unit information
+ */
+struct xe_ras_error_unit {
+	/** @tile: Tile identifier */
+	u8 tile;
+	/** @instance: Instance identifier within a component */
+	u32 instance;
+} __packed;
+
+/**
+ * struct xe_ras_error_cause - Error cause information
+ */
+struct xe_ras_error_cause {
+	/** @cause: Cause */
+	u32 cause;
+	/** @reserved: For future use */
+	u8 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_error_product - Error fields that are specific to the product
+ */
+struct xe_ras_error_product {
+	/** @unit: Unit within IP block */
+	struct xe_ras_error_unit unit;
+	/** @error_cause: Cause/checker */
+	struct xe_ras_error_cause error_cause;
+} __packed;
+
+/**
+ * struct xe_ras_error_class - Complete RAS Error Class
+ *
+ * This structure provides the complete error classification by combining
+ * the common error class with the product-specific error class.
+ */
+struct xe_ras_error_class {
+	/** @common: Common error severity and component */
+	struct xe_ras_error_common common;
+	/** @product: Product-specific unit and cause */
+	struct xe_ras_error_product product;
+} __packed;
+
+/**
+ * struct xe_ras_error_array - Details of the error types
+ */
+struct xe_ras_error_array {
+	/** @counter_value: Counter value of the returned error */
+	u32 counter_value;
+	/** @error_class: Error class */
+	struct xe_ras_error_class error_class;
+	/** @timestamp: Timestamp */
+	u64 timestamp;
+	/** @error_details: Error details specific to the class */
+	u32 error_details[XE_RAS_MAX_ERROR_DETAILS];
+} __packed;
+
+/**
+ * struct xe_ras_get_error_response - Response for XE_SYSCTRL_GET_SOC_ERROR
+ */
+struct xe_ras_get_error_response {
+	/** @num_errors: Number of errors reported in this response */
+	u8 num_errors;
+	/** @additional_errors: Indicates if the errors are pending */
+	u8 additional_errors;
+	/** @error_arr: Array of up to 3 errors */
+	struct xe_ras_error_array error_arr[XE_RAS_NUM_ERROR_ARR];
+} __packed;
+
+/**
+ * struct xe_ras_compute_error - Error details of Core Compute error
+ */
+struct xe_ras_compute_error {
+	/** @error_log_header: Error Source and type */
+	u32 error_log_header;
+	/** @internal_error_log: Internal Error log */
+	u32 internal_error_log;
+	/** @fabric_log: Fabric Error log */
+	u32 fabric_log;
+	/** @internal_error_addr_log0: Internal Error addr log */
+	u32 internal_error_addr_log0;
+	/** @internal_error_addr_log1: Internal Error addr log */
+	u32 internal_error_addr_log1;
+	/** @packet_log0: Packet log */
+	u32 packet_log0;
+	/** @packet_log1: Packet log */
+	u32 packet_log1;
+	/** @packet_log2: Packet log */
+	u32 packet_log2;
+	/** @packet_log3: Packet log */
+	u32 packet_log3;
+	/** @packet_log4: Packet log */
+	u32 packet_log4;
+	/** @misc_log0: Misc log */
+	u32 misc_log0;
+	/** @misc_log1: Misc log */
+	u32 misc_log1;
+	/** @spare_log0: Spare log */
+	u32 spare_log0;
+	/** @spare_log1: Spare log */
+	u32 spare_log1;
+	/** @spare_log2: Spare log */
+	u32 spare_log2;
+	/** @spare_log3: Spare log */
+	u32 spare_log3;
+} __packed;
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 89456aec6097..a4260920dfb4 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -10,6 +10,19 @@
 
 #include "abi/xe_sysctrl_abi.h"
 
+/**
+ * enum xe_sysctrl_mailbox_command_id - RAS Command ID's for GFSP group
+ *
+ * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Get basic error information
+ */
+enum xe_sysctrl_mailbox_command_id {
+	XE_SYSCTRL_CMD_GET_SOC_ERROR = 1
+};
+
+enum xe_sysctrl_group {
+	XE_SYSCTRL_GROUP_GFSP = 1
+};
+
 /**
  * struct xe_sysctrl_mailbox_command - System Controller mailbox command
  */
-- 
2.47.1

Re: [PATCH v3 06/10] drm/xe/xe_ras: Add structures and commands for Uncorrectable Core Compute Errors

[Raag Jadav]

On Thu, Apr 02, 2026 at 12:31:37PM +0530, Riana Tauro wrote:
> Add the sysctrl commands and response structures for Uncorrectable
> Core Compute errors.

...

> +static const char * const xe_ras_severities[] = {
> +	[XE_RAS_SEVERITY_NOT_SUPPORTED]		= "Not Supported",
> +	[XE_RAS_SEVERITY_CORRECTABLE]		= "Correctable",
> +	[XE_RAS_SEVERITY_UNCORRECTABLE]		= "Uncorrectable",
> +	[XE_RAS_SEVERITY_INFORMATIONAL]		= "Informational",
> +};
> +static_assert(ARRAY_SIZE(xe_ras_severities) == XE_RAS_SEVERITY_MAX);
> +
> +static const char * const xe_ras_components[] = {
> +	[XE_RAS_COMPONENT_NOT_SUPPORTED]	= "Not Supported",
> +	[XE_RAS_COMPONENT_DEVICE_MEMORY]	= "Device Memory",
> +	[XE_RAS_COMPONENT_CORE_COMPUTE]		= "Core Compute",
> +	[XE_RAS_COMPONENT_RESERVED]		= "Reserved",
> +	[XE_RAS_COMPONENT_PCIE]			= "PCIe",
> +	[XE_RAS_COMPONENT_FABRIC]		= "Fabric",
> +	[XE_RAS_COMPONENT_SOC_INTERNAL]		= "SoC Internal",
> +};
> +static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMPONENT_MAX);
> +
> +static inline const char *severity_to_str(struct xe_device *xe, u32 severity)
> +{
> +	xe_assert(xe, severity < XE_RAS_SEVERITY_MAX);
> +
> +	return severity < XE_RAS_SEVERITY_MAX ? xe_ras_severities[severity] : "Unknown";

Rethinking about this, since we already have NOT_SUPPORTED member, can we
reuse it for "Unknown"?

static inline const char *sev_to_str(struct xe_device *xe, u32 sev)
{
	if (sev >= XE_RAS_SEV_MAX)
		sev = XE_RAS_SEV_NOT_SUPPORTED;

	xe_assert(xe, severity != XE_RAS_SEV_NOT_SUPPORTED);
	return xe_ras_severities[sev];
}

Or you can choose to drop xe_assert() entirely if it makes more sense.

> +}
> +
> +static inline const char *comp_to_str(struct xe_device *xe, u32 comp)
> +{
> +	xe_assert(xe, comp < XE_RAS_COMPONENT_MAX);
> +
> +	return comp < XE_RAS_COMPONENT_MAX ? xe_ras_components[comp] : "Unknown";

Ditto.

Raag

> +}

[PATCH v3 07/10] drm/xe/xe_ras: Add support for Uncorrectable Core-Compute errors

[Riana Tauro]

Uncorrectable Core-Compute errors are classified into Global and Local
errors.

Global error is an error that affects the entire device requiring a
reset. This type of error is not isolated. When an AER is reported and
error_detected is invoked return PCI_ERS_RESULT_NEED_RESET.

A Local error is confined to a specific component or context like a
engine. These errors can be contained and recovered by resetting
only the affected part without distrupting the rest of the device.

Upon detection of an Uncorrectable Local Core-Compute error, an AER is
generated and GuC is notified of the error which triggers a engine reset.
Return Recovered from PCI error callbacks for these errors.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: add newline and fix log
    add bounds check (Mallesh)
    add ras specific enum (Raag)
    helper for sysctrl prepare command
    process all errors before deciding recovery action

v3: remove TODO from commit message
    remove redundant rlen check
    fix loop
    add check for sysctrl flooding (Raag)
    do not use xe_ras prefix for static functions (Soham)
---
 drivers/gpu/drm/xe/xe_ras.c       | 131 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h       |   3 +
 drivers/gpu/drm/xe/xe_ras_types.h |  18 ++++
 3 files changed, 152 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 515c28167a69..6542ed4a6a24 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -5,7 +5,16 @@
 
 #include "xe_assert.h"
 #include "xe_device_types.h"
+#include "xe_printk.h"
 #include "xe_ras.h"
+#include "xe_ras_types.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+
+#define COMPUTE_ERROR_SEVERITY_MASK		GENMASK(26, 25)
+#define GLOBAL_UNCORR_ERROR			2
+/* Modify as needed */
+#define XE_SYSCTRL_ERROR_FLOOD			16
 
 /* Severity classification of detected errors */
 enum xe_ras_severity {
@@ -61,6 +70,128 @@ static inline const char *comp_to_str(struct xe_device *xe, u32 comp)
 	return comp < XE_RAS_COMPONENT_MAX ? xe_ras_components[comp] : "Unknown";
 }
 
+static enum xe_ras_recovery_action handle_compute_errors(struct xe_device *xe,
+							 struct xe_ras_error_array *arr)
+{
+	struct xe_ras_compute_error *error_info = (struct xe_ras_compute_error *)arr->error_details;
+	struct xe_ras_error_common common = arr->error_class.common;
+	u8 uncorr_type;
+
+	uncorr_type = FIELD_GET(COMPUTE_ERROR_SEVERITY_MASK, error_info->error_log_header);
+
+	xe_err(xe, "[RAS]: %s %s Error detected", severity_to_str(xe, common.severity),
+	       comp_to_str(xe, common.component));
+
+	/* Request a RESET if error is global */
+	if (uncorr_type == GLOBAL_UNCORR_ERROR)
+		return XE_RAS_RECOVERY_ACTION_RESET;
+
+	/* Local errors are recovered using a engine reset by GuC */
+	return XE_RAS_RECOVERY_ACTION_RECOVERED;
+}
+
+static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command,
+				    u32 cmd_mask, void *request, size_t request_len,
+				    void *response, size_t response_len)
+{
+	struct xe_sysctrl_app_msg_hdr hdr = {0};
+	u32 req_hdr;
+
+	req_hdr = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) |
+		  FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask);
+
+	hdr.data = req_hdr;
+	command->header = hdr;
+	command->data_in = request;
+	command->data_in_len = request_len;
+	command->data_out = response;
+	command->data_out_len = response_len;
+}
+
+/**
+ * xe_ras_process_errors - Process and contain hardware errors
+ * @xe: xe device instance
+ *
+ * Get error details from system controller and return recovery
+ * method. Called only from PCI error handling.
+ *
+ * Returns: recovery action to be taken
+ */
+enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_get_error_response response;
+	enum xe_ras_recovery_action final_action;
+	u32 count = 0;
+	size_t rlen;
+	int ret;
+
+	/* Default action */
+	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
+
+	if (!xe->info.has_sysctrl)
+		return XE_RAS_RECOVERY_ACTION_RESET;
+
+	prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_SOC_ERROR, NULL, 0,
+				&response, sizeof(response));
+
+	do {
+		memset(&response, 0, sizeof(response));
+		rlen = 0;
+
+		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+		if (ret) {
+			xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret);
+			goto err;
+		}
+
+		if (rlen != sizeof(response)) {
+			xe_err(xe, "[RAS]: Sysctrl response size mismatch. Expected %zu, got %zu\n",
+			       sizeof(response), rlen);
+			goto err;
+		}
+
+		for (int i = 0; i < response.num_errors &&  i < XE_RAS_NUM_ERROR_ARR; i++) {
+			struct xe_ras_error_array arr = response.error_arr[i];
+			enum xe_ras_recovery_action action;
+			struct xe_ras_error_class error_class;
+			u8 component;
+
+			error_class = arr.error_class;
+			component = error_class.common.component;
+
+			switch (component) {
+			case XE_RAS_COMPONENT_CORE_COMPUTE:
+				action = handle_compute_errors(xe, &arr);
+				break;
+			default:
+				xe_err(xe, "[RAS]: Unknown error component %u\n", component);
+				action = XE_RAS_RECOVERY_ACTION_RESET;
+				break;
+			}
+
+			/*
+			 * Retain the highest severity action. Process and log all errors
+			 * and then take appropriate recovery action.
+			 */
+			if (action > final_action)
+				final_action = action;
+		}
+
+		/* Break if system controller floods responses */
+		if (++count > XE_SYSCTRL_ERROR_FLOOD) {
+			xe_err(xe, "[RAS]: Sysctrl response flooding\n");
+			break;
+		}
+
+	} while (response.additional_errors);
+
+	return final_action;
+
+err:
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
 #ifdef CONFIG_PCIEAER
 static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
 {
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index 14cb973603e7..e191ab80080c 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -6,8 +6,11 @@
 #ifndef _XE_RAS_H_
 #define _XE_RAS_H_
 
+#include "xe_ras_types.h"
+
 struct xe_device;
 
 void xe_ras_init(struct xe_device *xe);
+enum xe_ras_recovery_action  xe_ras_process_errors(struct xe_device *xe);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index ed69654e5bae..e37dd12bffa3 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -11,6 +11,24 @@
 #define XE_RAS_NUM_ERROR_ARR		3
 #define XE_RAS_MAX_ERROR_DETAILS	16
 
+/**
+ * enum xe_ras_recovery_action - RAS recovery actions
+ *
+ * @XE_RAS_RECOVERY_ACTION_RECOVERED: Error recovered
+ * @XE_RAS_RECOVERY_ACTION_RESET: Requires reset
+ * @XE_RAS_RECOVERY_ACTION_DISCONNECT: Requires disconnect
+ * @XE_RAS_RECOVERY_ACTION_MAX: Max action value
+ *
+ * This enum defines the possible recovery actions that can be taken in response
+ * to RAS errors.
+ */
+enum xe_ras_recovery_action {
+	XE_RAS_RECOVERY_ACTION_RECOVERED = 0,
+	XE_RAS_RECOVERY_ACTION_RESET,
+	XE_RAS_RECOVERY_ACTION_DISCONNECT,
+	XE_RAS_RECOVERY_ACTION_MAX
+};
+
 /**
  * struct xe_ras_error_common - Common RAS error class
  *
-- 
2.47.1

Re: [PATCH v3 07/10] drm/xe/xe_ras: Add support for Uncorrectable Core-Compute errors

[Raag Jadav]

On Thu, Apr 02, 2026 at 12:31:38PM +0530, Riana Tauro wrote:
> Uncorrectable Core-Compute errors are classified into Global and Local
> errors.
> 
> Global error is an error that affects the entire device requiring a
> reset. This type of error is not isolated. When an AER is reported and
> error_detected is invoked return PCI_ERS_RESULT_NEED_RESET.
> 
> A Local error is confined to a specific component or context like a
> engine. These errors can be contained and recovered by resetting
> only the affected part without distrupting the rest of the device.
> 
> Upon detection of an Uncorrectable Local Core-Compute error, an AER is
> generated and GuC is notified of the error which triggers a engine reset.
> Return Recovered from PCI error callbacks for these errors.
> 
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> v2: add newline and fix log
>     add bounds check (Mallesh)
>     add ras specific enum (Raag)
>     helper for sysctrl prepare command
>     process all errors before deciding recovery action
> 
> v3: remove TODO from commit message
>     remove redundant rlen check
>     fix loop
>     add check for sysctrl flooding (Raag)
>     do not use xe_ras prefix for static functions (Soham)
> ---
>  drivers/gpu/drm/xe/xe_ras.c       | 131 ++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_ras.h       |   3 +
>  drivers/gpu/drm/xe/xe_ras_types.h |  18 ++++
>  3 files changed, 152 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 515c28167a69..6542ed4a6a24 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -5,7 +5,16 @@
>  
>  #include "xe_assert.h"
>  #include "xe_device_types.h"
> +#include "xe_printk.h"
>  #include "xe_ras.h"
> +#include "xe_ras_types.h"
> +#include "xe_sysctrl_mailbox.h"
> +#include "xe_sysctrl_mailbox_types.h"
> +
> +#define COMPUTE_ERROR_SEVERITY_MASK		GENMASK(26, 25)
> +#define GLOBAL_UNCORR_ERROR			2
> +/* Modify as needed */
> +#define XE_SYSCTRL_ERROR_FLOOD			16
>  
>  /* Severity classification of detected errors */
>  enum xe_ras_severity {
> @@ -61,6 +70,128 @@ static inline const char *comp_to_str(struct xe_device *xe, u32 comp)
>  	return comp < XE_RAS_COMPONENT_MAX ? xe_ras_components[comp] : "Unknown";
>  }
>  
> +static enum xe_ras_recovery_action handle_compute_errors(struct xe_device *xe,
> +							 struct xe_ras_error_array *arr)
> +{
> +	struct xe_ras_compute_error *error_info = (struct xe_ras_compute_error *)arr->error_details;
> +	struct xe_ras_error_common common = arr->error_class.common;
> +	u8 uncorr_type;
> +
> +	uncorr_type = FIELD_GET(COMPUTE_ERROR_SEVERITY_MASK, error_info->error_log_header);
> +
> +	xe_err(xe, "[RAS]: %s %s Error detected", severity_to_str(xe, common.severity),
> +	       comp_to_str(xe, common.component));
> +
> +	/* Request a RESET if error is global */
> +	if (uncorr_type == GLOBAL_UNCORR_ERROR)
> +		return XE_RAS_RECOVERY_ACTION_RESET;
> +
> +	/* Local errors are recovered using a engine reset by GuC */

So do we need to synchronization with GuC before returning?

> +	return XE_RAS_RECOVERY_ACTION_RECOVERED;
> +}
> +
> +static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command,
> +				    u32 cmd_mask, void *request, size_t request_len,
> +				    void *response, size_t response_len)
> +{
> +	struct xe_sysctrl_app_msg_hdr hdr = {0};
> +	u32 req_hdr;

With a single member, not sure if it's worth having a local variable.

> +	req_hdr = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) |

Can simply be hdr.data.

> +		  FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask);
> +
> +	hdr.data = req_hdr;

With above in place, this won't be needed.

> +	command->header = hdr;
> +	command->data_in = request;
> +	command->data_in_len = request_len;
> +	command->data_out = response;
> +	command->data_out_len = response_len;
> +}
> +
> +/**
> + * xe_ras_process_errors - Process and contain hardware errors
> + * @xe: xe device instance
> + *
> + * Get error details from system controller and return recovery
> + * method. Called only from PCI error handling.
> + *
> + * Returns: recovery action to be taken
> + */
> +enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
> +{
> +	struct xe_sysctrl_mailbox_command command = {0};
> +	struct xe_ras_get_error_response response;
> +	enum xe_ras_recovery_action final_action;
> +	u32 count = 0;
> +	size_t rlen;
> +	int ret;
> +
> +	/* Default action */
> +	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
> +
> +	if (!xe->info.has_sysctrl)

This looks like should be at the top.

> +		return XE_RAS_RECOVERY_ACTION_RESET;
> +
> +	prepare_sysctrl_command(&command, XE_SYSCTRL_CMD_GET_SOC_ERROR, NULL, 0,
> +				&response, sizeof(response));
> +
> +	do {
> +		memset(&response, 0, sizeof(response));
> +		rlen = 0;

Is this needed? This is guaranteed to be updated if command succeeds.

> +		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> +		if (ret) {
> +			xe_err(xe, "[RAS]: Sysctrl error ret %d\n", ret);
> +			goto err;
> +		}
> +
> +		if (rlen != sizeof(response)) {
> +			xe_err(xe, "[RAS]: Sysctrl response size mismatch. Expected %zu, got %zu\n",
> +			       sizeof(response), rlen);
> +			goto err;
> +		}
> +
> +		for (int i = 0; i < response.num_errors &&  i < XE_RAS_NUM_ERROR_ARR; i++) {

I know this was my suggestion, but Mallesh later suggested that we fail on
out of spec behavior, which is not guaranteed here. So we can go back to
v2 implementation if it makes more sense. I'll leave it to you all.

Raag

> +			struct xe_ras_error_array arr = response.error_arr[i];
> +			enum xe_ras_recovery_action action;
> +			struct xe_ras_error_class error_class;
> +			u8 component;
> +
> +			error_class = arr.error_class;
> +			component = error_class.common.component;
> +
> +			switch (component) {
> +			case XE_RAS_COMPONENT_CORE_COMPUTE:
> +				action = handle_compute_errors(xe, &arr);
> +				break;
> +			default:
> +				xe_err(xe, "[RAS]: Unknown error component %u\n", component);
> +				action = XE_RAS_RECOVERY_ACTION_RESET;
> +				break;
> +			}
> +
> +			/*
> +			 * Retain the highest severity action. Process and log all errors
> +			 * and then take appropriate recovery action.
> +			 */
> +			if (action > final_action)
> +				final_action = action;
> +		}
> +
> +		/* Break if system controller floods responses */
> +		if (++count > XE_SYSCTRL_ERROR_FLOOD) {
> +			xe_err(xe, "[RAS]: Sysctrl response flooding\n");
> +			break;
> +		}
> +
> +	} while (response.additional_errors);
> +
> +	return final_action;
> +
> +err:
> +	return XE_RAS_RECOVERY_ACTION_RESET;
> +}
> +
>  #ifdef CONFIG_PCIEAER
>  static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
>  {
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> index 14cb973603e7..e191ab80080c 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -6,8 +6,11 @@
>  #ifndef _XE_RAS_H_
>  #define _XE_RAS_H_
>  
> +#include "xe_ras_types.h"
> +
>  struct xe_device;
>  
>  void xe_ras_init(struct xe_device *xe);
> +enum xe_ras_recovery_action  xe_ras_process_errors(struct xe_device *xe);
>  
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
> index ed69654e5bae..e37dd12bffa3 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -11,6 +11,24 @@
>  #define XE_RAS_NUM_ERROR_ARR		3
>  #define XE_RAS_MAX_ERROR_DETAILS	16
>  
> +/**
> + * enum xe_ras_recovery_action - RAS recovery actions
> + *
> + * @XE_RAS_RECOVERY_ACTION_RECOVERED: Error recovered
> + * @XE_RAS_RECOVERY_ACTION_RESET: Requires reset
> + * @XE_RAS_RECOVERY_ACTION_DISCONNECT: Requires disconnect
> + * @XE_RAS_RECOVERY_ACTION_MAX: Max action value
> + *
> + * This enum defines the possible recovery actions that can be taken in response
> + * to RAS errors.
> + */
> +enum xe_ras_recovery_action {
> +	XE_RAS_RECOVERY_ACTION_RECOVERED = 0,
> +	XE_RAS_RECOVERY_ACTION_RESET,
> +	XE_RAS_RECOVERY_ACTION_DISCONNECT,
> +	XE_RAS_RECOVERY_ACTION_MAX
> +};
> +
>  /**
>   * struct xe_ras_error_common - Common RAS error class
>   *
> -- 
> 2.47.1
> 

[PATCH v3 08/10] drm/xe/xe_ras: Add structures for SoC Internal errors

[Riana Tauro]

Add response structures for SoC Internal errors.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: simplify soc structures
---
 drivers/gpu/drm/xe/xe_ras_types.h | 51 +++++++++++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index e37dd12bffa3..65158bf716a7 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -10,6 +10,7 @@
 
 #define XE_RAS_NUM_ERROR_ARR		3
 #define XE_RAS_MAX_ERROR_DETAILS	16
+#define XE_RAS_IEH_PUNIT_ERROR		BIT(1)
 
 /**
  * enum xe_ras_recovery_action - RAS recovery actions
@@ -149,4 +150,54 @@ struct xe_ras_compute_error {
 	u32 spare_log3;
 } __packed;
 
+/**
+ * struct xe_ras_soc_error_source - Source of SOC error
+ */
+struct xe_ras_soc_error_source {
+	/** @csc: CSC error */
+	u32 csc:1;
+	/** @soc: SOC error */
+	u32 soc:1;
+	/** @reserved: Reserved for future use */
+	u32 reserved:30;
+} __packed;
+
+/**
+ * struct xe_ras_soc_error - SOC error details
+ */
+struct xe_ras_soc_error {
+	/** @error_source: Error Source */
+	struct xe_ras_soc_error_source error_source;
+	/** @additional_details: Additional details */
+	u32 additional_details[15];
+} __packed;
+
+/**
+ * struct xe_ras_csc_error - CSC error details
+ */
+struct xe_ras_csc_error {
+	/** @hec_uncorr_err_status: CSC error */
+	u32 hec_uncorr_err_status;
+	/** @hec_uncorr_fw_err_dw0: CSC f/w error */
+	u32 hec_uncorr_fw_err_dw0;
+} __packed;
+
+/**
+ * struct xe_ras_ieh_error - SoC IEH (Integrated Error Handler) details
+ */
+struct xe_ras_ieh_error {
+	/** @ieh_instance: IEH instance */
+	u32 ieh_instance:2;
+	/** @reserved: Reserved for future use */
+	u32 reserved:30;
+	/** @global_error_status: Global error status */
+	u32 global_error_status;
+	/** @local_error_status: Local error status */
+	u32 local_error_status;
+	/** @gerr_mask: Global error mask */
+	u32 gerr_mask;
+	/** @additional_info: Additional information */
+	u32 additional_info[10];
+} __packed;
+
 #endif
-- 
2.47.1

Re: [PATCH v3 08/10] drm/xe/xe_ras: Add structures for SoC Internal errors

[Raag Jadav]

On Thu, Apr 02, 2026 at 12:31:39PM +0530, Riana Tauro wrote:
> Add response structures for SoC Internal errors.

This looks like should be squashed with next patch, or did I miss something?

Raag

> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> v2: simplify soc structures
> ---
>  drivers/gpu/drm/xe/xe_ras_types.h | 51 +++++++++++++++++++++++++++++++
>  1 file changed, 51 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
> index e37dd12bffa3..65158bf716a7 100644
> --- a/drivers/gpu/drm/xe/xe_ras_types.h
> +++ b/drivers/gpu/drm/xe/xe_ras_types.h
> @@ -10,6 +10,7 @@
>  
>  #define XE_RAS_NUM_ERROR_ARR		3
>  #define XE_RAS_MAX_ERROR_DETAILS	16
> +#define XE_RAS_IEH_PUNIT_ERROR		BIT(1)
>  
>  /**
>   * enum xe_ras_recovery_action - RAS recovery actions
> @@ -149,4 +150,54 @@ struct xe_ras_compute_error {
>  	u32 spare_log3;
>  } __packed;
>  
> +/**
> + * struct xe_ras_soc_error_source - Source of SOC error
> + */
> +struct xe_ras_soc_error_source {
> +	/** @csc: CSC error */
> +	u32 csc:1;
> +	/** @soc: SOC error */
> +	u32 soc:1;
> +	/** @reserved: Reserved for future use */
> +	u32 reserved:30;
> +} __packed;
> +
> +/**
> + * struct xe_ras_soc_error - SOC error details
> + */
> +struct xe_ras_soc_error {
> +	/** @error_source: Error Source */
> +	struct xe_ras_soc_error_source error_source;
> +	/** @additional_details: Additional details */
> +	u32 additional_details[15];
> +} __packed;
> +
> +/**
> + * struct xe_ras_csc_error - CSC error details
> + */
> +struct xe_ras_csc_error {
> +	/** @hec_uncorr_err_status: CSC error */
> +	u32 hec_uncorr_err_status;
> +	/** @hec_uncorr_fw_err_dw0: CSC f/w error */
> +	u32 hec_uncorr_fw_err_dw0;
> +} __packed;
> +
> +/**
> + * struct xe_ras_ieh_error - SoC IEH (Integrated Error Handler) details
> + */
> +struct xe_ras_ieh_error {
> +	/** @ieh_instance: IEH instance */
> +	u32 ieh_instance:2;
> +	/** @reserved: Reserved for future use */
> +	u32 reserved:30;
> +	/** @global_error_status: Global error status */
> +	u32 global_error_status;
> +	/** @local_error_status: Local error status */
> +	u32 local_error_status;
> +	/** @gerr_mask: Global error mask */
> +	u32 gerr_mask;
> +	/** @additional_info: Additional information */
> +	u32 additional_info[10];
> +} __packed;
> +
>  #endif
> -- 
> 2.47.1
> 

[PATCH v3 09/10] drm/xe/xe_ras: Handle Uncorrectable SoC Internal errors

[Riana Tauro]

Some critical errors such as CSC firmware and Punit are reported under
SoC Internal Errors.

CSC errors are classified as hardware errors and firmware errors.
Hardware errors can be recovered using a SBR whereas firmware errors
are critical and require a firmware flash. On such errors, device will
be wedged and runtime survivability mode will be enabed to notify
userspace that a firmware flash is required.

PUNIT uncorrectable errors can only be recovered through a cold reset.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: return error code for each SoC error (Mallesh)
---
 drivers/gpu/drm/xe/xe_ras.c | 49 +++++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 6542ed4a6a24..2762a0f0d621 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -8,6 +8,7 @@
 #include "xe_printk.h"
 #include "xe_ras.h"
 #include "xe_ras_types.h"
+#include "xe_survivability_mode.h"
 #include "xe_sysctrl_mailbox.h"
 #include "xe_sysctrl_mailbox_types.h"
 
@@ -90,6 +91,51 @@ static enum xe_ras_recovery_action handle_compute_errors(struct xe_device *xe,
 	return XE_RAS_RECOVERY_ACTION_RECOVERED;
 }
 
+static enum xe_ras_recovery_action handle_soc_internal_errors(struct xe_device *xe,
+							      struct xe_ras_error_array *arr)
+{
+	struct xe_ras_soc_error *error_info = (struct xe_ras_soc_error *)arr->error_details;
+	struct xe_ras_soc_error_source source = error_info->error_source;
+	struct xe_ras_error_common common = arr->error_class.common;
+
+	xe_err(xe, "[RAS]: %s %s Error detected", severity_to_str(xe, common.severity),
+	       comp_to_str(xe, common.component));
+
+	if (source.csc) {
+		struct xe_ras_csc_error *csc_error = (struct xe_ras_csc_error *)error_info->additional_details;
+
+		/*
+		 * CSC uncorrectable errors are classified as hardware errors and firmware errors.
+		 * CSC firmware errors are critical errors that can be recovered only by firmware
+		 * update via SPI driver. PCODE enables FDO mode and sets the bit in the capability
+		 * register. On receiving this error, the driver enables runtime survivability mode
+		 * which notifies userspace that a firmware update is required.
+		 */
+		if (csc_error->hec_uncorr_fw_err_dw0) {
+			xe_err(xe, "[RAS]: CSC %s error detected: 0x%x\n",
+			       severity_to_str(xe, common.severity),
+			       csc_error->hec_uncorr_fw_err_dw0);
+			xe_survivability_mode_runtime_enable(xe);
+			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
+		}
+	}
+
+	if (source.soc) {
+		struct xe_ras_ieh_error *ieh_error = (struct xe_ras_ieh_error *)error_info->additional_details;
+
+		if (ieh_error->global_error_status & XE_RAS_IEH_PUNIT_ERROR) {
+			xe_err(xe, "[RAS]: PUNIT %s error detected: 0x%x\n",
+			       severity_to_str(xe, common.severity),
+			       ieh_error->global_error_status);
+			/** TODO: Add PUNIT error handling */
+			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
+		}
+	}
+
+	/* For other SOC internal errors, request a reset as recovery mechanism */
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
 static void prepare_sysctrl_command(struct xe_sysctrl_mailbox_command *command,
 				    u32 cmd_mask, void *request, size_t request_len,
 				    void *response, size_t response_len)
@@ -164,6 +210,9 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 			case XE_RAS_COMPONENT_CORE_COMPUTE:
 				action = handle_compute_errors(xe, &arr);
 				break;
+			case XE_RAS_COMPONENT_SOC_INTERNAL:
+				action = handle_soc_internal_errors(xe, &arr);
+				break;
 			default:
 				xe_err(xe, "[RAS]: Unknown error component %u\n", component);
 				action = XE_RAS_RECOVERY_ACTION_RESET;
-- 
2.47.1

[PATCH v3 10/10] drm/xe/xe_pci_error: Process errors in mmio_enabled

[Riana Tauro]

Query system controller when any non fatal error occurs to check
the type of the error, contain and recover.

The system controller is queried in the mmio_enabled callback.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: use ras recovery enum (Raag)

v3: add comment for mapping
    use const (Mallesh)
---
 drivers/gpu/drm/xe/xe_pci_error.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 28b2f4f7c24b..71b6152c1593 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -9,6 +9,7 @@
 #include "xe_device.h"
 #include "xe_gt.h"
 #include "xe_pci.h"
+#include "xe_ras.h"
 #include "xe_survivability_mode.h"
 #include "xe_uc.h"
 
@@ -31,6 +32,13 @@ static void xe_pci_error_handling(struct pci_dev *pdev)
 	pci_disable_device(pdev);
 }
 
+/* Mapping of RAS recovery action to PCI error result */
+static const pci_ers_result_t ras_recovery_action_to_pci_result[] = {
+	[XE_RAS_RECOVERY_ACTION_RECOVERED] = PCI_ERS_RESULT_RECOVERED,
+	[XE_RAS_RECOVERY_ACTION_RESET] = PCI_ERS_RESULT_NEED_RESET,
+	[XE_RAS_RECOVERY_ACTION_DISCONNECT] = PCI_ERS_RESULT_DISCONNECT,
+};
+
 static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
 {
 	struct xe_device *xe = pdev_to_xe_device(pdev);
@@ -56,9 +64,13 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
 
 static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
 {
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	enum xe_ras_recovery_action action;
+
 	dev_err(&pdev->dev, "Xe Pci error recovery: MMIO enabled\n");
+	action = xe_ras_process_errors(xe);
 
-	return PCI_ERS_RESULT_NEED_RESET;
+	return ras_recovery_action_to_pci_result[action];
 }
 
 static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
-- 
2.47.1

✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev3)

[Patchwork]

== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev3)
URL   : https://patchwork.freedesktop.org/series/160482/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 446ded128503bb77bbb56fa6439349c0a6d40484
Author: Riana Tauro <riana.tauro@intel.com>
Date:   Thu Apr 2 12:31:41 2026 +0530

    drm/xe/xe_pci_error: Process errors in mmio_enabled
    
    Query system controller when any non fatal error occurs to check
    the type of the error, contain and recover.
    
    The system controller is queried in the mmio_enabled callback.
    
    Signed-off-by: Riana Tauro <riana.tauro@intel.com>
+ /mt/dim checkpatch 5ab3838428d9d2baa881cb9b23a30cc77e5c893c drm-intel
4e89a6a4f8f0 drm/xe/xe_survivability: Decouple survivability info from boot survivability
81f644da87b3 drm/xe/xe_pci_error: Implement PCI error recovery callbacks
-:101: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#101: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 156 lines checked
a568e82c5715 drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset
cfcf31cdc00b drm/xe: Skip device access during PCI error recovery
bd74ddad2b88 drm/xe/xe_ras: Initialize Uncorrectable AER Registers
-:52: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#52: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 113 lines checked
22a9fbc7240a drm/xe/xe_ras: Add structures and commands for Uncorrectable Core Compute Errors
-:51: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#51: FILE: drivers/gpu/drm/xe/xe_ras.c:37:
+};
+static_assert(ARRAY_SIZE(xe_ras_severities) == XE_RAS_SEVERITY_MAX);

-:62: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#62: FILE: drivers/gpu/drm/xe/xe_ras.c:48:
+};
+static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMPONENT_MAX);

-:82: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#82: 
new file mode 100644

total: 0 errors, 1 warnings, 2 checks, 217 lines checked
1884f85ee324 drm/xe/xe_ras: Add support for Uncorrectable Core-Compute errors
bccea9aafb4d drm/xe/xe_ras: Add structures for SoC Internal errors
728f676d0b06 drm/xe/xe_ras: Handle Uncorrectable SoC Internal errors
-:46: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#46: FILE: drivers/gpu/drm/xe/xe_ras.c:105:
+		struct xe_ras_csc_error *csc_error = (struct xe_ras_csc_error *)error_info->additional_details;

-:65: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#65: FILE: drivers/gpu/drm/xe/xe_ras.c:124:
+		struct xe_ras_ieh_error *ieh_error = (struct xe_ras_ieh_error *)error_info->additional_details;

total: 0 errors, 2 warnings, 0 checks, 67 lines checked
446ded128503 drm/xe/xe_pci_error: Process errors in mmio_enabled

✓ CI.KUnit: success for Introduce Xe Uncorrectable Error Handling (rev3)

[Patchwork]

== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev3)
URL   : https://patchwork.freedesktop.org/series/160482/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[08:01:32] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:01:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:02:07] Starting KUnit Kernel (1/1)...
[08:02:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:02:07] ================== guc_buf (11 subtests) ===================
[08:02:07] [PASSED] test_smallest
[08:02:07] [PASSED] test_largest
[08:02:07] [PASSED] test_granular
[08:02:07] [PASSED] test_unique
[08:02:07] [PASSED] test_overlap
[08:02:07] [PASSED] test_reusable
[08:02:07] [PASSED] test_too_big
[08:02:07] [PASSED] test_flush
[08:02:07] [PASSED] test_lookup
[08:02:07] [PASSED] test_data
[08:02:07] [PASSED] test_class
[08:02:07] ===================== [PASSED] guc_buf =====================
[08:02:07] =================== guc_dbm (7 subtests) ===================
[08:02:07] [PASSED] test_empty
[08:02:07] [PASSED] test_default
[08:02:07] ======================== test_size  ========================
[08:02:07] [PASSED] 4
[08:02:07] [PASSED] 8
[08:02:07] [PASSED] 32
[08:02:07] [PASSED] 256
[08:02:07] ==================== [PASSED] test_size ====================
[08:02:07] ======================= test_reuse  ========================
[08:02:07] [PASSED] 4
[08:02:07] [PASSED] 8
[08:02:07] [PASSED] 32
[08:02:07] [PASSED] 256
[08:02:07] =================== [PASSED] test_reuse ====================
[08:02:07] =================== test_range_overlap  ====================
[08:02:07] [PASSED] 4
[08:02:07] [PASSED] 8
[08:02:07] [PASSED] 32
[08:02:07] [PASSED] 256
[08:02:07] =============== [PASSED] test_range_overlap ================
[08:02:07] =================== test_range_compact  ====================
[08:02:07] [PASSED] 4
[08:02:07] [PASSED] 8
[08:02:07] [PASSED] 32
[08:02:07] [PASSED] 256
[08:02:07] =============== [PASSED] test_range_compact ================
[08:02:07] ==================== test_range_spare  =====================
[08:02:07] [PASSED] 4
[08:02:07] [PASSED] 8
[08:02:07] [PASSED] 32
[08:02:07] [PASSED] 256
[08:02:07] ================ [PASSED] test_range_spare =================
[08:02:07] ===================== [PASSED] guc_dbm =====================
[08:02:07] =================== guc_idm (6 subtests) ===================
[08:02:07] [PASSED] bad_init
[08:02:07] [PASSED] no_init
[08:02:07] [PASSED] init_fini
[08:02:07] [PASSED] check_used
[08:02:07] [PASSED] check_quota
[08:02:07] [PASSED] check_all
[08:02:07] ===================== [PASSED] guc_idm =====================
[08:02:07] ================== no_relay (3 subtests) ===================
[08:02:07] [PASSED] xe_drops_guc2pf_if_not_ready
[08:02:07] [PASSED] xe_drops_guc2vf_if_not_ready
[08:02:07] [PASSED] xe_rejects_send_if_not_ready
[08:02:07] ==================== [PASSED] no_relay =====================
[08:02:07] ================== pf_relay (14 subtests) ==================
[08:02:07] [PASSED] pf_rejects_guc2pf_too_short
[08:02:07] [PASSED] pf_rejects_guc2pf_too_long
[08:02:07] [PASSED] pf_rejects_guc2pf_no_payload
[08:02:07] [PASSED] pf_fails_no_payload
[08:02:07] [PASSED] pf_fails_bad_origin
[08:02:07] [PASSED] pf_fails_bad_type
[08:02:07] [PASSED] pf_txn_reports_error
[08:02:07] [PASSED] pf_txn_sends_pf2guc
[08:02:07] [PASSED] pf_sends_pf2guc
[08:02:07] [SKIPPED] pf_loopback_nop
[08:02:07] [SKIPPED] pf_loopback_echo
[08:02:07] [SKIPPED] pf_loopback_fail
[08:02:07] [SKIPPED] pf_loopback_busy
[08:02:07] [SKIPPED] pf_loopback_retry
[08:02:07] ==================== [PASSED] pf_relay =====================
[08:02:07] ================== vf_relay (3 subtests) ===================
[08:02:08] [PASSED] vf_rejects_guc2vf_too_short
[08:02:08] [PASSED] vf_rejects_guc2vf_too_long
[08:02:08] [PASSED] vf_rejects_guc2vf_no_payload
[08:02:08] ==================== [PASSED] vf_relay =====================
[08:02:08] ================ pf_gt_config (9 subtests) =================
[08:02:08] [PASSED] fair_contexts_1vf
[08:02:08] [PASSED] fair_doorbells_1vf
[08:02:08] [PASSED] fair_ggtt_1vf
[08:02:08] ====================== fair_vram_1vf  ======================
[08:02:08] [PASSED] 3.50 GiB
[08:02:08] [PASSED] 11.5 GiB
[08:02:08] [PASSED] 15.5 GiB
[08:02:08] [PASSED] 31.5 GiB
[08:02:08] [PASSED] 63.5 GiB
[08:02:08] [PASSED] 1.91 GiB
[08:02:08] ================== [PASSED] fair_vram_1vf ==================
[08:02:08] ================ fair_vram_1vf_admin_only  =================
[08:02:08] [PASSED] 3.50 GiB
[08:02:08] [PASSED] 11.5 GiB
[08:02:08] [PASSED] 15.5 GiB
[08:02:08] [PASSED] 31.5 GiB
[08:02:08] [PASSED] 63.5 GiB
[08:02:08] [PASSED] 1.91 GiB
[08:02:08] ============ [PASSED] fair_vram_1vf_admin_only =============
[08:02:08] ====================== fair_contexts  ======================
[08:02:08] [PASSED] 1 VF
[08:02:08] [PASSED] 2 VFs
[08:02:08] [PASSED] 3 VFs
[08:02:08] [PASSED] 4 VFs
[08:02:08] [PASSED] 5 VFs
[08:02:08] [PASSED] 6 VFs
[08:02:08] [PASSED] 7 VFs
[08:02:08] [PASSED] 8 VFs
[08:02:08] [PASSED] 9 VFs
[08:02:08] [PASSED] 10 VFs
[08:02:08] [PASSED] 11 VFs
[08:02:08] [PASSED] 12 VFs
[08:02:08] [PASSED] 13 VFs
[08:02:08] [PASSED] 14 VFs
[08:02:08] [PASSED] 15 VFs
[08:02:08] [PASSED] 16 VFs
[08:02:08] [PASSED] 17 VFs
[08:02:08] [PASSED] 18 VFs
[08:02:08] [PASSED] 19 VFs
[08:02:08] [PASSED] 20 VFs
[08:02:08] [PASSED] 21 VFs
[08:02:08] [PASSED] 22 VFs
[08:02:08] [PASSED] 23 VFs
[08:02:08] [PASSED] 24 VFs
[08:02:08] [PASSED] 25 VFs
[08:02:08] [PASSED] 26 VFs
[08:02:08] [PASSED] 27 VFs
[08:02:08] [PASSED] 28 VFs
[08:02:08] [PASSED] 29 VFs
[08:02:08] [PASSED] 30 VFs
[08:02:08] [PASSED] 31 VFs
[08:02:08] [PASSED] 32 VFs
[08:02:08] [PASSED] 33 VFs
[08:02:08] [PASSED] 34 VFs
[08:02:08] [PASSED] 35 VFs
[08:02:08] [PASSED] 36 VFs
[08:02:08] [PASSED] 37 VFs
[08:02:08] [PASSED] 38 VFs
[08:02:08] [PASSED] 39 VFs
[08:02:08] [PASSED] 40 VFs
[08:02:08] [PASSED] 41 VFs
[08:02:08] [PASSED] 42 VFs
[08:02:08] [PASSED] 43 VFs
[08:02:08] [PASSED] 44 VFs
[08:02:08] [PASSED] 45 VFs
[08:02:08] [PASSED] 46 VFs
[08:02:08] [PASSED] 47 VFs
[08:02:08] [PASSED] 48 VFs
[08:02:08] [PASSED] 49 VFs
[08:02:08] [PASSED] 50 VFs
[08:02:08] [PASSED] 51 VFs
[08:02:08] [PASSED] 52 VFs
[08:02:08] [PASSED] 53 VFs
[08:02:08] [PASSED] 54 VFs
[08:02:08] [PASSED] 55 VFs
[08:02:08] [PASSED] 56 VFs
[08:02:08] [PASSED] 57 VFs
[08:02:08] [PASSED] 58 VFs
[08:02:08] [PASSED] 59 VFs
[08:02:08] [PASSED] 60 VFs
[08:02:08] [PASSED] 61 VFs
[08:02:08] [PASSED] 62 VFs
[08:02:08] [PASSED] 63 VFs
[08:02:08] ================== [PASSED] fair_contexts ==================
[08:02:08] ===================== fair_doorbells  ======================
[08:02:08] [PASSED] 1 VF
[08:02:08] [PASSED] 2 VFs
[08:02:08] [PASSED] 3 VFs
[08:02:08] [PASSED] 4 VFs
[08:02:08] [PASSED] 5 VFs
[08:02:08] [PASSED] 6 VFs
[08:02:08] [PASSED] 7 VFs
[08:02:08] [PASSED] 8 VFs
[08:02:08] [PASSED] 9 VFs
[08:02:08] [PASSED] 10 VFs
[08:02:08] [PASSED] 11 VFs
[08:02:08] [PASSED] 12 VFs
[08:02:08] [PASSED] 13 VFs
[08:02:08] [PASSED] 14 VFs
[08:02:08] [PASSED] 15 VFs
[08:02:08] [PASSED] 16 VFs
[08:02:08] [PASSED] 17 VFs
[08:02:08] [PASSED] 18 VFs
[08:02:08] [PASSED] 19 VFs
[08:02:08] [PASSED] 20 VFs
[08:02:08] [PASSED] 21 VFs
[08:02:08] [PASSED] 22 VFs
[08:02:08] [PASSED] 23 VFs
[08:02:08] [PASSED] 24 VFs
[08:02:08] [PASSED] 25 VFs
[08:02:08] [PASSED] 26 VFs
[08:02:08] [PASSED] 27 VFs
[08:02:08] [PASSED] 28 VFs
[08:02:08] [PASSED] 29 VFs
[08:02:08] [PASSED] 30 VFs
[08:02:08] [PASSED] 31 VFs
[08:02:08] [PASSED] 32 VFs
[08:02:08] [PASSED] 33 VFs
[08:02:08] [PASSED] 34 VFs
[08:02:08] [PASSED] 35 VFs
[08:02:08] [PASSED] 36 VFs
[08:02:08] [PASSED] 37 VFs
[08:02:08] [PASSED] 38 VFs
[08:02:08] [PASSED] 39 VFs
[08:02:08] [PASSED] 40 VFs
[08:02:08] [PASSED] 41 VFs
[08:02:08] [PASSED] 42 VFs
[08:02:08] [PASSED] 43 VFs
[08:02:08] [PASSED] 44 VFs
[08:02:08] [PASSED] 45 VFs
[08:02:08] [PASSED] 46 VFs
[08:02:08] [PASSED] 47 VFs
[08:02:08] [PASSED] 48 VFs
[08:02:08] [PASSED] 49 VFs
[08:02:08] [PASSED] 50 VFs
[08:02:08] [PASSED] 51 VFs
[08:02:08] [PASSED] 52 VFs
[08:02:08] [PASSED] 53 VFs
[08:02:08] [PASSED] 54 VFs
[08:02:08] [PASSED] 55 VFs
[08:02:08] [PASSED] 56 VFs
[08:02:08] [PASSED] 57 VFs
[08:02:08] [PASSED] 58 VFs
[08:02:08] [PASSED] 59 VFs
[08:02:08] [PASSED] 60 VFs
[08:02:08] [PASSED] 61 VFs
[08:02:08] [PASSED] 62 VFs
[08:02:08] [PASSED] 63 VFs
[08:02:08] ================= [PASSED] fair_doorbells ==================
[08:02:08] ======================== fair_ggtt  ========================
[08:02:08] [PASSED] 1 VF
[08:02:08] [PASSED] 2 VFs
[08:02:08] [PASSED] 3 VFs
[08:02:08] [PASSED] 4 VFs
[08:02:08] [PASSED] 5 VFs
[08:02:08] [PASSED] 6 VFs
[08:02:08] [PASSED] 7 VFs
[08:02:08] [PASSED] 8 VFs
[08:02:08] [PASSED] 9 VFs
[08:02:08] [PASSED] 10 VFs
[08:02:08] [PASSED] 11 VFs
[08:02:08] [PASSED] 12 VFs
[08:02:08] [PASSED] 13 VFs
[08:02:08] [PASSED] 14 VFs
[08:02:08] [PASSED] 15 VFs
[08:02:08] [PASSED] 16 VFs
[08:02:08] [PASSED] 17 VFs
[08:02:08] [PASSED] 18 VFs
[08:02:08] [PASSED] 19 VFs
[08:02:08] [PASSED] 20 VFs
[08:02:08] [PASSED] 21 VFs
[08:02:08] [PASSED] 22 VFs
[08:02:08] [PASSED] 23 VFs
[08:02:08] [PASSED] 24 VFs
[08:02:08] [PASSED] 25 VFs
[08:02:08] [PASSED] 26 VFs
[08:02:08] [PASSED] 27 VFs
[08:02:08] [PASSED] 28 VFs
[08:02:08] [PASSED] 29 VFs
[08:02:08] [PASSED] 30 VFs
[08:02:08] [PASSED] 31 VFs
[08:02:08] [PASSED] 32 VFs
[08:02:08] [PASSED] 33 VFs
[08:02:08] [PASSED] 34 VFs
[08:02:08] [PASSED] 35 VFs
[08:02:08] [PASSED] 36 VFs
[08:02:08] [PASSED] 37 VFs
[08:02:08] [PASSED] 38 VFs
[08:02:08] [PASSED] 39 VFs
[08:02:08] [PASSED] 40 VFs
[08:02:08] [PASSED] 41 VFs
[08:02:08] [PASSED] 42 VFs
[08:02:08] [PASSED] 43 VFs
[08:02:08] [PASSED] 44 VFs
[08:02:08] [PASSED] 45 VFs
[08:02:08] [PASSED] 46 VFs
[08:02:08] [PASSED] 47 VFs
[08:02:08] [PASSED] 48 VFs
[08:02:08] [PASSED] 49 VFs
[08:02:08] [PASSED] 50 VFs
[08:02:08] [PASSED] 51 VFs
[08:02:08] [PASSED] 52 VFs
[08:02:08] [PASSED] 53 VFs
[08:02:08] [PASSED] 54 VFs
[08:02:08] [PASSED] 55 VFs
[08:02:08] [PASSED] 56 VFs
[08:02:08] [PASSED] 57 VFs
[08:02:08] [PASSED] 58 VFs
[08:02:08] [PASSED] 59 VFs
[08:02:08] [PASSED] 60 VFs
[08:02:08] [PASSED] 61 VFs
[08:02:08] [PASSED] 62 VFs
[08:02:08] [PASSED] 63 VFs
[08:02:08] ==================== [PASSED] fair_ggtt ====================
[08:02:08] ======================== fair_vram  ========================
[08:02:08] [PASSED] 1 VF
[08:02:08] [PASSED] 2 VFs
[08:02:08] [PASSED] 3 VFs
[08:02:08] [PASSED] 4 VFs
[08:02:08] [PASSED] 5 VFs
[08:02:08] [PASSED] 6 VFs
[08:02:08] [PASSED] 7 VFs
[08:02:08] [PASSED] 8 VFs
[08:02:08] [PASSED] 9 VFs
[08:02:08] [PASSED] 10 VFs
[08:02:08] [PASSED] 11 VFs
[08:02:08] [PASSED] 12 VFs
[08:02:08] [PASSED] 13 VFs
[08:02:08] [PASSED] 14 VFs
[08:02:08] [PASSED] 15 VFs
[08:02:08] [PASSED] 16 VFs
[08:02:08] [PASSED] 17 VFs
[08:02:08] [PASSED] 18 VFs
[08:02:08] [PASSED] 19 VFs
[08:02:08] [PASSED] 20 VFs
[08:02:08] [PASSED] 21 VFs
[08:02:08] [PASSED] 22 VFs
[08:02:08] [PASSED] 23 VFs
[08:02:08] [PASSED] 24 VFs
[08:02:08] [PASSED] 25 VFs
[08:02:08] [PASSED] 26 VFs
[08:02:08] [PASSED] 27 VFs
[08:02:08] [PASSED] 28 VFs
[08:02:08] [PASSED] 29 VFs
[08:02:08] [PASSED] 30 VFs
[08:02:08] [PASSED] 31 VFs
[08:02:08] [PASSED] 32 VFs
[08:02:08] [PASSED] 33 VFs
[08:02:08] [PASSED] 34 VFs
[08:02:08] [PASSED] 35 VFs
[08:02:08] [PASSED] 36 VFs
[08:02:08] [PASSED] 37 VFs
[08:02:08] [PASSED] 38 VFs
[08:02:08] [PASSED] 39 VFs
[08:02:08] [PASSED] 40 VFs
[08:02:08] [PASSED] 41 VFs
[08:02:08] [PASSED] 42 VFs
[08:02:08] [PASSED] 43 VFs
[08:02:08] [PASSED] 44 VFs
[08:02:08] [PASSED] 45 VFs
[08:02:08] [PASSED] 46 VFs
[08:02:08] [PASSED] 47 VFs
[08:02:08] [PASSED] 48 VFs
[08:02:08] [PASSED] 49 VFs
[08:02:08] [PASSED] 50 VFs
[08:02:08] [PASSED] 51 VFs
[08:02:08] [PASSED] 52 VFs
[08:02:08] [PASSED] 53 VFs
[08:02:08] [PASSED] 54 VFs
[08:02:08] [PASSED] 55 VFs
[08:02:08] [PASSED] 56 VFs
[08:02:08] [PASSED] 57 VFs
[08:02:08] [PASSED] 58 VFs
[08:02:08] [PASSED] 59 VFs
[08:02:08] [PASSED] 60 VFs
[08:02:08] [PASSED] 61 VFs
[08:02:08] [PASSED] 62 VFs
[08:02:08] [PASSED] 63 VFs
[08:02:08] ==================== [PASSED] fair_vram ====================
[08:02:08] ================== [PASSED] pf_gt_config ===================
[08:02:08] ===================== lmtt (1 subtest) =====================
[08:02:08] ======================== test_ops  =========================
[08:02:08] [PASSED] 2-level
[08:02:08] [PASSED] multi-level
[08:02:08] ==================== [PASSED] test_ops =====================
[08:02:08] ====================== [PASSED] lmtt =======================
[08:02:08] ================= pf_service (11 subtests) =================
[08:02:08] [PASSED] pf_negotiate_any
[08:02:08] [PASSED] pf_negotiate_base_match
[08:02:08] [PASSED] pf_negotiate_base_newer
[08:02:08] [PASSED] pf_negotiate_base_next
[08:02:08] [SKIPPED] pf_negotiate_base_older
[08:02:08] [PASSED] pf_negotiate_base_prev
[08:02:08] [PASSED] pf_negotiate_latest_match
[08:02:08] [PASSED] pf_negotiate_latest_newer
[08:02:08] [PASSED] pf_negotiate_latest_next
[08:02:08] [SKIPPED] pf_negotiate_latest_older
[08:02:08] [SKIPPED] pf_negotiate_latest_prev
[08:02:08] =================== [PASSED] pf_service ====================
[08:02:08] ================= xe_guc_g2g (2 subtests) ==================
[08:02:08] ============== xe_live_guc_g2g_kunit_default  ==============
[08:02:08] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[08:02:08] ============== xe_live_guc_g2g_kunit_allmem  ===============
[08:02:08] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[08:02:08] =================== [SKIPPED] xe_guc_g2g ===================
[08:02:08] =================== xe_mocs (2 subtests) ===================
[08:02:08] ================ xe_live_mocs_kernel_kunit  ================
[08:02:08] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[08:02:08] ================ xe_live_mocs_reset_kunit  =================
[08:02:08] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[08:02:08] ==================== [SKIPPED] xe_mocs =====================
[08:02:08] ================= xe_migrate (2 subtests) ==================
[08:02:08] ================= xe_migrate_sanity_kunit  =================
[08:02:08] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[08:02:08] ================== xe_validate_ccs_kunit  ==================
[08:02:08] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[08:02:08] =================== [SKIPPED] xe_migrate ===================
[08:02:08] ================== xe_dma_buf (1 subtest) ==================
[08:02:08] ==================== xe_dma_buf_kunit  =====================
[08:02:08] ================ [SKIPPED] xe_dma_buf_kunit ================
[08:02:08] =================== [SKIPPED] xe_dma_buf ===================
[08:02:08] ================= xe_bo_shrink (1 subtest) =================
[08:02:08] =================== xe_bo_shrink_kunit  ====================
[08:02:08] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[08:02:08] ================== [SKIPPED] xe_bo_shrink ==================
[08:02:08] ==================== xe_bo (2 subtests) ====================
[08:02:08] ================== xe_ccs_migrate_kunit  ===================
[08:02:08] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[08:02:08] ==================== xe_bo_evict_kunit  ====================
[08:02:08] =============== [SKIPPED] xe_bo_evict_kunit ================
[08:02:08] ===================== [SKIPPED] xe_bo ======================
[08:02:08] ==================== args (13 subtests) ====================
[08:02:08] [PASSED] count_args_test
[08:02:08] [PASSED] call_args_example
[08:02:08] [PASSED] call_args_test
[08:02:08] [PASSED] drop_first_arg_example
[08:02:08] [PASSED] drop_first_arg_test
[08:02:08] [PASSED] first_arg_example
[08:02:08] [PASSED] first_arg_test
[08:02:08] [PASSED] last_arg_example
[08:02:08] [PASSED] last_arg_test
[08:02:08] [PASSED] pick_arg_example
[08:02:08] [PASSED] if_args_example
[08:02:08] [PASSED] if_args_test
[08:02:08] [PASSED] sep_comma_example
[08:02:08] ====================== [PASSED] args =======================
[08:02:08] =================== xe_pci (3 subtests) ====================
[08:02:08] ==================== check_graphics_ip  ====================
[08:02:08] [PASSED] 12.00 Xe_LP
[08:02:08] [PASSED] 12.10 Xe_LP+
[08:02:08] [PASSED] 12.55 Xe_HPG
[08:02:08] [PASSED] 12.60 Xe_HPC
[08:02:08] [PASSED] 12.70 Xe_LPG
[08:02:08] [PASSED] 12.71 Xe_LPG
[08:02:08] [PASSED] 12.74 Xe_LPG+
[08:02:08] [PASSED] 20.01 Xe2_HPG
[08:02:08] [PASSED] 20.02 Xe2_HPG
[08:02:08] [PASSED] 20.04 Xe2_LPG
[08:02:08] [PASSED] 30.00 Xe3_LPG
[08:02:08] [PASSED] 30.01 Xe3_LPG
[08:02:08] [PASSED] 30.03 Xe3_LPG
[08:02:08] [PASSED] 30.04 Xe3_LPG
[08:02:08] [PASSED] 30.05 Xe3_LPG
[08:02:08] [PASSED] 35.10 Xe3p_LPG
[08:02:08] [PASSED] 35.11 Xe3p_XPC
[08:02:08] ================ [PASSED] check_graphics_ip ================
[08:02:08] ===================== check_media_ip  ======================
[08:02:08] [PASSED] 12.00 Xe_M
[08:02:08] [PASSED] 12.55 Xe_HPM
[08:02:08] [PASSED] 13.00 Xe_LPM+
[08:02:08] [PASSED] 13.01 Xe2_HPM
[08:02:08] [PASSED] 20.00 Xe2_LPM
[08:02:08] [PASSED] 30.00 Xe3_LPM
[08:02:08] [PASSED] 30.02 Xe3_LPM
[08:02:08] [PASSED] 35.00 Xe3p_LPM
[08:02:08] [PASSED] 35.03 Xe3p_HPM
[08:02:08] ================= [PASSED] check_media_ip ==================
[08:02:08] =================== check_platform_desc  ===================
[08:02:08] [PASSED] 0x9A60 (TIGERLAKE)
[08:02:08] [PASSED] 0x9A68 (TIGERLAKE)
[08:02:08] [PASSED] 0x9A70 (TIGERLAKE)
[08:02:08] [PASSED] 0x9A40 (TIGERLAKE)
[08:02:08] [PASSED] 0x9A49 (TIGERLAKE)
[08:02:08] [PASSED] 0x9A59 (TIGERLAKE)
[08:02:08] [PASSED] 0x9A78 (TIGERLAKE)
[08:02:08] [PASSED] 0x9AC0 (TIGERLAKE)
[08:02:08] [PASSED] 0x9AC9 (TIGERLAKE)
[08:02:08] [PASSED] 0x9AD9 (TIGERLAKE)
[08:02:08] [PASSED] 0x9AF8 (TIGERLAKE)
[08:02:08] [PASSED] 0x4C80 (ROCKETLAKE)
[08:02:08] [PASSED] 0x4C8A (ROCKETLAKE)
[08:02:08] [PASSED] 0x4C8B (ROCKETLAKE)
[08:02:08] [PASSED] 0x4C8C (ROCKETLAKE)
[08:02:08] [PASSED] 0x4C90 (ROCKETLAKE)
[08:02:08] [PASSED] 0x4C9A (ROCKETLAKE)
[08:02:08] [PASSED] 0x4680 (ALDERLAKE_S)
[08:02:08] [PASSED] 0x4682 (ALDERLAKE_S)
[08:02:08] [PASSED] 0x4688 (ALDERLAKE_S)
[08:02:08] [PASSED] 0x468A (ALDERLAKE_S)
[08:02:08] [PASSED] 0x468B (ALDERLAKE_S)
[08:02:08] [PASSED] 0x4690 (ALDERLAKE_S)
[08:02:08] [PASSED] 0x4692 (ALDERLAKE_S)
[08:02:08] [PASSED] 0x4693 (ALDERLAKE_S)
[08:02:08] [PASSED] 0x46A0 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46A1 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46A2 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46A3 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46A6 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46A8 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46AA (ALDERLAKE_P)
[08:02:08] [PASSED] 0x462A (ALDERLAKE_P)
[08:02:08] [PASSED] 0x4626 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x4628 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46B0 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46B1 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46B2 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46B3 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46C0 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46C1 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46C2 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46C3 (ALDERLAKE_P)
[08:02:08] [PASSED] 0x46D0 (ALDERLAKE_N)
[08:02:08] [PASSED] 0x46D1 (ALDERLAKE_N)
[08:02:08] [PASSED] 0x46D2 (ALDERLAKE_N)
[08:02:08] [PASSED] 0x46D3 (ALDERLAKE_N)
[08:02:08] [PASSED] 0x46D4 (ALDERLAKE_N)
[08:02:08] [PASSED] 0xA721 (ALDERLAKE_P)
[08:02:08] [PASSED] 0xA7A1 (ALDERLAKE_P)
[08:02:08] [PASSED] 0xA7A9 (ALDERLAKE_P)
[08:02:08] [PASSED] 0xA7AC (ALDERLAKE_P)
[08:02:08] [PASSED] 0xA7AD (ALDERLAKE_P)
[08:02:08] [PASSED] 0xA720 (ALDERLAKE_P)
[08:02:08] [PASSED] 0xA7A0 (ALDERLAKE_P)
[08:02:08] [PASSED] 0xA7A8 (ALDERLAKE_P)
[08:02:08] [PASSED] 0xA7AA (ALDERLAKE_P)
[08:02:08] [PASSED] 0xA7AB (ALDERLAKE_P)
[08:02:08] [PASSED] 0xA780 (ALDERLAKE_S)
[08:02:08] [PASSED] 0xA781 (ALDERLAKE_S)
[08:02:08] [PASSED] 0xA782 (ALDERLAKE_S)
[08:02:08] [PASSED] 0xA783 (ALDERLAKE_S)
[08:02:08] [PASSED] 0xA788 (ALDERLAKE_S)
[08:02:08] [PASSED] 0xA789 (ALDERLAKE_S)
[08:02:08] [PASSED] 0xA78A (ALDERLAKE_S)
[08:02:08] [PASSED] 0xA78B (ALDERLAKE_S)
[08:02:08] [PASSED] 0x4905 (DG1)
[08:02:08] [PASSED] 0x4906 (DG1)
[08:02:08] [PASSED] 0x4907 (DG1)
[08:02:08] [PASSED] 0x4908 (DG1)
[08:02:08] [PASSED] 0x4909 (DG1)
[08:02:08] [PASSED] 0x56C0 (DG2)
[08:02:08] [PASSED] 0x56C2 (DG2)
[08:02:08] [PASSED] 0x56C1 (DG2)
[08:02:08] [PASSED] 0x7D51 (METEORLAKE)
[08:02:08] [PASSED] 0x7DD1 (METEORLAKE)
[08:02:08] [PASSED] 0x7D41 (METEORLAKE)
[08:02:08] [PASSED] 0x7D67 (METEORLAKE)
[08:02:08] [PASSED] 0xB640 (METEORLAKE)
[08:02:08] [PASSED] 0x56A0 (DG2)
[08:02:08] [PASSED] 0x56A1 (DG2)
[08:02:08] [PASSED] 0x56A2 (DG2)
[08:02:08] [PASSED] 0x56BE (DG2)
[08:02:08] [PASSED] 0x56BF (DG2)
[08:02:08] [PASSED] 0x5690 (DG2)
[08:02:08] [PASSED] 0x5691 (DG2)
[08:02:08] [PASSED] 0x5692 (DG2)
[08:02:08] [PASSED] 0x56A5 (DG2)
[08:02:08] [PASSED] 0x56A6 (DG2)
[08:02:08] [PASSED] 0x56B0 (DG2)
[08:02:08] [PASSED] 0x56B1 (DG2)
[08:02:08] [PASSED] 0x56BA (DG2)
[08:02:08] [PASSED] 0x56BB (DG2)
[08:02:08] [PASSED] 0x56BC (DG2)
[08:02:08] [PASSED] 0x56BD (DG2)
[08:02:08] [PASSED] 0x5693 (DG2)
[08:02:08] [PASSED] 0x5694 (DG2)
[08:02:08] [PASSED] 0x5695 (DG2)
[08:02:08] [PASSED] 0x56A3 (DG2)
[08:02:08] [PASSED] 0x56A4 (DG2)
[08:02:08] [PASSED] 0x56B2 (DG2)
[08:02:08] [PASSED] 0x56B3 (DG2)
[08:02:08] [PASSED] 0x5696 (DG2)
[08:02:08] [PASSED] 0x5697 (DG2)
[08:02:08] [PASSED] 0xB69 (PVC)
[08:02:08] [PASSED] 0xB6E (PVC)
[08:02:08] [PASSED] 0xBD4 (PVC)
[08:02:08] [PASSED] 0xBD5 (PVC)
[08:02:08] [PASSED] 0xBD6 (PVC)
[08:02:08] [PASSED] 0xBD7 (PVC)
[08:02:08] [PASSED] 0xBD8 (PVC)
[08:02:08] [PASSED] 0xBD9 (PVC)
[08:02:08] [PASSED] 0xBDA (PVC)
[08:02:08] [PASSED] 0xBDB (PVC)
[08:02:08] [PASSED] 0xBE0 (PVC)
[08:02:08] [PASSED] 0xBE1 (PVC)
[08:02:08] [PASSED] 0xBE5 (PVC)
[08:02:08] [PASSED] 0x7D40 (METEORLAKE)
[08:02:08] [PASSED] 0x7D45 (METEORLAKE)
[08:02:08] [PASSED] 0x7D55 (METEORLAKE)
[08:02:08] [PASSED] 0x7D60 (METEORLAKE)
[08:02:08] [PASSED] 0x7DD5 (METEORLAKE)
[08:02:08] [PASSED] 0x6420 (LUNARLAKE)
[08:02:08] [PASSED] 0x64A0 (LUNARLAKE)
[08:02:08] [PASSED] 0x64B0 (LUNARLAKE)
[08:02:08] [PASSED] 0xE202 (BATTLEMAGE)
[08:02:08] [PASSED] 0xE209 (BATTLEMAGE)
[08:02:08] [PASSED] 0xE20B (BATTLEMAGE)
[08:02:08] [PASSED] 0xE20C (BATTLEMAGE)
[08:02:08] [PASSED] 0xE20D (BATTLEMAGE)
[08:02:08] [PASSED] 0xE210 (BATTLEMAGE)
[08:02:08] [PASSED] 0xE211 (BATTLEMAGE)
[08:02:08] [PASSED] 0xE212 (BATTLEMAGE)
[08:02:08] [PASSED] 0xE216 (BATTLEMAGE)
[08:02:08] [PASSED] 0xE220 (BATTLEMAGE)
[08:02:08] [PASSED] 0xE221 (BATTLEMAGE)
[08:02:08] [PASSED] 0xE222 (BATTLEMAGE)
[08:02:08] [PASSED] 0xE223 (BATTLEMAGE)
[08:02:08] [PASSED] 0xB080 (PANTHERLAKE)
[08:02:08] [PASSED] 0xB081 (PANTHERLAKE)
[08:02:08] [PASSED] 0xB082 (PANTHERLAKE)
[08:02:08] [PASSED] 0xB083 (PANTHERLAKE)
[08:02:08] [PASSED] 0xB084 (PANTHERLAKE)
[08:02:08] [PASSED] 0xB085 (PANTHERLAKE)
[08:02:08] [PASSED] 0xB086 (PANTHERLAKE)
[08:02:08] [PASSED] 0xB087 (PANTHERLAKE)
[08:02:08] [PASSED] 0xB08F (PANTHERLAKE)
[08:02:08] [PASSED] 0xB090 (PANTHERLAKE)
[08:02:08] [PASSED] 0xB0A0 (PANTHERLAKE)
[08:02:08] [PASSED] 0xB0B0 (PANTHERLAKE)
[08:02:08] [PASSED] 0xFD80 (PANTHERLAKE)
[08:02:08] [PASSED] 0xFD81 (PANTHERLAKE)
[08:02:08] [PASSED] 0xD740 (NOVALAKE_S)
[08:02:08] [PASSED] 0xD741 (NOVALAKE_S)
[08:02:08] [PASSED] 0xD742 (NOVALAKE_S)
[08:02:08] [PASSED] 0xD743 (NOVALAKE_S)
[08:02:08] [PASSED] 0xD744 (NOVALAKE_S)
[08:02:08] [PASSED] 0xD745 (NOVALAKE_S)
[08:02:08] [PASSED] 0x674C (CRESCENTISLAND)
[08:02:08] [PASSED] 0xD750 (NOVALAKE_P)
[08:02:08] [PASSED] 0xD751 (NOVALAKE_P)
[08:02:08] [PASSED] 0xD752 (NOVALAKE_P)
[08:02:08] [PASSED] 0xD753 (NOVALAKE_P)
[08:02:08] [PASSED] 0xD754 (NOVALAKE_P)
[08:02:08] [PASSED] 0xD755 (NOVALAKE_P)
[08:02:08] [PASSED] 0xD756 (NOVALAKE_P)
[08:02:08] [PASSED] 0xD757 (NOVALAKE_P)
[08:02:08] [PASSED] 0xD75F (NOVALAKE_P)
[08:02:08] =============== [PASSED] check_platform_desc ===============
[08:02:08] ===================== [PASSED] xe_pci ======================
[08:02:08] =================== xe_rtp (2 subtests) ====================
[08:02:08] =============== xe_rtp_process_to_sr_tests  ================
[08:02:08] [PASSED] coalesce-same-reg
[08:02:08] [PASSED] no-match-no-add
[08:02:08] [PASSED] match-or
[08:02:08] [PASSED] match-or-xfail
[08:02:08] [PASSED] no-match-no-add-multiple-rules
[08:02:08] [PASSED] two-regs-two-entries
[08:02:08] [PASSED] clr-one-set-other
[08:02:08] [PASSED] set-field
[08:02:08] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[08:02:08] [PASSED] conflict-not-disjoint
[08:02:08] [PASSED] conflict-reg-type
[08:02:08] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[08:02:08] ================== xe_rtp_process_tests  ===================
[08:02:08] [PASSED] active1
[08:02:08] [PASSED] active2
[08:02:08] [PASSED] active-inactive
[08:02:08] [PASSED] inactive-active
[08:02:08] [PASSED] inactive-1st_or_active-inactive
[08:02:08] [PASSED] inactive-2nd_or_active-inactive
[08:02:08] [PASSED] inactive-last_or_active-inactive
[08:02:08] [PASSED] inactive-no_or_active-inactive
[08:02:08] ============== [PASSED] xe_rtp_process_tests ===============
[08:02:08] ===================== [PASSED] xe_rtp ======================
[08:02:08] ==================== xe_wa (1 subtest) =====================
[08:02:08] ======================== xe_wa_gt  =========================
[08:02:08] [PASSED] TIGERLAKE B0
[08:02:08] [PASSED] DG1 A0
[08:02:08] [PASSED] DG1 B0
[08:02:08] [PASSED] ALDERLAKE_S A0
[08:02:08] [PASSED] ALDERLAKE_S B0
[08:02:08] [PASSED] ALDERLAKE_S C0
[08:02:08] [PASSED] ALDERLAKE_S D0
[08:02:08] [PASSED] ALDERLAKE_P A0
[08:02:08] [PASSED] ALDERLAKE_P B0
[08:02:08] [PASSED] ALDERLAKE_P C0
[08:02:08] [PASSED] ALDERLAKE_S RPLS D0
[08:02:08] [PASSED] ALDERLAKE_P RPLU E0
[08:02:08] [PASSED] DG2 G10 C0
[08:02:08] [PASSED] DG2 G11 B1
[08:02:08] [PASSED] DG2 G12 A1
[08:02:08] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:02:08] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[08:02:08] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[08:02:08] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[08:02:08] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[08:02:08] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[08:02:08] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[08:02:08] ==================== [PASSED] xe_wa_gt =====================
[08:02:08] ====================== [PASSED] xe_wa ======================
[08:02:08] ============================================================
[08:02:08] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[08:02:08] Elapsed time: 35.629s total, 4.264s configuring, 30.740s building, 0.615s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[08:02:08] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:02:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:02:34] Starting KUnit Kernel (1/1)...
[08:02:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:02:34] ============ drm_test_pick_cmdline (2 subtests) ============
[08:02:34] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[08:02:34] =============== drm_test_pick_cmdline_named  ===============
[08:02:34] [PASSED] NTSC
[08:02:34] [PASSED] NTSC-J
[08:02:34] [PASSED] PAL
[08:02:34] [PASSED] PAL-M
[08:02:34] =========== [PASSED] drm_test_pick_cmdline_named ===========
[08:02:34] ============== [PASSED] drm_test_pick_cmdline ==============
[08:02:34] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[08:02:34] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[08:02:34] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[08:02:34] =========== drm_validate_clone_mode (2 subtests) ===========
[08:02:34] ============== drm_test_check_in_clone_mode  ===============
[08:02:34] [PASSED] in_clone_mode
[08:02:34] [PASSED] not_in_clone_mode
[08:02:34] ========== [PASSED] drm_test_check_in_clone_mode ===========
[08:02:34] =============== drm_test_check_valid_clones  ===============
[08:02:34] [PASSED] not_in_clone_mode
[08:02:34] [PASSED] valid_clone
[08:02:34] [PASSED] invalid_clone
[08:02:34] =========== [PASSED] drm_test_check_valid_clones ===========
[08:02:34] ============= [PASSED] drm_validate_clone_mode =============
[08:02:34] ============= drm_validate_modeset (1 subtest) =============
[08:02:34] [PASSED] drm_test_check_connector_changed_modeset
[08:02:34] ============== [PASSED] drm_validate_modeset ===============
[08:02:34] ====== drm_test_bridge_get_current_state (2 subtests) ======
[08:02:34] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[08:02:34] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[08:02:34] ======== [PASSED] drm_test_bridge_get_current_state ========
[08:02:34] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[08:02:34] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[08:02:34] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[08:02:34] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[08:02:34] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[08:02:34] ============== drm_bridge_alloc (2 subtests) ===============
[08:02:34] [PASSED] drm_test_drm_bridge_alloc_basic
[08:02:34] [PASSED] drm_test_drm_bridge_alloc_get_put
[08:02:34] ================ [PASSED] drm_bridge_alloc =================
[08:02:34] ============= drm_cmdline_parser (40 subtests) =============
[08:02:34] [PASSED] drm_test_cmdline_force_d_only
[08:02:34] [PASSED] drm_test_cmdline_force_D_only_dvi
[08:02:34] [PASSED] drm_test_cmdline_force_D_only_hdmi
[08:02:34] [PASSED] drm_test_cmdline_force_D_only_not_digital
[08:02:34] [PASSED] drm_test_cmdline_force_e_only
[08:02:34] [PASSED] drm_test_cmdline_res
[08:02:34] [PASSED] drm_test_cmdline_res_vesa
[08:02:34] [PASSED] drm_test_cmdline_res_vesa_rblank
[08:02:34] [PASSED] drm_test_cmdline_res_rblank
[08:02:34] [PASSED] drm_test_cmdline_res_bpp
[08:02:34] [PASSED] drm_test_cmdline_res_refresh
[08:02:34] [PASSED] drm_test_cmdline_res_bpp_refresh
[08:02:34] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[08:02:34] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[08:02:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[08:02:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[08:02:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[08:02:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[08:02:34] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[08:02:34] [PASSED] drm_test_cmdline_res_margins_force_on
[08:02:34] [PASSED] drm_test_cmdline_res_vesa_margins
[08:02:34] [PASSED] drm_test_cmdline_name
[08:02:34] [PASSED] drm_test_cmdline_name_bpp
[08:02:34] [PASSED] drm_test_cmdline_name_option
[08:02:34] [PASSED] drm_test_cmdline_name_bpp_option
[08:02:34] [PASSED] drm_test_cmdline_rotate_0
[08:02:34] [PASSED] drm_test_cmdline_rotate_90
[08:02:34] [PASSED] drm_test_cmdline_rotate_180
[08:02:34] [PASSED] drm_test_cmdline_rotate_270
[08:02:34] [PASSED] drm_test_cmdline_hmirror
[08:02:34] [PASSED] drm_test_cmdline_vmirror
[08:02:34] [PASSED] drm_test_cmdline_margin_options
[08:02:34] [PASSED] drm_test_cmdline_multiple_options
[08:02:34] [PASSED] drm_test_cmdline_bpp_extra_and_option
[08:02:34] [PASSED] drm_test_cmdline_extra_and_option
[08:02:34] [PASSED] drm_test_cmdline_freestanding_options
[08:02:34] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[08:02:34] [PASSED] drm_test_cmdline_panel_orientation
[08:02:34] ================ drm_test_cmdline_invalid  =================
[08:02:34] [PASSED] margin_only
[08:02:34] [PASSED] interlace_only
[08:02:34] [PASSED] res_missing_x
[08:02:34] [PASSED] res_missing_y
[08:02:34] [PASSED] res_bad_y
[08:02:34] [PASSED] res_missing_y_bpp
[08:02:34] [PASSED] res_bad_bpp
[08:02:34] [PASSED] res_bad_refresh
[08:02:34] [PASSED] res_bpp_refresh_force_on_off
[08:02:34] [PASSED] res_invalid_mode
[08:02:34] [PASSED] res_bpp_wrong_place_mode
[08:02:34] [PASSED] name_bpp_refresh
[08:02:34] [PASSED] name_refresh
[08:02:34] [PASSED] name_refresh_wrong_mode
[08:02:34] [PASSED] name_refresh_invalid_mode
[08:02:34] [PASSED] rotate_multiple
[08:02:34] [PASSED] rotate_invalid_val
[08:02:34] [PASSED] rotate_truncated
[08:02:34] [PASSED] invalid_option
[08:02:34] [PASSED] invalid_tv_option
[08:02:34] [PASSED] truncated_tv_option
[08:02:34] ============ [PASSED] drm_test_cmdline_invalid =============
[08:02:34] =============== drm_test_cmdline_tv_options  ===============
[08:02:34] [PASSED] NTSC
[08:02:34] [PASSED] NTSC_443
[08:02:34] [PASSED] NTSC_J
[08:02:34] [PASSED] PAL
[08:02:34] [PASSED] PAL_M
[08:02:34] [PASSED] PAL_N
[08:02:34] [PASSED] SECAM
[08:02:34] [PASSED] MONO_525
[08:02:34] [PASSED] MONO_625
[08:02:34] =========== [PASSED] drm_test_cmdline_tv_options ===========
[08:02:34] =============== [PASSED] drm_cmdline_parser ================
[08:02:34] ========== drmm_connector_hdmi_init (20 subtests) ==========
[08:02:34] [PASSED] drm_test_connector_hdmi_init_valid
[08:02:34] [PASSED] drm_test_connector_hdmi_init_bpc_8
[08:02:34] [PASSED] drm_test_connector_hdmi_init_bpc_10
[08:02:34] [PASSED] drm_test_connector_hdmi_init_bpc_12
[08:02:34] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[08:02:34] [PASSED] drm_test_connector_hdmi_init_bpc_null
[08:02:34] [PASSED] drm_test_connector_hdmi_init_formats_empty
[08:02:34] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[08:02:34] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[08:02:34] [PASSED] supported_formats=0x9 yuv420_allowed=1
[08:02:34] [PASSED] supported_formats=0x9 yuv420_allowed=0
[08:02:34] [PASSED] supported_formats=0x5 yuv420_allowed=1
[08:02:34] [PASSED] supported_formats=0x5 yuv420_allowed=0
[08:02:34] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[08:02:34] [PASSED] drm_test_connector_hdmi_init_null_ddc
[08:02:34] [PASSED] drm_test_connector_hdmi_init_null_product
[08:02:34] [PASSED] drm_test_connector_hdmi_init_null_vendor
[08:02:34] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[08:02:34] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[08:02:34] [PASSED] drm_test_connector_hdmi_init_product_valid
[08:02:34] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[08:02:34] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[08:02:34] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[08:02:34] ========= drm_test_connector_hdmi_init_type_valid  =========
[08:02:34] [PASSED] HDMI-A
[08:02:34] [PASSED] HDMI-B
[08:02:34] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[08:02:34] ======== drm_test_connector_hdmi_init_type_invalid  ========
[08:02:34] [PASSED] Unknown
[08:02:34] [PASSED] VGA
[08:02:34] [PASSED] DVI-I
[08:02:34] [PASSED] DVI-D
[08:02:34] [PASSED] DVI-A
[08:02:34] [PASSED] Composite
[08:02:34] [PASSED] SVIDEO
[08:02:34] [PASSED] LVDS
[08:02:34] [PASSED] Component
[08:02:34] [PASSED] DIN
[08:02:34] [PASSED] DP
[08:02:34] [PASSED] TV
[08:02:34] [PASSED] eDP
[08:02:34] [PASSED] Virtual
[08:02:34] [PASSED] DSI
[08:02:34] [PASSED] DPI
[08:02:34] [PASSED] Writeback
[08:02:34] [PASSED] SPI
[08:02:34] [PASSED] USB
[08:02:34] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[08:02:34] ============ [PASSED] drmm_connector_hdmi_init =============
[08:02:34] ============= drmm_connector_init (3 subtests) =============
[08:02:34] [PASSED] drm_test_drmm_connector_init
[08:02:34] [PASSED] drm_test_drmm_connector_init_null_ddc
[08:02:34] ========= drm_test_drmm_connector_init_type_valid  =========
[08:02:34] [PASSED] Unknown
[08:02:34] [PASSED] VGA
[08:02:34] [PASSED] DVI-I
[08:02:34] [PASSED] DVI-D
[08:02:34] [PASSED] DVI-A
[08:02:34] [PASSED] Composite
[08:02:34] [PASSED] SVIDEO
[08:02:34] [PASSED] LVDS
[08:02:34] [PASSED] Component
[08:02:34] [PASSED] DIN
[08:02:34] [PASSED] DP
[08:02:34] [PASSED] HDMI-A
[08:02:34] [PASSED] HDMI-B
[08:02:34] [PASSED] TV
[08:02:34] [PASSED] eDP
[08:02:34] [PASSED] Virtual
[08:02:34] [PASSED] DSI
[08:02:34] [PASSED] DPI
[08:02:34] [PASSED] Writeback
[08:02:34] [PASSED] SPI
[08:02:34] [PASSED] USB
[08:02:34] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[08:02:34] =============== [PASSED] drmm_connector_init ===============
[08:02:34] ========= drm_connector_dynamic_init (6 subtests) ==========
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_init
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_init_properties
[08:02:34] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[08:02:34] [PASSED] Unknown
[08:02:34] [PASSED] VGA
[08:02:34] [PASSED] DVI-I
[08:02:34] [PASSED] DVI-D
[08:02:34] [PASSED] DVI-A
[08:02:34] [PASSED] Composite
[08:02:34] [PASSED] SVIDEO
[08:02:34] [PASSED] LVDS
[08:02:34] [PASSED] Component
[08:02:34] [PASSED] DIN
[08:02:34] [PASSED] DP
[08:02:34] [PASSED] HDMI-A
[08:02:34] [PASSED] HDMI-B
[08:02:34] [PASSED] TV
[08:02:34] [PASSED] eDP
[08:02:34] [PASSED] Virtual
[08:02:34] [PASSED] DSI
[08:02:34] [PASSED] DPI
[08:02:34] [PASSED] Writeback
[08:02:34] [PASSED] SPI
[08:02:34] [PASSED] USB
[08:02:34] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[08:02:34] ======== drm_test_drm_connector_dynamic_init_name  =========
[08:02:34] [PASSED] Unknown
[08:02:34] [PASSED] VGA
[08:02:34] [PASSED] DVI-I
[08:02:34] [PASSED] DVI-D
[08:02:34] [PASSED] DVI-A
[08:02:34] [PASSED] Composite
[08:02:34] [PASSED] SVIDEO
[08:02:34] [PASSED] LVDS
[08:02:34] [PASSED] Component
[08:02:34] [PASSED] DIN
[08:02:34] [PASSED] DP
[08:02:34] [PASSED] HDMI-A
[08:02:34] [PASSED] HDMI-B
[08:02:34] [PASSED] TV
[08:02:34] [PASSED] eDP
[08:02:34] [PASSED] Virtual
[08:02:34] [PASSED] DSI
[08:02:34] [PASSED] DPI
[08:02:34] [PASSED] Writeback
[08:02:34] [PASSED] SPI
[08:02:34] [PASSED] USB
[08:02:34] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[08:02:34] =========== [PASSED] drm_connector_dynamic_init ============
[08:02:34] ==== drm_connector_dynamic_register_early (4 subtests) =====
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[08:02:34] ====== [PASSED] drm_connector_dynamic_register_early =======
[08:02:34] ======= drm_connector_dynamic_register (7 subtests) ========
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[08:02:34] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[08:02:34] ========= [PASSED] drm_connector_dynamic_register ==========
[08:02:34] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[08:02:34] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[08:02:34] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[08:02:34] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[08:02:34] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[08:02:34] ========== drm_test_get_tv_mode_from_name_valid  ===========
[08:02:34] [PASSED] NTSC
[08:02:34] [PASSED] NTSC-443
[08:02:34] [PASSED] NTSC-J
[08:02:34] [PASSED] PAL
[08:02:34] [PASSED] PAL-M
[08:02:34] [PASSED] PAL-N
[08:02:34] [PASSED] SECAM
[08:02:34] [PASSED] Mono
[08:02:34] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[08:02:34] [PASSED] drm_test_get_tv_mode_from_name_truncated
[08:02:34] ============ [PASSED] drm_get_tv_mode_from_name ============
[08:02:34] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[08:02:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[08:02:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[08:02:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[08:02:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[08:02:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[08:02:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[08:02:34] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[08:02:34] [PASSED] VIC 96
[08:02:34] [PASSED] VIC 97
[08:02:34] [PASSED] VIC 101
[08:02:34] [PASSED] VIC 102
[08:02:34] [PASSED] VIC 106
[08:02:34] [PASSED] VIC 107
[08:02:34] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[08:02:34] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[08:02:34] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[08:02:34] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[08:02:34] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[08:02:34] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[08:02:34] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[08:02:34] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[08:02:34] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[08:02:34] [PASSED] Automatic
[08:02:34] [PASSED] Full
[08:02:34] [PASSED] Limited 16:235
[08:02:34] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[08:02:34] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[08:02:34] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[08:02:34] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[08:02:34] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[08:02:34] [PASSED] RGB
[08:02:34] [PASSED] YUV 4:2:0
[08:02:34] [PASSED] YUV 4:2:2
[08:02:34] [PASSED] YUV 4:4:4
[08:02:34] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[08:02:34] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[08:02:34] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[08:02:34] ============= drm_damage_helper (21 subtests) ==============
[08:02:34] [PASSED] drm_test_damage_iter_no_damage
[08:02:34] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[08:02:34] [PASSED] drm_test_damage_iter_no_damage_src_moved
[08:02:34] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[08:02:34] [PASSED] drm_test_damage_iter_no_damage_not_visible
[08:02:34] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[08:02:34] [PASSED] drm_test_damage_iter_no_damage_no_fb
[08:02:34] [PASSED] drm_test_damage_iter_simple_damage
[08:02:34] [PASSED] drm_test_damage_iter_single_damage
[08:02:34] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[08:02:34] [PASSED] drm_test_damage_iter_single_damage_outside_src
[08:02:34] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[08:02:34] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[08:02:34] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[08:02:34] [PASSED] drm_test_damage_iter_single_damage_src_moved
[08:02:34] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[08:02:34] [PASSED] drm_test_damage_iter_damage
[08:02:34] [PASSED] drm_test_damage_iter_damage_one_intersect
[08:02:34] [PASSED] drm_test_damage_iter_damage_one_outside
[08:02:34] [PASSED] drm_test_damage_iter_damage_src_moved
[08:02:34] [PASSED] drm_test_damage_iter_damage_not_visible
[08:02:34] ================ [PASSED] drm_damage_helper ================
[08:02:34] ============== drm_dp_mst_helper (3 subtests) ==============
[08:02:34] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[08:02:34] [PASSED] Clock 154000 BPP 30 DSC disabled
[08:02:34] [PASSED] Clock 234000 BPP 30 DSC disabled
[08:02:34] [PASSED] Clock 297000 BPP 24 DSC disabled
[08:02:34] [PASSED] Clock 332880 BPP 24 DSC enabled
[08:02:34] [PASSED] Clock 324540 BPP 24 DSC enabled
[08:02:34] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[08:02:34] ============== drm_test_dp_mst_calc_pbn_div  ===============
[08:02:34] [PASSED] Link rate 2000000 lane count 4
[08:02:34] [PASSED] Link rate 2000000 lane count 2
[08:02:34] [PASSED] Link rate 2000000 lane count 1
[08:02:34] [PASSED] Link rate 1350000 lane count 4
[08:02:34] [PASSED] Link rate 1350000 lane count 2
[08:02:34] [PASSED] Link rate 1350000 lane count 1
[08:02:34] [PASSED] Link rate 1000000 lane count 4
[08:02:34] [PASSED] Link rate 1000000 lane count 2
[08:02:34] [PASSED] Link rate 1000000 lane count 1
[08:02:34] [PASSED] Link rate 810000 lane count 4
[08:02:34] [PASSED] Link rate 810000 lane count 2
[08:02:34] [PASSED] Link rate 810000 lane count 1
[08:02:34] [PASSED] Link rate 540000 lane count 4
[08:02:34] [PASSED] Link rate 540000 lane count 2
[08:02:34] [PASSED] Link rate 540000 lane count 1
[08:02:34] [PASSED] Link rate 270000 lane count 4
[08:02:34] [PASSED] Link rate 270000 lane count 2
[08:02:34] [PASSED] Link rate 270000 lane count 1
[08:02:34] [PASSED] Link rate 162000 lane count 4
[08:02:34] [PASSED] Link rate 162000 lane count 2
[08:02:34] [PASSED] Link rate 162000 lane count 1
[08:02:34] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[08:02:34] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[08:02:34] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[08:02:34] [PASSED] DP_POWER_UP_PHY with port number
[08:02:34] [PASSED] DP_POWER_DOWN_PHY with port number
[08:02:34] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[08:02:34] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[08:02:34] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[08:02:34] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[08:02:34] [PASSED] DP_QUERY_PAYLOAD with port number
[08:02:34] [PASSED] DP_QUERY_PAYLOAD with VCPI
[08:02:34] [PASSED] DP_REMOTE_DPCD_READ with port number
[08:02:34] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[08:02:34] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[08:02:34] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[08:02:34] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[08:02:34] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[08:02:34] [PASSED] DP_REMOTE_I2C_READ with port number
[08:02:34] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[08:02:34] [PASSED] DP_REMOTE_I2C_READ with transactions array
[08:02:34] [PASSED] DP_REMOTE_I2C_WRITE with port number
[08:02:34] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[08:02:34] [PASSED] DP_REMOTE_I2C_WRITE with data array
[08:02:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[08:02:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[08:02:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[08:02:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[08:02:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[08:02:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[08:02:34] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[08:02:34] ================ [PASSED] drm_dp_mst_helper ================
[08:02:34] ================== drm_exec (7 subtests) ===================
[08:02:34] [PASSED] sanitycheck
[08:02:34] [PASSED] test_lock
[08:02:34] [PASSED] test_lock_unlock
[08:02:34] [PASSED] test_duplicates
[08:02:34] [PASSED] test_prepare
[08:02:34] [PASSED] test_prepare_array
[08:02:34] [PASSED] test_multiple_loops
[08:02:34] ==================== [PASSED] drm_exec =====================
[08:02:34] =========== drm_format_helper_test (17 subtests) ===========
[08:02:34] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[08:02:34] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[08:02:34] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[08:02:34] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[08:02:34] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[08:02:34] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[08:02:34] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[08:02:34] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[08:02:34] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[08:02:34] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[08:02:34] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[08:02:34] ============== drm_test_fb_xrgb8888_to_mono  ===============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[08:02:34] ==================== drm_test_fb_swab  =====================
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ================ [PASSED] drm_test_fb_swab =================
[08:02:34] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[08:02:34] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[08:02:34] [PASSED] single_pixel_source_buffer
[08:02:34] [PASSED] single_pixel_clip_rectangle
[08:02:34] [PASSED] well_known_colors
[08:02:34] [PASSED] destination_pitch
[08:02:34] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[08:02:34] ================= drm_test_fb_clip_offset  =================
[08:02:34] [PASSED] pass through
[08:02:34] [PASSED] horizontal offset
[08:02:34] [PASSED] vertical offset
[08:02:34] [PASSED] horizontal and vertical offset
[08:02:34] [PASSED] horizontal offset (custom pitch)
[08:02:34] [PASSED] vertical offset (custom pitch)
[08:02:34] [PASSED] horizontal and vertical offset (custom pitch)
[08:02:34] ============= [PASSED] drm_test_fb_clip_offset =============
[08:02:34] =================== drm_test_fb_memcpy  ====================
[08:02:34] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[08:02:34] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[08:02:34] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[08:02:34] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[08:02:34] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[08:02:34] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[08:02:34] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[08:02:34] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[08:02:34] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[08:02:34] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[08:02:34] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[08:02:34] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[08:02:34] =============== [PASSED] drm_test_fb_memcpy ================
[08:02:34] ============= [PASSED] drm_format_helper_test ==============
[08:02:34] ================= drm_format (18 subtests) =================
[08:02:34] [PASSED] drm_test_format_block_width_invalid
[08:02:34] [PASSED] drm_test_format_block_width_one_plane
[08:02:34] [PASSED] drm_test_format_block_width_two_plane
[08:02:34] [PASSED] drm_test_format_block_width_three_plane
[08:02:34] [PASSED] drm_test_format_block_width_tiled
[08:02:34] [PASSED] drm_test_format_block_height_invalid
[08:02:34] [PASSED] drm_test_format_block_height_one_plane
[08:02:34] [PASSED] drm_test_format_block_height_two_plane
[08:02:34] [PASSED] drm_test_format_block_height_three_plane
[08:02:34] [PASSED] drm_test_format_block_height_tiled
[08:02:34] [PASSED] drm_test_format_min_pitch_invalid
[08:02:34] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[08:02:34] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[08:02:34] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[08:02:34] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[08:02:34] [PASSED] drm_test_format_min_pitch_two_plane
[08:02:34] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[08:02:34] [PASSED] drm_test_format_min_pitch_tiled
[08:02:34] =================== [PASSED] drm_format ====================
[08:02:34] ============== drm_framebuffer (10 subtests) ===============
[08:02:34] ========== drm_test_framebuffer_check_src_coords  ==========
[08:02:34] [PASSED] Success: source fits into fb
[08:02:34] [PASSED] Fail: overflowing fb with x-axis coordinate
[08:02:34] [PASSED] Fail: overflowing fb with y-axis coordinate
[08:02:34] [PASSED] Fail: overflowing fb with source width
[08:02:34] [PASSED] Fail: overflowing fb with source height
[08:02:34] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[08:02:34] [PASSED] drm_test_framebuffer_cleanup
[08:02:34] =============== drm_test_framebuffer_create  ===============
[08:02:34] [PASSED] ABGR8888 normal sizes
[08:02:34] [PASSED] ABGR8888 max sizes
[08:02:34] [PASSED] ABGR8888 pitch greater than min required
[08:02:34] [PASSED] ABGR8888 pitch less than min required
[08:02:34] [PASSED] ABGR8888 Invalid width
[08:02:34] [PASSED] ABGR8888 Invalid buffer handle
[08:02:34] [PASSED] No pixel format
[08:02:34] [PASSED] ABGR8888 Width 0
[08:02:34] [PASSED] ABGR8888 Height 0
[08:02:34] [PASSED] ABGR8888 Out of bound height * pitch combination
[08:02:34] [PASSED] ABGR8888 Large buffer offset
[08:02:34] [PASSED] ABGR8888 Buffer offset for inexistent plane
[08:02:34] [PASSED] ABGR8888 Invalid flag
[08:02:34] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[08:02:34] [PASSED] ABGR8888 Valid buffer modifier
[08:02:34] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[08:02:34] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[08:02:34] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[08:02:34] [PASSED] NV12 Normal sizes
[08:02:34] [PASSED] NV12 Max sizes
[08:02:34] [PASSED] NV12 Invalid pitch
[08:02:34] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[08:02:34] [PASSED] NV12 different  modifier per-plane
[08:02:34] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[08:02:34] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[08:02:34] [PASSED] NV12 Modifier for inexistent plane
[08:02:34] [PASSED] NV12 Handle for inexistent plane
[08:02:34] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[08:02:34] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[08:02:34] [PASSED] YVU420 Normal sizes
[08:02:34] [PASSED] YVU420 Max sizes
[08:02:34] [PASSED] YVU420 Invalid pitch
[08:02:34] [PASSED] YVU420 Different pitches
[08:02:34] [PASSED] YVU420 Different buffer offsets/pitches
[08:02:34] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[08:02:34] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[08:02:34] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[08:02:34] [PASSED] YVU420 Valid modifier
[08:02:34] [PASSED] YVU420 Different modifiers per plane
[08:02:34] [PASSED] YVU420 Modifier for inexistent plane
[08:02:34] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[08:02:34] [PASSED] X0L2 Normal sizes
[08:02:34] [PASSED] X0L2 Max sizes
[08:02:34] [PASSED] X0L2 Invalid pitch
[08:02:34] [PASSED] X0L2 Pitch greater than minimum required
[08:02:34] [PASSED] X0L2 Handle for inexistent plane
[08:02:34] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[08:02:34] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[08:02:34] [PASSED] X0L2 Valid modifier
[08:02:34] [PASSED] X0L2 Modifier for inexistent plane
[08:02:34] =========== [PASSED] drm_test_framebuffer_create ===========
[08:02:34] [PASSED] drm_test_framebuffer_free
[08:02:34] [PASSED] drm_test_framebuffer_init
[08:02:34] [PASSED] drm_test_framebuffer_init_bad_format
[08:02:34] [PASSED] drm_test_framebuffer_init_dev_mismatch
[08:02:34] [PASSED] drm_test_framebuffer_lookup
[08:02:34] [PASSED] drm_test_framebuffer_lookup_inexistent
[08:02:34] [PASSED] drm_test_framebuffer_modifiers_not_supported
[08:02:34] ================= [PASSED] drm_framebuffer =================
[08:02:34] ================ drm_gem_shmem (8 subtests) ================
[08:02:34] [PASSED] drm_gem_shmem_test_obj_create
[08:02:34] [PASSED] drm_gem_shmem_test_obj_create_private
[08:02:34] [PASSED] drm_gem_shmem_test_pin_pages
[08:02:34] [PASSED] drm_gem_shmem_test_vmap
[08:02:34] [PASSED] drm_gem_shmem_test_get_sg_table
[08:02:34] [PASSED] drm_gem_shmem_test_get_pages_sgt
[08:02:34] [PASSED] drm_gem_shmem_test_madvise
[08:02:34] [PASSED] drm_gem_shmem_test_purge
[08:02:34] ================== [PASSED] drm_gem_shmem ==================
[08:02:34] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[08:02:34] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[08:02:34] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[08:02:34] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[08:02:34] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[08:02:34] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[08:02:34] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[08:02:34] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[08:02:34] [PASSED] Automatic
[08:02:34] [PASSED] Full
[08:02:34] [PASSED] Limited 16:235
[08:02:34] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[08:02:34] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[08:02:34] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[08:02:34] [PASSED] drm_test_check_disable_connector
[08:02:34] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[08:02:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[08:02:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[08:02:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[08:02:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[08:02:34] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[08:02:34] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[08:02:34] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[08:02:34] [PASSED] drm_test_check_output_bpc_dvi
[08:02:34] [PASSED] drm_test_check_output_bpc_format_vic_1
[08:02:34] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[08:02:34] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[08:02:34] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[08:02:34] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[08:02:34] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[08:02:34] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[08:02:34] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[08:02:34] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[08:02:34] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[08:02:34] [PASSED] drm_test_check_broadcast_rgb_value
[08:02:34] [PASSED] drm_test_check_bpc_8_value
[08:02:34] [PASSED] drm_test_check_bpc_10_value
[08:02:34] [PASSED] drm_test_check_bpc_12_value
[08:02:34] [PASSED] drm_test_check_format_value
[08:02:34] [PASSED] drm_test_check_tmds_char_value
[08:02:34] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[08:02:34] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[08:02:34] [PASSED] drm_test_check_mode_valid
[08:02:34] [PASSED] drm_test_check_mode_valid_reject
[08:02:34] [PASSED] drm_test_check_mode_valid_reject_rate
[08:02:34] [PASSED] drm_test_check_mode_valid_reject_max_clock
[08:02:34] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[08:02:34] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[08:02:34] [PASSED] drm_test_check_infoframes
[08:02:34] [PASSED] drm_test_check_reject_avi_infoframe
[08:02:34] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[08:02:34] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[08:02:34] [PASSED] drm_test_check_reject_audio_infoframe
[08:02:34] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[08:02:34] ================= drm_managed (2 subtests) =================
[08:02:34] [PASSED] drm_test_managed_release_action
[08:02:34] [PASSED] drm_test_managed_run_action
[08:02:34] =================== [PASSED] drm_managed ===================
[08:02:34] =================== drm_mm (6 subtests) ====================
[08:02:34] [PASSED] drm_test_mm_init
[08:02:34] [PASSED] drm_test_mm_debug
[08:02:34] [PASSED] drm_test_mm_align32
[08:02:34] [PASSED] drm_test_mm_align64
[08:02:34] [PASSED] drm_test_mm_lowest
[08:02:34] [PASSED] drm_test_mm_highest
[08:02:34] ===================== [PASSED] drm_mm ======================
[08:02:34] ============= drm_modes_analog_tv (5 subtests) =============
[08:02:34] [PASSED] drm_test_modes_analog_tv_mono_576i
[08:02:34] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[08:02:34] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[08:02:34] [PASSED] drm_test_modes_analog_tv_pal_576i
[08:02:34] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[08:02:34] =============== [PASSED] drm_modes_analog_tv ===============
[08:02:34] ============== drm_plane_helper (2 subtests) ===============
[08:02:34] =============== drm_test_check_plane_state  ================
[08:02:34] [PASSED] clipping_simple
[08:02:34] [PASSED] clipping_rotate_reflect
[08:02:34] [PASSED] positioning_simple
[08:02:34] [PASSED] upscaling
[08:02:34] [PASSED] downscaling
[08:02:34] [PASSED] rounding1
[08:02:34] [PASSED] rounding2
[08:02:34] [PASSED] rounding3
[08:02:34] [PASSED] rounding4
[08:02:34] =========== [PASSED] drm_test_check_plane_state ============
[08:02:34] =========== drm_test_check_invalid_plane_state  ============
[08:02:34] [PASSED] positioning_invalid
[08:02:34] [PASSED] upscaling_invalid
[08:02:34] [PASSED] downscaling_invalid
[08:02:34] ======= [PASSED] drm_test_check_invalid_plane_state ========
[08:02:34] ================ [PASSED] drm_plane_helper =================
[08:02:34] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[08:02:34] ====== drm_test_connector_helper_tv_get_modes_check  =======
[08:02:34] [PASSED] None
[08:02:34] [PASSED] PAL
[08:02:34] [PASSED] NTSC
[08:02:34] [PASSED] Both, NTSC Default
[08:02:34] [PASSED] Both, PAL Default
[08:02:34] [PASSED] Both, NTSC Default, with PAL on command-line
[08:02:34] [PASSED] Both, PAL Default, with NTSC on command-line
[08:02:34] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[08:02:34] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[08:02:34] ================== drm_rect (9 subtests) ===================
[08:02:34] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[08:02:34] [PASSED] drm_test_rect_clip_scaled_not_clipped
[08:02:34] [PASSED] drm_test_rect_clip_scaled_clipped
[08:02:34] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[08:02:34] ================= drm_test_rect_intersect  =================
[08:02:34] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[08:02:34] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[08:02:34] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[08:02:34] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[08:02:34] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[08:02:34] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[08:02:34] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[08:02:34] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[08:02:34] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[08:02:34] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[08:02:34] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[08:02:34] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[08:02:34] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[08:02:34] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[08:02:34] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[08:02:34] ============= [PASSED] drm_test_rect_intersect =============
[08:02:34] ================ drm_test_rect_calc_hscale  ================
[08:02:34] [PASSED] normal use
[08:02:34] [PASSED] out of max range
[08:02:34] [PASSED] out of min range
[08:02:34] [PASSED] zero dst
[08:02:34] [PASSED] negative src
[08:02:34] [PASSED] negative dst
[08:02:34] ============ [PASSED] drm_test_rect_calc_hscale ============
[08:02:34] ================ drm_test_rect_calc_vscale  ================
[08:02:34] [PASSED] normal use
[08:02:34] [PASSED] out of max range
[08:02:34] [PASSED] out of min range
[08:02:34] [PASSED] zero dst
[08:02:34] [PASSED] negative src
[08:02:34] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[08:02:34] ============ [PASSED] drm_test_rect_calc_vscale ============
[08:02:34] ================== drm_test_rect_rotate  ===================
[08:02:34] [PASSED] reflect-x
[08:02:34] [PASSED] reflect-y
[08:02:34] [PASSED] rotate-0
[08:02:34] [PASSED] rotate-90
[08:02:34] [PASSED] rotate-180
[08:02:34] [PASSED] rotate-270
[08:02:34] ============== [PASSED] drm_test_rect_rotate ===============
[08:02:34] ================ drm_test_rect_rotate_inv  =================
[08:02:34] [PASSED] reflect-x
[08:02:34] [PASSED] reflect-y
[08:02:34] [PASSED] rotate-0
[08:02:34] [PASSED] rotate-90
[08:02:34] [PASSED] rotate-180
[08:02:34] [PASSED] rotate-270
[08:02:34] ============ [PASSED] drm_test_rect_rotate_inv =============
[08:02:34] ==================== [PASSED] drm_rect =====================
[08:02:34] ============ drm_sysfb_modeset_test (1 subtest) ============
[08:02:34] ============ drm_test_sysfb_build_fourcc_list  =============
[08:02:34] [PASSED] no native formats
[08:02:34] [PASSED] XRGB8888 as native format
[08:02:34] [PASSED] remove duplicates
[08:02:34] [PASSED] convert alpha formats
[08:02:34] [PASSED] random formats
[08:02:34] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[08:02:34] ============= [PASSED] drm_sysfb_modeset_test ==============
[08:02:34] ================== drm_fixp (2 subtests) ===================
[08:02:34] [PASSED] drm_test_int2fixp
[08:02:34] [PASSED] drm_test_sm2fixp
[08:02:34] ==================== [PASSED] drm_fixp =====================
[08:02:34] ============================================================
[08:02:34] Testing complete. Ran 621 tests: passed: 621
[08:02:34] Elapsed time: 26.413s total, 1.723s configuring, 24.473s building, 0.172s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[08:02:34] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[08:02:36] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[08:02:46] Starting KUnit Kernel (1/1)...
[08:02:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[08:02:46] ================= ttm_device (5 subtests) ==================
[08:02:46] [PASSED] ttm_device_init_basic
[08:02:46] [PASSED] ttm_device_init_multiple
[08:02:46] [PASSED] ttm_device_fini_basic
[08:02:46] [PASSED] ttm_device_init_no_vma_man
[08:02:46] ================== ttm_device_init_pools  ==================
[08:02:46] [PASSED] No DMA allocations, no DMA32 required
[08:02:46] [PASSED] DMA allocations, DMA32 required
[08:02:46] [PASSED] No DMA allocations, DMA32 required
[08:02:46] [PASSED] DMA allocations, no DMA32 required
[08:02:46] ============== [PASSED] ttm_device_init_pools ==============
[08:02:46] =================== [PASSED] ttm_device ====================
[08:02:46] ================== ttm_pool (8 subtests) ===================
[08:02:46] ================== ttm_pool_alloc_basic  ===================
[08:02:46] [PASSED] One page
[08:02:46] [PASSED] More than one page
[08:02:46] [PASSED] Above the allocation limit
[08:02:46] [PASSED] One page, with coherent DMA mappings enabled
[08:02:46] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:02:46] ============== [PASSED] ttm_pool_alloc_basic ===============
[08:02:46] ============== ttm_pool_alloc_basic_dma_addr  ==============
[08:02:46] [PASSED] One page
[08:02:46] [PASSED] More than one page
[08:02:46] [PASSED] Above the allocation limit
[08:02:46] [PASSED] One page, with coherent DMA mappings enabled
[08:02:46] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[08:02:46] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[08:02:46] [PASSED] ttm_pool_alloc_order_caching_match
[08:02:46] [PASSED] ttm_pool_alloc_caching_mismatch
[08:02:46] [PASSED] ttm_pool_alloc_order_mismatch
[08:02:46] [PASSED] ttm_pool_free_dma_alloc
[08:02:46] [PASSED] ttm_pool_free_no_dma_alloc
[08:02:46] [PASSED] ttm_pool_fini_basic
[08:02:46] ==================== [PASSED] ttm_pool =====================
[08:02:46] ================ ttm_resource (8 subtests) =================
[08:02:46] ================= ttm_resource_init_basic  =================
[08:02:46] [PASSED] Init resource in TTM_PL_SYSTEM
[08:02:46] [PASSED] Init resource in TTM_PL_VRAM
[08:02:46] [PASSED] Init resource in a private placement
[08:02:46] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[08:02:46] ============= [PASSED] ttm_resource_init_basic =============
[08:02:46] [PASSED] ttm_resource_init_pinned
[08:02:46] [PASSED] ttm_resource_fini_basic
[08:02:46] [PASSED] ttm_resource_manager_init_basic
[08:02:46] [PASSED] ttm_resource_manager_usage_basic
[08:02:46] [PASSED] ttm_resource_manager_set_used_basic
[08:02:46] [PASSED] ttm_sys_man_alloc_basic
[08:02:46] [PASSED] ttm_sys_man_free_basic
[08:02:46] ================== [PASSED] ttm_resource ===================
[08:02:46] =================== ttm_tt (15 subtests) ===================
[08:02:46] ==================== ttm_tt_init_basic  ====================
[08:02:46] [PASSED] Page-aligned size
[08:02:46] [PASSED] Extra pages requested
[08:02:46] ================ [PASSED] ttm_tt_init_basic ================
[08:02:46] [PASSED] ttm_tt_init_misaligned
[08:02:46] [PASSED] ttm_tt_fini_basic
[08:02:46] [PASSED] ttm_tt_fini_sg
[08:02:46] [PASSED] ttm_tt_fini_shmem
[08:02:46] [PASSED] ttm_tt_create_basic
[08:02:46] [PASSED] ttm_tt_create_invalid_bo_type
[08:02:46] [PASSED] ttm_tt_create_ttm_exists
[08:02:46] [PASSED] ttm_tt_create_failed
[08:02:46] [PASSED] ttm_tt_destroy_basic
[08:02:46] [PASSED] ttm_tt_populate_null_ttm
[08:02:46] [PASSED] ttm_tt_populate_populated_ttm
[08:02:46] [PASSED] ttm_tt_unpopulate_basic
[08:02:46] [PASSED] ttm_tt_unpopulate_empty_ttm
[08:02:46] [PASSED] ttm_tt_swapin_basic
[08:02:46] ===================== [PASSED] ttm_tt ======================
[08:02:46] =================== ttm_bo (14 subtests) ===================
[08:02:46] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[08:02:46] [PASSED] Cannot be interrupted and sleeps
[08:02:46] [PASSED] Cannot be interrupted, locks straight away
[08:02:46] [PASSED] Can be interrupted, sleeps
[08:02:46] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[08:02:46] [PASSED] ttm_bo_reserve_locked_no_sleep
[08:02:46] [PASSED] ttm_bo_reserve_no_wait_ticket
[08:02:46] [PASSED] ttm_bo_reserve_double_resv
[08:02:46] [PASSED] ttm_bo_reserve_interrupted
[08:02:46] [PASSED] ttm_bo_reserve_deadlock
[08:02:46] [PASSED] ttm_bo_unreserve_basic
[08:02:46] [PASSED] ttm_bo_unreserve_pinned
[08:02:46] [PASSED] ttm_bo_unreserve_bulk
[08:02:46] [PASSED] ttm_bo_fini_basic
[08:02:46] [PASSED] ttm_bo_fini_shared_resv
[08:02:46] [PASSED] ttm_bo_pin_basic
[08:02:46] [PASSED] ttm_bo_pin_unpin_resource
[08:02:46] [PASSED] ttm_bo_multiple_pin_one_unpin
[08:02:46] ===================== [PASSED] ttm_bo ======================
[08:02:46] ============== ttm_bo_validate (22 subtests) ===============
[08:02:46] ============== ttm_bo_init_reserved_sys_man  ===============
[08:02:46] [PASSED] Buffer object for userspace
[08:02:46] [PASSED] Kernel buffer object
[08:02:46] [PASSED] Shared buffer object
[08:02:46] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[08:02:46] ============== ttm_bo_init_reserved_mock_man  ==============
[08:02:46] [PASSED] Buffer object for userspace
[08:02:46] [PASSED] Kernel buffer object
[08:02:46] [PASSED] Shared buffer object
[08:02:46] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[08:02:46] [PASSED] ttm_bo_init_reserved_resv
[08:02:46] ================== ttm_bo_validate_basic  ==================
[08:02:46] [PASSED] Buffer object for userspace
[08:02:46] [PASSED] Kernel buffer object
[08:02:46] [PASSED] Shared buffer object
[08:02:46] ============== [PASSED] ttm_bo_validate_basic ==============
[08:02:46] [PASSED] ttm_bo_validate_invalid_placement
[08:02:46] ============= ttm_bo_validate_same_placement  ==============
[08:02:46] [PASSED] System manager
[08:02:46] [PASSED] VRAM manager
[08:02:46] ========= [PASSED] ttm_bo_validate_same_placement ==========
[08:02:46] [PASSED] ttm_bo_validate_failed_alloc
[08:02:46] [PASSED] ttm_bo_validate_pinned
[08:02:46] [PASSED] ttm_bo_validate_busy_placement
[08:02:46] ================ ttm_bo_validate_multihop  =================
[08:02:46] [PASSED] Buffer object for userspace
[08:02:46] [PASSED] Kernel buffer object
[08:02:46] [PASSED] Shared buffer object
[08:02:46] ============ [PASSED] ttm_bo_validate_multihop =============
[08:02:46] ========== ttm_bo_validate_no_placement_signaled  ==========
[08:02:46] [PASSED] Buffer object in system domain, no page vector
[08:02:46] [PASSED] Buffer object in system domain with an existing page vector
[08:02:46] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[08:02:46] ======== ttm_bo_validate_no_placement_not_signaled  ========
[08:02:46] [PASSED] Buffer object for userspace
[08:02:46] [PASSED] Kernel buffer object
[08:02:46] [PASSED] Shared buffer object
[08:02:46] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[08:02:46] [PASSED] ttm_bo_validate_move_fence_signaled
[08:02:46] ========= ttm_bo_validate_move_fence_not_signaled  =========
[08:02:46] [PASSED] Waits for GPU
[08:02:46] [PASSED] Tries to lock straight away
[08:02:46] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[08:02:46] [PASSED] ttm_bo_validate_swapout
[08:02:46] [PASSED] ttm_bo_validate_happy_evict
[08:02:46] [PASSED] ttm_bo_validate_all_pinned_evict
[08:02:46] [PASSED] ttm_bo_validate_allowed_only_evict
[08:02:46] [PASSED] ttm_bo_validate_deleted_evict
[08:02:46] [PASSED] ttm_bo_validate_busy_domain_evict
[08:02:46] [PASSED] ttm_bo_validate_evict_gutting
[08:02:46] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[08:02:46] ================= [PASSED] ttm_bo_validate =================
[08:02:46] ============================================================
[08:02:46] Testing complete. Ran 102 tests: passed: 102
[08:02:46] Elapsed time: 11.402s total, 1.745s configuring, 9.440s building, 0.188s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Introduce Xe Uncorrectable Error Handling (rev3)

[Patchwork]

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== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev3)
URL   : https://patchwork.freedesktop.org/series/160482/
State : success

== Summary ==

CI Bug Log - changes from xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11_BAT -> xe-pw-160482v3_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (14 -> 14)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11 -> xe-pw-160482v3

  IGT_8842: 8842
  xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11: 2ca39f35278e7f6e1750c710e75c32172fb1aa11
  xe-pw-160482v3: 160482v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/index.html

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✓ Xe.CI.FULL: success for Introduce Xe Uncorrectable Error Handling (rev3)

[Patchwork]

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== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev3)
URL   : https://patchwork.freedesktop.org/series/160482/
State : success

== Summary ==

CI Bug Log - changes from xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11_FULL -> xe-pw-160482v3_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-160482v3_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@4-tiled-16bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][1] ([Intel XE#1407])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][2] ([Intel XE#1124]) +1 other test skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][3] ([Intel XE#3432])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions:
    - shard-lnl:          NOTRUN -> [SKIP][4] ([Intel XE#309] / [Intel XE#7343])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#2244])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [PASS][6] -> [FAIL][7] ([Intel XE#301] / [Intel XE#3149]) +2 other tests fail
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [PASS][8] -> [FAIL][9] ([Intel XE#301]) +1 other test fail
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#656])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-move:
    - shard-lnl:          NOTRUN -> [SKIP][12] ([Intel XE#6312] / [Intel XE#651])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-move.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#2893] / [Intel XE#7304])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#1435])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@xe_eudebug@basic-vm-access-parameters-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#7636])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@xe_eudebug@basic-vm-access-parameters-userptr.html

  * igt@xe_exec_balancer@no-exec-virtual-userptr-invalidate:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#7482]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@xe_exec_balancer@no-exec-virtual-userptr-invalidate.html

  * igt@xe_exec_multi_queue@many-queues-close-fd-smem:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#6874]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@xe_exec_multi_queue@many-queues-close-fd-smem.html

  * igt@xe_exec_system_allocator@eu-fault-2m-range-device-host:
    - shard-lnl:          [PASS][18] -> [FAIL][19] ([Intel XE#7592])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11/shard-lnl-1/igt@xe_exec_system_allocator@eu-fault-2m-range-device-host.html
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-5/igt@xe_exec_system_allocator@eu-fault-2m-range-device-host.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#7138])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-8/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-invalidate-race.html

  
#### Possible fixes ####

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [FAIL][21] ([Intel XE#301]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  
#### Warnings ####

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-lnl:          [FAIL][23] ([Intel XE#301]) -> [FAIL][24] ([Intel XE#301] / [Intel XE#3149])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7592]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7592
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636


Build changes
-------------

  * Linux: xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11 -> xe-pw-160482v3

  IGT_8842: 8842
  xe-4839-2ca39f35278e7f6e1750c710e75c32172fb1aa11: 2ca39f35278e7f6e1750c710e75c32172fb1aa11
  xe-pw-160482v3: 160482v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v3/index.html

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