* [PATCH 0/4] drm/i915/reset: Expose "display_reset_count" in debugfs
@ 2026-04-10 7:34 Ville Syrjala
2026-04-10 7:34 ` [PATCH 1/4] drm/i915/reset: Reorganize display reset code Ville Syrjala
` (6 more replies)
0 siblings, 7 replies; 11+ messages in thread
From: Ville Syrjala @ 2026-04-10 7:34 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula, Jouni Högander, Maarten Lankhorst
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Expose a display reset count in debugfs. It will be used
by kms_busy/*-with-reset tests to confirm they are actually
testing the thing they are meant to test.
I expect this to fail on all platforms using execlist
submission. I'll send a second version of the series
with a fix after confirming that.
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Test-with: 20260409200924.5409-1-ville.syrjala@linux.intel.com
Ville Syrjälä (4):
drm/i915/reset: Reorganize display reset code
drm/i915/reset: Move pending_fb_pin handling to i915
drm/xe/display: Add init_clock_gating.h stubs
drm/i915/reset: Add "display_reset_count" debugfs file
.../gpu/drm/i915/display/intel_display_core.h | 5 ++-
.../drm/i915/display/intel_display_debugfs.c | 2 +
.../drm/i915/display/intel_display_power.c | 2 -
.../drm/i915/display/intel_display_reset.c | 40 +++++++++----------
.../drm/i915/display/intel_display_reset.h | 8 ++--
drivers/gpu/drm/i915/display/intel_overlay.c | 10 +----
drivers/gpu/drm/i915/gt/intel_reset.c | 26 +++++++-----
drivers/gpu/drm/i915/i915_dpt.c | 5 +--
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_fb_pin.c | 9 ++---
drivers/gpu/drm/i915/i915_overlay.c | 6 +++
drivers/gpu/drm/xe/Makefile | 1 +
.../compat-i915-headers/intel_clock_gating.h | 10 ++++-
13 files changed, 71 insertions(+), 55 deletions(-)
--
2.52.0
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 1/4] drm/i915/reset: Reorganize display reset code
2026-04-10 7:34 [PATCH 0/4] drm/i915/reset: Expose "display_reset_count" in debugfs Ville Syrjala
@ 2026-04-10 7:34 ` Ville Syrjala
2026-04-10 7:34 ` [PATCH 2/4] drm/i915/reset: Move pending_fb_pin handling to i915 Ville Syrjala
` (5 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Ville Syrjala @ 2026-04-10 7:34 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jouni Högander, Maarten Lankhorst, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Stop returning the "is there a display?" status from
intel_display_reset_prepare(). I plan to move the pending_fb_pin
into the i915 code, so I need to make that determination already
before intel_display_reset_prepare() is called. Add a new
intel_display_reset_supported() function for that.
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/intel_display_reset.c | 23 ++++++++-----------
.../drm/i915/display/intel_display_reset.h | 3 ++-
drivers/gpu/drm/i915/gt/intel_reset.c | 13 +++++++----
3 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
index d00ef5bdcbda..137a2a33c8b0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.c
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
@@ -16,22 +16,24 @@
#include "intel_hotplug.h"
#include "intel_pps.h"
+bool intel_display_reset_supported(struct intel_display *display)
+{
+ return HAS_DISPLAY(display);
+}
+
bool intel_display_reset_test(struct intel_display *display)
{
- return display->params.force_reset_modeset_test;
+ return HAS_DISPLAY(display) &&
+ display->params.force_reset_modeset_test;
}
-/* returns true if intel_display_reset_finish() needs to be called */
-bool intel_display_reset_prepare(struct intel_display *display,
+void intel_display_reset_prepare(struct intel_display *display,
modeset_stuck_fn modeset_stuck, void *context)
{
struct drm_modeset_acquire_ctx *ctx = &display->restore.reset_ctx;
struct drm_atomic_state *state;
int ret;
- if (!HAS_DISPLAY(display))
- return false;
-
if (atomic_read(&display->restore.pending_fb_pin)) {
drm_dbg_kms(display->drm,
"Modeset potentially stuck, unbreaking through wedging\n");
@@ -60,7 +62,7 @@ bool intel_display_reset_prepare(struct intel_display *display,
ret = PTR_ERR(state);
drm_err(display->drm, "Duplicating state failed with %i\n",
ret);
- return true;
+ return;
}
ret = drm_atomic_helper_disable_all(display->drm, ctx);
@@ -68,13 +70,11 @@ bool intel_display_reset_prepare(struct intel_display *display,
drm_err(display->drm, "Suspending crtc's failed with %i\n",
ret);
drm_atomic_state_put(state);
- return true;
+ return;
}
display->restore.modeset_state = state;
state->acquire_ctx = ctx;
-
- return true;
}
void intel_display_reset_finish(struct intel_display *display, bool test_only)
@@ -83,9 +83,6 @@ void intel_display_reset_finish(struct intel_display *display, bool test_only)
struct drm_atomic_state *state;
int ret;
- if (!HAS_DISPLAY(display))
- return;
-
state = fetch_and_zero(&display->restore.modeset_state);
if (!state)
goto unlock;
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.h b/drivers/gpu/drm/i915/display/intel_display_reset.h
index 8b3bda134454..e0f15e757728 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.h
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.h
@@ -12,8 +12,9 @@ struct intel_display;
typedef void modeset_stuck_fn(void *context);
+bool intel_display_reset_supported(struct intel_display *display);
bool intel_display_reset_test(struct intel_display *display);
-bool intel_display_reset_prepare(struct intel_display *display,
+void intel_display_reset_prepare(struct intel_display *display,
modeset_stuck_fn modeset_stuck, void *context);
void intel_display_reset_finish(struct intel_display *display, bool test_only);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 37272871b0f2..ffd11767874f 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1425,16 +1425,19 @@ static void intel_gt_reset_global(struct intel_gt *gt,
bool need_display_reset;
bool reset_display;
- need_display_reset = intel_gt_gpu_reset_clobbers_display(gt) &&
+ need_display_reset =
+ intel_display_reset_supported(display) &&
+ intel_gt_gpu_reset_clobbers_display(gt) &&
intel_has_gpu_reset(gt);
- reset_display = intel_display_reset_test(display) ||
+ reset_display =
+ intel_display_reset_test(display) ||
need_display_reset;
if (reset_display)
- reset_display = intel_display_reset_prepare(display,
- display_reset_modeset_stuck,
- gt);
+ intel_display_reset_prepare(display,
+ display_reset_modeset_stuck,
+ gt);
intel_gt_reset(gt, engine_mask, reason);
--
2.52.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/4] drm/i915/reset: Move pending_fb_pin handling to i915
2026-04-10 7:34 [PATCH 0/4] drm/i915/reset: Expose "display_reset_count" in debugfs Ville Syrjala
2026-04-10 7:34 ` [PATCH 1/4] drm/i915/reset: Reorganize display reset code Ville Syrjala
@ 2026-04-10 7:34 ` Ville Syrjala
2026-04-10 7:34 ` [PATCH 3/4] drm/xe/display: Add init_clock_gating.h stubs Ville Syrjala
` (4 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Ville Syrjala @ 2026-04-10 7:34 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jouni Högander, Maarten Lankhorst, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Only i915 uses the pending_fb_pin counter to potentially whack
the GPU harder if the display gets nuked during a GPU reset.
Move the atomic counter into the i915 specific bits of code, so
that we don't need to worry about on the display side.
For some reason the overlay code kept the pending_fb_pin counter
elevated for longer than just for the pin, but from now on it'll
just cover the actual pinning part.
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../gpu/drm/i915/display/intel_display_core.h | 1 -
.../drm/i915/display/intel_display_reset.c | 9 +--------
.../drm/i915/display/intel_display_reset.h | 5 +----
drivers/gpu/drm/i915/display/intel_overlay.c | 10 ++--------
drivers/gpu/drm/i915/gt/intel_reset.c | 19 ++++++++++---------
drivers/gpu/drm/i915/i915_dpt.c | 5 ++---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_fb_pin.c | 9 ++++-----
drivers/gpu/drm/i915/i915_overlay.c | 6 ++++++
9 files changed, 28 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index d708d322aa85..9e77003addd0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -561,7 +561,6 @@ struct intel_display {
struct drm_atomic_state *modeset_state;
struct drm_modeset_acquire_ctx reset_ctx;
/* modeset stuck tracking for reset */
- atomic_t pending_fb_pin;
u32 saveDSPARB;
u32 saveSWF0[16];
u32 saveSWF1[16];
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
index 137a2a33c8b0..ca15dc18ef0f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.c
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
@@ -27,19 +27,12 @@ bool intel_display_reset_test(struct intel_display *display)
display->params.force_reset_modeset_test;
}
-void intel_display_reset_prepare(struct intel_display *display,
- modeset_stuck_fn modeset_stuck, void *context)
+void intel_display_reset_prepare(struct intel_display *display)
{
struct drm_modeset_acquire_ctx *ctx = &display->restore.reset_ctx;
struct drm_atomic_state *state;
int ret;
- if (atomic_read(&display->restore.pending_fb_pin)) {
- drm_dbg_kms(display->drm,
- "Modeset potentially stuck, unbreaking through wedging\n");
- modeset_stuck(context);
- }
-
/*
* Need mode_config.mutex so that we don't
* trample ongoing ->detect() and whatnot.
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.h b/drivers/gpu/drm/i915/display/intel_display_reset.h
index e0f15e757728..a8aa7729d33f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.h
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.h
@@ -10,12 +10,9 @@
struct intel_display;
-typedef void modeset_stuck_fn(void *context);
-
bool intel_display_reset_supported(struct intel_display *display);
bool intel_display_reset_test(struct intel_display *display);
-void intel_display_reset_prepare(struct intel_display *display,
- modeset_stuck_fn modeset_stuck, void *context);
+void intel_display_reset_prepare(struct intel_display *display);
void intel_display_reset_finish(struct intel_display *display, bool test_only);
#endif /* __INTEL_RESET_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 12a325ceae6f..a809aa2950ac 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -481,13 +481,9 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
if (ret != 0)
return ret;
- atomic_inc(&display->restore.pending_fb_pin);
-
vma = intel_parent_overlay_pin_fb(display, obj, &offset);
- if (IS_ERR(vma)) {
- ret = PTR_ERR(vma);
- goto out_pin_section;
- }
+ if (IS_ERR(vma))
+ return PTR_ERR(vma);
if (!intel_parent_overlay_is_active(display)) {
const struct intel_crtc_state *crtc_state =
@@ -571,8 +567,6 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
out_unpin:
intel_parent_overlay_unpin_fb(display, vma);
-out_pin_section:
- atomic_dec(&display->restore.pending_fb_pin);
return ret;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index ffd11767874f..a1e6aaca8c9b 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1398,11 +1398,6 @@ int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
return err;
}
-static void display_reset_modeset_stuck(void *gt)
-{
- intel_gt_set_wedged(gt);
-}
-
static void intel_gt_reset_global(struct intel_gt *gt,
u32 engine_mask,
const char *reason)
@@ -1434,10 +1429,16 @@ static void intel_gt_reset_global(struct intel_gt *gt,
intel_display_reset_test(display) ||
need_display_reset;
- if (reset_display)
- intel_display_reset_prepare(display,
- display_reset_modeset_stuck,
- gt);
+ if (reset_display) {
+ if (atomic_read(&i915->pending_fb_pin)) {
+ drm_dbg_kms(&i915->drm,
+ "Modeset potentially stuck, unbreaking through wedging\n");
+
+ intel_gt_set_wedged(gt);
+ }
+
+ intel_display_reset_prepare(display);
+ }
intel_gt_reset(gt, engine_mask, reason);
diff --git a/drivers/gpu/drm/i915/i915_dpt.c b/drivers/gpu/drm/i915/i915_dpt.c
index 9f47bb563c85..fcd7cced771d 100644
--- a/drivers/gpu/drm/i915/i915_dpt.c
+++ b/drivers/gpu/drm/i915/i915_dpt.c
@@ -129,7 +129,6 @@ static void dpt_cleanup(struct i915_address_space *vm)
struct i915_vma *i915_dpt_pin_to_ggtt(struct intel_dpt *dpt, unsigned int alignment)
{
struct drm_i915_private *i915 = dpt->vm.i915;
- struct intel_display *display = i915->display;
struct ref_tracker *wakeref;
struct i915_vma *vma;
void __iomem *iomem;
@@ -141,7 +140,7 @@ struct i915_vma *i915_dpt_pin_to_ggtt(struct intel_dpt *dpt, unsigned int alignm
pin_flags |= PIN_MAPPABLE;
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- atomic_inc(&display->restore.pending_fb_pin);
+ atomic_inc(&i915->pending_fb_pin);
for_i915_gem_ww(&ww, err, true) {
err = i915_gem_object_lock(dpt->obj, &ww);
@@ -171,7 +170,7 @@ struct i915_vma *i915_dpt_pin_to_ggtt(struct intel_dpt *dpt, unsigned int alignm
dpt->obj->mm.dirty = true;
- atomic_dec(&display->restore.pending_fb_pin);
+ atomic_dec(&i915->pending_fb_pin);
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
return err ? ERR_PTR(err) : vma;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index dafee3dcd1c5..844ed79e7211 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -315,6 +315,8 @@ struct drm_i915_private {
/* The TTM device structure. */
struct ttm_device bdev;
+ atomic_t pending_fb_pin;
+
I915_SELFTEST_DECLARE(struct i915_selftest_stash selftest;)
/*
diff --git a/drivers/gpu/drm/i915/i915_fb_pin.c b/drivers/gpu/drm/i915/i915_fb_pin.c
index 1018f4b7bc2c..a08a8ace681f 100644
--- a/drivers/gpu/drm/i915/i915_fb_pin.c
+++ b/drivers/gpu/drm/i915/i915_fb_pin.c
@@ -29,7 +29,6 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
unsigned long *out_flags,
struct intel_dpt *dpt)
{
- struct intel_display *display = to_intel_display(fb->dev);
struct drm_i915_private *i915 = to_i915(fb->dev);
struct drm_gem_object *_obj = intel_fb_bo(fb);
struct drm_i915_gem_object *obj = to_intel_bo(_obj);
@@ -48,7 +47,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
if (WARN_ON(!i915_gem_object_is_framebuffer(obj)))
return ERR_PTR(-EINVAL);
- atomic_inc(&display->restore.pending_fb_pin);
+ atomic_inc(&i915->pending_fb_pin);
for_i915_gem_ww(&ww, ret, true) {
ret = i915_gem_object_lock(obj, &ww);
@@ -103,7 +102,7 @@ intel_fb_pin_to_dpt(const struct drm_framebuffer *fb,
i915_vma_get(vma);
err:
- atomic_dec(&display->restore.pending_fb_pin);
+ atomic_dec(&i915->pending_fb_pin);
return vma;
}
@@ -142,7 +141,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
*/
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
- atomic_inc(&display->restore.pending_fb_pin);
+ atomic_inc(&i915->pending_fb_pin);
/*
* Valleyview is definitely limited to scanning out the first
@@ -218,7 +217,7 @@ intel_fb_pin_to_ggtt(const struct drm_framebuffer *fb,
if (ret)
vma = ERR_PTR(ret);
- atomic_dec(&display->restore.pending_fb_pin);
+ atomic_dec(&i915->pending_fb_pin);
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
return vma;
}
diff --git a/drivers/gpu/drm/i915/i915_overlay.c b/drivers/gpu/drm/i915/i915_overlay.c
index 2d7aff51e39b..6de550a17756 100644
--- a/drivers/gpu/drm/i915/i915_overlay.c
+++ b/drivers/gpu/drm/i915/i915_overlay.c
@@ -354,11 +354,14 @@ static struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
struct drm_gem_object *obj,
u32 *offset)
{
+ struct drm_i915_private *i915 = to_i915(drm);
struct drm_i915_gem_object *new_bo = to_intel_bo(obj);
struct i915_gem_ww_ctx ww;
struct i915_vma *vma;
int ret;
+ atomic_inc(&i915->pending_fb_pin);
+
i915_gem_ww_ctx_init(&ww, true);
retry:
ret = i915_gem_object_lock(new_bo, &ww);
@@ -373,6 +376,9 @@ static struct i915_vma *i915_overlay_pin_fb(struct drm_device *drm,
goto retry;
}
i915_gem_ww_ctx_fini(&ww);
+
+ atomic_dec(&i915->pending_fb_pin);
+
if (ret)
return ERR_PTR(ret);
--
2.52.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/4] drm/xe/display: Add init_clock_gating.h stubs
2026-04-10 7:34 [PATCH 0/4] drm/i915/reset: Expose "display_reset_count" in debugfs Ville Syrjala
2026-04-10 7:34 ` [PATCH 1/4] drm/i915/reset: Reorganize display reset code Ville Syrjala
2026-04-10 7:34 ` [PATCH 2/4] drm/i915/reset: Move pending_fb_pin handling to i915 Ville Syrjala
@ 2026-04-10 7:34 ` Ville Syrjala
2026-04-10 7:35 ` [PATCH 4/4] drm/i915/reset: Add "display_reset_count" debugfs file Ville Syrjala
` (3 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Ville Syrjala @ 2026-04-10 7:34 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jouni Högander, Maarten Lankhorst, Jani Nikula
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add static inline stubs for init_clock_gating.h functions
so that we don't need ifdefs in the actual code. We already
have one in intel_display_power.c, and now I need to bring
over intel_display_reset.c.
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display_power.c | 2 --
| 10 +++++++++-
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 8a7afe2a94bc..80ecf373fb19 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1420,9 +1420,7 @@ static void hsw_disable_pc8(struct intel_display *display)
intel_init_pch_refclk(display);
/* Many display registers don't survive PC8+ */
-#ifdef I915 /* FIXME */
intel_clock_gating_init(display->drm);
-#endif
}
static void intel_pch_reset_handshake(struct intel_display *display,
--git a/drivers/gpu/drm/xe/compat-i915-headers/intel_clock_gating.h b/drivers/gpu/drm/xe/compat-i915-headers/intel_clock_gating.h
index ce986f0e8f38..552975a30ba2 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_clock_gating.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_clock_gating.h
@@ -3,4 +3,12 @@
* Copyright © 2023 Intel Corporation
*/
-#include "../../i915/intel_clock_gating.h"
+#ifndef __INTEL_CLOCK_GATING_H__
+#define __INTEL_CLOCK_GATING_H__
+
+struct drm_device;
+
+static inline void intel_clock_gating_init(struct drm_device *drm) {}
+static inline void intel_clock_gating_hooks_init(struct drm_device *drm) {}
+
+#endif /* __INTEL_CLOCK_GATING_H__ */
--
2.52.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 4/4] drm/i915/reset: Add "display_reset_count" debugfs file
2026-04-10 7:34 [PATCH 0/4] drm/i915/reset: Expose "display_reset_count" in debugfs Ville Syrjala
` (2 preceding siblings ...)
2026-04-10 7:34 ` [PATCH 3/4] drm/xe/display: Add init_clock_gating.h stubs Ville Syrjala
@ 2026-04-10 7:35 ` Ville Syrjala
2026-04-10 7:42 ` Jani Nikula
2026-04-10 7:42 ` ✓ CI.KUnit: success for drm/i915/reset: Expose "display_reset_count" in debugfs Patchwork
` (2 subsequent siblings)
6 siblings, 1 reply; 11+ messages in thread
From: Ville Syrjala @ 2026-04-10 7:35 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-xe, Jani Nikula, Jouni Högander, Maarten Lankhorst
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Expose the number of display resets performed in a new
"display_reset_count" debugfs file. kms_busy can use this to
confirm that the kernel actually took the full display reset path.
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display_core.h | 4 ++++
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 ++
drivers/gpu/drm/i915/display/intel_display_reset.c | 10 ++++++++++
drivers/gpu/drm/i915/display/intel_display_reset.h | 2 ++
drivers/gpu/drm/xe/Makefile | 1 +
5 files changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 9e77003addd0..38535d1056d1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -556,6 +556,10 @@ struct intel_display {
unsigned long mask;
} quirks;
+ struct {
+ u32 count;
+ } reset;
+
struct {
/* restore state for suspend/resume and display reset */
struct drm_atomic_state *modeset_state;
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index f244a2b5d139..81bef000a4e3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -27,6 +27,7 @@
#include "intel_display_power.h"
#include "intel_display_power_well.h"
#include "intel_display_regs.h"
+#include "intel_display_reset.h"
#include "intel_display_rpm.h"
#include "intel_display_types.h"
#include "intel_dmc.h"
@@ -838,6 +839,7 @@ void intel_display_debugfs_register(struct intel_display *display)
intel_bios_debugfs_register(display);
intel_cdclk_debugfs_register(display);
+ intel_display_reset_debugfs_register(display);
intel_dmc_debugfs_register(display);
intel_dp_test_debugfs_register(display);
intel_fbc_debugfs_register(display);
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
index ca15dc18ef0f..79c2e77ca137 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.c
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
@@ -3,6 +3,8 @@
* Copyright © 2023 Intel Corporation
*/
+#include <linux/debugfs.h>
+
#include <drm/drm_atomic_helper.h>
#include <drm/drm_print.h>
@@ -66,6 +68,7 @@ void intel_display_reset_prepare(struct intel_display *display)
return;
}
+ display->reset.count++;
display->restore.modeset_state = state;
state->acquire_ctx = ctx;
}
@@ -114,3 +117,10 @@ void intel_display_reset_finish(struct intel_display *display, bool test_only)
drm_modeset_acquire_fini(ctx);
mutex_unlock(&display->drm->mode_config.mutex);
}
+
+void intel_display_reset_debugfs_register(struct intel_display *display)
+{
+ debugfs_create_u32("display_reset_count", 0400,
+ display->drm->debugfs_root,
+ &display->reset.count);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.h b/drivers/gpu/drm/i915/display/intel_display_reset.h
index a8aa7729d33f..b88c330a3441 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.h
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.h
@@ -15,4 +15,6 @@ bool intel_display_reset_test(struct intel_display *display);
void intel_display_reset_prepare(struct intel_display *display);
void intel_display_reset_finish(struct intel_display *display, bool test_only);
+void intel_display_reset_debugfs_register(struct intel_display *display);
+
#endif /* __INTEL_RESET_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 110fef511fe2..1a85dfe457f0 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -262,6 +262,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_display_power.o \
i915-display/intel_display_power_map.o \
i915-display/intel_display_power_well.o \
+ i915-display/intel_display_reset.o \
i915-display/intel_display_rpm.o \
i915-display/intel_display_rps.o \
i915-display/intel_display_trace.o \
--
2.52.0
^ permalink raw reply related [flat|nested] 11+ messages in thread
* ✓ CI.KUnit: success for drm/i915/reset: Expose "display_reset_count" in debugfs
2026-04-10 7:34 [PATCH 0/4] drm/i915/reset: Expose "display_reset_count" in debugfs Ville Syrjala
` (3 preceding siblings ...)
2026-04-10 7:35 ` [PATCH 4/4] drm/i915/reset: Add "display_reset_count" debugfs file Ville Syrjala
@ 2026-04-10 7:42 ` Patchwork
2026-04-10 8:20 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-10 14:41 ` ✗ Xe.CI.FULL: failure " Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-04-10 7:42 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-xe
== Series Details ==
Series: drm/i915/reset: Expose "display_reset_count" in debugfs
URL : https://patchwork.freedesktop.org/series/164676/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[07:41:03] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:41:07] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:41:39] Starting KUnit Kernel (1/1)...
[07:41:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:41:39] ================== guc_buf (11 subtests) ===================
[07:41:39] [PASSED] test_smallest
[07:41:39] [PASSED] test_largest
[07:41:39] [PASSED] test_granular
[07:41:39] [PASSED] test_unique
[07:41:39] [PASSED] test_overlap
[07:41:39] [PASSED] test_reusable
[07:41:39] [PASSED] test_too_big
[07:41:39] [PASSED] test_flush
[07:41:39] [PASSED] test_lookup
[07:41:39] [PASSED] test_data
[07:41:39] [PASSED] test_class
[07:41:39] ===================== [PASSED] guc_buf =====================
[07:41:39] =================== guc_dbm (7 subtests) ===================
[07:41:39] [PASSED] test_empty
[07:41:39] [PASSED] test_default
[07:41:39] ======================== test_size ========================
[07:41:39] [PASSED] 4
[07:41:39] [PASSED] 8
[07:41:39] [PASSED] 32
[07:41:39] [PASSED] 256
[07:41:39] ==================== [PASSED] test_size ====================
[07:41:39] ======================= test_reuse ========================
[07:41:39] [PASSED] 4
[07:41:39] [PASSED] 8
[07:41:39] [PASSED] 32
[07:41:39] [PASSED] 256
[07:41:39] =================== [PASSED] test_reuse ====================
[07:41:39] =================== test_range_overlap ====================
[07:41:39] [PASSED] 4
[07:41:39] [PASSED] 8
[07:41:39] [PASSED] 32
[07:41:39] [PASSED] 256
[07:41:39] =============== [PASSED] test_range_overlap ================
[07:41:39] =================== test_range_compact ====================
[07:41:39] [PASSED] 4
[07:41:39] [PASSED] 8
[07:41:39] [PASSED] 32
[07:41:39] [PASSED] 256
[07:41:39] =============== [PASSED] test_range_compact ================
[07:41:39] ==================== test_range_spare =====================
[07:41:39] [PASSED] 4
[07:41:39] [PASSED] 8
[07:41:39] [PASSED] 32
[07:41:39] [PASSED] 256
[07:41:39] ================ [PASSED] test_range_spare =================
[07:41:39] ===================== [PASSED] guc_dbm =====================
[07:41:39] =================== guc_idm (6 subtests) ===================
[07:41:39] [PASSED] bad_init
[07:41:39] [PASSED] no_init
[07:41:39] [PASSED] init_fini
[07:41:39] [PASSED] check_used
[07:41:39] [PASSED] check_quota
[07:41:39] [PASSED] check_all
[07:41:39] ===================== [PASSED] guc_idm =====================
[07:41:39] ================== no_relay (3 subtests) ===================
[07:41:39] [PASSED] xe_drops_guc2pf_if_not_ready
[07:41:39] [PASSED] xe_drops_guc2vf_if_not_ready
[07:41:39] [PASSED] xe_rejects_send_if_not_ready
[07:41:39] ==================== [PASSED] no_relay =====================
[07:41:39] ================== pf_relay (14 subtests) ==================
[07:41:39] [PASSED] pf_rejects_guc2pf_too_short
[07:41:39] [PASSED] pf_rejects_guc2pf_too_long
[07:41:39] [PASSED] pf_rejects_guc2pf_no_payload
[07:41:39] [PASSED] pf_fails_no_payload
[07:41:39] [PASSED] pf_fails_bad_origin
[07:41:39] [PASSED] pf_fails_bad_type
[07:41:39] [PASSED] pf_txn_reports_error
[07:41:39] [PASSED] pf_txn_sends_pf2guc
[07:41:39] [PASSED] pf_sends_pf2guc
[07:41:39] [SKIPPED] pf_loopback_nop
[07:41:39] [SKIPPED] pf_loopback_echo
[07:41:39] [SKIPPED] pf_loopback_fail
[07:41:39] [SKIPPED] pf_loopback_busy
[07:41:39] [SKIPPED] pf_loopback_retry
[07:41:39] ==================== [PASSED] pf_relay =====================
[07:41:39] ================== vf_relay (3 subtests) ===================
[07:41:39] [PASSED] vf_rejects_guc2vf_too_short
[07:41:39] [PASSED] vf_rejects_guc2vf_too_long
[07:41:39] [PASSED] vf_rejects_guc2vf_no_payload
[07:41:39] ==================== [PASSED] vf_relay =====================
[07:41:39] ================ pf_gt_config (9 subtests) =================
[07:41:39] [PASSED] fair_contexts_1vf
[07:41:39] [PASSED] fair_doorbells_1vf
[07:41:39] [PASSED] fair_ggtt_1vf
[07:41:39] ====================== fair_vram_1vf ======================
[07:41:39] [PASSED] 3.50 GiB
[07:41:39] [PASSED] 11.5 GiB
[07:41:39] [PASSED] 15.5 GiB
[07:41:39] [PASSED] 31.5 GiB
[07:41:39] [PASSED] 63.5 GiB
[07:41:39] [PASSED] 1.91 GiB
[07:41:39] ================== [PASSED] fair_vram_1vf ==================
[07:41:39] ================ fair_vram_1vf_admin_only =================
[07:41:39] [PASSED] 3.50 GiB
[07:41:39] [PASSED] 11.5 GiB
[07:41:39] [PASSED] 15.5 GiB
[07:41:39] [PASSED] 31.5 GiB
[07:41:39] [PASSED] 63.5 GiB
[07:41:39] [PASSED] 1.91 GiB
[07:41:39] ============ [PASSED] fair_vram_1vf_admin_only =============
[07:41:39] ====================== fair_contexts ======================
[07:41:39] [PASSED] 1 VF
[07:41:39] [PASSED] 2 VFs
[07:41:39] [PASSED] 3 VFs
[07:41:39] [PASSED] 4 VFs
[07:41:39] [PASSED] 5 VFs
[07:41:39] [PASSED] 6 VFs
[07:41:39] [PASSED] 7 VFs
[07:41:39] [PASSED] 8 VFs
[07:41:39] [PASSED] 9 VFs
[07:41:39] [PASSED] 10 VFs
[07:41:39] [PASSED] 11 VFs
[07:41:39] [PASSED] 12 VFs
[07:41:39] [PASSED] 13 VFs
[07:41:39] [PASSED] 14 VFs
[07:41:39] [PASSED] 15 VFs
[07:41:39] [PASSED] 16 VFs
[07:41:39] [PASSED] 17 VFs
[07:41:39] [PASSED] 18 VFs
[07:41:39] [PASSED] 19 VFs
[07:41:39] [PASSED] 20 VFs
[07:41:39] [PASSED] 21 VFs
[07:41:39] [PASSED] 22 VFs
[07:41:39] [PASSED] 23 VFs
[07:41:39] [PASSED] 24 VFs
[07:41:39] [PASSED] 25 VFs
[07:41:39] [PASSED] 26 VFs
[07:41:39] [PASSED] 27 VFs
[07:41:39] [PASSED] 28 VFs
[07:41:39] [PASSED] 29 VFs
[07:41:39] [PASSED] 30 VFs
[07:41:39] [PASSED] 31 VFs
[07:41:39] [PASSED] 32 VFs
[07:41:39] [PASSED] 33 VFs
[07:41:39] [PASSED] 34 VFs
[07:41:39] [PASSED] 35 VFs
[07:41:39] [PASSED] 36 VFs
[07:41:39] [PASSED] 37 VFs
[07:41:39] [PASSED] 38 VFs
[07:41:39] [PASSED] 39 VFs
[07:41:39] [PASSED] 40 VFs
[07:41:39] [PASSED] 41 VFs
[07:41:39] [PASSED] 42 VFs
[07:41:39] [PASSED] 43 VFs
[07:41:39] [PASSED] 44 VFs
[07:41:39] [PASSED] 45 VFs
[07:41:39] [PASSED] 46 VFs
[07:41:39] [PASSED] 47 VFs
[07:41:39] [PASSED] 48 VFs
[07:41:39] [PASSED] 49 VFs
[07:41:39] [PASSED] 50 VFs
[07:41:39] [PASSED] 51 VFs
[07:41:39] [PASSED] 52 VFs
[07:41:39] [PASSED] 53 VFs
[07:41:39] [PASSED] 54 VFs
[07:41:39] [PASSED] 55 VFs
[07:41:39] [PASSED] 56 VFs
[07:41:39] [PASSED] 57 VFs
[07:41:39] [PASSED] 58 VFs
[07:41:39] [PASSED] 59 VFs
[07:41:39] [PASSED] 60 VFs
[07:41:39] [PASSED] 61 VFs
[07:41:39] [PASSED] 62 VFs
[07:41:39] [PASSED] 63 VFs
[07:41:39] ================== [PASSED] fair_contexts ==================
[07:41:39] ===================== fair_doorbells ======================
[07:41:39] [PASSED] 1 VF
[07:41:39] [PASSED] 2 VFs
[07:41:39] [PASSED] 3 VFs
[07:41:39] [PASSED] 4 VFs
[07:41:39] [PASSED] 5 VFs
[07:41:39] [PASSED] 6 VFs
[07:41:39] [PASSED] 7 VFs
[07:41:39] [PASSED] 8 VFs
[07:41:39] [PASSED] 9 VFs
[07:41:39] [PASSED] 10 VFs
[07:41:39] [PASSED] 11 VFs
[07:41:39] [PASSED] 12 VFs
[07:41:39] [PASSED] 13 VFs
[07:41:39] [PASSED] 14 VFs
[07:41:39] [PASSED] 15 VFs
[07:41:39] [PASSED] 16 VFs
[07:41:39] [PASSED] 17 VFs
[07:41:39] [PASSED] 18 VFs
[07:41:39] [PASSED] 19 VFs
[07:41:39] [PASSED] 20 VFs
[07:41:39] [PASSED] 21 VFs
[07:41:39] [PASSED] 22 VFs
[07:41:39] [PASSED] 23 VFs
[07:41:39] [PASSED] 24 VFs
[07:41:39] [PASSED] 25 VFs
[07:41:39] [PASSED] 26 VFs
[07:41:39] [PASSED] 27 VFs
[07:41:39] [PASSED] 28 VFs
[07:41:39] [PASSED] 29 VFs
[07:41:39] [PASSED] 30 VFs
[07:41:39] [PASSED] 31 VFs
[07:41:39] [PASSED] 32 VFs
[07:41:39] [PASSED] 33 VFs
[07:41:39] [PASSED] 34 VFs
[07:41:39] [PASSED] 35 VFs
[07:41:39] [PASSED] 36 VFs
[07:41:39] [PASSED] 37 VFs
[07:41:39] [PASSED] 38 VFs
[07:41:39] [PASSED] 39 VFs
[07:41:39] [PASSED] 40 VFs
[07:41:39] [PASSED] 41 VFs
[07:41:39] [PASSED] 42 VFs
[07:41:39] [PASSED] 43 VFs
[07:41:39] [PASSED] 44 VFs
[07:41:39] [PASSED] 45 VFs
[07:41:39] [PASSED] 46 VFs
[07:41:39] [PASSED] 47 VFs
[07:41:39] [PASSED] 48 VFs
[07:41:39] [PASSED] 49 VFs
[07:41:39] [PASSED] 50 VFs
[07:41:39] [PASSED] 51 VFs
[07:41:39] [PASSED] 52 VFs
[07:41:39] [PASSED] 53 VFs
[07:41:39] [PASSED] 54 VFs
[07:41:39] [PASSED] 55 VFs
[07:41:39] [PASSED] 56 VFs
[07:41:39] [PASSED] 57 VFs
[07:41:39] [PASSED] 58 VFs
[07:41:39] [PASSED] 59 VFs
[07:41:39] [PASSED] 60 VFs
[07:41:39] [PASSED] 61 VFs
[07:41:39] [PASSED] 62 VFs
[07:41:39] [PASSED] 63 VFs
[07:41:39] ================= [PASSED] fair_doorbells ==================
[07:41:39] ======================== fair_ggtt ========================
[07:41:39] [PASSED] 1 VF
[07:41:39] [PASSED] 2 VFs
[07:41:39] [PASSED] 3 VFs
[07:41:39] [PASSED] 4 VFs
[07:41:39] [PASSED] 5 VFs
[07:41:39] [PASSED] 6 VFs
[07:41:39] [PASSED] 7 VFs
[07:41:39] [PASSED] 8 VFs
[07:41:39] [PASSED] 9 VFs
[07:41:39] [PASSED] 10 VFs
[07:41:39] [PASSED] 11 VFs
[07:41:39] [PASSED] 12 VFs
[07:41:39] [PASSED] 13 VFs
[07:41:39] [PASSED] 14 VFs
[07:41:39] [PASSED] 15 VFs
[07:41:39] [PASSED] 16 VFs
[07:41:39] [PASSED] 17 VFs
[07:41:39] [PASSED] 18 VFs
[07:41:39] [PASSED] 19 VFs
[07:41:39] [PASSED] 20 VFs
[07:41:39] [PASSED] 21 VFs
[07:41:39] [PASSED] 22 VFs
[07:41:39] [PASSED] 23 VFs
[07:41:39] [PASSED] 24 VFs
[07:41:39] [PASSED] 25 VFs
[07:41:39] [PASSED] 26 VFs
[07:41:39] [PASSED] 27 VFs
[07:41:39] [PASSED] 28 VFs
[07:41:39] [PASSED] 29 VFs
[07:41:39] [PASSED] 30 VFs
[07:41:39] [PASSED] 31 VFs
[07:41:39] [PASSED] 32 VFs
[07:41:39] [PASSED] 33 VFs
[07:41:39] [PASSED] 34 VFs
[07:41:39] [PASSED] 35 VFs
[07:41:39] [PASSED] 36 VFs
[07:41:39] [PASSED] 37 VFs
[07:41:39] [PASSED] 38 VFs
[07:41:39] [PASSED] 39 VFs
[07:41:39] [PASSED] 40 VFs
[07:41:39] [PASSED] 41 VFs
[07:41:39] [PASSED] 42 VFs
[07:41:39] [PASSED] 43 VFs
[07:41:39] [PASSED] 44 VFs
[07:41:39] [PASSED] 45 VFs
[07:41:39] [PASSED] 46 VFs
[07:41:39] [PASSED] 47 VFs
[07:41:39] [PASSED] 48 VFs
[07:41:39] [PASSED] 49 VFs
[07:41:39] [PASSED] 50 VFs
[07:41:39] [PASSED] 51 VFs
[07:41:39] [PASSED] 52 VFs
[07:41:39] [PASSED] 53 VFs
[07:41:39] [PASSED] 54 VFs
[07:41:39] [PASSED] 55 VFs
[07:41:39] [PASSED] 56 VFs
[07:41:39] [PASSED] 57 VFs
[07:41:39] [PASSED] 58 VFs
[07:41:39] [PASSED] 59 VFs
[07:41:39] [PASSED] 60 VFs
[07:41:39] [PASSED] 61 VFs
[07:41:39] [PASSED] 62 VFs
[07:41:39] [PASSED] 63 VFs
[07:41:39] ==================== [PASSED] fair_ggtt ====================
[07:41:39] ======================== fair_vram ========================
[07:41:39] [PASSED] 1 VF
[07:41:39] [PASSED] 2 VFs
[07:41:39] [PASSED] 3 VFs
[07:41:39] [PASSED] 4 VFs
[07:41:39] [PASSED] 5 VFs
[07:41:39] [PASSED] 6 VFs
[07:41:39] [PASSED] 7 VFs
[07:41:39] [PASSED] 8 VFs
[07:41:39] [PASSED] 9 VFs
[07:41:39] [PASSED] 10 VFs
[07:41:39] [PASSED] 11 VFs
[07:41:39] [PASSED] 12 VFs
[07:41:39] [PASSED] 13 VFs
[07:41:39] [PASSED] 14 VFs
[07:41:39] [PASSED] 15 VFs
[07:41:39] [PASSED] 16 VFs
[07:41:39] [PASSED] 17 VFs
[07:41:39] [PASSED] 18 VFs
[07:41:39] [PASSED] 19 VFs
[07:41:39] [PASSED] 20 VFs
[07:41:39] [PASSED] 21 VFs
[07:41:39] [PASSED] 22 VFs
[07:41:39] [PASSED] 23 VFs
[07:41:39] [PASSED] 24 VFs
[07:41:39] [PASSED] 25 VFs
[07:41:39] [PASSED] 26 VFs
[07:41:39] [PASSED] 27 VFs
[07:41:39] [PASSED] 28 VFs
[07:41:39] [PASSED] 29 VFs
[07:41:39] [PASSED] 30 VFs
[07:41:39] [PASSED] 31 VFs
[07:41:39] [PASSED] 32 VFs
[07:41:39] [PASSED] 33 VFs
[07:41:39] [PASSED] 34 VFs
[07:41:39] [PASSED] 35 VFs
[07:41:39] [PASSED] 36 VFs
[07:41:39] [PASSED] 37 VFs
[07:41:39] [PASSED] 38 VFs
[07:41:39] [PASSED] 39 VFs
[07:41:39] [PASSED] 40 VFs
[07:41:39] [PASSED] 41 VFs
[07:41:39] [PASSED] 42 VFs
[07:41:39] [PASSED] 43 VFs
[07:41:39] [PASSED] 44 VFs
[07:41:39] [PASSED] 45 VFs
[07:41:39] [PASSED] 46 VFs
[07:41:39] [PASSED] 47 VFs
[07:41:39] [PASSED] 48 VFs
[07:41:39] [PASSED] 49 VFs
[07:41:39] [PASSED] 50 VFs
[07:41:39] [PASSED] 51 VFs
[07:41:39] [PASSED] 52 VFs
[07:41:39] [PASSED] 53 VFs
[07:41:39] [PASSED] 54 VFs
[07:41:39] [PASSED] 55 VFs
[07:41:39] [PASSED] 56 VFs
[07:41:39] [PASSED] 57 VFs
[07:41:39] [PASSED] 58 VFs
[07:41:39] [PASSED] 59 VFs
[07:41:39] [PASSED] 60 VFs
[07:41:39] [PASSED] 61 VFs
[07:41:39] [PASSED] 62 VFs
[07:41:39] [PASSED] 63 VFs
[07:41:39] ==================== [PASSED] fair_vram ====================
[07:41:39] ================== [PASSED] pf_gt_config ===================
[07:41:39] ===================== lmtt (1 subtest) =====================
[07:41:39] ======================== test_ops =========================
[07:41:39] [PASSED] 2-level
[07:41:39] [PASSED] multi-level
[07:41:39] ==================== [PASSED] test_ops =====================
[07:41:39] ====================== [PASSED] lmtt =======================
[07:41:39] ================= pf_service (11 subtests) =================
[07:41:39] [PASSED] pf_negotiate_any
[07:41:39] [PASSED] pf_negotiate_base_match
[07:41:39] [PASSED] pf_negotiate_base_newer
[07:41:39] [PASSED] pf_negotiate_base_next
[07:41:39] [SKIPPED] pf_negotiate_base_older
[07:41:39] [PASSED] pf_negotiate_base_prev
[07:41:39] [PASSED] pf_negotiate_latest_match
[07:41:39] [PASSED] pf_negotiate_latest_newer
[07:41:39] [PASSED] pf_negotiate_latest_next
[07:41:39] [SKIPPED] pf_negotiate_latest_older
[07:41:39] [SKIPPED] pf_negotiate_latest_prev
[07:41:39] =================== [PASSED] pf_service ====================
[07:41:39] ================= xe_guc_g2g (2 subtests) ==================
[07:41:39] ============== xe_live_guc_g2g_kunit_default ==============
[07:41:39] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[07:41:39] ============== xe_live_guc_g2g_kunit_allmem ===============
[07:41:39] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[07:41:39] =================== [SKIPPED] xe_guc_g2g ===================
[07:41:39] =================== xe_mocs (2 subtests) ===================
[07:41:39] ================ xe_live_mocs_kernel_kunit ================
[07:41:39] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[07:41:39] ================ xe_live_mocs_reset_kunit =================
[07:41:39] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[07:41:39] ==================== [SKIPPED] xe_mocs =====================
[07:41:39] ================= xe_migrate (2 subtests) ==================
[07:41:39] ================= xe_migrate_sanity_kunit =================
[07:41:39] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[07:41:39] ================== xe_validate_ccs_kunit ==================
[07:41:39] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[07:41:39] =================== [SKIPPED] xe_migrate ===================
[07:41:39] ================== xe_dma_buf (1 subtest) ==================
[07:41:39] ==================== xe_dma_buf_kunit =====================
[07:41:39] ================ [SKIPPED] xe_dma_buf_kunit ================
[07:41:39] =================== [SKIPPED] xe_dma_buf ===================
[07:41:39] ================= xe_bo_shrink (1 subtest) =================
[07:41:39] =================== xe_bo_shrink_kunit ====================
[07:41:39] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[07:41:39] ================== [SKIPPED] xe_bo_shrink ==================
[07:41:39] ==================== xe_bo (2 subtests) ====================
[07:41:39] ================== xe_ccs_migrate_kunit ===================
[07:41:39] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[07:41:39] ==================== xe_bo_evict_kunit ====================
[07:41:39] =============== [SKIPPED] xe_bo_evict_kunit ================
[07:41:39] ===================== [SKIPPED] xe_bo ======================
[07:41:39] ==================== args (13 subtests) ====================
[07:41:39] [PASSED] count_args_test
[07:41:39] [PASSED] call_args_example
[07:41:39] [PASSED] call_args_test
[07:41:39] [PASSED] drop_first_arg_example
[07:41:39] [PASSED] drop_first_arg_test
[07:41:39] [PASSED] first_arg_example
[07:41:39] [PASSED] first_arg_test
[07:41:39] [PASSED] last_arg_example
[07:41:39] [PASSED] last_arg_test
[07:41:39] [PASSED] pick_arg_example
[07:41:39] [PASSED] if_args_example
[07:41:39] [PASSED] if_args_test
[07:41:39] [PASSED] sep_comma_example
[07:41:39] ====================== [PASSED] args =======================
[07:41:39] =================== xe_pci (3 subtests) ====================
[07:41:39] ==================== check_graphics_ip ====================
[07:41:39] [PASSED] 12.00 Xe_LP
[07:41:39] [PASSED] 12.10 Xe_LP+
[07:41:39] [PASSED] 12.55 Xe_HPG
[07:41:39] [PASSED] 12.60 Xe_HPC
[07:41:39] [PASSED] 12.70 Xe_LPG
[07:41:39] [PASSED] 12.71 Xe_LPG
[07:41:39] [PASSED] 12.74 Xe_LPG+
[07:41:39] [PASSED] 20.01 Xe2_HPG
[07:41:39] [PASSED] 20.02 Xe2_HPG
[07:41:39] [PASSED] 20.04 Xe2_LPG
[07:41:39] [PASSED] 30.00 Xe3_LPG
[07:41:39] [PASSED] 30.01 Xe3_LPG
[07:41:39] [PASSED] 30.03 Xe3_LPG
[07:41:39] [PASSED] 30.04 Xe3_LPG
[07:41:39] [PASSED] 30.05 Xe3_LPG
[07:41:39] [PASSED] 35.10 Xe3p_LPG
[07:41:39] [PASSED] 35.11 Xe3p_XPC
[07:41:39] ================ [PASSED] check_graphics_ip ================
[07:41:39] ===================== check_media_ip ======================
[07:41:39] [PASSED] 12.00 Xe_M
[07:41:39] [PASSED] 12.55 Xe_HPM
[07:41:39] [PASSED] 13.00 Xe_LPM+
[07:41:39] [PASSED] 13.01 Xe2_HPM
[07:41:39] [PASSED] 20.00 Xe2_LPM
[07:41:39] [PASSED] 30.00 Xe3_LPM
[07:41:39] [PASSED] 30.02 Xe3_LPM
[07:41:39] [PASSED] 35.00 Xe3p_LPM
[07:41:39] [PASSED] 35.03 Xe3p_HPM
[07:41:39] ================= [PASSED] check_media_ip ==================
[07:41:39] =================== check_platform_desc ===================
[07:41:39] [PASSED] 0x9A60 (TIGERLAKE)
[07:41:39] [PASSED] 0x9A68 (TIGERLAKE)
[07:41:39] [PASSED] 0x9A70 (TIGERLAKE)
[07:41:39] [PASSED] 0x9A40 (TIGERLAKE)
[07:41:39] [PASSED] 0x9A49 (TIGERLAKE)
[07:41:39] [PASSED] 0x9A59 (TIGERLAKE)
[07:41:39] [PASSED] 0x9A78 (TIGERLAKE)
[07:41:39] [PASSED] 0x9AC0 (TIGERLAKE)
[07:41:39] [PASSED] 0x9AC9 (TIGERLAKE)
[07:41:39] [PASSED] 0x9AD9 (TIGERLAKE)
[07:41:39] [PASSED] 0x9AF8 (TIGERLAKE)
[07:41:39] [PASSED] 0x4C80 (ROCKETLAKE)
[07:41:39] [PASSED] 0x4C8A (ROCKETLAKE)
[07:41:39] [PASSED] 0x4C8B (ROCKETLAKE)
[07:41:39] [PASSED] 0x4C8C (ROCKETLAKE)
[07:41:39] [PASSED] 0x4C90 (ROCKETLAKE)
[07:41:39] [PASSED] 0x4C9A (ROCKETLAKE)
[07:41:39] [PASSED] 0x4680 (ALDERLAKE_S)
[07:41:39] [PASSED] 0x4682 (ALDERLAKE_S)
[07:41:39] [PASSED] 0x4688 (ALDERLAKE_S)
[07:41:39] [PASSED] 0x468A (ALDERLAKE_S)
[07:41:39] [PASSED] 0x468B (ALDERLAKE_S)
[07:41:39] [PASSED] 0x4690 (ALDERLAKE_S)
[07:41:39] [PASSED] 0x4692 (ALDERLAKE_S)
[07:41:39] [PASSED] 0x4693 (ALDERLAKE_S)
[07:41:39] [PASSED] 0x46A0 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46A1 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46A2 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46A3 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46A6 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46A8 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46AA (ALDERLAKE_P)
[07:41:39] [PASSED] 0x462A (ALDERLAKE_P)
[07:41:39] [PASSED] 0x4626 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x4628 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46B0 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46B1 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46B2 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46B3 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46C0 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46C1 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46C2 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46C3 (ALDERLAKE_P)
[07:41:39] [PASSED] 0x46D0 (ALDERLAKE_N)
[07:41:39] [PASSED] 0x46D1 (ALDERLAKE_N)
[07:41:39] [PASSED] 0x46D2 (ALDERLAKE_N)
[07:41:39] [PASSED] 0x46D3 (ALDERLAKE_N)
[07:41:39] [PASSED] 0x46D4 (ALDERLAKE_N)
[07:41:39] [PASSED] 0xA721 (ALDERLAKE_P)
[07:41:39] [PASSED] 0xA7A1 (ALDERLAKE_P)
[07:41:39] [PASSED] 0xA7A9 (ALDERLAKE_P)
[07:41:39] [PASSED] 0xA7AC (ALDERLAKE_P)
[07:41:39] [PASSED] 0xA7AD (ALDERLAKE_P)
[07:41:39] [PASSED] 0xA720 (ALDERLAKE_P)
[07:41:39] [PASSED] 0xA7A0 (ALDERLAKE_P)
[07:41:39] [PASSED] 0xA7A8 (ALDERLAKE_P)
[07:41:39] [PASSED] 0xA7AA (ALDERLAKE_P)
[07:41:39] [PASSED] 0xA7AB (ALDERLAKE_P)
[07:41:39] [PASSED] 0xA780 (ALDERLAKE_S)
[07:41:39] [PASSED] 0xA781 (ALDERLAKE_S)
[07:41:39] [PASSED] 0xA782 (ALDERLAKE_S)
[07:41:39] [PASSED] 0xA783 (ALDERLAKE_S)
[07:41:39] [PASSED] 0xA788 (ALDERLAKE_S)
[07:41:39] [PASSED] 0xA789 (ALDERLAKE_S)
[07:41:39] [PASSED] 0xA78A (ALDERLAKE_S)
[07:41:39] [PASSED] 0xA78B (ALDERLAKE_S)
[07:41:39] [PASSED] 0x4905 (DG1)
[07:41:39] [PASSED] 0x4906 (DG1)
[07:41:39] [PASSED] 0x4907 (DG1)
[07:41:39] [PASSED] 0x4908 (DG1)
[07:41:39] [PASSED] 0x4909 (DG1)
[07:41:39] [PASSED] 0x56C0 (DG2)
[07:41:39] [PASSED] 0x56C2 (DG2)
[07:41:39] [PASSED] 0x56C1 (DG2)
[07:41:39] [PASSED] 0x7D51 (METEORLAKE)
[07:41:39] [PASSED] 0x7DD1 (METEORLAKE)
[07:41:39] [PASSED] 0x7D41 (METEORLAKE)
[07:41:39] [PASSED] 0x7D67 (METEORLAKE)
[07:41:39] [PASSED] 0xB640 (METEORLAKE)
[07:41:39] [PASSED] 0x56A0 (DG2)
[07:41:39] [PASSED] 0x56A1 (DG2)
[07:41:39] [PASSED] 0x56A2 (DG2)
[07:41:39] [PASSED] 0x56BE (DG2)
[07:41:39] [PASSED] 0x56BF (DG2)
[07:41:39] [PASSED] 0x5690 (DG2)
[07:41:39] [PASSED] 0x5691 (DG2)
[07:41:39] [PASSED] 0x5692 (DG2)
[07:41:39] [PASSED] 0x56A5 (DG2)
[07:41:39] [PASSED] 0x56A6 (DG2)
[07:41:39] [PASSED] 0x56B0 (DG2)
[07:41:39] [PASSED] 0x56B1 (DG2)
[07:41:39] [PASSED] 0x56BA (DG2)
[07:41:39] [PASSED] 0x56BB (DG2)
[07:41:39] [PASSED] 0x56BC (DG2)
[07:41:39] [PASSED] 0x56BD (DG2)
[07:41:39] [PASSED] 0x5693 (DG2)
[07:41:39] [PASSED] 0x5694 (DG2)
[07:41:39] [PASSED] 0x5695 (DG2)
[07:41:39] [PASSED] 0x56A3 (DG2)
[07:41:39] [PASSED] 0x56A4 (DG2)
[07:41:39] [PASSED] 0x56B2 (DG2)
[07:41:39] [PASSED] 0x56B3 (DG2)
[07:41:39] [PASSED] 0x5696 (DG2)
[07:41:39] [PASSED] 0x5697 (DG2)
[07:41:39] [PASSED] 0xB69 (PVC)
[07:41:39] [PASSED] 0xB6E (PVC)
[07:41:39] [PASSED] 0xBD4 (PVC)
[07:41:39] [PASSED] 0xBD5 (PVC)
[07:41:39] [PASSED] 0xBD6 (PVC)
[07:41:39] [PASSED] 0xBD7 (PVC)
[07:41:39] [PASSED] 0xBD8 (PVC)
[07:41:39] [PASSED] 0xBD9 (PVC)
[07:41:39] [PASSED] 0xBDA (PVC)
[07:41:39] [PASSED] 0xBDB (PVC)
[07:41:39] [PASSED] 0xBE0 (PVC)
[07:41:39] [PASSED] 0xBE1 (PVC)
[07:41:39] [PASSED] 0xBE5 (PVC)
[07:41:39] [PASSED] 0x7D40 (METEORLAKE)
[07:41:39] [PASSED] 0x7D45 (METEORLAKE)
[07:41:39] [PASSED] 0x7D55 (METEORLAKE)
[07:41:39] [PASSED] 0x7D60 (METEORLAKE)
[07:41:39] [PASSED] 0x7DD5 (METEORLAKE)
[07:41:39] [PASSED] 0x6420 (LUNARLAKE)
[07:41:39] [PASSED] 0x64A0 (LUNARLAKE)
[07:41:39] [PASSED] 0x64B0 (LUNARLAKE)
[07:41:39] [PASSED] 0xE202 (BATTLEMAGE)
[07:41:39] [PASSED] 0xE209 (BATTLEMAGE)
[07:41:39] [PASSED] 0xE20B (BATTLEMAGE)
[07:41:39] [PASSED] 0xE20C (BATTLEMAGE)
[07:41:39] [PASSED] 0xE20D (BATTLEMAGE)
[07:41:39] [PASSED] 0xE210 (BATTLEMAGE)
[07:41:39] [PASSED] 0xE211 (BATTLEMAGE)
[07:41:39] [PASSED] 0xE212 (BATTLEMAGE)
[07:41:39] [PASSED] 0xE216 (BATTLEMAGE)
[07:41:39] [PASSED] 0xE220 (BATTLEMAGE)
[07:41:39] [PASSED] 0xE221 (BATTLEMAGE)
[07:41:39] [PASSED] 0xE222 (BATTLEMAGE)
[07:41:39] [PASSED] 0xE223 (BATTLEMAGE)
[07:41:39] [PASSED] 0xB080 (PANTHERLAKE)
[07:41:39] [PASSED] 0xB081 (PANTHERLAKE)
[07:41:39] [PASSED] 0xB082 (PANTHERLAKE)
[07:41:39] [PASSED] 0xB083 (PANTHERLAKE)
[07:41:39] [PASSED] 0xB084 (PANTHERLAKE)
[07:41:39] [PASSED] 0xB085 (PANTHERLAKE)
[07:41:39] [PASSED] 0xB086 (PANTHERLAKE)
[07:41:39] [PASSED] 0xB087 (PANTHERLAKE)
[07:41:39] [PASSED] 0xB08F (PANTHERLAKE)
[07:41:39] [PASSED] 0xB090 (PANTHERLAKE)
[07:41:39] [PASSED] 0xB0A0 (PANTHERLAKE)
[07:41:39] [PASSED] 0xB0B0 (PANTHERLAKE)
[07:41:39] [PASSED] 0xFD80 (PANTHERLAKE)
[07:41:39] [PASSED] 0xFD81 (PANTHERLAKE)
[07:41:39] [PASSED] 0xD740 (NOVALAKE_S)
[07:41:39] [PASSED] 0xD741 (NOVALAKE_S)
[07:41:39] [PASSED] 0xD742 (NOVALAKE_S)
[07:41:39] [PASSED] 0xD743 (NOVALAKE_S)
[07:41:39] [PASSED] 0xD744 (NOVALAKE_S)
[07:41:39] [PASSED] 0xD745 (NOVALAKE_S)
[07:41:39] [PASSED] 0x674C (CRESCENTISLAND)
[07:41:39] [PASSED] 0xD750 (NOVALAKE_P)
[07:41:39] [PASSED] 0xD751 (NOVALAKE_P)
[07:41:39] [PASSED] 0xD752 (NOVALAKE_P)
[07:41:39] [PASSED] 0xD753 (NOVALAKE_P)
[07:41:39] [PASSED] 0xD754 (NOVALAKE_P)
[07:41:39] [PASSED] 0xD755 (NOVALAKE_P)
[07:41:39] [PASSED] 0xD756 (NOVALAKE_P)
[07:41:39] [PASSED] 0xD757 (NOVALAKE_P)
[07:41:39] [PASSED] 0xD75F (NOVALAKE_P)
[07:41:39] =============== [PASSED] check_platform_desc ===============
[07:41:39] ===================== [PASSED] xe_pci ======================
[07:41:39] =================== xe_rtp (2 subtests) ====================
[07:41:39] =============== xe_rtp_process_to_sr_tests ================
[07:41:39] [PASSED] coalesce-same-reg
[07:41:39] [PASSED] no-match-no-add
[07:41:39] [PASSED] match-or
[07:41:39] [PASSED] match-or-xfail
[07:41:39] [PASSED] no-match-no-add-multiple-rules
[07:41:39] [PASSED] two-regs-two-entries
[07:41:39] [PASSED] clr-one-set-other
[07:41:39] [PASSED] set-field
[07:41:39] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[07:41:39] [PASSED] conflict-not-disjoint
[07:41:39] [PASSED] conflict-reg-type
[07:41:39] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[07:41:39] ================== xe_rtp_process_tests ===================
[07:41:39] [PASSED] active1
[07:41:39] [PASSED] active2
[07:41:39] [PASSED] active-inactive
[07:41:39] [PASSED] inactive-active
[07:41:39] [PASSED] inactive-1st_or_active-inactive
[07:41:39] [PASSED] inactive-2nd_or_active-inactive
[07:41:39] [PASSED] inactive-last_or_active-inactive
[07:41:39] [PASSED] inactive-no_or_active-inactive
[07:41:39] ============== [PASSED] xe_rtp_process_tests ===============
[07:41:39] ===================== [PASSED] xe_rtp ======================
[07:41:39] ==================== xe_wa (1 subtest) =====================
[07:41:39] ======================== xe_wa_gt =========================
[07:41:39] [PASSED] TIGERLAKE B0
[07:41:39] [PASSED] DG1 A0
[07:41:39] [PASSED] DG1 B0
[07:41:39] [PASSED] ALDERLAKE_S A0
[07:41:39] [PASSED] ALDERLAKE_S B0
[07:41:39] [PASSED] ALDERLAKE_S C0
[07:41:39] [PASSED] ALDERLAKE_S D0
[07:41:39] [PASSED] ALDERLAKE_P A0
[07:41:39] [PASSED] ALDERLAKE_P B0
[07:41:39] [PASSED] ALDERLAKE_P C0
[07:41:39] [PASSED] ALDERLAKE_S RPLS D0
[07:41:39] [PASSED] ALDERLAKE_P RPLU E0
[07:41:39] [PASSED] DG2 G10 C0
[07:41:39] [PASSED] DG2 G11 B1
[07:41:39] [PASSED] DG2 G12 A1
[07:41:39] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[07:41:39] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[07:41:39] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[07:41:39] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[07:41:39] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[07:41:39] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[07:41:39] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[07:41:39] ==================== [PASSED] xe_wa_gt =====================
[07:41:39] ====================== [PASSED] xe_wa ======================
[07:41:39] ============================================================
[07:41:39] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[07:41:39] Elapsed time: 36.541s total, 4.294s configuring, 31.630s building, 0.602s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[07:41:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:41:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:42:06] Starting KUnit Kernel (1/1)...
[07:42:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:42:06] ============ drm_test_pick_cmdline (2 subtests) ============
[07:42:06] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[07:42:06] =============== drm_test_pick_cmdline_named ===============
[07:42:06] [PASSED] NTSC
[07:42:06] [PASSED] NTSC-J
[07:42:06] [PASSED] PAL
[07:42:06] [PASSED] PAL-M
[07:42:06] =========== [PASSED] drm_test_pick_cmdline_named ===========
[07:42:06] ============== [PASSED] drm_test_pick_cmdline ==============
[07:42:06] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[07:42:06] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[07:42:06] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[07:42:06] =========== drm_validate_clone_mode (2 subtests) ===========
[07:42:06] ============== drm_test_check_in_clone_mode ===============
[07:42:06] [PASSED] in_clone_mode
[07:42:06] [PASSED] not_in_clone_mode
[07:42:06] ========== [PASSED] drm_test_check_in_clone_mode ===========
[07:42:06] =============== drm_test_check_valid_clones ===============
[07:42:06] [PASSED] not_in_clone_mode
[07:42:06] [PASSED] valid_clone
[07:42:06] [PASSED] invalid_clone
[07:42:06] =========== [PASSED] drm_test_check_valid_clones ===========
[07:42:06] ============= [PASSED] drm_validate_clone_mode =============
[07:42:06] ============= drm_validate_modeset (1 subtest) =============
[07:42:06] [PASSED] drm_test_check_connector_changed_modeset
[07:42:06] ============== [PASSED] drm_validate_modeset ===============
[07:42:06] ====== drm_test_bridge_get_current_state (2 subtests) ======
[07:42:06] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[07:42:06] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[07:42:06] ======== [PASSED] drm_test_bridge_get_current_state ========
[07:42:06] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[07:42:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[07:42:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[07:42:06] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[07:42:06] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[07:42:06] ============== drm_bridge_alloc (2 subtests) ===============
[07:42:06] [PASSED] drm_test_drm_bridge_alloc_basic
[07:42:06] [PASSED] drm_test_drm_bridge_alloc_get_put
[07:42:06] ================ [PASSED] drm_bridge_alloc =================
[07:42:06] ============= drm_cmdline_parser (40 subtests) =============
[07:42:06] [PASSED] drm_test_cmdline_force_d_only
[07:42:06] [PASSED] drm_test_cmdline_force_D_only_dvi
[07:42:06] [PASSED] drm_test_cmdline_force_D_only_hdmi
[07:42:06] [PASSED] drm_test_cmdline_force_D_only_not_digital
[07:42:06] [PASSED] drm_test_cmdline_force_e_only
[07:42:06] [PASSED] drm_test_cmdline_res
[07:42:06] [PASSED] drm_test_cmdline_res_vesa
[07:42:06] [PASSED] drm_test_cmdline_res_vesa_rblank
[07:42:06] [PASSED] drm_test_cmdline_res_rblank
[07:42:06] [PASSED] drm_test_cmdline_res_bpp
[07:42:06] [PASSED] drm_test_cmdline_res_refresh
[07:42:06] [PASSED] drm_test_cmdline_res_bpp_refresh
[07:42:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[07:42:06] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[07:42:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[07:42:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[07:42:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[07:42:06] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[07:42:06] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[07:42:06] [PASSED] drm_test_cmdline_res_margins_force_on
[07:42:06] [PASSED] drm_test_cmdline_res_vesa_margins
[07:42:06] [PASSED] drm_test_cmdline_name
[07:42:06] [PASSED] drm_test_cmdline_name_bpp
[07:42:06] [PASSED] drm_test_cmdline_name_option
[07:42:06] [PASSED] drm_test_cmdline_name_bpp_option
[07:42:06] [PASSED] drm_test_cmdline_rotate_0
[07:42:06] [PASSED] drm_test_cmdline_rotate_90
[07:42:06] [PASSED] drm_test_cmdline_rotate_180
[07:42:06] [PASSED] drm_test_cmdline_rotate_270
[07:42:06] [PASSED] drm_test_cmdline_hmirror
[07:42:06] [PASSED] drm_test_cmdline_vmirror
[07:42:06] [PASSED] drm_test_cmdline_margin_options
[07:42:06] [PASSED] drm_test_cmdline_multiple_options
[07:42:06] [PASSED] drm_test_cmdline_bpp_extra_and_option
[07:42:06] [PASSED] drm_test_cmdline_extra_and_option
[07:42:06] [PASSED] drm_test_cmdline_freestanding_options
[07:42:06] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[07:42:06] [PASSED] drm_test_cmdline_panel_orientation
[07:42:06] ================ drm_test_cmdline_invalid =================
[07:42:06] [PASSED] margin_only
[07:42:06] [PASSED] interlace_only
[07:42:06] [PASSED] res_missing_x
[07:42:06] [PASSED] res_missing_y
[07:42:06] [PASSED] res_bad_y
[07:42:06] [PASSED] res_missing_y_bpp
[07:42:06] [PASSED] res_bad_bpp
[07:42:06] [PASSED] res_bad_refresh
[07:42:06] [PASSED] res_bpp_refresh_force_on_off
[07:42:06] [PASSED] res_invalid_mode
[07:42:06] [PASSED] res_bpp_wrong_place_mode
[07:42:06] [PASSED] name_bpp_refresh
[07:42:06] [PASSED] name_refresh
[07:42:06] [PASSED] name_refresh_wrong_mode
[07:42:06] [PASSED] name_refresh_invalid_mode
[07:42:06] [PASSED] rotate_multiple
[07:42:06] [PASSED] rotate_invalid_val
[07:42:06] [PASSED] rotate_truncated
[07:42:06] [PASSED] invalid_option
[07:42:06] [PASSED] invalid_tv_option
[07:42:06] [PASSED] truncated_tv_option
[07:42:06] ============ [PASSED] drm_test_cmdline_invalid =============
[07:42:06] =============== drm_test_cmdline_tv_options ===============
[07:42:06] [PASSED] NTSC
[07:42:06] [PASSED] NTSC_443
[07:42:06] [PASSED] NTSC_J
[07:42:06] [PASSED] PAL
[07:42:06] [PASSED] PAL_M
[07:42:06] [PASSED] PAL_N
[07:42:06] [PASSED] SECAM
[07:42:06] [PASSED] MONO_525
[07:42:06] [PASSED] MONO_625
[07:42:06] =========== [PASSED] drm_test_cmdline_tv_options ===========
[07:42:06] =============== [PASSED] drm_cmdline_parser ================
[07:42:06] ========== drmm_connector_hdmi_init (20 subtests) ==========
[07:42:06] [PASSED] drm_test_connector_hdmi_init_valid
[07:42:06] [PASSED] drm_test_connector_hdmi_init_bpc_8
[07:42:06] [PASSED] drm_test_connector_hdmi_init_bpc_10
[07:42:06] [PASSED] drm_test_connector_hdmi_init_bpc_12
[07:42:06] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[07:42:06] [PASSED] drm_test_connector_hdmi_init_bpc_null
[07:42:06] [PASSED] drm_test_connector_hdmi_init_formats_empty
[07:42:06] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[07:42:06] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:42:06] [PASSED] supported_formats=0x9 yuv420_allowed=1
[07:42:06] [PASSED] supported_formats=0x9 yuv420_allowed=0
[07:42:06] [PASSED] supported_formats=0x5 yuv420_allowed=1
[07:42:06] [PASSED] supported_formats=0x5 yuv420_allowed=0
[07:42:06] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:42:06] [PASSED] drm_test_connector_hdmi_init_null_ddc
[07:42:06] [PASSED] drm_test_connector_hdmi_init_null_product
[07:42:06] [PASSED] drm_test_connector_hdmi_init_null_vendor
[07:42:06] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[07:42:06] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[07:42:06] [PASSED] drm_test_connector_hdmi_init_product_valid
[07:42:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[07:42:06] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[07:42:06] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[07:42:06] ========= drm_test_connector_hdmi_init_type_valid =========
[07:42:06] [PASSED] HDMI-A
[07:42:06] [PASSED] HDMI-B
[07:42:06] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[07:42:06] ======== drm_test_connector_hdmi_init_type_invalid ========
[07:42:06] [PASSED] Unknown
[07:42:06] [PASSED] VGA
[07:42:06] [PASSED] DVI-I
[07:42:06] [PASSED] DVI-D
[07:42:06] [PASSED] DVI-A
[07:42:06] [PASSED] Composite
[07:42:06] [PASSED] SVIDEO
[07:42:06] [PASSED] LVDS
[07:42:06] [PASSED] Component
[07:42:06] [PASSED] DIN
[07:42:06] [PASSED] DP
[07:42:06] [PASSED] TV
[07:42:06] [PASSED] eDP
[07:42:06] [PASSED] Virtual
[07:42:06] [PASSED] DSI
[07:42:06] [PASSED] DPI
[07:42:06] [PASSED] Writeback
[07:42:06] [PASSED] SPI
[07:42:06] [PASSED] USB
[07:42:06] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[07:42:06] ============ [PASSED] drmm_connector_hdmi_init =============
[07:42:06] ============= drmm_connector_init (3 subtests) =============
[07:42:06] [PASSED] drm_test_drmm_connector_init
[07:42:06] [PASSED] drm_test_drmm_connector_init_null_ddc
[07:42:06] ========= drm_test_drmm_connector_init_type_valid =========
[07:42:06] [PASSED] Unknown
[07:42:06] [PASSED] VGA
[07:42:06] [PASSED] DVI-I
[07:42:06] [PASSED] DVI-D
[07:42:06] [PASSED] DVI-A
[07:42:06] [PASSED] Composite
[07:42:06] [PASSED] SVIDEO
[07:42:06] [PASSED] LVDS
[07:42:06] [PASSED] Component
[07:42:06] [PASSED] DIN
[07:42:06] [PASSED] DP
[07:42:06] [PASSED] HDMI-A
[07:42:06] [PASSED] HDMI-B
[07:42:06] [PASSED] TV
[07:42:06] [PASSED] eDP
[07:42:06] [PASSED] Virtual
[07:42:06] [PASSED] DSI
[07:42:06] [PASSED] DPI
[07:42:06] [PASSED] Writeback
[07:42:06] [PASSED] SPI
[07:42:06] [PASSED] USB
[07:42:06] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[07:42:06] =============== [PASSED] drmm_connector_init ===============
[07:42:06] ========= drm_connector_dynamic_init (6 subtests) ==========
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_init
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_init_properties
[07:42:06] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[07:42:06] [PASSED] Unknown
[07:42:06] [PASSED] VGA
[07:42:06] [PASSED] DVI-I
[07:42:06] [PASSED] DVI-D
[07:42:06] [PASSED] DVI-A
[07:42:06] [PASSED] Composite
[07:42:06] [PASSED] SVIDEO
[07:42:06] [PASSED] LVDS
[07:42:06] [PASSED] Component
[07:42:06] [PASSED] DIN
[07:42:06] [PASSED] DP
[07:42:06] [PASSED] HDMI-A
[07:42:06] [PASSED] HDMI-B
[07:42:06] [PASSED] TV
[07:42:06] [PASSED] eDP
[07:42:06] [PASSED] Virtual
[07:42:06] [PASSED] DSI
[07:42:06] [PASSED] DPI
[07:42:06] [PASSED] Writeback
[07:42:06] [PASSED] SPI
[07:42:06] [PASSED] USB
[07:42:06] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[07:42:06] ======== drm_test_drm_connector_dynamic_init_name =========
[07:42:06] [PASSED] Unknown
[07:42:06] [PASSED] VGA
[07:42:06] [PASSED] DVI-I
[07:42:06] [PASSED] DVI-D
[07:42:06] [PASSED] DVI-A
[07:42:06] [PASSED] Composite
[07:42:06] [PASSED] SVIDEO
[07:42:06] [PASSED] LVDS
[07:42:06] [PASSED] Component
[07:42:06] [PASSED] DIN
[07:42:06] [PASSED] DP
[07:42:06] [PASSED] HDMI-A
[07:42:06] [PASSED] HDMI-B
[07:42:06] [PASSED] TV
[07:42:06] [PASSED] eDP
[07:42:06] [PASSED] Virtual
[07:42:06] [PASSED] DSI
[07:42:06] [PASSED] DPI
[07:42:06] [PASSED] Writeback
[07:42:06] [PASSED] SPI
[07:42:06] [PASSED] USB
[07:42:06] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[07:42:06] =========== [PASSED] drm_connector_dynamic_init ============
[07:42:06] ==== drm_connector_dynamic_register_early (4 subtests) =====
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[07:42:06] ====== [PASSED] drm_connector_dynamic_register_early =======
[07:42:06] ======= drm_connector_dynamic_register (7 subtests) ========
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[07:42:06] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[07:42:06] ========= [PASSED] drm_connector_dynamic_register ==========
[07:42:06] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[07:42:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[07:42:06] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[07:42:06] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[07:42:06] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[07:42:06] ========== drm_test_get_tv_mode_from_name_valid ===========
[07:42:06] [PASSED] NTSC
[07:42:06] [PASSED] NTSC-443
[07:42:06] [PASSED] NTSC-J
[07:42:06] [PASSED] PAL
[07:42:06] [PASSED] PAL-M
[07:42:06] [PASSED] PAL-N
[07:42:06] [PASSED] SECAM
[07:42:06] [PASSED] Mono
[07:42:06] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[07:42:06] [PASSED] drm_test_get_tv_mode_from_name_truncated
[07:42:06] ============ [PASSED] drm_get_tv_mode_from_name ============
[07:42:06] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[07:42:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[07:42:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[07:42:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[07:42:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[07:42:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[07:42:06] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[07:42:06] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[07:42:06] [PASSED] VIC 96
[07:42:06] [PASSED] VIC 97
[07:42:06] [PASSED] VIC 101
[07:42:06] [PASSED] VIC 102
[07:42:06] [PASSED] VIC 106
[07:42:06] [PASSED] VIC 107
[07:42:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[07:42:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[07:42:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[07:42:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[07:42:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[07:42:06] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[07:42:06] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[07:42:06] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[07:42:06] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[07:42:06] [PASSED] Automatic
[07:42:06] [PASSED] Full
[07:42:06] [PASSED] Limited 16:235
[07:42:06] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[07:42:06] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[07:42:06] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[07:42:06] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[07:42:06] === drm_test_drm_hdmi_connector_get_output_format_name ====
[07:42:06] [PASSED] RGB
[07:42:06] [PASSED] YUV 4:2:0
[07:42:06] [PASSED] YUV 4:2:2
[07:42:06] [PASSED] YUV 4:4:4
[07:42:06] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[07:42:06] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[07:42:06] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[07:42:06] ============= drm_damage_helper (21 subtests) ==============
[07:42:06] [PASSED] drm_test_damage_iter_no_damage
[07:42:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[07:42:06] [PASSED] drm_test_damage_iter_no_damage_src_moved
[07:42:06] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[07:42:06] [PASSED] drm_test_damage_iter_no_damage_not_visible
[07:42:06] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[07:42:06] [PASSED] drm_test_damage_iter_no_damage_no_fb
[07:42:06] [PASSED] drm_test_damage_iter_simple_damage
[07:42:06] [PASSED] drm_test_damage_iter_single_damage
[07:42:06] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[07:42:06] [PASSED] drm_test_damage_iter_single_damage_outside_src
[07:42:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[07:42:06] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[07:42:06] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[07:42:06] [PASSED] drm_test_damage_iter_single_damage_src_moved
[07:42:06] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[07:42:06] [PASSED] drm_test_damage_iter_damage
[07:42:06] [PASSED] drm_test_damage_iter_damage_one_intersect
[07:42:06] [PASSED] drm_test_damage_iter_damage_one_outside
[07:42:06] [PASSED] drm_test_damage_iter_damage_src_moved
[07:42:06] [PASSED] drm_test_damage_iter_damage_not_visible
[07:42:06] ================ [PASSED] drm_damage_helper ================
[07:42:06] ============== drm_dp_mst_helper (3 subtests) ==============
[07:42:06] ============== drm_test_dp_mst_calc_pbn_mode ==============
[07:42:06] [PASSED] Clock 154000 BPP 30 DSC disabled
[07:42:06] [PASSED] Clock 234000 BPP 30 DSC disabled
[07:42:06] [PASSED] Clock 297000 BPP 24 DSC disabled
[07:42:06] [PASSED] Clock 332880 BPP 24 DSC enabled
[07:42:06] [PASSED] Clock 324540 BPP 24 DSC enabled
[07:42:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[07:42:06] ============== drm_test_dp_mst_calc_pbn_div ===============
[07:42:06] [PASSED] Link rate 2000000 lane count 4
[07:42:06] [PASSED] Link rate 2000000 lane count 2
[07:42:06] [PASSED] Link rate 2000000 lane count 1
[07:42:06] [PASSED] Link rate 1350000 lane count 4
[07:42:06] [PASSED] Link rate 1350000 lane count 2
[07:42:06] [PASSED] Link rate 1350000 lane count 1
[07:42:06] [PASSED] Link rate 1000000 lane count 4
[07:42:06] [PASSED] Link rate 1000000 lane count 2
[07:42:06] [PASSED] Link rate 1000000 lane count 1
[07:42:06] [PASSED] Link rate 810000 lane count 4
[07:42:06] [PASSED] Link rate 810000 lane count 2
[07:42:06] [PASSED] Link rate 810000 lane count 1
[07:42:06] [PASSED] Link rate 540000 lane count 4
[07:42:06] [PASSED] Link rate 540000 lane count 2
[07:42:06] [PASSED] Link rate 540000 lane count 1
[07:42:06] [PASSED] Link rate 270000 lane count 4
[07:42:06] [PASSED] Link rate 270000 lane count 2
[07:42:06] [PASSED] Link rate 270000 lane count 1
[07:42:06] [PASSED] Link rate 162000 lane count 4
[07:42:06] [PASSED] Link rate 162000 lane count 2
[07:42:06] [PASSED] Link rate 162000 lane count 1
[07:42:06] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[07:42:06] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[07:42:06] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[07:42:06] [PASSED] DP_POWER_UP_PHY with port number
[07:42:06] [PASSED] DP_POWER_DOWN_PHY with port number
[07:42:06] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[07:42:06] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[07:42:06] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[07:42:06] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[07:42:06] [PASSED] DP_QUERY_PAYLOAD with port number
[07:42:06] [PASSED] DP_QUERY_PAYLOAD with VCPI
[07:42:06] [PASSED] DP_REMOTE_DPCD_READ with port number
[07:42:06] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[07:42:06] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[07:42:06] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[07:42:06] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[07:42:06] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[07:42:06] [PASSED] DP_REMOTE_I2C_READ with port number
[07:42:06] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[07:42:06] [PASSED] DP_REMOTE_I2C_READ with transactions array
[07:42:06] [PASSED] DP_REMOTE_I2C_WRITE with port number
[07:42:06] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[07:42:06] [PASSED] DP_REMOTE_I2C_WRITE with data array
[07:42:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[07:42:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[07:42:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[07:42:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[07:42:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[07:42:06] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[07:42:06] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[07:42:06] ================ [PASSED] drm_dp_mst_helper ================
[07:42:06] ================== drm_exec (7 subtests) ===================
[07:42:06] [PASSED] sanitycheck
[07:42:06] [PASSED] test_lock
[07:42:06] [PASSED] test_lock_unlock
[07:42:06] [PASSED] test_duplicates
[07:42:06] [PASSED] test_prepare
[07:42:06] [PASSED] test_prepare_array
[07:42:06] [PASSED] test_multiple_loops
[07:42:06] ==================== [PASSED] drm_exec =====================
[07:42:06] =========== drm_format_helper_test (17 subtests) ===========
[07:42:06] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[07:42:06] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[07:42:06] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[07:42:06] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[07:42:06] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[07:42:06] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[07:42:06] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[07:42:06] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[07:42:06] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[07:42:06] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[07:42:06] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[07:42:06] ============== drm_test_fb_xrgb8888_to_mono ===============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[07:42:06] ==================== drm_test_fb_swab =====================
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ================ [PASSED] drm_test_fb_swab =================
[07:42:06] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[07:42:06] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[07:42:06] [PASSED] single_pixel_source_buffer
[07:42:06] [PASSED] single_pixel_clip_rectangle
[07:42:06] [PASSED] well_known_colors
[07:42:06] [PASSED] destination_pitch
[07:42:06] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[07:42:06] ================= drm_test_fb_clip_offset =================
[07:42:06] [PASSED] pass through
[07:42:06] [PASSED] horizontal offset
[07:42:06] [PASSED] vertical offset
[07:42:06] [PASSED] horizontal and vertical offset
[07:42:06] [PASSED] horizontal offset (custom pitch)
[07:42:06] [PASSED] vertical offset (custom pitch)
[07:42:06] [PASSED] horizontal and vertical offset (custom pitch)
[07:42:06] ============= [PASSED] drm_test_fb_clip_offset =============
[07:42:06] =================== drm_test_fb_memcpy ====================
[07:42:06] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[07:42:06] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[07:42:06] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[07:42:06] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[07:42:06] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[07:42:06] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[07:42:06] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[07:42:06] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[07:42:06] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[07:42:06] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[07:42:06] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[07:42:06] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[07:42:06] =============== [PASSED] drm_test_fb_memcpy ================
[07:42:06] ============= [PASSED] drm_format_helper_test ==============
[07:42:06] ================= drm_format (18 subtests) =================
[07:42:06] [PASSED] drm_test_format_block_width_invalid
[07:42:06] [PASSED] drm_test_format_block_width_one_plane
[07:42:06] [PASSED] drm_test_format_block_width_two_plane
[07:42:06] [PASSED] drm_test_format_block_width_three_plane
[07:42:06] [PASSED] drm_test_format_block_width_tiled
[07:42:06] [PASSED] drm_test_format_block_height_invalid
[07:42:06] [PASSED] drm_test_format_block_height_one_plane
[07:42:06] [PASSED] drm_test_format_block_height_two_plane
[07:42:06] [PASSED] drm_test_format_block_height_three_plane
[07:42:06] [PASSED] drm_test_format_block_height_tiled
[07:42:06] [PASSED] drm_test_format_min_pitch_invalid
[07:42:06] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[07:42:06] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[07:42:06] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[07:42:06] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[07:42:06] [PASSED] drm_test_format_min_pitch_two_plane
[07:42:06] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[07:42:06] [PASSED] drm_test_format_min_pitch_tiled
[07:42:06] =================== [PASSED] drm_format ====================
[07:42:06] ============== drm_framebuffer (10 subtests) ===============
[07:42:06] ========== drm_test_framebuffer_check_src_coords ==========
[07:42:06] [PASSED] Success: source fits into fb
[07:42:06] [PASSED] Fail: overflowing fb with x-axis coordinate
[07:42:06] [PASSED] Fail: overflowing fb with y-axis coordinate
[07:42:06] [PASSED] Fail: overflowing fb with source width
[07:42:06] [PASSED] Fail: overflowing fb with source height
[07:42:06] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[07:42:06] [PASSED] drm_test_framebuffer_cleanup
[07:42:06] =============== drm_test_framebuffer_create ===============
[07:42:06] [PASSED] ABGR8888 normal sizes
[07:42:06] [PASSED] ABGR8888 max sizes
[07:42:06] [PASSED] ABGR8888 pitch greater than min required
[07:42:06] [PASSED] ABGR8888 pitch less than min required
[07:42:06] [PASSED] ABGR8888 Invalid width
[07:42:06] [PASSED] ABGR8888 Invalid buffer handle
[07:42:06] [PASSED] No pixel format
[07:42:06] [PASSED] ABGR8888 Width 0
[07:42:06] [PASSED] ABGR8888 Height 0
[07:42:06] [PASSED] ABGR8888 Out of bound height * pitch combination
[07:42:06] [PASSED] ABGR8888 Large buffer offset
[07:42:06] [PASSED] ABGR8888 Buffer offset for inexistent plane
[07:42:06] [PASSED] ABGR8888 Invalid flag
[07:42:06] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[07:42:06] [PASSED] ABGR8888 Valid buffer modifier
[07:42:06] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[07:42:06] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[07:42:06] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[07:42:06] [PASSED] NV12 Normal sizes
[07:42:06] [PASSED] NV12 Max sizes
[07:42:06] [PASSED] NV12 Invalid pitch
[07:42:06] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[07:42:06] [PASSED] NV12 different modifier per-plane
[07:42:06] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[07:42:06] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[07:42:06] [PASSED] NV12 Modifier for inexistent plane
[07:42:06] [PASSED] NV12 Handle for inexistent plane
[07:42:06] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[07:42:06] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[07:42:06] [PASSED] YVU420 Normal sizes
[07:42:06] [PASSED] YVU420 Max sizes
[07:42:06] [PASSED] YVU420 Invalid pitch
[07:42:06] [PASSED] YVU420 Different pitches
[07:42:06] [PASSED] YVU420 Different buffer offsets/pitches
[07:42:06] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[07:42:06] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[07:42:06] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[07:42:06] [PASSED] YVU420 Valid modifier
[07:42:06] [PASSED] YVU420 Different modifiers per plane
[07:42:06] [PASSED] YVU420 Modifier for inexistent plane
[07:42:06] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[07:42:06] [PASSED] X0L2 Normal sizes
[07:42:06] [PASSED] X0L2 Max sizes
[07:42:06] [PASSED] X0L2 Invalid pitch
[07:42:06] [PASSED] X0L2 Pitch greater than minimum required
[07:42:06] [PASSED] X0L2 Handle for inexistent plane
[07:42:06] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[07:42:06] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[07:42:06] [PASSED] X0L2 Valid modifier
[07:42:06] [PASSED] X0L2 Modifier for inexistent plane
[07:42:06] =========== [PASSED] drm_test_framebuffer_create ===========
[07:42:06] [PASSED] drm_test_framebuffer_free
[07:42:06] [PASSED] drm_test_framebuffer_init
[07:42:06] [PASSED] drm_test_framebuffer_init_bad_format
[07:42:06] [PASSED] drm_test_framebuffer_init_dev_mismatch
[07:42:06] [PASSED] drm_test_framebuffer_lookup
[07:42:06] [PASSED] drm_test_framebuffer_lookup_inexistent
[07:42:06] [PASSED] drm_test_framebuffer_modifiers_not_supported
[07:42:06] ================= [PASSED] drm_framebuffer =================
[07:42:06] ================ drm_gem_shmem (8 subtests) ================
[07:42:06] [PASSED] drm_gem_shmem_test_obj_create
[07:42:06] [PASSED] drm_gem_shmem_test_obj_create_private
[07:42:06] [PASSED] drm_gem_shmem_test_pin_pages
[07:42:06] [PASSED] drm_gem_shmem_test_vmap
[07:42:06] [PASSED] drm_gem_shmem_test_get_sg_table
[07:42:06] [PASSED] drm_gem_shmem_test_get_pages_sgt
[07:42:06] [PASSED] drm_gem_shmem_test_madvise
[07:42:06] [PASSED] drm_gem_shmem_test_purge
[07:42:06] ================== [PASSED] drm_gem_shmem ==================
[07:42:06] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[07:42:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[07:42:06] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[07:42:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[07:42:06] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[07:42:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[07:42:06] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[07:42:06] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[07:42:06] [PASSED] Automatic
[07:42:06] [PASSED] Full
[07:42:06] [PASSED] Limited 16:235
[07:42:06] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[07:42:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[07:42:06] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[07:42:06] [PASSED] drm_test_check_disable_connector
[07:42:06] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[07:42:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[07:42:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[07:42:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[07:42:06] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[07:42:06] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[07:42:06] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[07:42:06] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[07:42:06] [PASSED] drm_test_check_output_bpc_dvi
[07:42:06] [PASSED] drm_test_check_output_bpc_format_vic_1
[07:42:06] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[07:42:06] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[07:42:06] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[07:42:06] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[07:42:06] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[07:42:06] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[07:42:06] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[07:42:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[07:42:06] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[07:42:06] [PASSED] drm_test_check_broadcast_rgb_value
[07:42:06] [PASSED] drm_test_check_bpc_8_value
[07:42:06] [PASSED] drm_test_check_bpc_10_value
[07:42:06] [PASSED] drm_test_check_bpc_12_value
[07:42:06] [PASSED] drm_test_check_format_value
[07:42:06] [PASSED] drm_test_check_tmds_char_value
[07:42:06] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[07:42:06] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[07:42:06] [PASSED] drm_test_check_mode_valid
[07:42:06] [PASSED] drm_test_check_mode_valid_reject
[07:42:06] [PASSED] drm_test_check_mode_valid_reject_rate
[07:42:06] [PASSED] drm_test_check_mode_valid_reject_max_clock
[07:42:06] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[07:42:06] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[07:42:06] [PASSED] drm_test_check_infoframes
[07:42:06] [PASSED] drm_test_check_reject_avi_infoframe
[07:42:06] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[07:42:06] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[07:42:06] [PASSED] drm_test_check_reject_audio_infoframe
[07:42:06] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[07:42:06] ================= drm_managed (2 subtests) =================
[07:42:06] [PASSED] drm_test_managed_release_action
[07:42:06] [PASSED] drm_test_managed_run_action
[07:42:06] =================== [PASSED] drm_managed ===================
[07:42:06] =================== drm_mm (6 subtests) ====================
[07:42:06] [PASSED] drm_test_mm_init
[07:42:06] [PASSED] drm_test_mm_debug
[07:42:06] [PASSED] drm_test_mm_align32
[07:42:06] [PASSED] drm_test_mm_align64
[07:42:06] [PASSED] drm_test_mm_lowest
[07:42:06] [PASSED] drm_test_mm_highest
[07:42:06] ===================== [PASSED] drm_mm ======================
[07:42:06] ============= drm_modes_analog_tv (5 subtests) =============
[07:42:06] [PASSED] drm_test_modes_analog_tv_mono_576i
[07:42:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[07:42:06] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[07:42:06] [PASSED] drm_test_modes_analog_tv_pal_576i
[07:42:06] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[07:42:06] =============== [PASSED] drm_modes_analog_tv ===============
[07:42:06] ============== drm_plane_helper (2 subtests) ===============
[07:42:06] =============== drm_test_check_plane_state ================
[07:42:06] [PASSED] clipping_simple
[07:42:06] [PASSED] clipping_rotate_reflect
[07:42:06] [PASSED] positioning_simple
[07:42:06] [PASSED] upscaling
[07:42:06] [PASSED] downscaling
[07:42:06] [PASSED] rounding1
[07:42:06] [PASSED] rounding2
[07:42:06] [PASSED] rounding3
[07:42:06] [PASSED] rounding4
[07:42:06] =========== [PASSED] drm_test_check_plane_state ============
[07:42:06] =========== drm_test_check_invalid_plane_state ============
[07:42:06] [PASSED] positioning_invalid
[07:42:06] [PASSED] upscaling_invalid
[07:42:06] [PASSED] downscaling_invalid
[07:42:06] ======= [PASSED] drm_test_check_invalid_plane_state ========
[07:42:06] ================ [PASSED] drm_plane_helper =================
[07:42:06] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[07:42:06] ====== drm_test_connector_helper_tv_get_modes_check =======
[07:42:06] [PASSED] None
[07:42:06] [PASSED] PAL
[07:42:06] [PASSED] NTSC
[07:42:06] [PASSED] Both, NTSC Default
[07:42:06] [PASSED] Both, PAL Default
[07:42:06] [PASSED] Both, NTSC Default, with PAL on command-line
[07:42:06] [PASSED] Both, PAL Default, with NTSC on command-line
[07:42:06] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[07:42:06] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[07:42:06] ================== drm_rect (9 subtests) ===================
[07:42:06] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[07:42:06] [PASSED] drm_test_rect_clip_scaled_not_clipped
[07:42:06] [PASSED] drm_test_rect_clip_scaled_clipped
[07:42:06] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[07:42:06] ================= drm_test_rect_intersect =================
[07:42:06] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[07:42:06] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[07:42:06] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[07:42:06] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[07:42:06] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[07:42:06] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[07:42:06] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[07:42:06] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[07:42:06] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[07:42:06] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[07:42:06] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[07:42:06] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[07:42:06] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[07:42:06] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[07:42:06] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[07:42:06] ============= [PASSED] drm_test_rect_intersect =============
[07:42:06] ================ drm_test_rect_calc_hscale ================
[07:42:06] [PASSED] normal use
[07:42:06] [PASSED] out of max range
[07:42:06] [PASSED] out of min range
[07:42:06] [PASSED] zero dst
[07:42:06] [PASSED] negative src
[07:42:06] [PASSED] negative dst
[07:42:06] ============ [PASSED] drm_test_rect_calc_hscale ============
[07:42:06] ================ drm_test_rect_calc_vscale ================
[07:42:06] [PASSED] normal use
[07:42:06] [PASSED] out of max range
[07:42:06] [PASSED] out of min range
[07:42:06] [PASSED] zero dst
[07:42:06] [PASSED] negative src
[07:42:06] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[07:42:06] ============ [PASSED] drm_test_rect_calc_vscale ============
[07:42:06] ================== drm_test_rect_rotate ===================
[07:42:06] [PASSED] reflect-x
[07:42:06] [PASSED] reflect-y
[07:42:06] [PASSED] rotate-0
[07:42:06] [PASSED] rotate-90
[07:42:06] [PASSED] rotate-180
[07:42:06] [PASSED] rotate-270
[07:42:06] ============== [PASSED] drm_test_rect_rotate ===============
[07:42:06] ================ drm_test_rect_rotate_inv =================
[07:42:06] [PASSED] reflect-x
[07:42:06] [PASSED] reflect-y
[07:42:06] [PASSED] rotate-0
[07:42:06] [PASSED] rotate-90
[07:42:06] [PASSED] rotate-180
[07:42:06] [PASSED] rotate-270
[07:42:06] ============ [PASSED] drm_test_rect_rotate_inv =============
[07:42:06] ==================== [PASSED] drm_rect =====================
[07:42:06] ============ drm_sysfb_modeset_test (1 subtest) ============
[07:42:06] ============ drm_test_sysfb_build_fourcc_list =============
[07:42:06] [PASSED] no native formats
[07:42:06] [PASSED] XRGB8888 as native format
[07:42:06] [PASSED] remove duplicates
[07:42:06] [PASSED] convert alpha formats
[07:42:06] [PASSED] random formats
[07:42:06] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[07:42:06] ============= [PASSED] drm_sysfb_modeset_test ==============
[07:42:06] ================== drm_fixp (2 subtests) ===================
[07:42:06] [PASSED] drm_test_int2fixp
[07:42:06] [PASSED] drm_test_sm2fixp
[07:42:06] ==================== [PASSED] drm_fixp =====================
[07:42:06] ============================================================
[07:42:06] Testing complete. Ran 621 tests: passed: 621
[07:42:06] Elapsed time: 26.273s total, 1.718s configuring, 24.389s building, 0.122s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[07:42:06] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:42:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:42:17] Starting KUnit Kernel (1/1)...
[07:42:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:42:17] ================= ttm_device (5 subtests) ==================
[07:42:17] [PASSED] ttm_device_init_basic
[07:42:17] [PASSED] ttm_device_init_multiple
[07:42:17] [PASSED] ttm_device_fini_basic
[07:42:17] [PASSED] ttm_device_init_no_vma_man
[07:42:17] ================== ttm_device_init_pools ==================
[07:42:17] [PASSED] No DMA allocations, no DMA32 required
[07:42:17] [PASSED] DMA allocations, DMA32 required
[07:42:17] [PASSED] No DMA allocations, DMA32 required
[07:42:17] [PASSED] DMA allocations, no DMA32 required
[07:42:17] ============== [PASSED] ttm_device_init_pools ==============
[07:42:17] =================== [PASSED] ttm_device ====================
[07:42:17] ================== ttm_pool (8 subtests) ===================
[07:42:17] ================== ttm_pool_alloc_basic ===================
[07:42:17] [PASSED] One page
[07:42:17] [PASSED] More than one page
[07:42:17] [PASSED] Above the allocation limit
[07:42:17] [PASSED] One page, with coherent DMA mappings enabled
[07:42:17] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:42:17] ============== [PASSED] ttm_pool_alloc_basic ===============
[07:42:17] ============== ttm_pool_alloc_basic_dma_addr ==============
[07:42:17] [PASSED] One page
[07:42:17] [PASSED] More than one page
[07:42:17] [PASSED] Above the allocation limit
[07:42:17] [PASSED] One page, with coherent DMA mappings enabled
[07:42:17] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:42:17] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[07:42:17] [PASSED] ttm_pool_alloc_order_caching_match
[07:42:17] [PASSED] ttm_pool_alloc_caching_mismatch
[07:42:17] [PASSED] ttm_pool_alloc_order_mismatch
[07:42:17] [PASSED] ttm_pool_free_dma_alloc
[07:42:17] [PASSED] ttm_pool_free_no_dma_alloc
[07:42:17] [PASSED] ttm_pool_fini_basic
[07:42:17] ==================== [PASSED] ttm_pool =====================
[07:42:17] ================ ttm_resource (8 subtests) =================
[07:42:17] ================= ttm_resource_init_basic =================
[07:42:17] [PASSED] Init resource in TTM_PL_SYSTEM
[07:42:17] [PASSED] Init resource in TTM_PL_VRAM
[07:42:17] [PASSED] Init resource in a private placement
[07:42:17] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[07:42:17] ============= [PASSED] ttm_resource_init_basic =============
[07:42:17] [PASSED] ttm_resource_init_pinned
[07:42:17] [PASSED] ttm_resource_fini_basic
[07:42:17] [PASSED] ttm_resource_manager_init_basic
[07:42:17] [PASSED] ttm_resource_manager_usage_basic
[07:42:17] [PASSED] ttm_resource_manager_set_used_basic
[07:42:17] [PASSED] ttm_sys_man_alloc_basic
[07:42:17] [PASSED] ttm_sys_man_free_basic
[07:42:17] ================== [PASSED] ttm_resource ===================
[07:42:17] =================== ttm_tt (15 subtests) ===================
[07:42:17] ==================== ttm_tt_init_basic ====================
[07:42:17] [PASSED] Page-aligned size
[07:42:17] [PASSED] Extra pages requested
[07:42:17] ================ [PASSED] ttm_tt_init_basic ================
[07:42:17] [PASSED] ttm_tt_init_misaligned
[07:42:17] [PASSED] ttm_tt_fini_basic
[07:42:17] [PASSED] ttm_tt_fini_sg
[07:42:17] [PASSED] ttm_tt_fini_shmem
[07:42:17] [PASSED] ttm_tt_create_basic
[07:42:17] [PASSED] ttm_tt_create_invalid_bo_type
[07:42:17] [PASSED] ttm_tt_create_ttm_exists
[07:42:17] [PASSED] ttm_tt_create_failed
[07:42:17] [PASSED] ttm_tt_destroy_basic
[07:42:17] [PASSED] ttm_tt_populate_null_ttm
[07:42:17] [PASSED] ttm_tt_populate_populated_ttm
[07:42:17] [PASSED] ttm_tt_unpopulate_basic
[07:42:17] [PASSED] ttm_tt_unpopulate_empty_ttm
[07:42:17] [PASSED] ttm_tt_swapin_basic
[07:42:17] ===================== [PASSED] ttm_tt ======================
[07:42:17] =================== ttm_bo (14 subtests) ===================
[07:42:17] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[07:42:17] [PASSED] Cannot be interrupted and sleeps
[07:42:17] [PASSED] Cannot be interrupted, locks straight away
[07:42:17] [PASSED] Can be interrupted, sleeps
[07:42:17] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[07:42:17] [PASSED] ttm_bo_reserve_locked_no_sleep
[07:42:17] [PASSED] ttm_bo_reserve_no_wait_ticket
[07:42:17] [PASSED] ttm_bo_reserve_double_resv
[07:42:17] [PASSED] ttm_bo_reserve_interrupted
[07:42:17] [PASSED] ttm_bo_reserve_deadlock
[07:42:17] [PASSED] ttm_bo_unreserve_basic
[07:42:17] [PASSED] ttm_bo_unreserve_pinned
[07:42:17] [PASSED] ttm_bo_unreserve_bulk
[07:42:17] [PASSED] ttm_bo_fini_basic
[07:42:17] [PASSED] ttm_bo_fini_shared_resv
[07:42:17] [PASSED] ttm_bo_pin_basic
[07:42:17] [PASSED] ttm_bo_pin_unpin_resource
[07:42:17] [PASSED] ttm_bo_multiple_pin_one_unpin
[07:42:17] ===================== [PASSED] ttm_bo ======================
[07:42:17] ============== ttm_bo_validate (22 subtests) ===============
[07:42:17] ============== ttm_bo_init_reserved_sys_man ===============
[07:42:17] [PASSED] Buffer object for userspace
[07:42:17] [PASSED] Kernel buffer object
[07:42:17] [PASSED] Shared buffer object
[07:42:17] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[07:42:17] ============== ttm_bo_init_reserved_mock_man ==============
[07:42:17] [PASSED] Buffer object for userspace
[07:42:17] [PASSED] Kernel buffer object
[07:42:17] [PASSED] Shared buffer object
[07:42:17] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[07:42:17] [PASSED] ttm_bo_init_reserved_resv
[07:42:17] ================== ttm_bo_validate_basic ==================
[07:42:17] [PASSED] Buffer object for userspace
[07:42:17] [PASSED] Kernel buffer object
[07:42:17] [PASSED] Shared buffer object
[07:42:17] ============== [PASSED] ttm_bo_validate_basic ==============
[07:42:17] [PASSED] ttm_bo_validate_invalid_placement
[07:42:17] ============= ttm_bo_validate_same_placement ==============
[07:42:17] [PASSED] System manager
[07:42:17] [PASSED] VRAM manager
[07:42:17] ========= [PASSED] ttm_bo_validate_same_placement ==========
[07:42:17] [PASSED] ttm_bo_validate_failed_alloc
[07:42:17] [PASSED] ttm_bo_validate_pinned
[07:42:17] [PASSED] ttm_bo_validate_busy_placement
[07:42:17] ================ ttm_bo_validate_multihop =================
[07:42:17] [PASSED] Buffer object for userspace
[07:42:17] [PASSED] Kernel buffer object
[07:42:17] [PASSED] Shared buffer object
[07:42:17] ============ [PASSED] ttm_bo_validate_multihop =============
[07:42:17] ========== ttm_bo_validate_no_placement_signaled ==========
[07:42:17] [PASSED] Buffer object in system domain, no page vector
[07:42:17] [PASSED] Buffer object in system domain with an existing page vector
[07:42:17] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[07:42:17] ======== ttm_bo_validate_no_placement_not_signaled ========
[07:42:17] [PASSED] Buffer object for userspace
[07:42:17] [PASSED] Kernel buffer object
[07:42:17] [PASSED] Shared buffer object
[07:42:17] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[07:42:17] [PASSED] ttm_bo_validate_move_fence_signaled
[07:42:17] ========= ttm_bo_validate_move_fence_not_signaled =========
[07:42:17] [PASSED] Waits for GPU
[07:42:17] [PASSED] Tries to lock straight away
[07:42:17] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[07:42:17] [PASSED] ttm_bo_validate_swapout
[07:42:17] [PASSED] ttm_bo_validate_happy_evict
[07:42:17] [PASSED] ttm_bo_validate_all_pinned_evict
[07:42:17] [PASSED] ttm_bo_validate_allowed_only_evict
[07:42:17] [PASSED] ttm_bo_validate_deleted_evict
[07:42:17] [PASSED] ttm_bo_validate_busy_domain_evict
[07:42:17] [PASSED] ttm_bo_validate_evict_gutting
[07:42:17] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[07:42:17] ================= [PASSED] ttm_bo_validate =================
[07:42:17] ============================================================
[07:42:17] Testing complete. Ran 102 tests: passed: 102
[07:42:17] Elapsed time: 11.439s total, 1.737s configuring, 9.435s building, 0.238s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 4/4] drm/i915/reset: Add "display_reset_count" debugfs file
2026-04-10 7:35 ` [PATCH 4/4] drm/i915/reset: Add "display_reset_count" debugfs file Ville Syrjala
@ 2026-04-10 7:42 ` Jani Nikula
2026-04-10 7:56 ` Ville Syrjälä
0 siblings, 1 reply; 11+ messages in thread
From: Jani Nikula @ 2026-04-10 7:42 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx; +Cc: intel-xe, Jouni Högander, Maarten Lankhorst
On Fri, 10 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Expose the number of display resets performed in a new
> "display_reset_count" debugfs file. kms_busy can use this to
> confirm that the kernel actually took the full display reset path.
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_core.h | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 ++
> drivers/gpu/drm/i915/display/intel_display_reset.c | 10 ++++++++++
> drivers/gpu/drm/i915/display/intel_display_reset.h | 2 ++
> drivers/gpu/drm/xe/Makefile | 1 +
> 5 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 9e77003addd0..38535d1056d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -556,6 +556,10 @@ struct intel_display {
> unsigned long mask;
> } quirks;
>
> + struct {
> + u32 count;
> + } reset;
> +
> struct {
> /* restore state for suspend/resume and display reset */
> struct drm_atomic_state *modeset_state;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index f244a2b5d139..81bef000a4e3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -27,6 +27,7 @@
> #include "intel_display_power.h"
> #include "intel_display_power_well.h"
> #include "intel_display_regs.h"
> +#include "intel_display_reset.h"
> #include "intel_display_rpm.h"
> #include "intel_display_types.h"
> #include "intel_dmc.h"
> @@ -838,6 +839,7 @@ void intel_display_debugfs_register(struct intel_display *display)
>
> intel_bios_debugfs_register(display);
> intel_cdclk_debugfs_register(display);
> + intel_display_reset_debugfs_register(display);
> intel_dmc_debugfs_register(display);
> intel_dp_test_debugfs_register(display);
> intel_fbc_debugfs_register(display);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
> index ca15dc18ef0f..79c2e77ca137 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_reset.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
> @@ -3,6 +3,8 @@
> * Copyright © 2023 Intel Corporation
> */
>
> +#include <linux/debugfs.h>
> +
> #include <drm/drm_atomic_helper.h>
> #include <drm/drm_print.h>
>
> @@ -66,6 +68,7 @@ void intel_display_reset_prepare(struct intel_display *display)
> return;
> }
>
> + display->reset.count++;
> display->restore.modeset_state = state;
> state->acquire_ctx = ctx;
> }
> @@ -114,3 +117,10 @@ void intel_display_reset_finish(struct intel_display *display, bool test_only)
> drm_modeset_acquire_fini(ctx);
> mutex_unlock(&display->drm->mode_config.mutex);
> }
> +
> +void intel_display_reset_debugfs_register(struct intel_display *display)
> +{
> + debugfs_create_u32("display_reset_count", 0400,
> + display->drm->debugfs_root,
> + &display->reset.count);
I'm wondering about the names of the debugfs files. We've used the i915_
prefix so far, but it's obviously misleading nowadays. I've started
using intel_ in some places.
I primarily worry about the potential clash with drm core debugfs files,
which leads to failures to create the file, and clash with other
drivers, where the files are created all right, but the contents differ
driver to driver.
*shrug*
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.h b/drivers/gpu/drm/i915/display/intel_display_reset.h
> index a8aa7729d33f..b88c330a3441 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_reset.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_reset.h
> @@ -15,4 +15,6 @@ bool intel_display_reset_test(struct intel_display *display);
> void intel_display_reset_prepare(struct intel_display *display);
> void intel_display_reset_finish(struct intel_display *display, bool test_only);
>
> +void intel_display_reset_debugfs_register(struct intel_display *display);
> +
> #endif /* __INTEL_RESET_H__ */
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 110fef511fe2..1a85dfe457f0 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -262,6 +262,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
> i915-display/intel_display_power.o \
> i915-display/intel_display_power_map.o \
> i915-display/intel_display_power_well.o \
> + i915-display/intel_display_reset.o \
> i915-display/intel_display_rpm.o \
> i915-display/intel_display_rps.o \
> i915-display/intel_display_trace.o \
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 4/4] drm/i915/reset: Add "display_reset_count" debugfs file
2026-04-10 7:42 ` Jani Nikula
@ 2026-04-10 7:56 ` Ville Syrjälä
2026-04-10 8:46 ` Jani Nikula
0 siblings, 1 reply; 11+ messages in thread
From: Ville Syrjälä @ 2026-04-10 7:56 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe, Jouni Högander, Maarten Lankhorst
On Fri, Apr 10, 2026 at 10:42:23AM +0300, Jani Nikula wrote:
> On Fri, 10 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Expose the number of display resets performed in a new
> > "display_reset_count" debugfs file. kms_busy can use this to
> > confirm that the kernel actually took the full display reset path.
> >
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display_core.h | 4 ++++
> > drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 ++
> > drivers/gpu/drm/i915/display/intel_display_reset.c | 10 ++++++++++
> > drivers/gpu/drm/i915/display/intel_display_reset.h | 2 ++
> > drivers/gpu/drm/xe/Makefile | 1 +
> > 5 files changed, 19 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
> > index 9e77003addd0..38535d1056d1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> > @@ -556,6 +556,10 @@ struct intel_display {
> > unsigned long mask;
> > } quirks;
> >
> > + struct {
> > + u32 count;
> > + } reset;
> > +
> > struct {
> > /* restore state for suspend/resume and display reset */
> > struct drm_atomic_state *modeset_state;
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > index f244a2b5d139..81bef000a4e3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > @@ -27,6 +27,7 @@
> > #include "intel_display_power.h"
> > #include "intel_display_power_well.h"
> > #include "intel_display_regs.h"
> > +#include "intel_display_reset.h"
> > #include "intel_display_rpm.h"
> > #include "intel_display_types.h"
> > #include "intel_dmc.h"
> > @@ -838,6 +839,7 @@ void intel_display_debugfs_register(struct intel_display *display)
> >
> > intel_bios_debugfs_register(display);
> > intel_cdclk_debugfs_register(display);
> > + intel_display_reset_debugfs_register(display);
> > intel_dmc_debugfs_register(display);
> > intel_dp_test_debugfs_register(display);
> > intel_fbc_debugfs_register(display);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
> > index ca15dc18ef0f..79c2e77ca137 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_reset.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
> > @@ -3,6 +3,8 @@
> > * Copyright © 2023 Intel Corporation
> > */
> >
> > +#include <linux/debugfs.h>
> > +
> > #include <drm/drm_atomic_helper.h>
> > #include <drm/drm_print.h>
> >
> > @@ -66,6 +68,7 @@ void intel_display_reset_prepare(struct intel_display *display)
> > return;
> > }
> >
> > + display->reset.count++;
> > display->restore.modeset_state = state;
> > state->acquire_ctx = ctx;
> > }
> > @@ -114,3 +117,10 @@ void intel_display_reset_finish(struct intel_display *display, bool test_only)
> > drm_modeset_acquire_fini(ctx);
> > mutex_unlock(&display->drm->mode_config.mutex);
> > }
> > +
> > +void intel_display_reset_debugfs_register(struct intel_display *display)
> > +{
> > + debugfs_create_u32("display_reset_count", 0400,
> > + display->drm->debugfs_root,
> > + &display->reset.count);
>
> I'm wondering about the names of the debugfs files. We've used the i915_
> prefix so far, but it's obviously misleading nowadays. I've started
> using intel_ in some places.
>
> I primarily worry about the potential clash with drm core debugfs files,
> which leads to failures to create the file, and clash with other
> drivers, where the files are created all right, but the contents differ
> driver to driver.
Fair point. I suppose I'll just stick an "intel_" prefix on it.
Another option could be use a subdirectory to separate the driver
specific stuff from the core stuff, but dunno if we want to start
down that path. And I guess we'd then need similar subdirectories
inside the crtc/connector/etc. subdirectories.
>
> *shrug*
>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
>
> > +}
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.h b/drivers/gpu/drm/i915/display/intel_display_reset.h
> > index a8aa7729d33f..b88c330a3441 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_reset.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_reset.h
> > @@ -15,4 +15,6 @@ bool intel_display_reset_test(struct intel_display *display);
> > void intel_display_reset_prepare(struct intel_display *display);
> > void intel_display_reset_finish(struct intel_display *display, bool test_only);
> >
> > +void intel_display_reset_debugfs_register(struct intel_display *display);
> > +
> > #endif /* __INTEL_RESET_H__ */
> > diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> > index 110fef511fe2..1a85dfe457f0 100644
> > --- a/drivers/gpu/drm/xe/Makefile
> > +++ b/drivers/gpu/drm/xe/Makefile
> > @@ -262,6 +262,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
> > i915-display/intel_display_power.o \
> > i915-display/intel_display_power_map.o \
> > i915-display/intel_display_power_well.o \
> > + i915-display/intel_display_reset.o \
> > i915-display/intel_display_rpm.o \
> > i915-display/intel_display_rps.o \
> > i915-display/intel_display_trace.o \
>
> --
> Jani Nikula, Intel
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/reset: Expose "display_reset_count" in debugfs
2026-04-10 7:34 [PATCH 0/4] drm/i915/reset: Expose "display_reset_count" in debugfs Ville Syrjala
` (4 preceding siblings ...)
2026-04-10 7:42 ` ✓ CI.KUnit: success for drm/i915/reset: Expose "display_reset_count" in debugfs Patchwork
@ 2026-04-10 8:20 ` Patchwork
2026-04-10 14:41 ` ✗ Xe.CI.FULL: failure " Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-04-10 8:20 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1422 bytes --]
== Series Details ==
Series: drm/i915/reset: Expose "display_reset_count" in debugfs
URL : https://patchwork.freedesktop.org/series/164676/
State : success
== Summary ==
CI Bug Log - changes from xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5_BAT -> xe-pw-164676v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (14 -> 14)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-164676v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_waitfence@abstime:
- bat-dg2-oem2: [PASS][1] -> [TIMEOUT][2] ([Intel XE#6506])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5/bat-dg2-oem2/igt@xe_waitfence@abstime.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/bat-dg2-oem2/igt@xe_waitfence@abstime.html
[Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
Build changes
-------------
* Linux: xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5 -> xe-pw-164676v1
IGT_8852: 8852
xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5: 3a8d015ab84eae3d9247736f48648f870ae2a6c5
xe-pw-164676v1: 164676v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/index.html
[-- Attachment #2: Type: text/html, Size: 1997 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 4/4] drm/i915/reset: Add "display_reset_count" debugfs file
2026-04-10 7:56 ` Ville Syrjälä
@ 2026-04-10 8:46 ` Jani Nikula
0 siblings, 0 replies; 11+ messages in thread
From: Jani Nikula @ 2026-04-10 8:46 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-gfx, intel-xe, Jouni Högander, Maarten Lankhorst
On Fri, 10 Apr 2026, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Fri, Apr 10, 2026 at 10:42:23AM +0300, Jani Nikula wrote:
>> On Fri, 10 Apr 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
>> > +void intel_display_reset_debugfs_register(struct intel_display *display)
>> > +{
>> > + debugfs_create_u32("display_reset_count", 0400,
>> > + display->drm->debugfs_root,
>> > + &display->reset.count);
>>
>> I'm wondering about the names of the debugfs files. We've used the i915_
>> prefix so far, but it's obviously misleading nowadays. I've started
>> using intel_ in some places.
>>
>> I primarily worry about the potential clash with drm core debugfs files,
>> which leads to failures to create the file, and clash with other
>> drivers, where the files are created all right, but the contents differ
>> driver to driver.
>
> Fair point. I suppose I'll just stick an "intel_" prefix on it.
Ack.
> Another option could be use a subdirectory to separate the driver
> specific stuff from the core stuff, but dunno if we want to start
> down that path. And I guess we'd then need similar subdirectories
> inside the crtc/connector/etc. subdirectories.
All those could have a "struct dentry *driver_debugfs_entry" or similar
for the directory, and drivers would only be allowed to add stuff under
there. I.e. drivers wouldn't create the directory, the core would. That
would be pretty clean.
The problem is it takes a decade to migrate everything, and the time in
between is an unholy mess.
So maybe not?
BR,
Jani.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 11+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/i915/reset: Expose "display_reset_count" in debugfs
2026-04-10 7:34 [PATCH 0/4] drm/i915/reset: Expose "display_reset_count" in debugfs Ville Syrjala
` (5 preceding siblings ...)
2026-04-10 8:20 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-04-10 14:41 ` Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2026-04-10 14:41 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 8618 bytes --]
== Series Details ==
Series: drm/i915/reset: Expose "display_reset_count" in debugfs
URL : https://patchwork.freedesktop.org/series/164676/
State : failure
== Summary ==
CI Bug Log - changes from xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5_FULL -> xe-pw-164676v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-164676v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-164676v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-164676v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a3:
- shard-bmg: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5/shard-bmg-9/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a3.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a3.html
Known issues
------------
Here are the changes found in xe-pw-164676v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2370])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-9/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_chamelium_hpd@hdmi-hpd-after-suspend:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#2252])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-9/igt@kms_chamelium_hpd@hdmi-hpd-after-suspend.html
* igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
- shard-bmg: [PASS][5] -> [DMESG-WARN][6] ([Intel XE#5354])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5/shard-bmg-6/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-1/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#4354] / [Intel XE#7386])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-9/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-bmg: [PASS][8] -> [FAIL][9] ([Intel XE#7545])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5/shard-bmg-9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#2311]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-10/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2313]) +1 other test skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#1489])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-9/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr@fbc-pr-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-9/igt@kms_psr@fbc-pr-cursor-plane-move.html
* igt@xe_eudebug@basic-exec-queues:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#7636]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-9/igt@xe_eudebug@basic-exec-queues.html
* igt@xe_exec_fault_mode@twice-multi-queue-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#7136]) +2 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-9/igt@xe_exec_fault_mode@twice-multi-queue-userptr-rebind.html
* igt@xe_exec_multi_queue@many-execs-dyn-priority-smem:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#6874]) +1 other test skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-9/igt@xe_exec_multi_queue@many-execs-dyn-priority-smem.html
#### Possible fixes ####
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][17] ([Intel XE#7084]) -> [PASS][18] +1 other test pass
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
#### Warnings ####
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][19] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][20] ([Intel XE#1729] / [Intel XE#7424])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][21] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][22] ([Intel XE#2426] / [Intel XE#5848])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
[Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7545
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
Build changes
-------------
* Linux: xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5 -> xe-pw-164676v1
IGT_8852: 8852
xe-4879-3a8d015ab84eae3d9247736f48648f870ae2a6c5: 3a8d015ab84eae3d9247736f48648f870ae2a6c5
xe-pw-164676v1: 164676v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-164676v1/index.html
[-- Attachment #2: Type: text/html, Size: 9656 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2026-04-10 14:41 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-04-10 7:34 [PATCH 0/4] drm/i915/reset: Expose "display_reset_count" in debugfs Ville Syrjala
2026-04-10 7:34 ` [PATCH 1/4] drm/i915/reset: Reorganize display reset code Ville Syrjala
2026-04-10 7:34 ` [PATCH 2/4] drm/i915/reset: Move pending_fb_pin handling to i915 Ville Syrjala
2026-04-10 7:34 ` [PATCH 3/4] drm/xe/display: Add init_clock_gating.h stubs Ville Syrjala
2026-04-10 7:35 ` [PATCH 4/4] drm/i915/reset: Add "display_reset_count" debugfs file Ville Syrjala
2026-04-10 7:42 ` Jani Nikula
2026-04-10 7:56 ` Ville Syrjälä
2026-04-10 8:46 ` Jani Nikula
2026-04-10 7:42 ` ✓ CI.KUnit: success for drm/i915/reset: Expose "display_reset_count" in debugfs Patchwork
2026-04-10 8:20 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-10 14:41 ` ✗ Xe.CI.FULL: failure " Patchwork
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox