From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D889FF99378 for ; Thu, 23 Apr 2026 11:27:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9548D10E508; Thu, 23 Apr 2026 11:27:08 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="nhq1BpCr"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id EB6BD10E508; Thu, 23 Apr 2026 11:27:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1776943627; x=1808479627; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=DYIyTIuqXO90Qsqxyp1ocWS+HSeDkCEH/gYfvbDrXhE=; b=nhq1BpCrpfAUM/ZWhLJl/rvLc8IpaK6yw3VCkK5ytpBzCoXcBoQDY0CZ mt2evNjdfBOTC7yhXkJ9uV1fYbqILr0Xhv25gzdB7GHQFRYul7/A65fxU 2W6m/u7zAeMZ5uL31a0dxUYqN4JO87vICr5XaOJfqRZaoVmKaRA6p1IGb RTXHRLlDlwOL1iQbOhKVh6fstd0+8q3l9B+EIQe4QIsAuuQJ6XdK3ex0e aeag5G9VRDK5qgLwxI8n4DpMxLucTXC33jHCAa10bM8nOKMtKHLGavkXl k7rOn15ZUE55fgMabf3+Fg2lCgP7i3l6J5FVtf9z0lxp2KPaLD6CFncbL w==; X-CSE-ConnectionGUID: 6GxqdbSQRo6z9NcKl2RM3w== X-CSE-MsgGUID: Saj15iMRRquEpClMH+lb3g== X-IronPort-AV: E=McAfee;i="6800,10657,11764"; a="80495782" X-IronPort-AV: E=Sophos;i="6.23,194,1770624000"; d="scan'208";a="80495782" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2026 04:27:06 -0700 X-CSE-ConnectionGUID: dhHBNbu8TkizmfEUudQx2w== X-CSE-MsgGUID: m7TLoEKaQrKJAb6TqGGxeA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,194,1770624000"; d="scan'208";a="232538243" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.188]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Apr 2026 04:27:04 -0700 Date: Thu, 23 Apr 2026 14:27:01 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Tvrtko Ursulin Cc: Jani Nikula , Juha-Pekka Heikkila , intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Subject: Re: [PATCH] drm/i915/display: enable ccs modifiers on dg2 Message-ID: References: <20260423101739.2772745-1-juhapekka.heikkila@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Patchwork-Hint: comment Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Thu, Apr 23, 2026 at 12:15:14PM +0100, Tvrtko Ursulin wrote: > > On 23/04/2026 11:28, Jani Nikula wrote: > > On Thu, 23 Apr 2026, Juha-Pekka Heikkila wrote: > >> Since Xe driver aux ccs enablement dg2 ccs modifiers have been > >> disabled on both Xe and i915 drivers. Here allow dg2 to use > >> ccs again for framebuffers. > >> > >> Fixes: 6a99e91 ("drm/i915/display: Detect AuxCCS support via display parent interface") > >> Signed-off-by: Juha-Pekka Heikkila > >> --- > >> drivers/gpu/drm/i915/i915_driver.c | 5 ++++- > >> 1 file changed, 4 insertions(+), 1 deletion(-) > >> > >> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c > >> index d31819758f3d..7a73461d398a 100644 > >> --- a/drivers/gpu/drm/i915/i915_driver.c > >> +++ b/drivers/gpu/drm/i915/i915_driver.c > >> @@ -54,9 +54,11 @@ > >> #include "display/intel_bw.h" > >> #include "display/intel_cdclk.h" > >> #include "display/intel_crtc.h" > >> +#include "display/intel_display_core.h" > >> #include "display/intel_display_device.h" > >> #include "display/intel_display_driver.h" > >> #include "display/intel_display_power.h" > >> +#include "display/intel_display_types.h" > >> #include "display/intel_dmc.h" > >> #include "display/intel_dp.h" > >> #include "display/intel_dpt.h" > >> @@ -749,8 +751,9 @@ static void fence_priority_display(struct dma_fence *fence) > >> static bool has_auxccs(struct drm_device *drm) > >> { > >> struct drm_i915_private *i915 = to_i915(drm); > >> + struct intel_display *display = i915->display; > >> > >> - return IS_GRAPHICS_VER(i915, 9, 12) || > >> + return IS_DISPLAY_VER(display, 9, 12) || > > > > Sorry, can't do this in i915 core. > > Was DG2 never Gen12? I totally forgot.. my bad.. Adding IS_DG2 to the > checks below should work, no? I think just exclude HAS_FLAT_CCS. > > Regards, > > Tvrtko > > > > > BR, > > Jani. > > > >> IS_ALDERLAKE_P(i915) || > >> IS_METEORLAKE(i915); > >> } > > -- Ville Syrjälä Intel