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Add helpers >to read this value from the LRC. > >BSpec: 73988 > >Signed-off-by: Umesh Nerlige Ramappa >--- >v2: (Matt) >- Add BSpec reference >- Make queue_timestamp snapshot 64 bit >- Add a snapshot of queue timestamp in ms >--- > drivers/gpu/drm/xe/regs/xe_lrc_layout.h | 3 ++ > drivers/gpu/drm/xe/xe_lrc.c | 47 +++++++++++++++++++++++++ > drivers/gpu/drm/xe/xe_lrc.h | 2 ++ > drivers/gpu/drm/xe/xe_lrc_types.h | 3 ++ > 4 files changed, 55 insertions(+) > >diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h >index b5eff383902c..4ab86fc369fd 100644 >--- a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h >+++ b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h >@@ -34,6 +34,9 @@ > #define CTX_CS_INT_VEC_REG 0x5a > #define CTX_CS_INT_VEC_DATA (CTX_CS_INT_VEC_REG + 1) > >+#define CTX_QUEUE_TIMESTAMP (0xd0 + 1) >+#define CTX_QUEUE_TIMESTAMP_UDW (0xd2 + 1) >+ > #define INDIRECT_CTX_RING_HEAD (0x02 + 1) > #define INDIRECT_CTX_RING_TAIL (0x04 + 1) > #define INDIRECT_CTX_RING_START (0x06 + 1) >diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c >index d85c712d106b..2ee52efb9219 100644 >--- a/drivers/gpu/drm/xe/xe_lrc.c >+++ b/drivers/gpu/drm/xe/xe_lrc.c >@@ -789,6 +789,16 @@ static u32 __xe_lrc_ctx_timestamp_udw_offset(struct xe_lrc *lrc) > return __xe_lrc_regs_offset(lrc) + CTX_TIMESTAMP_UDW * sizeof(u32); > } > >+static u32 __xe_lrc_queue_timestamp_offset(struct xe_lrc *lrc) >+{ >+ return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP * sizeof(u32); >+} >+ >+static u32 __xe_lrc_queue_timestamp_udw_offset(struct xe_lrc *lrc) >+{ >+ return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP_UDW * sizeof(u32); >+} >+ > static inline u32 __xe_lrc_indirect_ring_offset(struct xe_lrc *lrc) > { > u32 offset = xe_bo_size(lrc->bo) - LRC_WA_BB_SIZE - >@@ -838,6 +848,8 @@ DECL_MAP_ADDR_HELPERS(ctx_timestamp_udw, lrc->bo) > DECL_MAP_ADDR_HELPERS(parallel, lrc->bo) > DECL_MAP_ADDR_HELPERS(indirect_ring, lrc->bo) > DECL_MAP_ADDR_HELPERS(engine_id, lrc->bo) >+DECL_MAP_ADDR_HELPERS(queue_timestamp, lrc->bo) >+DECL_MAP_ADDR_HELPERS(queue_timestamp_udw, lrc->bo) > > #undef DECL_MAP_ADDR_HELPERS > >@@ -886,6 +898,30 @@ static u64 xe_lrc_ctx_timestamp(struct xe_lrc *lrc) > return (u64)udw << 32 | ldw; > } > >+/** >+ * xe_lrc_queue_timestamp() - Read queue timestamp value >+ * @lrc: Pointer to the lrc. >+ * >+ * Returns: queue timestamp value >+ */ >+static u64 xe_lrc_queue_timestamp(struct xe_lrc *lrc) >+{ >+ struct xe_device *xe = lrc_to_xe(lrc); >+ struct iosys_map map; >+ u32 ldw, udw = 0; >+ >+ if (!xe_lrc_is_multi_queue(lrc)) >+ return 0; May be print an error instead of silently returning 0? >+ >+ map = __xe_lrc_queue_timestamp_map(lrc); >+ ldw = xe_map_read32(xe, &map); >+ >+ map = __xe_lrc_queue_timestamp_udw_map(lrc); >+ udw = xe_map_read32(xe, &map); >+ >+ return (u64)udw << 32 | ldw; >+} >+ > /** > * xe_lrc_ctx_job_timestamp_ggtt_addr() - Get ctx job timestamp GGTT address > * @lrc: Pointer to the lrc. >@@ -1551,6 +1587,12 @@ static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct > if (lrc_to_xe(lrc)->info.has_64bit_timestamp) > xe_lrc_write_ctx_reg(lrc, CTX_TIMESTAMP_UDW, 0); > >+ if (xe_lrc_is_multi_queue(lrc)) { >+ lrc->queue_timestamp = 0; >+ xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP, 0); >+ xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP_UDW, 0); >+ } lrc->multi_queue.primary_lrc is not set yet at this point. So, xe_lrc_is_multi_queue(lrc) will always return false here. >+ > if (xe->info.has_asid && vm) > xe_lrc_write_ctx_reg(lrc, CTX_ASID, vm->usm.asid); > >@@ -2479,6 +2521,9 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc) > snapshot->ctx_timestamp = xe_lrc_ctx_timestamp(lrc); > snapshot->ctx_timestamp_ms = > xe_gt_clock_interval_to_ms(lrc->gt, xe_lrc_ctx_timestamp(lrc)); >+ snapshot->queue_timestamp = xe_lrc_queue_timestamp(lrc); >+ snapshot->queue_timestamp_ms = >+ xe_gt_clock_interval_to_ms(lrc->gt, xe_lrc_queue_timestamp(lrc)); > snapshot->ctx_job_timestamp = xe_lrc_ctx_job_timestamp(lrc); > return snapshot; > } >@@ -2533,6 +2578,8 @@ void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer > drm_printf(p, "\tSeqno: (memory) %d\n", snapshot->seqno); > drm_printf(p, "\tTimestamp: 0x%016llx\n", snapshot->ctx_timestamp); > drm_printf(p, "\tTimestamp ms: %llu\n", snapshot->ctx_timestamp_ms); >+ drm_printf(p, "\tQueue Timestamp: 0x%016llx\n", snapshot->queue_timestamp); >+ drm_printf(p, "\tQueue Timestamp ms: %llu\n", snapshot->queue_timestamp_ms); Same comment as in patch #1 (Timestamp ms). Niranjana > drm_printf(p, "\tJob Timestamp: 0x%08x\n", snapshot->ctx_job_timestamp); > > if (!snapshot->lrc_snapshot) >diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h >index 3d0bf4a7bfa0..12d08808ac75 100644 >--- a/drivers/gpu/drm/xe/xe_lrc.h >+++ b/drivers/gpu/drm/xe/xe_lrc.h >@@ -38,8 +38,10 @@ struct xe_lrc_snapshot { > u32 start_seqno; > u32 seqno; > u64 ctx_timestamp; >+ u64 queue_timestamp; > u32 ctx_job_timestamp; > u64 ctx_timestamp_ms; >+ u64 queue_timestamp_ms; > }; > > #define LRC_PPHWSP_FLUSH_INVAL_SCRATCH_ADDR (0x34 * 4) >diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h >index 0a5c13ec2ad7..53ef48feebfc 100644 >--- a/drivers/gpu/drm/xe/xe_lrc_types.h >+++ b/drivers/gpu/drm/xe/xe_lrc_types.h >@@ -64,6 +64,9 @@ struct xe_lrc { > /** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */ > u64 ctx_timestamp; > >+ /** @queue_timestamp: value of QUEUE_TIMESTAMP on last update */ >+ u64 queue_timestamp; >+ > /** @multi_queue: Multi queue LRC related information */ > struct { > /** @multi_queue.primary_lrc: Primary lrc of this multi-queue group*/ >-- >2.43.0 >