From: Matthew Brost <matthew.brost@intel.com>
To: Francois Dugast <francois.dugast@intel.com>
Cc: <intel-xe@lists.freedesktop.org>,
<dri-devel@lists.freedesktop.org>,
<himal.prasad.ghimiray@intel.com>
Subject: Re: [PATCH] drm: Drop HPAGE_PMD_SIZE dependency in dma_iova_try_alloc calls
Date: Thu, 7 May 2026 06:50:27 -0700 [thread overview]
Message-ID: <afyYo8Ow7xDQvEHM@gsse-cloud1.jf.intel.com> (raw)
In-Reply-To: <20260507091606.1067973-1-francois.dugast@intel.com>
On Thu, May 07, 2026 at 11:16:06AM +0200, Francois Dugast wrote:
> The phys argument to dma_iova_try_alloc() is used only to compute
> the sub-granule offset (phys & (granule - 1)). Since HPAGE_PMD_SIZE
> is a power of two larger than any IOMMU granule, this expression
> always evaluates to zero.
I looks like I screwed up how this interface is supposed to be used. I
thought the phys argument to dma_iova_try_alloc was really the
alignment, but it looks I was mistaken. I believe the above analysis is
correct.
>
> Replace the ternary expressions with a plain 0, which is what the
> API documentation recommends for callers doing PAGE_SIZE-aligned
> transfers. This also removes the dependency on HPAGE_PMD_SIZE and
> thus on CONFIG_PGTABLE_HAS_HUGE_LEAVES / HAVE_ARCH_TRANSPARENT_HUGEPAGE,
> fixing build failures on architectures such as arm32 that lack that
> config.
>
Fixes tag so this gets in drm-misc-fixes cycle?
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> Assisted-by: GitHub Copilot:claude-sonnet-4.6 # Documentation
> Link: https://lore.kernel.org/intel-xe/c36e7dfb-cf62-4d21-a3b1-f54cb43e0832@infradead.org/
> ---
> drivers/gpu/drm/drm_gpusvm.c | 5 +----
> drivers/gpu/drm/drm_pagemap.c | 5 +----
> 2 files changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_gpusvm.c b/drivers/gpu/drm/drm_gpusvm.c
> index 365a9c0b522a..958cb605aedd 100644
> --- a/drivers/gpu/drm/drm_gpusvm.c
> +++ b/drivers/gpu/drm/drm_gpusvm.c
> @@ -1556,10 +1556,7 @@ int drm_gpusvm_get_pages(struct drm_gpusvm *gpusvm,
>
> if (!i)
> dma_iova_try_alloc(gpusvm->drm->dev, state,
> - npages * PAGE_SIZE >=
> - HPAGE_PMD_SIZE ?
> - HPAGE_PMD_SIZE : 0,
> - npages * PAGE_SIZE);
> + 0, npages * PAGE_SIZE);
One thing to do would be to confirm via a printk that, when npages ==
512 on Xe, the IOVA is 2M-aligned. If not, we likely need to tweak the
dma_iova_try_alloc interface—but that would be out of scope here, I
think. From my quick read of dma_iova_try_alloc, npages == 512 should
produce a 2M-aligned IOVA.
Anyways with a Fixes tag:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
>
> if (dma_use_iova(state)) {
> err = dma_iova_link(gpusvm->drm->dev, state,
> diff --git a/drivers/gpu/drm/drm_pagemap.c b/drivers/gpu/drm/drm_pagemap.c
> index d82ea7ccb8da..15c78eca180b 100644
> --- a/drivers/gpu/drm/drm_pagemap.c
> +++ b/drivers/gpu/drm/drm_pagemap.c
> @@ -347,10 +347,7 @@ drm_pagemap_migrate_map_system_pages(struct device *dev,
>
> if (!try_alloc) {
> dma_iova_try_alloc(dev, &state->dma_state,
> - (npages - i) * PAGE_SIZE >=
> - HPAGE_PMD_SIZE ?
> - HPAGE_PMD_SIZE : 0,
> - npages * PAGE_SIZE);
> + 0, npages * PAGE_SIZE);
> try_alloc = true;
> }
>
> --
> 2.43.0
>
next prev parent reply other threads:[~2026-05-07 13:50 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-07 9:16 [PATCH] drm: Drop HPAGE_PMD_SIZE dependency in dma_iova_try_alloc calls Francois Dugast
2026-05-07 9:21 ` ✗ CI.checkpatch: warning for " Patchwork
2026-05-07 9:23 ` ✓ CI.KUnit: success " Patchwork
2026-05-07 10:27 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-07 13:50 ` Matthew Brost [this message]
2026-05-07 20:25 ` ✗ Xe.CI.FULL: failure " Patchwork
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