Re: [PATCH v4 09/12] drm/xe: Add pagefault chaining stats

[Francois Dugast <francois.dugast@intel.com>]

On Thu, May 07, 2026 at 03:15:12PM +0200, Maciej Patelczyk wrote:
> On 26/02/2026 05:28, Matthew Brost wrote:
> 
> > Add GT stats to quantify pagefault chaining behavior during fault storms.
> > 
> > Track total chained faults, faults chained directly from the IRQ
> > handler, cases where IRQ chaining also drained the queue, chained faults
> > that had to be requeued due to range mismatch, and cases where the last
> > serviced range allowed immediate ack.
> > 
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> >   drivers/gpu/drm/xe/xe_gt_stats.c       |  5 +++++
> >   drivers/gpu/drm/xe/xe_gt_stats_types.h |  5 +++++
> >   drivers/gpu/drm/xe/xe_pagefault.c      | 18 ++++++++++++++++--
> >   3 files changed, 26 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_gt_stats.c b/drivers/gpu/drm/xe/xe_gt_stats.c
> > index c1af3ecb429b..cdd467dfb46d 100644
> > --- a/drivers/gpu/drm/xe/xe_gt_stats.c
> > +++ b/drivers/gpu/drm/xe/xe_gt_stats.c
> > @@ -54,6 +54,11 @@ void xe_gt_stats_incr(struct xe_gt *gt, const enum xe_gt_stats_id id, int incr)
> >   #define DEF_STAT_STR(ID, name) [XE_GT_STATS_ID_##ID] = name
> >   static const char *const stat_description[__XE_GT_STATS_NUM_IDS] = {
> > +	DEF_STAT_STR(CHAIN_PAGEFAULT_COUNT, "chain_pagefault_count"),
> > +	DEF_STAT_STR(CHAIN_IRQ_PAGEFAULT_COUNT, "chain_irq_pagefault_count"),
> > +	DEF_STAT_STR(CHAIN_DRAIN_IRQ_PAGEFAULT_COUNT, "chain_drain_irq_pagefault_count"),
> > +	DEF_STAT_STR(CHAIN_MISMATCH_PAGEFAULT_COUNT, "chain_mismatch_pagefault_count"),
> > +	DEF_STAT_STR(LAST_PAGEFAULT_COUNT, "last_pagefault_count"),
> >   	DEF_STAT_STR(SVM_PAGEFAULT_COUNT, "svm_pagefault_count"),
> >   	DEF_STAT_STR(TLB_INVAL, "tlb_inval_count"),
> >   	DEF_STAT_STR(SVM_TLB_INVAL_COUNT, "svm_tlb_inval_count"),
> > diff --git a/drivers/gpu/drm/xe/xe_gt_stats_types.h b/drivers/gpu/drm/xe/xe_gt_stats_types.h
> > index 129260bfdfe6..591e614e1cfc 100644
> > --- a/drivers/gpu/drm/xe/xe_gt_stats_types.h
> > +++ b/drivers/gpu/drm/xe/xe_gt_stats_types.h
> > @@ -9,6 +9,11 @@
> >   #include <linux/types.h>
> >   enum xe_gt_stats_id {
> > +	XE_GT_STATS_ID_CHAIN_PAGEFAULT_COUNT,
> > +	XE_GT_STATS_ID_CHAIN_IRQ_PAGEFAULT_COUNT,
> > +	XE_GT_STATS_ID_CHAIN_DRAIN_IRQ_PAGEFAULT_COUNT,
> > +	XE_GT_STATS_ID_CHAIN_MISMATCH_PAGEFAULT_COUNT,
> > +	XE_GT_STATS_ID_LAST_PAGEFAULT_COUNT,
> >   	XE_GT_STATS_ID_SVM_PAGEFAULT_COUNT,
> >   	XE_GT_STATS_ID_TLB_INVAL,
> >   	XE_GT_STATS_ID_SVM_TLB_INVAL_COUNT,
> > diff --git a/drivers/gpu/drm/xe/xe_pagefault.c b/drivers/gpu/drm/xe/xe_pagefault.c
> > index 9c14f9505faf..c497dd8d9724 100644
> > --- a/drivers/gpu/drm/xe/xe_pagefault.c
> > +++ b/drivers/gpu/drm/xe/xe_pagefault.c
> > @@ -364,6 +364,7 @@ xe_pagefault_queue_requeue(struct xe_pagefault_queue *pf_queue,
> >   					    usm.pf_queue);
> >   	struct xe_pagefault *next = pf->consumer.next, *lpf;
> > +	xe_gt_stats_incr(gt, XE_GT_STATS_ID_CHAIN_MISMATCH_PAGEFAULT_COUNT, 1);
> >   	xe_assert(xe, pf->consumer.alloc_state ==
> >   		  XE_PAGEFAULT_ALLOC_STATE_CHAINED);
> > @@ -423,6 +424,10 @@ static bool xe_pagefault_cache_hit(struct xe_pagefault_queue *pf_queue,
> >   			xe_assert(xe, pf_work->cache.pf->consumer.alloc_state ==
> >   				  XE_PAGEFAULT_ALLOC_STATE_ACTIVE);
> > +			xe_gt_stats_incr(pf->gt,
> > +					 XE_GT_STATS_ID_CHAIN_PAGEFAULT_COUNT,
> > +					 1);
> > +
> >   			pf->consumer.alloc_state =
> >   				XE_PAGEFAULT_ALLOC_STATE_CHAINED;
> >   			pf->consumer.next = pf_work->cache.pf->consumer.next;
> > @@ -559,8 +564,10 @@ static void xe_pagefault_queue_work(struct work_struct *w)
> >   		/* Last fault same address, ack immediately */
> >   		if (xe_pagefault_cache_match(pf, cache_start, cache_end,
> > -					     cache_asid))
> > +					     cache_asid)) {
> > +			xe_gt_stats_incr(gt, XE_GT_STATS_ID_LAST_PAGEFAULT_COUNT, 1);
> >   			goto ack_fault;
> > +		}
> >   		err = xe_pagefault_service(pf);
> > @@ -816,8 +823,15 @@ int xe_pagefault_handler(struct xe_device *xe, struct xe_pagefault *pf)
> >   		lpf->consumer.next = NULL;
> >   		if (xe_pagefault_cache_hit(pf_queue, lpf)) {
> > -			if (empty)
> > +			xe_gt_stats_incr(pf->gt,
> > +					 XE_GT_STATS_ID_CHAIN_IRQ_PAGEFAULT_COUNT,
> > +					 1);
> > +			if (empty) {
> >   				xe_pagefault_queue_advance(pf_queue);
> > +				xe_gt_stats_incr(pf->gt,
> > +						 XE_GT_STATS_ID_CHAIN_DRAIN_IRQ_PAGEFAULT_COUNT,
> > +						 1);
> > +			}
> >   		} else {
> >   			int work_index = xe_pagefault_work_index(xe);
> 
> Looks good,
> 
> Reviewed-by: Maciej Patelczyk <maciej.patelczyk@intel.com>
> 
> 

Actually the patch now causes this warning during build:

    drivers/gpu/drm/xe/xe_gt_stats_types.h:186 Enum value 'XE_GT_STATS_ID_PAGEFAULT_US' not described in enum 'xe_gt_stats_id'

So please add a description in the kernel doc, like for other GT stats entries.

Francois