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d="scan'208";a="267845696" Received: from black.igk.intel.com ([10.91.253.5]) by orviesa002.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 May 2026 08:36:41 -0700 Date: Mon, 11 May 2026 17:36:37 +0200 From: Raag Jadav To: Riana Tauro Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com, rodrigo.vivi@intel.com, aravind.iddamsetty@linux.intel.com, badal.nilawar@intel.com, ravi.kishore.koppuravuri@intel.com, mallesh.koujalagi@intel.com, soham.purkait@intel.com, Anoop Vijay , Umesh Nerlige Ramappa Subject: Re: [PATCH v5 5/6] drm/xe/xe_ras: Move xe drm_ras registration Message-ID: References: <20260504065614.3832331-8-riana.tauro@intel.com> <20260504065614.3832331-13-riana.tauro@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260504065614.3832331-13-riana.tauro@intel.com> X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Mon, May 04, 2026 at 12:26:20PM +0530, Riana Tauro wrote: > Move xe drm_ras registration to RAS initialization flow and keep > hardware error initialization for processing errors reported > via irq. > > Also reorder soc remapper and system controller initialization to > early probe as ras init is dependent on both. > > Cc: Anoop Vijay > Cc: Umesh Nerlige Ramappa > Signed-off-by: Riana Tauro > --- > drivers/gpu/drm/xe/xe_device.c | 19 +++++++++++-------- > drivers/gpu/drm/xe/xe_hw_error.c | 13 ------------- > drivers/gpu/drm/xe/xe_ras.c | 20 ++++++++++++++++++++ > drivers/gpu/drm/xe/xe_ras.h | 1 + > 4 files changed, 32 insertions(+), 21 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c > index 4b45b617a039..041af7ffc8bb 100644 > --- a/drivers/gpu/drm/xe/xe_device.c > +++ b/drivers/gpu/drm/xe/xe_device.c > @@ -62,6 +62,7 @@ > #include "xe_psmi.h" > #include "xe_pxp.h" > #include "xe_query.h" > +#include "xe_ras.h" > #include "xe_shrinker.h" > #include "xe_soc_remapper.h" > #include "xe_survivability_mode.h" > @@ -962,6 +963,16 @@ int xe_device_probe(struct xe_device *xe) > if (err) > return err; > > + err = xe_soc_remapper_init(xe); > + if (err) > + return err; > + > + err = xe_sysctrl_init(xe); > + if (err) > + return err; > + > + xe_ras_init(xe); > + > /* > * Now that GT is initialized (TTM in particular), > * we can try to init display, and inherit the initial fb. > @@ -1002,10 +1013,6 @@ int xe_device_probe(struct xe_device *xe) > > xe_nvm_init(xe); > > - err = xe_soc_remapper_init(xe); > - if (err) > - return err; > - > err = xe_heci_gsc_init(xe); > if (err) > return err; > @@ -1044,10 +1051,6 @@ int xe_device_probe(struct xe_device *xe) > if (err) > goto err_unregister_display; > > - err = xe_sysctrl_init(xe); > - if (err) > - goto err_unregister_display; > - > err = xe_device_sysfs_init(xe); > if (err) > goto err_unregister_display; > diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c > index 2a31b430570e..c6836957dca7 100644 > --- a/drivers/gpu/drm/xe/xe_hw_error.c > +++ b/drivers/gpu/drm/xe/xe_hw_error.c > @@ -518,14 +518,6 @@ void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl) > } > } > > -static int hw_error_info_init(struct xe_device *xe) > -{ > - if (xe->info.platform != XE_PVC) > - return 0; > - > - return xe_drm_ras_init(xe); > -} > - > /* > * Process hardware errors during boot > */ > @@ -552,16 +544,11 @@ static void process_hw_errors(struct xe_device *xe) > void xe_hw_error_init(struct xe_device *xe) > { > struct xe_tile *tile = xe_device_get_root_tile(xe); > - int ret; > > if (!IS_DGFX(xe) || IS_SRIOV_VF(xe)) > return; > > INIT_WORK(&tile->csc_hw_error_work, csc_hw_error_work); > > - ret = hw_error_info_init(xe); > - if (ret) > - drm_err(&xe->drm, "Failed to initialize XE DRM RAS (%pe)\n", ERR_PTR(ret)); > - > process_hw_errors(xe); > } > diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c > index 07f6837694e7..7d2945bb819e 100644 > --- a/drivers/gpu/drm/xe/xe_ras.c > +++ b/drivers/gpu/drm/xe/xe_ras.c > @@ -4,6 +4,7 @@ > */ > > #include "xe_device.h" > +#include "xe_drm_ras.h" > #include "xe_pm.h" > #include "xe_printk.h" > #include "xe_ras.h" > @@ -258,3 +259,22 @@ int xe_ras_clear_counter(struct xe_device *xe, enum drm_xe_ras_error_severity se > > return ret; > } > + > +/** > + * xe_ras_init - Initialize Xe RAS > + * @xe: xe device instance > + * > + * Initialize Xe RAS > + */ > +void xe_ras_init(struct xe_device *xe) > +{ > + int ret; > + > + if (xe->info.platform != XE_PVC) > + return; > + > + ret = xe_drm_ras_init(xe); > + if (ret) > + drm_err(&xe->drm, "Failed to initialize xe_drm_ras %d\n", ret); Do we need this? xe_drm_ras_init() already does it for us. Raag > +} > + > diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h > index bbb9d42bd128..a06fb67dc882 100644 > --- a/drivers/gpu/drm/xe/xe_ras.h > +++ b/drivers/gpu/drm/xe/xe_ras.h > @@ -17,5 +17,6 @@ int xe_ras_get_counter(struct xe_device *xe, enum drm_xe_ras_error_severity seve > u32 error_id, u32 *value); > int xe_ras_clear_counter(struct xe_device *xe, enum drm_xe_ras_error_severity severity, > u32 error_id); > +void xe_ras_init(struct xe_device *xe); > > #endif > -- > 2.47.1 >