From: Raag Jadav <raag.jadav@intel.com>
To: Riana Tauro <riana.tauro@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
rodrigo.vivi@intel.com, aravind.iddamsetty@linux.intel.com,
badal.nilawar@intel.com, ravi.kishore.koppuravuri@intel.com,
mallesh.koujalagi@intel.com, soham.purkait@intel.com
Subject: Re: [PATCH v6 3/6] drm/xe/xe_ras: Add support to clear error counter
Date: Mon, 18 May 2026 19:58:08 +0200 [thread overview]
Message-ID: <agtTMBeI6mk1d7Rd@black.igk.intel.com> (raw)
In-Reply-To: <20260514052205.1340143-11-riana.tauro@intel.com>
On Thu, May 14, 2026 at 10:52:09AM +0530, Riana Tauro wrote:
> Add structures and helper function to clear error counter value.
...
> +/* RAS response status codes */
> +enum xe_ras_response_status {
> + XE_RAS_STATUS_SUCCESS = 0,
> + XE_RAS_STATUS_INVALID_PARAM,
> + XE_RAS_STATUS_OP_NOT_SUPPORTED,
> + XE_RAS_STATUS_TIMEOUT,
> + XE_RAS_STATUS_HARDWARE_FAILURE,
> + XE_RAS_STATUS_INSUFFICIENT_RESOURCES,
> + XE_RAS_STATUS_UNKNOWN_ERROR
Nit: 'UNKNOWN' is sufficient.
> +};
> +
> static const char *const xe_ras_severities[] = {
> [XE_RAS_SEV_NOT_SUPPORTED] = "Not Supported",
> [XE_RAS_SEV_CORRECTABLE] = "Correctable Error",
> @@ -53,6 +64,16 @@ static const char *const xe_ras_components[] = {
> };
> static_assert(ARRAY_SIZE(xe_ras_components) == XE_RAS_COMP_MAX);
>
> +static const int ras_status_to_errno_map[] = {
Nit: Redundant 'map', just use 'xe' prefix.
> + [XE_RAS_STATUS_SUCCESS] = 0,
> + [XE_RAS_STATUS_INVALID_PARAM] = -EINVAL,
> + [XE_RAS_STATUS_OP_NOT_SUPPORTED] = -EOPNOTSUPP,
> + [XE_RAS_STATUS_TIMEOUT] = -ETIMEDOUT,
> + [XE_RAS_STATUS_HARDWARE_FAILURE] = -EIO,
> + [XE_RAS_STATUS_INSUFFICIENT_RESOURCES] = -ENOSPC,
> + [XE_RAS_STATUS_UNKNOWN_ERROR] = -EIO
-EPROTO?
> +};
I think switch() would be good enough but if you want to use array, let's
also have static_assert() against XE_RAS_STATUS_MAX.
...
> +static int ras_status_to_errno(enum xe_ras_response_status status)
> +{
> + if (status > XE_RAS_STATUS_UNKNOWN_ERROR)
With _MAX in place, we can make this consistent with other similar helpers.
> + status = XE_RAS_STATUS_UNKNOWN_ERROR;
> +
> + return ras_status_to_errno_map[status];
> +}
...
> + xe_dbg(xe, "[RAS]: %s %s counter cleared\n",
Let's try to make this consistent across series.
How about "<component> <severity> <operation>:<value>"?
> + comp_to_str(response.counter.common.component),
> + sev_to_str(response.counter.common.severity));
Same comment as last patch.
...
> +/**
> + * struct xe_ras_clear_counter_request - Request for clearing an error counter
> + */
> +struct xe_ras_clear_counter_request {
> + /** @counter: Counter class to be cleared */
> + struct xe_ras_error_class counter;
> + /** @reserved: Reserved for future use */
> + u32 reserved;
> +} __packed;
> +
> +/**
> + * struct xe_ras_clear_counter_response - Response after clearing an error counter
> + */
> +struct xe_ras_clear_counter_response {
> + /** @counter: Counter class that was cleared */
> + struct xe_ras_error_class counter;
> + /** @prev_value: Counter value before clearing */
> + u32 prev_value;
Nit: Postfix is a bit more suitable for variants, i.e. value_prev.
> + /** @clear_timestamp: Timestamp when the counter was cleared */
> + u64 clear_timestamp;
It's already 'clear_counter', so perhaps just 'timestamp'?
Raag
> + /** @status: Status of the clear operation */
> + u32 status;
> + /** @reserved: Reserved for future use */
> + u32 reserved[3];
> +} __packed;
next prev parent reply other threads:[~2026-05-18 17:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-14 5:22 [PATCH v6 0/6] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
2026-05-14 4:55 ` ✗ CI.checkpatch: warning for Add get-error-counter and clear-error-counter support for CRI (rev5) Patchwork
2026-05-14 4:56 ` ✓ CI.KUnit: success " Patchwork
2026-05-14 5:22 ` [PATCH v6 1/6] drm/xe/uapi: Add additional error components to xe drm_ras Riana Tauro
2026-05-14 5:22 ` [PATCH v6 2/6] drm/xe/xe_ras: Add support to get error counter in CRI Riana Tauro
2026-05-18 17:26 ` Raag Jadav
2026-05-14 5:22 ` [PATCH v6 3/6] drm/xe/xe_ras: Add support to clear error counter Riana Tauro
2026-05-18 17:58 ` Raag Jadav [this message]
2026-05-14 5:22 ` [PATCH v6 4/6] drm/xe/xe_drm_ras: Wire get/clear counter callbacks Riana Tauro
2026-05-19 5:54 ` Raag Jadav
2026-05-14 5:22 ` [PATCH v6 5/6] drm/xe: Move xe drm_ras initialization Riana Tauro
2026-05-14 17:25 ` Raag Jadav
2026-05-14 5:22 ` [PATCH v6 6/6] drm/xe/xe_ras: Add drm_ras feature flag Riana Tauro
2026-05-14 5:43 ` ✓ Xe.CI.BAT: success for Add get-error-counter and clear-error-counter support for CRI (rev5) Patchwork
2026-05-15 1:10 ` ✗ Xe.CI.FULL: failure " Patchwork
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