Re: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms

["Vivekanandan, Balasubramani" <balasubramani.vivekanandan@intel.com>]

On 03.06.2026 13:54, Tangudu, Tilak Tirumalesh wrote:
> 
> 
> -----Original Message-----
> From: Vivekanandan, Balasubramani <balasubramani.vivekanandan@intel.com> 
> Sent: 03 June 2026 13:27
> To: Tangudu, Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>; Belgaumkar, Vinay <vinay.belgaumkar@intel.com>; Upadhyay, Tejas <tejas.upadhyay@intel.com>; intel-xe@lists.freedesktop.org
> Subject: Re: [PATCH] drm/xe: Add wa_14025941587 to xe2, xe3 and xe3p platforms
> 
> On 02.06.2026 10:02, tilak.tirumalesh.tangudu@intel.com wrote:
> > From: Tangudu Tilak Tirumalesh <tilak.tirumalesh.tangudu@intel.com>
> > 
> > Avoid IDLEDLY timer programming lessthan 5 micro secs.
> > Apply wa_14025941587 to Graphics Versions 20.01 to 35.11 and Media 
> > Versions 13.01 to 35.03
> > 
> > v2: Use xe_rtp_match_not_sriov_vf, move to local variable
> >     Remove warn and other knits            - Matt R
> > 
> > v3: Add verbose comment - Tejas
> > 
> > v4: Restore IDLE_DLY register on engine reset.
> >     Add it to GUC save-restore list. -Vivek
> > 
> > v5: Extend WA to Media Versions 13.01 to 35.03 - Vinay
> > 
> > Signed-off-by: Tangudu Tilak Tirumalesh 
> > <tilak.tirumalesh.tangudu@intel.com>
> > ---
> >  drivers/gpu/drm/xe/xe_guc_ads.c    |  2 +-
> >  drivers/gpu/drm/xe/xe_hw_engine.c  | 26 +++++++++++++++++++++++---  
> > drivers/gpu/drm/xe/xe_wa_oob.rules |  2 ++
> >  3 files changed, 26 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c 
> > b/drivers/gpu/drm/xe/xe_guc_ads.c index c98454545a85..2080e0e650eb 
> > 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> > @@ -768,7 +768,7 @@ static unsigned int guc_mmio_regset_write(struct xe_guc_ads *ads,
> >  		}
> >  	}
> >  
> > -	if (XE_GT_WA(hwe->gt, 16023105232))
> > +	if (XE_GT_WA(hwe->gt, 16023105232) || XE_GT_WA(hwe->gt, 
> > +14025941587))
> >  		guc_mmio_regset_write_one(ads, regset_map,
> >  					  RING_IDLEDLY(hwe->mmio_base),
> >  					  count++);
> > diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c 
> > b/drivers/gpu/drm/xe/xe_hw_engine.c
> > index 8c66ff6f3d3c..dd8eec098bdf 100644
> > --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> > +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> > @@ -584,8 +584,12 @@ static void adjust_idledly(struct xe_hw_engine *hwe)
> >  	u32 idledly_units_ps = 8 * gt->info.timestamp_base;
> >  	u32 maxcnt_units_ns = 640;
> >  	bool inhibit_switch = 0;
> > +	bool wa_applied = false;
> > +
> > +	if ((!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) ||
> > +	    XE_GT_WA(gt, 14025941587)) {
> > +		u32 mincnt_idledly_ns = 5000;
> >  
> > -	if (!IS_SRIOV_VF(gt_to_xe(hwe->gt)) && XE_GT_WA(gt, 16023105232)) {
> >  		idledly = xe_mmio_read32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base));
> >  		maxcnt = xe_mmio_read32(&gt->mmio, 
> > RING_PWRCTX_MAXCNT(hwe->mmio_base));
> >  
> > @@ -595,8 +599,24 @@ static void adjust_idledly(struct xe_hw_engine *hwe)
> >  		maxcnt = REG_FIELD_GET(IDLE_WAIT_TIME, maxcnt);
> >  		maxcnt *= maxcnt_units_ns;
> >  
> > -		if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
> > -			idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
> > +		/* Wa_14025941587: applied prior to Wa_16023105232,
> > +		 * as the latter has higher priority, although conflict
> > +		 * is not expected.
> > +		 */
> > +		if (XE_GT_WA(gt, 14025941587) &&
> > +		    idledly < mincnt_idledly_ns) {
> > +			idledly = mincnt_idledly_ns;
> > +			wa_applied = true;
> 
> >If there would be a platform for which 14025941587 applies but not 16023105232, then the >above condition would silently clear the inhibit_switch (bit 31 of IDLEDLY register) though >14025941587 doesn't explicitly asks for clearing it.
> >But idle delay timeout won't apply when inhibit_switch bit is set.
> >The WARN statement below for WA 16023105232, is helping to alert us when we are clearing >inhibit_switch bit though the WA is not asking for it explicitly.
> 
> >Therefore I would suggest we add a similar WARN statement checking for idledly value and >inhibit_switch even for 14025941587.
> Thanks for the review on this, warn on inhibit_switch override is sufficient right?
> warn on Idledly value condition is not needed right ? as we intend to override as part of WA.

Yes, checking only for inhibit_switch is enough in the WARN.

Regards,
Bala

> > +		}
> > +
> > +		if (XE_GT_WA(gt, 16023105232) &&
> > +		    (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch))) {
> > +			idledly = (maxcnt - 1);
> > +			wa_applied = true;
> 
> Regards,
> Bala
> 
> > +		}
> > +
> > +		if (wa_applied) {
> > +			idledly = DIV_ROUND_CLOSEST((idledly * 1000),
> >  						    idledly_units_ps);
> >  			xe_mmio_write32(&gt->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
> >  		}
> > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules 
> > b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > index f8a185103b80..5d5041168fa8 100644
> > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > @@ -65,3 +65,5 @@
> >  
> >  14025883347	MEDIA_VERSION_RANGE(1301, 3503)
> >  		GRAPHICS_VERSION_RANGE(2004, 3005)
> > +14025941587    GRAPHICS_VERSION_RANGE(2001, 3511), FUNC(xe_rtp_match_not_sriov_vf)
> > +	       MEDIA_VERSION_RANGE(1301, 3503), 
> > +FUNC(xe_rtp_match_not_sriov_vf)
> > --
> > 2.46.0
> >