From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Guangshuo Li <lgs201920130244@gmail.com>
Cc: "Matthew Brost" <matthew.brost@intel.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"José Roberto de Souza" <jose.souza@intel.com>,
"Michal Mrozek" <michal.mrozek@intel.com>,
"Tejas Upadhyay" <tejas.upadhyay@intel.com>,
"Matthew Auld" <matthew.auld@intel.com>,
intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] drm/xe: free madvise VMA array on L2 flush failure
Date: Wed, 8 Jul 2026 16:14:03 -0400 [thread overview]
Message-ID: <ak6vi07iw4nfMlEw@intel.com> (raw)
In-Reply-To: <20260708073422.725186-1-lgs201920130244@gmail.com>
On Wed, Jul 08, 2026 at 03:34:22PM +0800, Guangshuo Li wrote:
> xe_vm_madvise_ioctl() allocates madvise_range.vmas in get_vmas().
> After get_vmas() succeeds with at least one VMA, error paths must go
> through free_vmas so the array is released before the madvise details are
> destroyed.
>
> The L2 flush validation path added for PAT madvise rejects some
> SVM/userptr ranges after get_vmas() has succeeded, but jumps directly to
> madv_fini. This skips kfree(madvise_range.vmas), leaking the VMA array on
> each failed ioctl.
>
> Jump to free_vmas instead, matching the other validation failure paths
> after get_vmas() has succeeded.
>
> Fixes: 4f39a194d41e ("drm/xe/xe3p_lpg: Restrict UAPI to enable L2 flush optimization")
> Signed-off-by: Guangshuo Li <lgs201920130244@gmail.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
and pushed to drm-xe-next
> ---
> drivers/gpu/drm/xe/xe_vm_madvise.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_vm_madvise.c b/drivers/gpu/drm/xe/xe_vm_madvise.c
> index c4fb29004195..246fe1843142 100644
> --- a/drivers/gpu/drm/xe/xe_vm_madvise.c
> +++ b/drivers/gpu/drm/xe/xe_vm_madvise.c
> @@ -643,7 +643,7 @@ int xe_vm_madvise_ioctl(struct drm_device *dev, void *data, struct drm_file *fil
> xe_device_is_l2_flush_optimized(xe) &&
> (pat_index != 19 && coh_mode != XE_COH_2WAY))) {
> err = -EINVAL;
> - goto madv_fini;
> + goto free_vmas;
> }
> }
>
> --
> 2.43.0
>
prev parent reply other threads:[~2026-07-08 20:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 7:34 [PATCH] drm/xe: free madvise VMA array on L2 flush failure Guangshuo Li
2026-07-08 13:51 ` ✗ LGCI.VerificationFailed: failure for " Patchwork
2026-07-08 20:14 ` Rodrigo Vivi [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ak6vi07iw4nfMlEw@intel.com \
--to=rodrigo.vivi@intel.com \
--cc=airlied@gmail.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=jose.souza@intel.com \
--cc=lgs201920130244@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=matthew.auld@intel.com \
--cc=matthew.brost@intel.com \
--cc=michal.mrozek@intel.com \
--cc=simona@ffwll.ch \
--cc=tejas.upadhyay@intel.com \
--cc=thomas.hellstrom@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox