From: Raag Jadav <raag.jadav@intel.com>
To: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: "Matthew Brost" <matthew.brost@intel.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Mika Westerberg" <mika.westerberg@linux.intel.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Andi Shyti" <andi.shyti@kernel.org>,
"Ramesh Babu B" <ramesh.babu.b@intel.com>,
"Michael J. Ruhl" <michael.j.ruhl@intel.com>,
linux-kernel@vger.kernel.org, intel-xe@lists.freedesktop.org,
stable@vger.kernel.org
Subject: Re: [PATCH v4 3/3] drm/xe/i2c: Keep the i2c controller always enabled
Date: Wed, 15 Jul 2026 08:33:31 +0200 [thread overview]
Message-ID: <alcpuxJktaVwrIaa@black.igk.intel.com> (raw)
In-Reply-To: <20260713155601.711389-4-heikki.krogerus@linux.intel.com>
On Mon, Jul 13, 2026 at 05:56:01PM +0200, Heikki Krogerus wrote:
> Some platforms make an assumption that the i2c controller's
> enabled state indicates also the power state of the
> controller. This can create a problem when the controller is
> in disabled state, because the hardware may assume
> incorrectly that it is then also in low-power state.
>
> To fix this, the controller is kept enabled by taking over
> the IC_ENABLE register. The controller has to be disabled
> when the configuration is updated and when the target
> address or the slave address are assigned, so disabling it
> when IC_CON, IC_TAR or IC_SAR registers are programmed, and
> then re-enabling it again.
...
> +/* See "Disabling DW_apb_i2c" in the DesignWare DW_abp_i2c databook. */
> +static void xe_i2c_disable(struct xe_i2c *i2c)
> +{
> + int timeout = 100;
> + u32 status;
> +
> + xe_mmio_rmw32(i2c->mmio, I2C_REG(DW_IC_ENABLE), 1, 0);
Can we use DW_IC_ENABLE_* defines?
> + do {
> + status = xe_mmio_read32(i2c->mmio, I2C_REG(DW_IC_ENABLE_STATUS));
> + if (!(status & 1))
Ditto for DW_IC_STATUS_*.
> + return;
> + /* Can't sleep here. */
> + udelay(25);
> + } while (timeout--);
> +
> + dev_warn(&i2c->adapter->dev, "timeout in disabling adapter\n");
> +}
...
> @@ -230,7 +260,28 @@ static int xe_i2c_write(void *context, unsigned int reg, unsigned int val)
> {
> struct xe_i2c *i2c = context;
>
> - xe_mmio_write32(i2c->mmio, XE_REG(reg + I2C_MEM_SPACE_OFFSET), val);
> + switch (reg) {
> + case DW_IC_CON:
> + case DW_IC_TAR:
> + case DW_IC_SAR:
> + /* Disable the controller. */
> + xe_i2c_disable(i2c);
> +
> + /* Write the register. */
> + xe_mmio_write32(i2c->mmio, I2C_REG(reg), val);
> +
> + /* Enable the controller. */
> + xe_mmio_rmw32(i2c->mmio, I2C_REG(DW_IC_ENABLE), 0, 1);
Ditto.
Raag
> + break;
> + case DW_IC_ENABLE:
> + i2c->ic_enable = val;
> + /* Other fields can be updated except the enable bit. */
> + val |= DW_IC_ENABLE_ENABLE;
> + fallthrough;
> + default:
> + xe_mmio_write32(i2c->mmio, I2C_REG(reg), val);
> + break;
> + }
>
> return 0;
> }
next prev parent reply other threads:[~2026-07-15 6:33 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 15:55 [PATCH v4 0/3] drm/xe/i2c: alerts and controller enabling modifications Heikki Krogerus
2026-07-13 15:55 ` [PATCH v4 1/3] i2c: designware: Global register definitions Heikki Krogerus
2026-07-13 15:56 ` [PATCH v4 2/3] drm/xe/i2c: Fix the interrupt handling Heikki Krogerus
2026-07-15 6:26 ` Raag Jadav
2026-07-15 9:53 ` Heikki Krogerus
2026-07-15 11:55 ` Raag Jadav
2026-07-15 12:59 ` Heikki Krogerus
2026-07-13 15:56 ` [PATCH v4 3/3] drm/xe/i2c: Keep the i2c controller always enabled Heikki Krogerus
2026-07-15 6:33 ` Raag Jadav [this message]
2026-07-15 9:45 ` Heikki Krogerus
2026-07-13 16:02 ` ✗ CI.checkpatch: warning for drm/xe/i2c: alerts and controller enabling modifications (rev3) Patchwork
2026-07-13 16:03 ` ✓ CI.KUnit: success " Patchwork
2026-07-13 16:56 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-13 19:39 ` ✓ Xe.CI.FULL: " Patchwork
2026-07-14 15:54 ` [PATCH v4 0/3] drm/xe/i2c: alerts and controller enabling modifications Rodrigo Vivi
2026-07-15 10:00 ` Heikki Krogerus
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