Re: [PATCH v2 6/7] drm/i915: only timeout on fence waits for display reset

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Thu, Aug 27, 2026 at 03:34:56PM +0300, Jani Nikula wrote:
> As written by Maarten: Not waiting on fences until they're signaled is
> an existing issue in i915, and was added as a workaround for a deadlock
> when GPU reset has to reset display as well on old platforms.

IIRC the timeout wasn't added for that. It's there just as a backup to
make sure we never get completely stuck. We had more proper handling for
this stuff (== terminate/skip the fence wait on GPU reset) but lost that
in the conversion to dma_fence.

Since we Christian NAKed my dma_fence equivalent of the previous
approach and I don't feel like attempting to resurrect my old display
reset rw_lock branch right now, the best we can probably do is
basically revert commit 9db529aac938 ("drm/i915: More surgically
unbreak the modeset vs reset deadlock"). The upside of that would be
that the display reset will become fast again, but the downside is
that the full wedge will also kill innocent requests.

> This
> requires a modeset to disable everything, which may hang since it could
> wait on a fence that may only be signaled after GPU reset completes.
> 
> Limit the timeout on fence waits a) to platforms where GPU reset
> clobbers display, and b) when we're running forced display reset tests.
> 
> This change only impacts i915, as xe has MAX_SCHEDULE_TIMEOUT in any
> case.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Suggested-by: Maarten Lankhorst <maarten.lankhorst@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index aa5d41dac8a9..76ec9161aaa3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -74,6 +74,7 @@
>  #include "intel_display_driver.h"
>  #include "intel_display_power.h"
>  #include "intel_display_regs.h"
> +#include "intel_display_reset.h"
>  #include "intel_display_rpm.h"
>  #include "intel_display_types.h"
>  #include "intel_display_utils.h"
> @@ -7277,15 +7278,20 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *state)
>  	struct intel_display *display = to_intel_display(state);
>  	struct drm_plane *plane;
>  	struct drm_plane_state *new_plane_state;
> -	long ret;
> +	long timeout, ret;
>  	int i;
>  
> +	if (intel_display_reset_needed_after_gpu_reset(display) ||
> +	    intel_display_reset_test(display))
> +		timeout = i915_fence_timeout();
> +	else
> +		timeout = MAX_SCHEDULE_TIMEOUT;
> +
>  	for_each_new_plane_in_state(&state->base, plane, new_plane_state, i) {
>  		if (!new_plane_state->fence)
>  			continue;
>  
> -		ret = dma_fence_wait_timeout(new_plane_state->fence, false,
> -					     i915_fence_timeout());
> +		ret = dma_fence_wait_timeout(new_plane_state->fence, false, timeout);
>  		if (!ret)
>  			ret = -ETIMEDOUT;
>  		if (ret < 0) {
> -- 
> 2.47.3

-- 
Ville Syrjälä
Intel