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From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <rodrigo.vivi@intel.com>,
	<matthew.brost@intel.com>, <anshuman.gupta@intel.com>,
	<badal.nilawar@intel.com>, <vinay.belgaumkar@intel.com>,
	<riana.tauro@intel.com>, <karthik.poosa@intel.com>,
	<sk.anirban@intel.com>, <raag.jadav@intel.com>,
	<michal.wajdeczko@intel.com>,
	<aravind.iddamsetty@linux.intel.com>,
	<dnyaneshwar.bhadane@intel.com>, <anoop.c.vijay@intel.com>
Subject: Re: [PATCH v8 06/10] drm/xe/sysctrl: simplify mailbox header handling
Date: Wed, 23 Sep 2026 16:52:16 -0700	[thread overview]
Message-ID: <arRmMHGlufnmTyBa@soc-5CG1426VCC.clients.intel.com> (raw)
In-Reply-To: <20260921133927.128281-18-mallesh.koujalagi@intel.com>

Hi Mallesh,

s/simplify/Fix/ in the subject. On big-endian the byte order would be 
swapped twice since the mmio helpers internally handle endianness as 
well.

Please include the Fixes tag too

Fixes: 1f95f618182b ("drm/xe/xe_sysctrl: Add System Controller mailbox 
communication support")

On Mon, Sep 21, 2026 at 07:09:33PM +0530, Mallesh Koujalagi wrote:
>Use u32 for the mailbox header data field and remove unnecessary
>cpu_to_le32()/le32_to_cpu() conversions when encoding and decoding
>header bitfields.
>
>Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
>Tested-by: Anoop Vijay <anoop.c.vijay@intel.com>
>---
> drivers/gpu/drm/xe/xe_sysctrl_mailbox.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
>index 50bbdab072de..750178a0974b 100644
>--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
>+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox.c
>@@ -20,20 +20,20 @@
> #include "xe_sysctrl_mailbox_types.h"
>
> struct xe_sysctrl_mailbox_msg_hdr {
>-	__le32 data;
>+	u32 data;
> } __packed;

nit: __packed may be dropped. I guess it only protects any future 
additions to this struct.

Thanks,
Umesh

>
> #define XE_SYSCTRL_HDR_GROUP_ID(hdr) \
>-	FIELD_GET(SYSCTRL_HDR_GROUP_ID_MASK, le32_to_cpu((hdr)->data))
>+	FIELD_GET(SYSCTRL_HDR_GROUP_ID_MASK, (hdr)->data)
>
> #define XE_SYSCTRL_HDR_COMMAND(hdr) \
>-	FIELD_GET(SYSCTRL_HDR_COMMAND_MASK, le32_to_cpu((hdr)->data))
>+	FIELD_GET(SYSCTRL_HDR_COMMAND_MASK, (hdr)->data)
>
> #define XE_SYSCTRL_HDR_IS_RESPONSE(hdr) \
>-	FIELD_GET(SYSCTRL_HDR_IS_RESPONSE, le32_to_cpu((hdr)->data))
>+	FIELD_GET(SYSCTRL_HDR_IS_RESPONSE, (hdr)->data)
>
> #define XE_SYSCTRL_HDR_RESULT(hdr) \
>-	FIELD_GET(SYSCTRL_HDR_RESULT_MASK, le32_to_cpu((hdr)->data))
>+	FIELD_GET(SYSCTRL_HDR_RESULT_MASK, (hdr)->data)
>
> static int sysctrl_wait_bit_clear(struct xe_sysctrl *sc, u32 bit_mask,
> 				  unsigned int timeout_ms)
>@@ -112,8 +112,8 @@ static int sysctrl_prepare_command(struct xe_device *xe,
> 		return -ENOMEM;
>
> 	hdr = (struct xe_sysctrl_mailbox_msg_hdr *)buffer;
>-	hdr->data = cpu_to_le32(FIELD_PREP(SYSCTRL_HDR_GROUP_ID_MASK, group_id) |
>-				     FIELD_PREP(SYSCTRL_HDR_COMMAND_MASK, command));
>+	hdr->data = FIELD_PREP(SYSCTRL_HDR_GROUP_ID_MASK, group_id) |
>+		    FIELD_PREP(SYSCTRL_HDR_COMMAND_MASK, command);
>
> 	if (data_in && data_in_len)
> 		memcpy(buffer + sizeof(*hdr), data_in, data_in_len);
>-- 
>2.48.1
>

  parent reply	other threads:[~2026-09-23 23:52 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-21 13:39 [PATCH v8 00/10] drm/xe/sysctrl: Clean up error handling in Mallesh Koujalagi
2026-09-21 13:39 ` [PATCH v8 01/10] drm/xe/sysctrl: Return error codes from sysctrl_wait_bit_clear() Mallesh Koujalagi
2026-09-21 13:39 ` [PATCH v8 02/10] drm/xe/sysctrl: Return error codes from sysctrl_wait_bit_set() Mallesh Koujalagi
2026-09-21 13:39 ` [PATCH v8 03/10] drm/xe/sysctrl: Make sysctrl_write_frame() void Mallesh Koujalagi
2026-09-21 13:39 ` [PATCH v8 04/10] drm/xe/sysctrl: Make sysctrl_read_frame() void Mallesh Koujalagi
2026-09-21 13:39 ` [PATCH v8 05/10] drm/xe/sysctrl: Use xe_assert() for payload size validation Mallesh Koujalagi
2026-09-21 13:39 ` [PATCH v8 06/10] drm/xe/sysctrl: simplify mailbox header handling Mallesh Koujalagi
2026-09-22 11:17   ` Michal Wajdeczko
2026-09-23 10:54     ` Mallesh, Koujalagi
2026-09-24  5:34     ` Anoop Vijay
2026-09-23 23:52   ` Umesh Nerlige Ramappa [this message]
2026-09-21 13:39 ` [PATCH v8 07/10] drm/xe/sysctrl: Replace FIELD_GET() with REG_FIELD_GET() Mallesh Koujalagi
2026-09-22 11:11   ` Michal Wajdeczko
2026-09-21 13:39 ` [PATCH v8 08/10] drm/xe/sysctrl: Improve firmware response error logging Mallesh Koujalagi
2026-09-21 13:39 ` [PATCH v8 09/10] drm/xe/sysctrl: Log group and command ID on mailbox failure Mallesh Koujalagi
2026-09-21 13:39 ` [PATCH v8 10/10] drm/xe/sysctrl: Report 'System Controller event' error using SIGID Mallesh Koujalagi
2026-09-21 13:48 ` ✓ CI.KUnit: success for drm/xe/sysctrl: Clean up error handling in (rev6) Patchwork
2026-09-21 14:54 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-09-21 20:02 ` ✗ Xe.CI.FULL: " Patchwork

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