From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>,
<intel-gfx@lists.freedesktop.org>,
<intel-xe@lists.freedesktop.org>
Cc: <jani.nikula@intel.com>, <ville.syrjala@intel.com>
Subject: Re: [PATCH v4 6/7] drm/i915/scaler: Check if vblank is sufficient for scaler
Date: Mon, 13 Jan 2025 15:15:09 +0530 [thread overview]
Message-ID: <b0f4c7ad-eca2-4de1-988d-07a079c4fa20@intel.com> (raw)
In-Reply-To: <20250108123541.2101643-7-mitulkumar.ajitkumar.golani@intel.com>
On 1/8/2025 6:05 PM, Mitul Golani wrote:
> Check if vblank is too short for scaler prefill latency.
Perhaps we can elaborate a bit.
Also add Bspec# in trailer.
>
> --v2:
> - Use hweight* family of functions for counting bits. [Jani]
> - Update precision handling for hscale and vscale. [Ankit]
> - Consider chroma downscaling factor during latency
> calculation. [Ankit]
> - Replace function name from scaler_prefill_time to
> scaler_prefill_latency.
>
> --v3:
> - hscale_k and vscale_k values are already left shifted by 16,
> after multiplying by 1000, those need to be right shifted to 16. [Ankit]
> - Replace YCBCR444 to YCBCR420. [Ankit]
> - Divide by 1000 * 1000 in end to get correct precision. [Ankit]
> - Initialise latency to 0 to avoid any garbage.
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> ---
> drivers/gpu/drm/i915/display/skl_watermark.c | 31 ++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index f4458d1185b3..fe91854e456c 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -2292,6 +2292,36 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
> return 0;
> }
>
> +static int
> +scaler_prefill_latency(const struct intel_crtc_state *crtc_state)
> +{
> + const struct intel_crtc_scaler_state *scaler_state =
> + &crtc_state->scaler_state;
> + int count = hweight32(scaler_state->scaler_users);
> + int latency = 0;
> + long long hscale_k =
> + mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16;
> + long long vscale_k =
> + mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16;
> +
> + if (!count)
> + return latency;
> +
> + if (count > 1) {
> + int chroma_downscaling_factor =
> + crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1;
> +
> + latency = (4 * crtc_state->linetime) +
> + (chroma_downscaling_factor *
> + DIV_ROUND_UP_ULL((4 * crtc_state->linetime * hscale_k * vscale_k),
> + 1000000));
> + } else {
> + latency = 4 * crtc_state->linetime;
> + }
> +
> + return latency;
> +}
> +
> static bool
> skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
> int wm0_lines, int latency)
> @@ -2302,6 +2332,7 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
> /* FIXME missing scaler and DSC pre-fill time */
The scaler part is addressed in this patch, so this can be removed.
Regards,
Ankit
> return crtc_state->framestart_delay +
> intel_usecs_to_scanlines(adjusted_mode, latency) +
> + scaler_prefill_latency(crtc_state) +
> wm0_lines >
> adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
> }
next prev parent reply other threads:[~2025-01-13 9:46 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-08 12:35 [PATCH v4 0/7] Check Scaler and DSC Prefill Latency Against Vblank Mitul Golani
2025-01-08 12:35 ` [PATCH v4 1/7] drm/i915/scaler: Add and compute scaling factors Mitul Golani
2025-01-13 6:20 ` Nautiyal, Ankit K
2025-01-08 12:35 ` [PATCH v4 2/7] drm/i915/scaler: Use crtc_state to setup plane or pipe scaler Mitul Golani
2025-01-08 12:35 ` [PATCH v4 3/7] drm/i915/scaler: Refactor max_scale computation Mitul Golani
2025-01-13 8:29 ` Nautiyal, Ankit K
2025-01-08 12:35 ` [PATCH v4 4/7] drm/i915/scaler: Compute scaling factors for pipe scaler Mitul Golani
2025-01-08 12:35 ` [PATCH v4 5/7] drm/i915/scaler: Limit pipe scaler downscaling factors for YUV420 Mitul Golani
2025-01-08 12:35 ` [PATCH v4 6/7] drm/i915/scaler: Check if vblank is sufficient for scaler Mitul Golani
2025-01-13 9:45 ` Nautiyal, Ankit K [this message]
2025-01-08 12:35 ` [PATCH v4 7/7] drm/i915/dsc: Check if vblank is sufficient for dsc prefill Mitul Golani
2025-01-13 11:13 ` Nautiyal, Ankit K
2025-01-13 11:37 ` Nautiyal, Ankit K
2025-01-08 13:24 ` ✓ CI.Patch_applied: success for Check Scaler and DSC Prefill Latency Against Vblank (rev2) Patchwork
2025-01-08 13:24 ` ✓ CI.checkpatch: " Patchwork
2025-01-08 13:26 ` ✓ CI.KUnit: " Patchwork
2025-01-08 13:44 ` ✓ CI.Build: " Patchwork
2025-01-08 13:46 ` ✓ CI.Hooks: " Patchwork
2025-01-08 13:48 ` ✗ CI.checksparse: warning " Patchwork
2025-01-08 14:16 ` ✓ Xe.CI.BAT: success " Patchwork
2025-01-10 9:49 ` ✗ Xe.CI.Full: failure " Patchwork
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