From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: <intel-gfx@lists.freedesktop.org>,
<intel-xe@lists.freedesktop.org>, <arun.r.murthy@intel.com>
Subject: Re: [PATCH 3/5] drm/i915/dp: Add helper for AS SDP TL and fix documentation
Date: Tue, 10 Mar 2026 10:27:45 +0530 [thread overview]
Message-ID: <b136ec6e-e427-4d60-8e99-f0b610acecbc@intel.com> (raw)
In-Reply-To: <aarCQYHTCCEKtB2R@intel.com>
On 3/6/2026 5:32 PM, Ville Syrjälä wrote:
> On Thu, Mar 05, 2026 at 09:31:16AM +0530, Ankit Nautiyal wrote:
>> Add a helper, intel_dp_emp_as_sdp_tl(), to compute the EMP_AS_SDP_TL
>> value used when programming the double‑buffering point and transmission
>> line for VRR packets.
>> Also improve the documentation: the AS SDP transmission line corresponds
>> to the T1 position, which maps to the start of the Vsync pulse.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++++
>> drivers/gpu/drm/i915/display/intel_dp.h | 1 +
>> drivers/gpu/drm/i915/display/intel_vrr.c | 4 ++--
>> 3 files changed, 12 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 86390553800d..9204a813639a 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -7288,6 +7288,15 @@ bool intel_dp_joiner_candidate_valid(struct intel_connector *connector,
>> return true;
>> }
>>
>> +int intel_dp_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state)
>> +{
>> + /*
>> + * EMP_AS_SDP_TL defines the T1 position : The default AS SDP position
>> + * that corresponds to the start of the Vsync pulse.
>> + */
>> + return crtc_state->vrr.vsync_start;
>> +}
> Other parts of the code (eg. ALPM) still just directly use the
> adjusted_mode timings to calculate the same stuff. So this doesn't
> really seem to help us.
>
> Feels like all of our abstractions around this SDP transmission line
> stuff are way too low level, and thus the same information is
> calculated in different ways in different parts of the code. There
> should be a single place that defines the transmission line(s),
> and everyone should just consult that stuff (regardless of whether
> the platform uses implicit transmission lines, EMP_AS_SDP_TL, or
> the new stuff).
Yeah currently AS SDP itself is not used properly for different features.
In the series [1], I am trying to address that. Perhaps that will help
making things better for the EMP_AS_SDP_TL. (I am yet to send the new
version for this)
One more thing to note is that if AS SDP is sent, EMP_AS_SDP_TL is the
point where VSC SDP is also sent. I am not sure if we need to do
something in existing code for it yet.
[1] https://patchwork.freedesktop.org/series/161977/
Regards,
Ankit
>
>> +
>> void intel_dp_cmn_sdp_transmission_line_get_config(struct intel_crtc_state *crtc_state)
>> {
>> struct intel_display *display = to_intel_display(crtc_state);
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
>> index 24df234a43d3..abb2fcdea352 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.h
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
>> @@ -237,6 +237,7 @@ bool intel_dp_joiner_candidate_valid(struct intel_connector *connector,
>> for ((__num_joined_pipes) = 1; (__num_joined_pipes) <= (I915_MAX_PIPES); (__num_joined_pipes)++) \
>> for_each_if(intel_dp_joiner_candidate_valid(__connector, (__mode)->hdisplay, __num_joined_pipes))
>>
>> +int intel_dp_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state);
>> void intel_dp_cmn_sdp_transmission_line_get_config(struct intel_crtc_state *crtc_state);
>>
>> #endif /* __INTEL_DP_H__ */
>> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
>> index 00ca76dbdd6c..2b4e4e55d008 100644
>> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
>> @@ -642,12 +642,12 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state)
>> * double buffering point and transmission line for VRR packets for
>> * HDMI2.1/DP/eDP/DP->HDMI2.1 PCON.
>> * Since currently we support VRR only for DP/eDP, so this is programmed
>> - * to for Adaptive Sync SDP to Vsync start.
>> + * only for Adaptive Sync SDP.
>> */
>> if (DISPLAY_VERx100(display) == 1401 || DISPLAY_VER(display) >= 20)
>> intel_de_write(display,
>> EMP_AS_SDP_TL(display, cpu_transcoder),
>> - EMP_AS_SDP_DB_TL(crtc_state->vrr.vsync_start));
>> + EMP_AS_SDP_DB_TL(intel_dp_emp_as_sdp_tl(crtc_state)));
>> }
>>
>> void
>> --
>> 2.45.2
next prev parent reply other threads:[~2026-03-10 4:57 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-05 4:01 [PATCH 0/5] Add support for Common SDP Transmission Line Ankit Nautiyal
2026-03-05 4:01 ` [PATCH 1/5] drm/i915/nvl: Add register definitions for common " Ankit Nautiyal
2026-03-05 4:01 ` [PATCH 2/5] drm/i915/dp: Add fields to store CMN_SDP_TL register state in crtc_state Ankit Nautiyal
2026-03-06 11:55 ` Ville Syrjälä
2026-03-10 4:54 ` Nautiyal, Ankit K
2026-03-05 4:01 ` [PATCH 3/5] drm/i915/dp: Add helper for AS SDP TL and fix documentation Ankit Nautiyal
2026-03-06 12:02 ` Ville Syrjälä
2026-03-10 4:57 ` Nautiyal, Ankit K [this message]
2026-03-10 9:08 ` Ville Syrjälä
2026-03-11 11:54 ` Nautiyal, Ankit K
2026-03-11 12:04 ` Ville Syrjälä
2026-03-11 12:10 ` Nautiyal, Ankit K
2026-03-05 4:01 ` [PATCH 4/5] drm/i915/dp: Introduce helpers to enable/disable CMN SDP Transmission line Ankit Nautiyal
2026-03-05 4:01 ` [PATCH 5/5] drm/i915/dp: Enable Common " Ankit Nautiyal
2026-03-06 11:56 ` Ville Syrjälä
2026-03-10 5:01 ` Nautiyal, Ankit K
2026-03-06 0:49 ` ✗ CI.checkpatch: warning for Add support for Common SDP Transmission Line Patchwork
2026-03-06 0:50 ` ✓ CI.KUnit: success " Patchwork
2026-03-06 1:42 ` ✓ Xe.CI.BAT: " Patchwork
2026-03-06 21:10 ` ✓ Xe.CI.FULL: " Patchwork
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