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From: "Michał Grzelak" <michal.grzelak@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	 Luca Coelho <luciano.coelho@intel.com>
Subject: Re: [v2,2/9] drm/i915/scaler: Adjust pipe scaler scale factors for 4:2:0 ouput
Date: Sat, 28 Mar 2026 17:30:33 +0100 (CET)	[thread overview]
Message-ID: <b5cc9b5d-37f3-f3df-5319-ca1efab873cd@intel.com> (raw)
In-Reply-To: <20251029084647.4165-3-ville.syrjala@linux.intel.com>

[-- Attachment #1: Type: text/plain, Size: 1352 bytes --]

Nit: title: s/ouput/output/

On Wed, 29 Oct 2025, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> 4:2:0 output effectively involves an extra downscale factor of
> 2x2 due to the chroma downsampling. Adjust the stored scaler
> scale factors accodingly.

Even nitter nit: s/accodingly/accordingly

If this was already pushed then please disregard the comment.

Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>

BR,
Michał

>
> Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/skl_scaler.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 640c65818f8a..e8a8facdc300 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -499,6 +499,15 @@ static int intel_atomic_setup_scaler(struct intel_crtc_state *crtc_state,
>
> 			return -EINVAL;
> 		}
> +
> +		/*
> +		 * For the purposes of prefill 4:2:0 chroma
> +		 * subsampling is considered a 2x2 downscale.
> +		 */
> +		if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
> +			hscale <<= 1;
> +			vscale <<= 1;
> +		}
> 	}
>
> 	scaler_state->scalers[*scaler_id].hscale = hscale;
>

  reply	other threads:[~2026-03-28 16:30 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-29  8:46 [PATCH v2 0/9] drm/i915: Fix CDCLK and scaler prefill calculations Ville Syrjala
2025-10-29  8:46 ` [PATCH v2 1/9] drm/i915/scaler: Don't clobber plane scaler scale factors with pfit scale factors Ville Syrjala
2025-10-29  8:46 ` [PATCH v2 2/9] drm/i915/scaler: Adjust pipe scaler scale factors for 4:2:0 ouput Ville Syrjala
2026-03-28 16:30   ` Michał Grzelak [this message]
2025-10-29  8:46 ` [PATCH v2 3/9] drm/i915: s/intel_atomic_check_crtcs()/intel_atomic_check_crtcs_late()/ Ville Syrjala
2025-10-29  8:46 ` [PATCH v2 4/9] drm/i915: Introduce a new intel_atomic_check_crtcs() Ville Syrjala
2025-10-29  8:46 ` [PATCH v2 5/9] drm/i915/scaler: Call skl_update_scaler_crtc() earlier Ville Syrjala
2025-10-29  8:46 ` [PATCH v2 6/9] drm/i915/scaler: Assign scalers earlier Ville Syrjala
2025-10-29  8:46 ` [PATCH v2 7/9] drm/i915/wm: Do skl_wm_check_vblank() after DDB stuff Ville Syrjala
2025-10-29  8:46 ` [PATCH v2 8/9] drm/i915/cdclk: Use a more optimal min_cdclk for vblank length check Ville Syrjala
2025-10-29  8:46 ` [PATCH v2 9/9] drm/i915/scaler: Use the actual scale factors " Ville Syrjala
2025-10-29 10:00 ` ✓ CI.KUnit: success for drm/i915: Fix CDCLK and scaler prefill calculations (rev2) Patchwork
2025-10-29 10:15 ` ✗ CI.checksparse: warning " Patchwork
2025-10-29 10:37 ` ✓ Xe.CI.BAT: success " Patchwork

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