From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6DC0CCD3423 for ; Mon, 4 May 2026 08:47:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2E49210E069; Mon, 4 May 2026 08:47:55 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="hscX6w+U"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id B8CFC10E069 for ; Mon, 4 May 2026 08:47:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1777884474; x=1809420474; h=from:to:cc:subject:in-reply-to:references:date: message-id:mime-version:content-transfer-encoding; bh=5rJXQKUvK4J4O9V1fe4iOOSYFltjLbhWztc3mpb4AVo=; b=hscX6w+U0L0i+EWWKvJE7nBbt6KixuGtQaoezjpSThTWXGOBw4BRypyB /C7UGOmZ79fyEWvSJefMGMvsl305DkUEC9gruBeJIEbP65CfybkJypsIW Fe548y5iPDp4O9KgnGabdk3cKnoZW3gsUEsDvREOnuF0FBCMt0MwGvVBM kwYa5aiCkrpA+THQKiT7S8tZr4vkhm7Sy3jXKytvr7XCGd9jcle/1tW5j BW0b9QTVRGUkAyhlwwjyas7kBMm2SoBsEHWsNYhgztel37JsBL2NQJd/M cLeECLYWnKCSQN75Mc+Y0McZFZfNueI+XyWZrtRhuAF40fg0c5EpauI2Q A==; X-CSE-ConnectionGUID: sezMCZDfQx6PH44cMsxCQQ== X-CSE-MsgGUID: /RxXtDinQq6Q/6yQx9eULw== X-IronPort-AV: E=McAfee;i="6800,10657,11775"; a="66269739" X-IronPort-AV: E=Sophos;i="6.23,215,1770624000"; d="scan'208";a="66269739" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 May 2026 01:47:53 -0700 X-CSE-ConnectionGUID: AZR3FBzfSluz7K4RbygDHg== X-CSE-MsgGUID: VJ1gtAdrTYikRnapnqhFYA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,215,1770624000"; d="scan'208";a="273570967" Received: from pgcooper-mobl3.ger.corp.intel.com (HELO localhost) ([10.245.245.157]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 May 2026 01:47:50 -0700 From: Jani Nikula To: Stuart Summers Cc: intel-xe@lists.freedesktop.org, rodrigo.vivi@intel.com, matthew.brost@intel.com, umesh.nerlige.ramappa@intel.com, Michal.Wajdeczko@intel.com, matthew.d.roper@intel.com, daniele.ceraolospurio@intel.com, shuicheng.lin@intel.com, Stuart Summers Subject: Re: [PATCH 3/9] drm/xe: Split out configfs data structures In-Reply-To: <20260504044348.209625-4-stuart.summers@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland References: <20260504044348.209625-1-stuart.summers@intel.com> <20260504044348.209625-4-stuart.summers@intel.com> Date: Mon, 04 May 2026 11:47:47 +0300 Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Mon, 04 May 2026, Stuart Summers wrote: > Split the configfs data structures into their own _types.h file. Why? The commit message must always answer the question, "why". The obvious downside here is that you expose the types that were previously hidden in xe_configfs.c to anyone who includes xe_configfs_types.h. And that header depends on a ton of other headers, making the header interdepencies worse overall. Maybe you need that header later for something, but please spell that out here. BR, Jani. > > Signed-off-by: Stuart Summers > Assisted-by: Copilot:claude-opus-4.7 > --- > drivers/gpu/drm/xe/xe_configfs.c | 85 +++++++------------------- > drivers/gpu/drm/xe/xe_configfs_types.h | 59 ++++++++++++++++++ > 2 files changed, 80 insertions(+), 64 deletions(-) > create mode 100644 drivers/gpu/drm/xe/xe_configfs_types.h > > diff --git a/drivers/gpu/drm/xe/xe_configfs.c b/drivers/gpu/drm/xe/xe_con= figfs.c > index 1e134057fae8..12b7fe65446d 100644 > --- a/drivers/gpu/drm/xe/xe_configfs.c > +++ b/drivers/gpu/drm/xe/xe_configfs.c > @@ -4,7 +4,6 @@ > */ >=20=20 > #include > -#include > #include > #include > #include > @@ -15,12 +14,10 @@ >=20=20 > #include "instructions/xe_mi_commands.h" > #include "xe_configfs.h" > +#include "xe_configfs_types.h" > #include "xe_defaults.h" > #include "xe_gt_types.h" > -#include "xe_hw_engine_types.h" > #include "xe_module.h" > -#include "xe_pci_types.h" > -#include "xe_sriov_types.h" >=20=20 > /** > * DOC: Xe Configfs > @@ -245,36 +242,6 @@ > * # rmdir /sys/kernel/config/xe/0000:03:00.0/ > */ >=20=20 > -/* Similar to struct xe_bb, but not tied to HW (yet) */ > -struct wa_bb { > - u32 *cs; > - u32 len; /* in dwords */ > -}; > - > -struct xe_config_group_device { > - struct config_group group; > - struct config_group sriov; > - > - struct xe_config_device { > - struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX]; > - struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX]; > - bool enable_psmi; > - bool enable_survivability_mode; > - u64 engines_allowed; > - u64 gt_types_allowed; > - struct { > - bool admin_only_pf; > - unsigned int max_vfs; > - } sriov; > - } config; > - > - /* protects attributes */ > - struct mutex lock; > - /* matching descriptor */ > - const struct xe_device_desc *desc; > - /* tentative SR-IOV mode */ > - enum xe_sriov_mode mode; > -}; >=20=20 > static const struct xe_config_device device_defaults =3D { > .enable_psmi =3D false, > @@ -322,16 +289,6 @@ static const struct { > { .name =3D "media", .type =3D XE_GT_TYPE_MEDIA }, > }; >=20=20 > -static struct xe_config_group_device *to_xe_config_group_device(struct c= onfig_item *item) > -{ > - return container_of(to_config_group(item), struct xe_config_group_devic= e, group); > -} > - > -static struct xe_config_device *to_xe_config_device(struct config_item *= item) > -{ > - return &to_xe_config_group_device(item)->config; > -} > - > static bool is_bound(struct xe_config_group_device *dev) > { > unsigned int domain, bus, slot, function; > @@ -359,7 +316,7 @@ static bool is_bound(struct xe_config_group_device *d= ev) >=20=20 > static ssize_t enable_survivability_mode_show(struct config_item *item, = char *page) > { > - struct xe_config_device *dev =3D to_xe_config_device(item); > + struct xe_config_device *dev =3D xe_configfs_to_device(item); >=20=20 > return sprintf(page, "%d\n", dev->enable_survivability_mode); > } > @@ -367,7 +324,7 @@ static ssize_t enable_survivability_mode_show(struct = config_item *item, char *pa > static ssize_t enable_survivability_mode_store(struct config_item *item,= const char *page, > size_t len) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ); > bool enable_survivability_mode; > int ret; >=20=20 > @@ -386,7 +343,7 @@ static ssize_t enable_survivability_mode_store(struct= config_item *item, const c >=20=20 > static ssize_t gt_types_allowed_show(struct config_item *item, char *pag= e) > { > - struct xe_config_device *dev =3D to_xe_config_device(item); > + struct xe_config_device *dev =3D xe_configfs_to_device(item); > char *p =3D page; >=20=20 > for (size_t i =3D 0; i < ARRAY_SIZE(gt_types); i++) > @@ -399,7 +356,7 @@ static ssize_t gt_types_allowed_show(struct config_it= em *item, char *page) > static ssize_t gt_types_allowed_store(struct config_item *item, const ch= ar *page, > size_t len) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ); > char *buf __free(kfree) =3D kstrdup(page, GFP_KERNEL); > char *p =3D buf; > u64 typemask =3D 0; > @@ -437,7 +394,7 @@ static ssize_t gt_types_allowed_store(struct config_i= tem *item, const char *page >=20=20 > static ssize_t engines_allowed_show(struct config_item *item, char *page) > { > - struct xe_config_device *dev =3D to_xe_config_device(item); > + struct xe_config_device *dev =3D xe_configfs_to_device(item); > char *p =3D page; >=20=20 > for (size_t i =3D 0; i < ARRAY_SIZE(engine_info); i++) { > @@ -529,7 +486,7 @@ static int parse_engine(const char *s, const char *en= d_chars, u64 *mask, > static ssize_t engines_allowed_store(struct config_item *item, const cha= r *page, > size_t len) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ); > ssize_t patternlen, p; > u64 mask, val =3D 0; >=20=20 > @@ -552,14 +509,14 @@ static ssize_t engines_allowed_store(struct config_= item *item, const char *page, >=20=20 > static ssize_t enable_psmi_show(struct config_item *item, char *page) > { > - struct xe_config_device *dev =3D to_xe_config_device(item); > + struct xe_config_device *dev =3D xe_configfs_to_device(item); >=20=20 > return sprintf(page, "%d\n", dev->enable_psmi); > } >=20=20 > static ssize_t enable_psmi_store(struct config_item *item, const char *p= age, size_t len) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ); > bool val; > int ret; >=20=20 > @@ -634,14 +591,14 @@ static ssize_t wa_bb_show(struct xe_config_group_de= vice *dev, >=20=20 > static ssize_t ctx_restore_mid_bb_show(struct config_item *item, char *p= age) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ); >=20=20 > return wa_bb_show(dev, dev->config.ctx_restore_mid_bb, page, SZ_4K); > } >=20=20 > static ssize_t ctx_restore_post_bb_show(struct config_item *item, char *= page) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ); >=20=20 > return wa_bb_show(dev, dev->config.ctx_restore_post_bb, page, SZ_4K); > } > @@ -798,7 +755,7 @@ static ssize_t wa_bb_store(struct wa_bb wa_bb[static = XE_ENGINE_CLASS_MAX], > static ssize_t ctx_restore_mid_bb_store(struct config_item *item, > const char *data, size_t sz) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ); >=20=20 > return wa_bb_store(dev->config.ctx_restore_mid_bb, dev, data, sz); > } > @@ -806,7 +763,7 @@ static ssize_t ctx_restore_mid_bb_store(struct config= _item *item, > static ssize_t ctx_restore_post_bb_store(struct config_item *item, > const char *data, size_t sz) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ); >=20=20 > return wa_bb_store(dev->config.ctx_restore_post_bb, dev, data, sz); > } > @@ -830,7 +787,7 @@ static struct configfs_attribute *xe_config_device_at= trs[] =3D { >=20=20 > static void xe_config_device_release(struct config_item *item) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ); >=20=20 > mutex_destroy(&dev->lock); >=20=20 > @@ -846,7 +803,7 @@ static struct configfs_item_operations xe_config_devi= ce_ops =3D { > static bool xe_config_device_is_visible(struct config_item *item, > struct configfs_attribute *attr, int n) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ); >=20=20 > if (attr =3D=3D &attr_enable_survivability_mode) { > if (!dev->desc->is_dgfx || dev->desc->platform < XE_BATTLEMAGE) > @@ -869,7 +826,7 @@ static const struct config_item_type xe_config_device= _type =3D { >=20=20 > static ssize_t sriov_max_vfs_show(struct config_item *item, char *page) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item->= ci_parent); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ->ci_parent); >=20=20 > guard(mutex)(&dev->lock); >=20=20 > @@ -881,7 +838,7 @@ static ssize_t sriov_max_vfs_show(struct config_item = *item, char *page) >=20=20 > static ssize_t sriov_max_vfs_store(struct config_item *item, const char = *page, size_t len) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item->= ci_parent); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ->ci_parent); > unsigned int max_vfs; > int ret; >=20=20 > @@ -903,7 +860,7 @@ static ssize_t sriov_max_vfs_store(struct config_item= *item, const char *page, s >=20=20 > static ssize_t sriov_admin_only_pf_show(struct config_item *item, char *= page) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item->= ci_parent); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ->ci_parent); >=20=20 > guard(mutex)(&dev->lock); >=20=20 > @@ -912,7 +869,7 @@ static ssize_t sriov_admin_only_pf_show(struct config= _item *item, char *page) >=20=20 > static ssize_t sriov_admin_only_pf_store(struct config_item *item, const= char *page, size_t len) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item->= ci_parent); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ->ci_parent); > bool admin_only_pf; > int ret; >=20=20 > @@ -941,7 +898,7 @@ static struct configfs_attribute *xe_config_sriov_att= rs[] =3D { > static bool xe_config_sriov_is_visible(struct config_item *item, > struct configfs_attribute *attr, int n) > { > - struct xe_config_group_device *dev =3D to_xe_config_group_device(item->= ci_parent); > + struct xe_config_group_device *dev =3D xe_configfs_to_group_device(item= ->ci_parent); >=20=20 > if (attr =3D=3D &sriov_attr_max_vfs && dev->mode !=3D XE_SRIOV_MODE_PF) > return false; > @@ -1084,7 +1041,7 @@ static struct xe_config_group_device *find_xe_confi= g_group_device(struct pci_dev > if (!item) > return NULL; >=20=20 > - return to_xe_config_group_device(item); > + return xe_configfs_to_group_device(item); > } >=20=20 > static void dump_custom_dev_config(struct pci_dev *pdev, > diff --git a/drivers/gpu/drm/xe/xe_configfs_types.h b/drivers/gpu/drm/xe/= xe_configfs_types.h > new file mode 100644 > index 000000000000..935097aafa96 > --- /dev/null > +++ b/drivers/gpu/drm/xe/xe_configfs_types.h > @@ -0,0 +1,59 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Copyright =C2=A9 2026 Intel Corporation > + */ > +#ifndef _XE_CONFIGFS_TYPES_H_ > +#define _XE_CONFIGFS_TYPES_H_ > + > +#include > +#include > +#include > + > +#include "xe_hw_engine_types.h" > +#include "xe_pci_types.h" > +#include "xe_sriov_types.h" > + > +struct config_item; > + > +/* Similar to struct xe_bb, but not tied to HW (yet) */ > +struct wa_bb { > + u32 *cs; > + u32 len; /* in dwords */ > +}; > + > +struct xe_config_group_device { > + struct config_group group; > + struct config_group sriov; > + > + struct xe_config_device { > + struct wa_bb ctx_restore_mid_bb[XE_ENGINE_CLASS_MAX]; > + struct wa_bb ctx_restore_post_bb[XE_ENGINE_CLASS_MAX]; > + bool enable_psmi; > + bool enable_survivability_mode; > + u64 engines_allowed; > + u64 gt_types_allowed; > + struct { > + bool admin_only_pf; > + unsigned int max_vfs; > + } sriov; > + } config; > + > + /* protects attributes */ > + struct mutex lock; > + /* matching descriptor */ > + const struct xe_device_desc *desc; > + /* tentative SR-IOV mode */ > + enum xe_sriov_mode mode; > +}; > + > +static inline struct xe_config_group_device *xe_configfs_to_group_device= (struct config_item *item) > +{ > + return container_of(to_config_group(item), struct xe_config_group_devic= e, group); > +} > + > +static inline struct xe_config_device *xe_configfs_to_device(struct conf= ig_item *item) > +{ > + return &xe_configfs_to_group_device(item)->config; > +} > + > +#endif /* _XE_CONFIGFS_TYPES_H_ */ --=20 Jani Nikula, Intel