Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Govindapillai, Vinod" <vinod.govindapillai@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>
Cc: "intel-xe@lists.freedesktop.org" <intel-xe@lists.freedesktop.org>,
	"Saarinen, Jani" <jani.saarinen@intel.com>,
	"Reddy Guddati, Santhosh" <santhosh.reddy.guddati@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Syrjala, Ville" <ville.syrjala@intel.com>,
	"Hogander, Jouni" <jouni.hogander@intel.com>
Subject: Re: [PATCH v3 1/4] drm/i915/display: avoid calling fbc activate if fbc is active
Date: Tue, 21 Jan 2025 08:55:40 +0000	[thread overview]
Message-ID: <bf6843c19dd6af357eaeb26f2dcfd915d3834c59.camel@intel.com> (raw)
In-Reply-To: <Z4pRwB6mkTDNMAEu@intel.com>

On Fri, 2025-01-17 at 14:49 +0200, Ville Syrjälä wrote:
> On Tue, Jan 14, 2025 at 02:07:16PM +0200, Vinod Govindapillai wrote:
> > If FBC is already active, we don't need to call FBC activate
> > routine again during the post plane update. As this will
> > explicitly call the nuke and also rewrite the FBC ctl registers.
> > "intel_atomic_commit_tail-> intel_post_plane_update->
> > intel_fbc_post_update-> _intel_fbc_post_update" path will be
> > executed during the normal flip cases. FBC HW will nuke on sync
> > flip event and driver do not need to call the nuke explicitly.
> > This is much more relevant in case of dirty rectangle support
> > in FBC with the followup patches. Nuke on flip in that case will
> > remove all the benefits of fetching only the modified region.
> > 
> > The front buffer rendering sequence will call intel_fbc_flush()
> > and which will call intel_fbc_nuke() or intel_fbc_activate()
> > based on FBC status explicitly and won't get impacted by this
> > change.
> > 
> > Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_fbc.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index df05904bac8a..fd540ff5e57e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -1561,7 +1561,8 @@ static void __intel_fbc_post_update(struct intel_fbc *fbc)
> >  	fbc->flip_pending = false;
> >  	fbc->busy_bits = 0;
> >  
> > -	intel_fbc_activate(fbc);
> > +	if (!fbc->active)
> > +		intel_fbc_activate(fbc);
> 
> We'll need to keep the actual activate part (eg. to update the fence).
> But we should be able to elide the explicit nuke if FBC was already
> active (that implies a flip nuke has occurred anyway, vs. if FBC was
> previously disabled then it might have been disabled by a frontbuffer
> invalidate and if it hasn't been disabled for a full frame then the
> hardware won't automagically cause a nuke when we reactivate it).

Thanks Ville!

Okay! I have something like this now! But facing some weird issues!

index df05904bac8a..f05c61040d19 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -739,10 +739,22 @@ static void intel_fbc_nuke(struct intel_fbc *fbc)
 
 static void intel_fbc_activate(struct intel_fbc *fbc)
 {
+       bool fbc_already_active;
+
        lockdep_assert_held(&fbc->lock);
 
+       fbc_already_active = fbc->active;
+
        intel_fbc_hw_activate(fbc);
-       intel_fbc_nuke(fbc);
+
+       /*
+        * If FBC is already active, don't nuke.
+        * In normal flips after FBC is enabled, FBC hw will nuke on flip
+        * In case of frontbuffer rendering cases, invalidate, flush sequence
+        * will handle the nuke
+        */
+       if (!fbc_already_active)
+               intel_fbc_nuke(fbc);

So the nuke won't be called from normal flips if fbc is already active. So the intel_fbc_hw_activate
will be called always - which programs override stride, no fences in case of xe, and reprograms
FBC_CTL and FBC_DIRTYRECT_CTL registers with the same values!

But the weird thing is, with this damaged area update don't have any effect. The whole region is
getting updated! But if I avoid calling the intel_fbc_hw_activate() completely, i can see only those
damaged rect area being updated!

Initially I thought as we rewrite FBC_DIRTYRECT_CTL enable again, that could cause the first frame
being taking the whole plane size as the update region. But after experimenting with  those,
narrowed it to glk_fbc_program_cfb_stride() call! Somehow programming glk_fbc_program_cfb_stride()
is causing entire region being updated!  Do you have any pointers on this?

Thanks
Vinod


> 
> >  }
> >  
> >  void intel_fbc_post_update(struct intel_atomic_state *state,
> > -- 
> > 2.43.0
> 


  reply	other threads:[~2025-01-21  8:55 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-14 12:07 [PATCH v3 0/4] drm/i915/xe3: FBC Dirty rect feature support Vinod Govindapillai
2025-01-14 12:07 ` [PATCH v3 1/4] drm/i915/display: avoid calling fbc activate if fbc is active Vinod Govindapillai
2025-01-17 12:49   ` Ville Syrjälä
2025-01-21  8:55     ` Govindapillai, Vinod [this message]
2025-01-14 12:07 ` [PATCH v3 2/4] drm/i915/xe: add register definitions for fbc dirty rect support Vinod Govindapillai
2025-01-14 12:07 ` [PATCH v3 3/4] drm/i915/xe3: add dirty rect support for FBC Vinod Govindapillai
2025-01-17 13:00   ` Ville Syrjälä
2025-01-14 12:07 ` [PATCH v3 4/4] drm/i915/xe3: disable FBC if PSR2 selective fetch is enabled Vinod Govindapillai
2025-01-14 12:14 ` ✓ CI.Patch_applied: success for drm/i915/xe3: FBC Dirty rect feature support (rev3) Patchwork
2025-01-14 12:14 ` ✗ CI.checkpatch: warning " Patchwork
2025-01-14 12:16 ` ✓ CI.KUnit: success " Patchwork
2025-01-14 12:44 ` ✓ CI.Build: " Patchwork
2025-01-14 12:46 ` ✓ CI.Hooks: " Patchwork
2025-01-14 12:48 ` ✗ CI.checksparse: warning " Patchwork
2025-01-14 13:15 ` ✓ Xe.CI.BAT: success " Patchwork
2025-01-14 16:23 ` ✗ Xe.CI.Full: failure " Patchwork
2025-01-21 11:49 ` ✗ CI.Patch_applied: failure for drm/i915/xe3: FBC Dirty rect feature support (rev4) Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=bf6843c19dd6af357eaeb26f2dcfd915d3834c59.camel@intel.com \
    --to=vinod.govindapillai@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=jani.saarinen@intel.com \
    --cc=jouni.hogander@intel.com \
    --cc=santhosh.reddy.guddati@intel.com \
    --cc=ville.syrjala@intel.com \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox