* ✗ CI.checkpatch: warning for drm/i915/psr: Do not use pipe_src as borders for SU area
2026-03-27 11:45 [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area Jouni Högander
@ 2026-03-27 11:51 ` Patchwork
2026-03-27 11:53 ` ✓ CI.KUnit: success " Patchwork
` (6 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-03-27 11:51 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-xe
== Series Details ==
Series: drm/i915/psr: Do not use pipe_src as borders for SU area
URL : https://patchwork.freedesktop.org/series/163985/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 850efd697934404993c1261c8798a3b0cd557ae8
Author: Jouni Högander <jouni.hogander@intel.com>
Date: Fri Mar 27 13:45:53 2026 +0200
drm/i915/psr: Do not use pipe_src as borders for SU area
This far using crtc_state->pipe_src as borders for Selective Update area
haven't caused visible problems as drm_rect_width(crtc_state->pipe_src) ==
crtc_state->hw.adjusted_mode.crtc_hdisplay and
drm_rect_height(crtc_state->pipe_src) ==
crtc_state->hw.adjusted_mode.crtc_vdisplay when pipe scaling is not
used. On the other hand using pipe scaling is forcing full frame updates and all the
Selective Update area calculations are skipped. Now this improper usage of
crtc_state->pipe_src is causing following warnings:
<4> [7771.978166] xe 0000:00:02.0: [drm] drm_WARN_ON_ONCE(su_lines % vdsc_cfg->slice_height)
after WARN_ON_ONCE was added by commit:
"drm/i915/dsc: Add helper for writing DSC Selective Update ET parameters"
These warnings are seen when DSC and pipe scaling are enabled
simultaneously. This is because on full frame update SU area is improperly
set as pipe_src which is not aligned with DSC slice height.
Fix these by creating local rectangle using
crtc_state->hw.adjusted_mode.crtc_hdisplay and
crtc_state->hw.adjusted_mode.crtc_vdisplay. Use this local rectangle as
borders for SU area.
Fixes: d6774b8c3c58 ("drm/i915: Ensure damage clip area is within pipe area")
Cc: <stable@vger.kernel.org> # v6.0+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
+ /mt/dim checkpatch b0c967b64ac6322238cc1cbabd75a3be31fbb637 drm-intel
850efd697934 drm/i915/psr: Do not use pipe_src as borders for SU area
-:14: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#14:
used. On the other hand using pipe scaling is forcing full frame updates and all the
total: 0 errors, 1 warnings, 0 checks, 94 lines checked
^ permalink raw reply [flat|nested] 10+ messages in thread* ✓ CI.KUnit: success for drm/i915/psr: Do not use pipe_src as borders for SU area
2026-03-27 11:45 [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area Jouni Högander
2026-03-27 11:51 ` ✗ CI.checkpatch: warning for " Patchwork
@ 2026-03-27 11:53 ` Patchwork
2026-03-27 11:55 ` [PATCH] " Jani Nikula
` (5 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-03-27 11:53 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-xe
== Series Details ==
Series: drm/i915/psr: Do not use pipe_src as borders for SU area
URL : https://patchwork.freedesktop.org/series/163985/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[11:51:57] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:52:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[11:52:39] Starting KUnit Kernel (1/1)...
[11:52:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:52:39] ================== guc_buf (11 subtests) ===================
[11:52:39] [PASSED] test_smallest
[11:52:39] [PASSED] test_largest
[11:52:39] [PASSED] test_granular
[11:52:39] [PASSED] test_unique
[11:52:39] [PASSED] test_overlap
[11:52:39] [PASSED] test_reusable
[11:52:39] [PASSED] test_too_big
[11:52:39] [PASSED] test_flush
[11:52:39] [PASSED] test_lookup
[11:52:39] [PASSED] test_data
[11:52:39] [PASSED] test_class
[11:52:39] ===================== [PASSED] guc_buf =====================
[11:52:39] =================== guc_dbm (7 subtests) ===================
[11:52:39] [PASSED] test_empty
[11:52:39] [PASSED] test_default
[11:52:39] ======================== test_size ========================
[11:52:39] [PASSED] 4
[11:52:39] [PASSED] 8
[11:52:39] [PASSED] 32
[11:52:39] [PASSED] 256
[11:52:39] ==================== [PASSED] test_size ====================
[11:52:39] ======================= test_reuse ========================
[11:52:39] [PASSED] 4
[11:52:39] [PASSED] 8
[11:52:39] [PASSED] 32
[11:52:39] [PASSED] 256
[11:52:39] =================== [PASSED] test_reuse ====================
[11:52:39] =================== test_range_overlap ====================
[11:52:39] [PASSED] 4
[11:52:39] [PASSED] 8
[11:52:39] [PASSED] 32
[11:52:39] [PASSED] 256
[11:52:39] =============== [PASSED] test_range_overlap ================
[11:52:39] =================== test_range_compact ====================
[11:52:39] [PASSED] 4
[11:52:39] [PASSED] 8
[11:52:39] [PASSED] 32
[11:52:39] [PASSED] 256
[11:52:39] =============== [PASSED] test_range_compact ================
[11:52:39] ==================== test_range_spare =====================
[11:52:39] [PASSED] 4
[11:52:39] [PASSED] 8
[11:52:39] [PASSED] 32
[11:52:39] [PASSED] 256
[11:52:39] ================ [PASSED] test_range_spare =================
[11:52:39] ===================== [PASSED] guc_dbm =====================
[11:52:39] =================== guc_idm (6 subtests) ===================
[11:52:39] [PASSED] bad_init
[11:52:39] [PASSED] no_init
[11:52:39] [PASSED] init_fini
[11:52:39] [PASSED] check_used
[11:52:39] [PASSED] check_quota
[11:52:39] [PASSED] check_all
[11:52:39] ===================== [PASSED] guc_idm =====================
[11:52:39] ================== no_relay (3 subtests) ===================
[11:52:39] [PASSED] xe_drops_guc2pf_if_not_ready
[11:52:39] [PASSED] xe_drops_guc2vf_if_not_ready
[11:52:39] [PASSED] xe_rejects_send_if_not_ready
[11:52:39] ==================== [PASSED] no_relay =====================
[11:52:39] ================== pf_relay (14 subtests) ==================
[11:52:39] [PASSED] pf_rejects_guc2pf_too_short
[11:52:39] [PASSED] pf_rejects_guc2pf_too_long
[11:52:39] [PASSED] pf_rejects_guc2pf_no_payload
[11:52:39] [PASSED] pf_fails_no_payload
[11:52:39] [PASSED] pf_fails_bad_origin
[11:52:39] [PASSED] pf_fails_bad_type
[11:52:39] [PASSED] pf_txn_reports_error
[11:52:39] [PASSED] pf_txn_sends_pf2guc
[11:52:39] [PASSED] pf_sends_pf2guc
[11:52:39] [SKIPPED] pf_loopback_nop
[11:52:39] [SKIPPED] pf_loopback_echo
[11:52:39] [SKIPPED] pf_loopback_fail
[11:52:39] [SKIPPED] pf_loopback_busy
[11:52:39] [SKIPPED] pf_loopback_retry
[11:52:39] ==================== [PASSED] pf_relay =====================
[11:52:39] ================== vf_relay (3 subtests) ===================
[11:52:39] [PASSED] vf_rejects_guc2vf_too_short
[11:52:39] [PASSED] vf_rejects_guc2vf_too_long
[11:52:39] [PASSED] vf_rejects_guc2vf_no_payload
[11:52:39] ==================== [PASSED] vf_relay =====================
[11:52:39] ================ pf_gt_config (9 subtests) =================
[11:52:39] [PASSED] fair_contexts_1vf
[11:52:39] [PASSED] fair_doorbells_1vf
[11:52:39] [PASSED] fair_ggtt_1vf
[11:52:39] ====================== fair_vram_1vf ======================
[11:52:39] [PASSED] 3.50 GiB
[11:52:39] [PASSED] 11.5 GiB
[11:52:39] [PASSED] 15.5 GiB
[11:52:39] [PASSED] 31.5 GiB
[11:52:39] [PASSED] 63.5 GiB
[11:52:39] [PASSED] 1.91 GiB
[11:52:39] ================== [PASSED] fair_vram_1vf ==================
[11:52:39] ================ fair_vram_1vf_admin_only =================
[11:52:39] [PASSED] 3.50 GiB
[11:52:39] [PASSED] 11.5 GiB
[11:52:39] [PASSED] 15.5 GiB
[11:52:39] [PASSED] 31.5 GiB
[11:52:39] [PASSED] 63.5 GiB
[11:52:39] [PASSED] 1.91 GiB
[11:52:39] ============ [PASSED] fair_vram_1vf_admin_only =============
[11:52:39] ====================== fair_contexts ======================
[11:52:39] [PASSED] 1 VF
[11:52:39] [PASSED] 2 VFs
[11:52:39] [PASSED] 3 VFs
[11:52:39] [PASSED] 4 VFs
[11:52:39] [PASSED] 5 VFs
[11:52:39] [PASSED] 6 VFs
[11:52:39] [PASSED] 7 VFs
[11:52:39] [PASSED] 8 VFs
[11:52:39] [PASSED] 9 VFs
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[11:52:39] [PASSED] 11 VFs
[11:52:39] [PASSED] 12 VFs
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[11:52:39] [PASSED] 15 VFs
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[11:52:39] [PASSED] 35 VFs
[11:52:39] [PASSED] 36 VFs
[11:52:39] [PASSED] 37 VFs
[11:52:39] [PASSED] 38 VFs
[11:52:39] [PASSED] 39 VFs
[11:52:39] [PASSED] 40 VFs
[11:52:39] [PASSED] 41 VFs
[11:52:39] [PASSED] 42 VFs
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[11:52:39] [PASSED] 44 VFs
[11:52:39] [PASSED] 45 VFs
[11:52:39] [PASSED] 46 VFs
[11:52:39] [PASSED] 47 VFs
[11:52:39] [PASSED] 48 VFs
[11:52:39] [PASSED] 49 VFs
[11:52:39] [PASSED] 50 VFs
[11:52:39] [PASSED] 51 VFs
[11:52:39] [PASSED] 52 VFs
[11:52:39] [PASSED] 53 VFs
[11:52:39] [PASSED] 54 VFs
[11:52:39] [PASSED] 55 VFs
[11:52:39] [PASSED] 56 VFs
[11:52:39] [PASSED] 57 VFs
[11:52:39] [PASSED] 58 VFs
[11:52:39] [PASSED] 59 VFs
[11:52:39] [PASSED] 60 VFs
[11:52:39] [PASSED] 61 VFs
[11:52:39] [PASSED] 62 VFs
[11:52:39] [PASSED] 63 VFs
[11:52:39] ================== [PASSED] fair_contexts ==================
[11:52:39] ===================== fair_doorbells ======================
[11:52:39] [PASSED] 1 VF
[11:52:39] [PASSED] 2 VFs
[11:52:39] [PASSED] 3 VFs
[11:52:39] [PASSED] 4 VFs
[11:52:39] [PASSED] 5 VFs
[11:52:39] [PASSED] 6 VFs
[11:52:39] [PASSED] 7 VFs
[11:52:39] [PASSED] 8 VFs
[11:52:39] [PASSED] 9 VFs
[11:52:39] [PASSED] 10 VFs
[11:52:39] [PASSED] 11 VFs
[11:52:39] [PASSED] 12 VFs
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[11:52:39] [PASSED] 19 VFs
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[11:52:39] [PASSED] 33 VFs
[11:52:39] [PASSED] 34 VFs
[11:52:39] [PASSED] 35 VFs
[11:52:39] [PASSED] 36 VFs
[11:52:39] [PASSED] 37 VFs
[11:52:39] [PASSED] 38 VFs
[11:52:39] [PASSED] 39 VFs
[11:52:39] [PASSED] 40 VFs
[11:52:39] [PASSED] 41 VFs
[11:52:39] [PASSED] 42 VFs
[11:52:39] [PASSED] 43 VFs
[11:52:39] [PASSED] 44 VFs
[11:52:39] [PASSED] 45 VFs
[11:52:39] [PASSED] 46 VFs
[11:52:39] [PASSED] 47 VFs
[11:52:39] [PASSED] 48 VFs
[11:52:39] [PASSED] 49 VFs
[11:52:39] [PASSED] 50 VFs
[11:52:39] [PASSED] 51 VFs
[11:52:39] [PASSED] 52 VFs
[11:52:39] [PASSED] 53 VFs
[11:52:39] [PASSED] 54 VFs
[11:52:39] [PASSED] 55 VFs
[11:52:39] [PASSED] 56 VFs
[11:52:39] [PASSED] 57 VFs
[11:52:39] [PASSED] 58 VFs
[11:52:39] [PASSED] 59 VFs
[11:52:39] [PASSED] 60 VFs
[11:52:39] [PASSED] 61 VFs
[11:52:39] [PASSED] 62 VFs
[11:52:39] [PASSED] 63 VFs
[11:52:39] ================= [PASSED] fair_doorbells ==================
[11:52:39] ======================== fair_ggtt ========================
[11:52:39] [PASSED] 1 VF
[11:52:39] [PASSED] 2 VFs
[11:52:39] [PASSED] 3 VFs
[11:52:39] [PASSED] 4 VFs
[11:52:39] [PASSED] 5 VFs
[11:52:39] [PASSED] 6 VFs
[11:52:39] [PASSED] 7 VFs
[11:52:39] [PASSED] 8 VFs
[11:52:39] [PASSED] 9 VFs
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[11:52:39] [PASSED] 11 VFs
[11:52:39] [PASSED] 12 VFs
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[11:52:39] [PASSED] 39 VFs
[11:52:39] [PASSED] 40 VFs
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[11:52:39] [PASSED] 42 VFs
[11:52:39] [PASSED] 43 VFs
[11:52:39] [PASSED] 44 VFs
[11:52:39] [PASSED] 45 VFs
[11:52:39] [PASSED] 46 VFs
[11:52:39] [PASSED] 47 VFs
[11:52:39] [PASSED] 48 VFs
[11:52:39] [PASSED] 49 VFs
[11:52:39] [PASSED] 50 VFs
[11:52:39] [PASSED] 51 VFs
[11:52:39] [PASSED] 52 VFs
[11:52:39] [PASSED] 53 VFs
[11:52:39] [PASSED] 54 VFs
[11:52:39] [PASSED] 55 VFs
[11:52:39] [PASSED] 56 VFs
[11:52:39] [PASSED] 57 VFs
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[11:52:39] [PASSED] 60 VFs
[11:52:39] [PASSED] 61 VFs
[11:52:39] [PASSED] 62 VFs
[11:52:39] [PASSED] 63 VFs
[11:52:39] ==================== [PASSED] fair_ggtt ====================
[11:52:39] ======================== fair_vram ========================
[11:52:39] [PASSED] 1 VF
[11:52:39] [PASSED] 2 VFs
[11:52:39] [PASSED] 3 VFs
[11:52:39] [PASSED] 4 VFs
[11:52:39] [PASSED] 5 VFs
[11:52:39] [PASSED] 6 VFs
[11:52:39] [PASSED] 7 VFs
[11:52:39] [PASSED] 8 VFs
[11:52:39] [PASSED] 9 VFs
[11:52:39] [PASSED] 10 VFs
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[11:52:39] [PASSED] 12 VFs
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[11:52:39] [PASSED] 30 VFs
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[11:52:39] [PASSED] 33 VFs
[11:52:39] [PASSED] 34 VFs
[11:52:39] [PASSED] 35 VFs
[11:52:39] [PASSED] 36 VFs
[11:52:39] [PASSED] 37 VFs
[11:52:39] [PASSED] 38 VFs
[11:52:39] [PASSED] 39 VFs
[11:52:39] [PASSED] 40 VFs
[11:52:39] [PASSED] 41 VFs
[11:52:39] [PASSED] 42 VFs
[11:52:39] [PASSED] 43 VFs
[11:52:39] [PASSED] 44 VFs
[11:52:39] [PASSED] 45 VFs
[11:52:39] [PASSED] 46 VFs
[11:52:39] [PASSED] 47 VFs
[11:52:39] [PASSED] 48 VFs
[11:52:39] [PASSED] 49 VFs
[11:52:39] [PASSED] 50 VFs
[11:52:39] [PASSED] 51 VFs
[11:52:39] [PASSED] 52 VFs
[11:52:39] [PASSED] 53 VFs
[11:52:39] [PASSED] 54 VFs
[11:52:39] [PASSED] 55 VFs
[11:52:39] [PASSED] 56 VFs
[11:52:39] [PASSED] 57 VFs
[11:52:39] [PASSED] 58 VFs
[11:52:39] [PASSED] 59 VFs
[11:52:39] [PASSED] 60 VFs
[11:52:39] [PASSED] 61 VFs
[11:52:39] [PASSED] 62 VFs
[11:52:39] [PASSED] 63 VFs
[11:52:39] ==================== [PASSED] fair_vram ====================
[11:52:39] ================== [PASSED] pf_gt_config ===================
[11:52:39] ===================== lmtt (1 subtest) =====================
[11:52:39] ======================== test_ops =========================
[11:52:39] [PASSED] 2-level
[11:52:39] [PASSED] multi-level
[11:52:39] ==================== [PASSED] test_ops =====================
[11:52:39] ====================== [PASSED] lmtt =======================
[11:52:39] ================= pf_service (11 subtests) =================
[11:52:39] [PASSED] pf_negotiate_any
[11:52:39] [PASSED] pf_negotiate_base_match
[11:52:39] [PASSED] pf_negotiate_base_newer
[11:52:39] [PASSED] pf_negotiate_base_next
[11:52:39] [SKIPPED] pf_negotiate_base_older
[11:52:39] [PASSED] pf_negotiate_base_prev
[11:52:39] [PASSED] pf_negotiate_latest_match
[11:52:39] [PASSED] pf_negotiate_latest_newer
[11:52:39] [PASSED] pf_negotiate_latest_next
[11:52:39] [SKIPPED] pf_negotiate_latest_older
[11:52:39] [SKIPPED] pf_negotiate_latest_prev
[11:52:39] =================== [PASSED] pf_service ====================
[11:52:39] ================= xe_guc_g2g (2 subtests) ==================
[11:52:39] ============== xe_live_guc_g2g_kunit_default ==============
[11:52:39] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[11:52:39] ============== xe_live_guc_g2g_kunit_allmem ===============
[11:52:39] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[11:52:39] =================== [SKIPPED] xe_guc_g2g ===================
[11:52:39] =================== xe_mocs (2 subtests) ===================
[11:52:39] ================ xe_live_mocs_kernel_kunit ================
[11:52:39] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[11:52:39] ================ xe_live_mocs_reset_kunit =================
[11:52:39] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[11:52:39] ==================== [SKIPPED] xe_mocs =====================
[11:52:39] ================= xe_migrate (2 subtests) ==================
[11:52:39] ================= xe_migrate_sanity_kunit =================
[11:52:39] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[11:52:39] ================== xe_validate_ccs_kunit ==================
[11:52:39] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[11:52:39] =================== [SKIPPED] xe_migrate ===================
[11:52:39] ================== xe_dma_buf (1 subtest) ==================
[11:52:39] ==================== xe_dma_buf_kunit =====================
[11:52:39] ================ [SKIPPED] xe_dma_buf_kunit ================
[11:52:39] =================== [SKIPPED] xe_dma_buf ===================
[11:52:39] ================= xe_bo_shrink (1 subtest) =================
[11:52:39] =================== xe_bo_shrink_kunit ====================
[11:52:39] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[11:52:39] ================== [SKIPPED] xe_bo_shrink ==================
[11:52:39] ==================== xe_bo (2 subtests) ====================
[11:52:39] ================== xe_ccs_migrate_kunit ===================
[11:52:39] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[11:52:39] ==================== xe_bo_evict_kunit ====================
[11:52:39] =============== [SKIPPED] xe_bo_evict_kunit ================
[11:52:39] ===================== [SKIPPED] xe_bo ======================
[11:52:39] ==================== args (13 subtests) ====================
[11:52:39] [PASSED] count_args_test
[11:52:39] [PASSED] call_args_example
[11:52:39] [PASSED] call_args_test
[11:52:39] [PASSED] drop_first_arg_example
[11:52:39] [PASSED] drop_first_arg_test
[11:52:39] [PASSED] first_arg_example
[11:52:39] [PASSED] first_arg_test
[11:52:39] [PASSED] last_arg_example
[11:52:39] [PASSED] last_arg_test
[11:52:39] [PASSED] pick_arg_example
[11:52:39] [PASSED] if_args_example
[11:52:39] [PASSED] if_args_test
[11:52:39] [PASSED] sep_comma_example
[11:52:39] ====================== [PASSED] args =======================
[11:52:39] =================== xe_pci (3 subtests) ====================
[11:52:39] ==================== check_graphics_ip ====================
[11:52:39] [PASSED] 12.00 Xe_LP
[11:52:39] [PASSED] 12.10 Xe_LP+
[11:52:39] [PASSED] 12.55 Xe_HPG
[11:52:39] [PASSED] 12.60 Xe_HPC
[11:52:39] [PASSED] 12.70 Xe_LPG
[11:52:39] [PASSED] 12.71 Xe_LPG
[11:52:39] [PASSED] 12.74 Xe_LPG+
[11:52:39] [PASSED] 20.01 Xe2_HPG
[11:52:39] [PASSED] 20.02 Xe2_HPG
[11:52:39] [PASSED] 20.04 Xe2_LPG
[11:52:39] [PASSED] 30.00 Xe3_LPG
[11:52:39] [PASSED] 30.01 Xe3_LPG
[11:52:39] [PASSED] 30.03 Xe3_LPG
[11:52:39] [PASSED] 30.04 Xe3_LPG
[11:52:39] [PASSED] 30.05 Xe3_LPG
[11:52:39] [PASSED] 35.10 Xe3p_LPG
[11:52:39] [PASSED] 35.11 Xe3p_XPC
[11:52:39] ================ [PASSED] check_graphics_ip ================
[11:52:39] ===================== check_media_ip ======================
[11:52:39] [PASSED] 12.00 Xe_M
[11:52:39] [PASSED] 12.55 Xe_HPM
[11:52:39] [PASSED] 13.00 Xe_LPM+
[11:52:39] [PASSED] 13.01 Xe2_HPM
[11:52:39] [PASSED] 20.00 Xe2_LPM
[11:52:39] [PASSED] 30.00 Xe3_LPM
[11:52:39] [PASSED] 30.02 Xe3_LPM
[11:52:39] [PASSED] 35.00 Xe3p_LPM
[11:52:39] [PASSED] 35.03 Xe3p_HPM
[11:52:39] ================= [PASSED] check_media_ip ==================
[11:52:39] =================== check_platform_desc ===================
[11:52:39] [PASSED] 0x9A60 (TIGERLAKE)
[11:52:39] [PASSED] 0x9A68 (TIGERLAKE)
[11:52:39] [PASSED] 0x9A70 (TIGERLAKE)
[11:52:39] [PASSED] 0x9A40 (TIGERLAKE)
[11:52:39] [PASSED] 0x9A49 (TIGERLAKE)
[11:52:39] [PASSED] 0x9A59 (TIGERLAKE)
[11:52:39] [PASSED] 0x9A78 (TIGERLAKE)
[11:52:39] [PASSED] 0x9AC0 (TIGERLAKE)
[11:52:39] [PASSED] 0x9AC9 (TIGERLAKE)
[11:52:39] [PASSED] 0x9AD9 (TIGERLAKE)
[11:52:39] [PASSED] 0x9AF8 (TIGERLAKE)
[11:52:39] [PASSED] 0x4C80 (ROCKETLAKE)
[11:52:39] [PASSED] 0x4C8A (ROCKETLAKE)
[11:52:39] [PASSED] 0x4C8B (ROCKETLAKE)
[11:52:39] [PASSED] 0x4C8C (ROCKETLAKE)
[11:52:39] [PASSED] 0x4C90 (ROCKETLAKE)
[11:52:39] [PASSED] 0x4C9A (ROCKETLAKE)
[11:52:39] [PASSED] 0x4680 (ALDERLAKE_S)
[11:52:39] [PASSED] 0x4682 (ALDERLAKE_S)
[11:52:39] [PASSED] 0x4688 (ALDERLAKE_S)
[11:52:39] [PASSED] 0x468A (ALDERLAKE_S)
[11:52:39] [PASSED] 0x468B (ALDERLAKE_S)
[11:52:39] [PASSED] 0x4690 (ALDERLAKE_S)
[11:52:39] [PASSED] 0x4692 (ALDERLAKE_S)
[11:52:39] [PASSED] 0x4693 (ALDERLAKE_S)
[11:52:39] [PASSED] 0x46A0 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46A1 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46A2 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46A3 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46A6 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46A8 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46AA (ALDERLAKE_P)
[11:52:39] [PASSED] 0x462A (ALDERLAKE_P)
[11:52:39] [PASSED] 0x4626 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x4628 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46B0 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46B1 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46B2 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46B3 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46C0 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46C1 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46C2 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46C3 (ALDERLAKE_P)
[11:52:39] [PASSED] 0x46D0 (ALDERLAKE_N)
[11:52:39] [PASSED] 0x46D1 (ALDERLAKE_N)
[11:52:39] [PASSED] 0x46D2 (ALDERLAKE_N)
[11:52:39] [PASSED] 0x46D3 (ALDERLAKE_N)
[11:52:39] [PASSED] 0x46D4 (ALDERLAKE_N)
[11:52:39] [PASSED] 0xA721 (ALDERLAKE_P)
[11:52:39] [PASSED] 0xA7A1 (ALDERLAKE_P)
[11:52:39] [PASSED] 0xA7A9 (ALDERLAKE_P)
[11:52:39] [PASSED] 0xA7AC (ALDERLAKE_P)
[11:52:39] [PASSED] 0xA7AD (ALDERLAKE_P)
[11:52:39] [PASSED] 0xA720 (ALDERLAKE_P)
[11:52:39] [PASSED] 0xA7A0 (ALDERLAKE_P)
[11:52:39] [PASSED] 0xA7A8 (ALDERLAKE_P)
[11:52:39] [PASSED] 0xA7AA (ALDERLAKE_P)
[11:52:39] [PASSED] 0xA7AB (ALDERLAKE_P)
[11:52:39] [PASSED] 0xA780 (ALDERLAKE_S)
[11:52:39] [PASSED] 0xA781 (ALDERLAKE_S)
[11:52:39] [PASSED] 0xA782 (ALDERLAKE_S)
[11:52:39] [PASSED] 0xA783 (ALDERLAKE_S)
[11:52:39] [PASSED] 0xA788 (ALDERLAKE_S)
[11:52:39] [PASSED] 0xA789 (ALDERLAKE_S)
[11:52:39] [PASSED] 0xA78A (ALDERLAKE_S)
[11:52:39] [PASSED] 0xA78B (ALDERLAKE_S)
[11:52:39] [PASSED] 0x4905 (DG1)
[11:52:39] [PASSED] 0x4906 (DG1)
[11:52:39] [PASSED] 0x4907 (DG1)
[11:52:39] [PASSED] 0x4908 (DG1)
[11:52:39] [PASSED] 0x4909 (DG1)
[11:52:39] [PASSED] 0x56C0 (DG2)
[11:52:39] [PASSED] 0x56C2 (DG2)
[11:52:39] [PASSED] 0x56C1 (DG2)
[11:52:39] [PASSED] 0x7D51 (METEORLAKE)
[11:52:39] [PASSED] 0x7DD1 (METEORLAKE)
[11:52:39] [PASSED] 0x7D41 (METEORLAKE)
[11:52:39] [PASSED] 0x7D67 (METEORLAKE)
[11:52:39] [PASSED] 0xB640 (METEORLAKE)
[11:52:39] [PASSED] 0x56A0 (DG2)
[11:52:39] [PASSED] 0x56A1 (DG2)
[11:52:39] [PASSED] 0x56A2 (DG2)
[11:52:39] [PASSED] 0x56BE (DG2)
[11:52:39] [PASSED] 0x56BF (DG2)
[11:52:39] [PASSED] 0x5690 (DG2)
[11:52:39] [PASSED] 0x5691 (DG2)
[11:52:39] [PASSED] 0x5692 (DG2)
[11:52:39] [PASSED] 0x56A5 (DG2)
[11:52:39] [PASSED] 0x56A6 (DG2)
[11:52:39] [PASSED] 0x56B0 (DG2)
[11:52:39] [PASSED] 0x56B1 (DG2)
[11:52:39] [PASSED] 0x56BA (DG2)
[11:52:39] [PASSED] 0x56BB (DG2)
[11:52:39] [PASSED] 0x56BC (DG2)
[11:52:39] [PASSED] 0x56BD (DG2)
[11:52:39] [PASSED] 0x5693 (DG2)
[11:52:39] [PASSED] 0x5694 (DG2)
[11:52:39] [PASSED] 0x5695 (DG2)
[11:52:39] [PASSED] 0x56A3 (DG2)
[11:52:39] [PASSED] 0x56A4 (DG2)
[11:52:39] [PASSED] 0x56B2 (DG2)
[11:52:39] [PASSED] 0x56B3 (DG2)
[11:52:39] [PASSED] 0x5696 (DG2)
[11:52:39] [PASSED] 0x5697 (DG2)
[11:52:39] [PASSED] 0xB69 (PVC)
[11:52:39] [PASSED] 0xB6E (PVC)
[11:52:39] [PASSED] 0xBD4 (PVC)
[11:52:39] [PASSED] 0xBD5 (PVC)
[11:52:39] [PASSED] 0xBD6 (PVC)
[11:52:39] [PASSED] 0xBD7 (PVC)
[11:52:39] [PASSED] 0xBD8 (PVC)
[11:52:39] [PASSED] 0xBD9 (PVC)
[11:52:39] [PASSED] 0xBDA (PVC)
[11:52:39] [PASSED] 0xBDB (PVC)
[11:52:39] [PASSED] 0xBE0 (PVC)
[11:52:39] [PASSED] 0xBE1 (PVC)
[11:52:39] [PASSED] 0xBE5 (PVC)
[11:52:39] [PASSED] 0x7D40 (METEORLAKE)
[11:52:39] [PASSED] 0x7D45 (METEORLAKE)
[11:52:39] [PASSED] 0x7D55 (METEORLAKE)
[11:52:39] [PASSED] 0x7D60 (METEORLAKE)
[11:52:39] [PASSED] 0x7DD5 (METEORLAKE)
[11:52:39] [PASSED] 0x6420 (LUNARLAKE)
[11:52:39] [PASSED] 0x64A0 (LUNARLAKE)
[11:52:39] [PASSED] 0x64B0 (LUNARLAKE)
[11:52:39] [PASSED] 0xE202 (BATTLEMAGE)
[11:52:39] [PASSED] 0xE209 (BATTLEMAGE)
[11:52:39] [PASSED] 0xE20B (BATTLEMAGE)
[11:52:39] [PASSED] 0xE20C (BATTLEMAGE)
[11:52:39] [PASSED] 0xE20D (BATTLEMAGE)
[11:52:39] [PASSED] 0xE210 (BATTLEMAGE)
[11:52:39] [PASSED] 0xE211 (BATTLEMAGE)
[11:52:39] [PASSED] 0xE212 (BATTLEMAGE)
[11:52:39] [PASSED] 0xE216 (BATTLEMAGE)
[11:52:39] [PASSED] 0xE220 (BATTLEMAGE)
[11:52:39] [PASSED] 0xE221 (BATTLEMAGE)
[11:52:39] [PASSED] 0xE222 (BATTLEMAGE)
[11:52:39] [PASSED] 0xE223 (BATTLEMAGE)
[11:52:39] [PASSED] 0xB080 (PANTHERLAKE)
[11:52:39] [PASSED] 0xB081 (PANTHERLAKE)
[11:52:39] [PASSED] 0xB082 (PANTHERLAKE)
[11:52:39] [PASSED] 0xB083 (PANTHERLAKE)
[11:52:39] [PASSED] 0xB084 (PANTHERLAKE)
[11:52:39] [PASSED] 0xB085 (PANTHERLAKE)
[11:52:39] [PASSED] 0xB086 (PANTHERLAKE)
[11:52:39] [PASSED] 0xB087 (PANTHERLAKE)
[11:52:39] [PASSED] 0xB08F (PANTHERLAKE)
[11:52:39] [PASSED] 0xB090 (PANTHERLAKE)
[11:52:39] [PASSED] 0xB0A0 (PANTHERLAKE)
[11:52:39] [PASSED] 0xB0B0 (PANTHERLAKE)
[11:52:39] [PASSED] 0xFD80 (PANTHERLAKE)
[11:52:39] [PASSED] 0xFD81 (PANTHERLAKE)
[11:52:39] [PASSED] 0xD740 (NOVALAKE_S)
[11:52:39] [PASSED] 0xD741 (NOVALAKE_S)
[11:52:39] [PASSED] 0xD742 (NOVALAKE_S)
[11:52:39] [PASSED] 0xD743 (NOVALAKE_S)
[11:52:39] [PASSED] 0xD744 (NOVALAKE_S)
[11:52:39] [PASSED] 0xD745 (NOVALAKE_S)
[11:52:39] [PASSED] 0x674C (CRESCENTISLAND)
[11:52:39] [PASSED] 0xD750 (NOVALAKE_P)
[11:52:39] [PASSED] 0xD751 (NOVALAKE_P)
[11:52:39] [PASSED] 0xD752 (NOVALAKE_P)
[11:52:39] [PASSED] 0xD753 (NOVALAKE_P)
[11:52:39] [PASSED] 0xD754 (NOVALAKE_P)
[11:52:39] [PASSED] 0xD755 (NOVALAKE_P)
[11:52:39] [PASSED] 0xD756 (NOVALAKE_P)
[11:52:39] [PASSED] 0xD757 (NOVALAKE_P)
[11:52:39] [PASSED] 0xD75F (NOVALAKE_P)
[11:52:39] =============== [PASSED] check_platform_desc ===============
[11:52:39] ===================== [PASSED] xe_pci ======================
[11:52:39] =================== xe_rtp (2 subtests) ====================
[11:52:39] =============== xe_rtp_process_to_sr_tests ================
[11:52:39] [PASSED] coalesce-same-reg
[11:52:39] [PASSED] no-match-no-add
[11:52:39] [PASSED] match-or
[11:52:39] [PASSED] match-or-xfail
[11:52:39] [PASSED] no-match-no-add-multiple-rules
[11:52:39] [PASSED] two-regs-two-entries
[11:52:39] [PASSED] clr-one-set-other
[11:52:39] [PASSED] set-field
[11:52:39] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[11:52:39] [PASSED] conflict-not-disjoint
[11:52:39] [PASSED] conflict-reg-type
[11:52:39] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[11:52:39] ================== xe_rtp_process_tests ===================
[11:52:39] [PASSED] active1
[11:52:39] [PASSED] active2
[11:52:39] [PASSED] active-inactive
[11:52:39] [PASSED] inactive-active
[11:52:39] [PASSED] inactive-1st_or_active-inactive
[11:52:39] [PASSED] inactive-2nd_or_active-inactive
[11:52:39] [PASSED] inactive-last_or_active-inactive
[11:52:39] [PASSED] inactive-no_or_active-inactive
[11:52:39] ============== [PASSED] xe_rtp_process_tests ===============
[11:52:39] ===================== [PASSED] xe_rtp ======================
[11:52:39] ==================== xe_wa (1 subtest) =====================
[11:52:39] ======================== xe_wa_gt =========================
[11:52:39] [PASSED] TIGERLAKE B0
[11:52:39] [PASSED] DG1 A0
[11:52:39] [PASSED] DG1 B0
[11:52:39] [PASSED] ALDERLAKE_S A0
[11:52:39] [PASSED] ALDERLAKE_S B0
[11:52:39] [PASSED] ALDERLAKE_S C0
[11:52:39] [PASSED] ALDERLAKE_S D0
[11:52:39] [PASSED] ALDERLAKE_P A0
[11:52:39] [PASSED] ALDERLAKE_P B0
[11:52:39] [PASSED] ALDERLAKE_P C0
[11:52:40] [PASSED] ALDERLAKE_S RPLS D0
[11:52:40] [PASSED] ALDERLAKE_P RPLU E0
[11:52:40] [PASSED] DG2 G10 C0
[11:52:40] [PASSED] DG2 G11 B1
[11:52:40] [PASSED] DG2 G12 A1
[11:52:40] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:52:40] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[11:52:40] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[11:52:40] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[11:52:40] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[11:52:40] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[11:52:40] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[11:52:40] ==================== [PASSED] xe_wa_gt =====================
[11:52:40] ====================== [PASSED] xe_wa ======================
[11:52:40] ============================================================
[11:52:40] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[11:52:40] Elapsed time: 42.807s total, 4.383s configuring, 37.757s building, 0.610s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[11:52:40] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:52:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[11:53:10] Starting KUnit Kernel (1/1)...
[11:53:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:53:10] ============ drm_test_pick_cmdline (2 subtests) ============
[11:53:10] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[11:53:10] =============== drm_test_pick_cmdline_named ===============
[11:53:10] [PASSED] NTSC
[11:53:10] [PASSED] NTSC-J
[11:53:10] [PASSED] PAL
[11:53:10] [PASSED] PAL-M
[11:53:10] =========== [PASSED] drm_test_pick_cmdline_named ===========
[11:53:10] ============== [PASSED] drm_test_pick_cmdline ==============
[11:53:10] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[11:53:10] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[11:53:10] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[11:53:10] =========== drm_validate_clone_mode (2 subtests) ===========
[11:53:10] ============== drm_test_check_in_clone_mode ===============
[11:53:10] [PASSED] in_clone_mode
[11:53:10] [PASSED] not_in_clone_mode
[11:53:10] ========== [PASSED] drm_test_check_in_clone_mode ===========
[11:53:10] =============== drm_test_check_valid_clones ===============
[11:53:10] [PASSED] not_in_clone_mode
[11:53:10] [PASSED] valid_clone
[11:53:10] [PASSED] invalid_clone
[11:53:10] =========== [PASSED] drm_test_check_valid_clones ===========
[11:53:10] ============= [PASSED] drm_validate_clone_mode =============
[11:53:10] ============= drm_validate_modeset (1 subtest) =============
[11:53:10] [PASSED] drm_test_check_connector_changed_modeset
[11:53:10] ============== [PASSED] drm_validate_modeset ===============
[11:53:10] ====== drm_test_bridge_get_current_state (2 subtests) ======
[11:53:10] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[11:53:10] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[11:53:10] ======== [PASSED] drm_test_bridge_get_current_state ========
[11:53:10] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[11:53:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[11:53:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[11:53:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[11:53:10] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[11:53:10] ============== drm_bridge_alloc (2 subtests) ===============
[11:53:10] [PASSED] drm_test_drm_bridge_alloc_basic
[11:53:10] [PASSED] drm_test_drm_bridge_alloc_get_put
[11:53:10] ================ [PASSED] drm_bridge_alloc =================
[11:53:10] ============= drm_cmdline_parser (40 subtests) =============
[11:53:10] [PASSED] drm_test_cmdline_force_d_only
[11:53:10] [PASSED] drm_test_cmdline_force_D_only_dvi
[11:53:10] [PASSED] drm_test_cmdline_force_D_only_hdmi
[11:53:10] [PASSED] drm_test_cmdline_force_D_only_not_digital
[11:53:10] [PASSED] drm_test_cmdline_force_e_only
[11:53:10] [PASSED] drm_test_cmdline_res
[11:53:10] [PASSED] drm_test_cmdline_res_vesa
[11:53:10] [PASSED] drm_test_cmdline_res_vesa_rblank
[11:53:10] [PASSED] drm_test_cmdline_res_rblank
[11:53:10] [PASSED] drm_test_cmdline_res_bpp
[11:53:10] [PASSED] drm_test_cmdline_res_refresh
[11:53:10] [PASSED] drm_test_cmdline_res_bpp_refresh
[11:53:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[11:53:10] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[11:53:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[11:53:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[11:53:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[11:53:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[11:53:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[11:53:10] [PASSED] drm_test_cmdline_res_margins_force_on
[11:53:10] [PASSED] drm_test_cmdline_res_vesa_margins
[11:53:10] [PASSED] drm_test_cmdline_name
[11:53:10] [PASSED] drm_test_cmdline_name_bpp
[11:53:10] [PASSED] drm_test_cmdline_name_option
[11:53:10] [PASSED] drm_test_cmdline_name_bpp_option
[11:53:10] [PASSED] drm_test_cmdline_rotate_0
[11:53:10] [PASSED] drm_test_cmdline_rotate_90
[11:53:10] [PASSED] drm_test_cmdline_rotate_180
[11:53:10] [PASSED] drm_test_cmdline_rotate_270
[11:53:10] [PASSED] drm_test_cmdline_hmirror
[11:53:10] [PASSED] drm_test_cmdline_vmirror
[11:53:10] [PASSED] drm_test_cmdline_margin_options
[11:53:10] [PASSED] drm_test_cmdline_multiple_options
[11:53:10] [PASSED] drm_test_cmdline_bpp_extra_and_option
[11:53:10] [PASSED] drm_test_cmdline_extra_and_option
[11:53:10] [PASSED] drm_test_cmdline_freestanding_options
[11:53:10] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[11:53:10] [PASSED] drm_test_cmdline_panel_orientation
[11:53:10] ================ drm_test_cmdline_invalid =================
[11:53:10] [PASSED] margin_only
[11:53:10] [PASSED] interlace_only
[11:53:10] [PASSED] res_missing_x
[11:53:10] [PASSED] res_missing_y
[11:53:10] [PASSED] res_bad_y
[11:53:10] [PASSED] res_missing_y_bpp
[11:53:10] [PASSED] res_bad_bpp
[11:53:10] [PASSED] res_bad_refresh
[11:53:10] [PASSED] res_bpp_refresh_force_on_off
[11:53:10] [PASSED] res_invalid_mode
[11:53:10] [PASSED] res_bpp_wrong_place_mode
[11:53:10] [PASSED] name_bpp_refresh
[11:53:10] [PASSED] name_refresh
[11:53:10] [PASSED] name_refresh_wrong_mode
[11:53:10] [PASSED] name_refresh_invalid_mode
[11:53:10] [PASSED] rotate_multiple
[11:53:10] [PASSED] rotate_invalid_val
[11:53:10] [PASSED] rotate_truncated
[11:53:10] [PASSED] invalid_option
[11:53:10] [PASSED] invalid_tv_option
[11:53:10] [PASSED] truncated_tv_option
[11:53:10] ============ [PASSED] drm_test_cmdline_invalid =============
[11:53:10] =============== drm_test_cmdline_tv_options ===============
[11:53:10] [PASSED] NTSC
[11:53:10] [PASSED] NTSC_443
[11:53:10] [PASSED] NTSC_J
[11:53:10] [PASSED] PAL
[11:53:10] [PASSED] PAL_M
[11:53:10] [PASSED] PAL_N
[11:53:10] [PASSED] SECAM
[11:53:10] [PASSED] MONO_525
[11:53:10] [PASSED] MONO_625
[11:53:10] =========== [PASSED] drm_test_cmdline_tv_options ===========
[11:53:10] =============== [PASSED] drm_cmdline_parser ================
[11:53:10] ========== drmm_connector_hdmi_init (20 subtests) ==========
[11:53:10] [PASSED] drm_test_connector_hdmi_init_valid
[11:53:10] [PASSED] drm_test_connector_hdmi_init_bpc_8
[11:53:10] [PASSED] drm_test_connector_hdmi_init_bpc_10
[11:53:10] [PASSED] drm_test_connector_hdmi_init_bpc_12
[11:53:10] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[11:53:10] [PASSED] drm_test_connector_hdmi_init_bpc_null
[11:53:10] [PASSED] drm_test_connector_hdmi_init_formats_empty
[11:53:10] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[11:53:10] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:53:10] [PASSED] supported_formats=0x9 yuv420_allowed=1
[11:53:10] [PASSED] supported_formats=0x9 yuv420_allowed=0
[11:53:10] [PASSED] supported_formats=0x5 yuv420_allowed=1
[11:53:10] [PASSED] supported_formats=0x5 yuv420_allowed=0
[11:53:10] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[11:53:10] [PASSED] drm_test_connector_hdmi_init_null_ddc
[11:53:10] [PASSED] drm_test_connector_hdmi_init_null_product
[11:53:10] [PASSED] drm_test_connector_hdmi_init_null_vendor
[11:53:10] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[11:53:10] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[11:53:10] [PASSED] drm_test_connector_hdmi_init_product_valid
[11:53:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[11:53:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[11:53:10] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[11:53:10] ========= drm_test_connector_hdmi_init_type_valid =========
[11:53:10] [PASSED] HDMI-A
[11:53:10] [PASSED] HDMI-B
[11:53:10] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[11:53:10] ======== drm_test_connector_hdmi_init_type_invalid ========
[11:53:10] [PASSED] Unknown
[11:53:10] [PASSED] VGA
[11:53:10] [PASSED] DVI-I
[11:53:10] [PASSED] DVI-D
[11:53:10] [PASSED] DVI-A
[11:53:10] [PASSED] Composite
[11:53:10] [PASSED] SVIDEO
[11:53:10] [PASSED] LVDS
[11:53:10] [PASSED] Component
[11:53:10] [PASSED] DIN
[11:53:10] [PASSED] DP
[11:53:10] [PASSED] TV
[11:53:10] [PASSED] eDP
[11:53:10] [PASSED] Virtual
[11:53:10] [PASSED] DSI
[11:53:10] [PASSED] DPI
[11:53:10] [PASSED] Writeback
[11:53:10] [PASSED] SPI
[11:53:10] [PASSED] USB
[11:53:10] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[11:53:10] ============ [PASSED] drmm_connector_hdmi_init =============
[11:53:10] ============= drmm_connector_init (3 subtests) =============
[11:53:10] [PASSED] drm_test_drmm_connector_init
[11:53:10] [PASSED] drm_test_drmm_connector_init_null_ddc
[11:53:10] ========= drm_test_drmm_connector_init_type_valid =========
[11:53:10] [PASSED] Unknown
[11:53:10] [PASSED] VGA
[11:53:10] [PASSED] DVI-I
[11:53:10] [PASSED] DVI-D
[11:53:10] [PASSED] DVI-A
[11:53:10] [PASSED] Composite
[11:53:10] [PASSED] SVIDEO
[11:53:10] [PASSED] LVDS
[11:53:10] [PASSED] Component
[11:53:10] [PASSED] DIN
[11:53:10] [PASSED] DP
[11:53:10] [PASSED] HDMI-A
[11:53:10] [PASSED] HDMI-B
[11:53:10] [PASSED] TV
[11:53:10] [PASSED] eDP
[11:53:10] [PASSED] Virtual
[11:53:10] [PASSED] DSI
[11:53:10] [PASSED] DPI
[11:53:10] [PASSED] Writeback
[11:53:10] [PASSED] SPI
[11:53:10] [PASSED] USB
[11:53:10] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[11:53:10] =============== [PASSED] drmm_connector_init ===============
[11:53:10] ========= drm_connector_dynamic_init (6 subtests) ==========
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_init
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_init_properties
[11:53:10] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[11:53:10] [PASSED] Unknown
[11:53:10] [PASSED] VGA
[11:53:10] [PASSED] DVI-I
[11:53:10] [PASSED] DVI-D
[11:53:10] [PASSED] DVI-A
[11:53:10] [PASSED] Composite
[11:53:10] [PASSED] SVIDEO
[11:53:10] [PASSED] LVDS
[11:53:10] [PASSED] Component
[11:53:10] [PASSED] DIN
[11:53:10] [PASSED] DP
[11:53:10] [PASSED] HDMI-A
[11:53:10] [PASSED] HDMI-B
[11:53:10] [PASSED] TV
[11:53:10] [PASSED] eDP
[11:53:10] [PASSED] Virtual
[11:53:10] [PASSED] DSI
[11:53:10] [PASSED] DPI
[11:53:10] [PASSED] Writeback
[11:53:10] [PASSED] SPI
[11:53:10] [PASSED] USB
[11:53:10] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[11:53:10] ======== drm_test_drm_connector_dynamic_init_name =========
[11:53:10] [PASSED] Unknown
[11:53:10] [PASSED] VGA
[11:53:10] [PASSED] DVI-I
[11:53:10] [PASSED] DVI-D
[11:53:10] [PASSED] DVI-A
[11:53:10] [PASSED] Composite
[11:53:10] [PASSED] SVIDEO
[11:53:10] [PASSED] LVDS
[11:53:10] [PASSED] Component
[11:53:10] [PASSED] DIN
[11:53:10] [PASSED] DP
[11:53:10] [PASSED] HDMI-A
[11:53:10] [PASSED] HDMI-B
[11:53:10] [PASSED] TV
[11:53:10] [PASSED] eDP
[11:53:10] [PASSED] Virtual
[11:53:10] [PASSED] DSI
[11:53:10] [PASSED] DPI
[11:53:10] [PASSED] Writeback
[11:53:10] [PASSED] SPI
[11:53:10] [PASSED] USB
[11:53:10] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[11:53:10] =========== [PASSED] drm_connector_dynamic_init ============
[11:53:10] ==== drm_connector_dynamic_register_early (4 subtests) =====
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[11:53:10] ====== [PASSED] drm_connector_dynamic_register_early =======
[11:53:10] ======= drm_connector_dynamic_register (7 subtests) ========
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[11:53:10] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[11:53:10] ========= [PASSED] drm_connector_dynamic_register ==========
[11:53:10] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[11:53:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[11:53:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[11:53:10] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[11:53:10] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[11:53:10] ========== drm_test_get_tv_mode_from_name_valid ===========
[11:53:10] [PASSED] NTSC
[11:53:10] [PASSED] NTSC-443
[11:53:10] [PASSED] NTSC-J
[11:53:10] [PASSED] PAL
[11:53:10] [PASSED] PAL-M
[11:53:10] [PASSED] PAL-N
[11:53:10] [PASSED] SECAM
[11:53:10] [PASSED] Mono
[11:53:10] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[11:53:10] [PASSED] drm_test_get_tv_mode_from_name_truncated
[11:53:10] ============ [PASSED] drm_get_tv_mode_from_name ============
[11:53:10] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[11:53:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[11:53:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[11:53:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[11:53:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[11:53:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[11:53:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[11:53:10] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[11:53:10] [PASSED] VIC 96
[11:53:10] [PASSED] VIC 97
[11:53:10] [PASSED] VIC 101
[11:53:10] [PASSED] VIC 102
[11:53:10] [PASSED] VIC 106
[11:53:10] [PASSED] VIC 107
[11:53:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[11:53:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[11:53:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[11:53:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[11:53:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[11:53:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[11:53:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[11:53:10] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[11:53:10] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[11:53:10] [PASSED] Automatic
[11:53:10] [PASSED] Full
[11:53:10] [PASSED] Limited 16:235
[11:53:10] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[11:53:10] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[11:53:10] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[11:53:10] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[11:53:10] === drm_test_drm_hdmi_connector_get_output_format_name ====
[11:53:10] [PASSED] RGB
[11:53:10] [PASSED] YUV 4:2:0
[11:53:10] [PASSED] YUV 4:2:2
[11:53:10] [PASSED] YUV 4:4:4
[11:53:10] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[11:53:10] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[11:53:10] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[11:53:10] ============= drm_damage_helper (21 subtests) ==============
[11:53:10] [PASSED] drm_test_damage_iter_no_damage
[11:53:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[11:53:10] [PASSED] drm_test_damage_iter_no_damage_src_moved
[11:53:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[11:53:10] [PASSED] drm_test_damage_iter_no_damage_not_visible
[11:53:10] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[11:53:10] [PASSED] drm_test_damage_iter_no_damage_no_fb
[11:53:10] [PASSED] drm_test_damage_iter_simple_damage
[11:53:10] [PASSED] drm_test_damage_iter_single_damage
[11:53:10] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[11:53:10] [PASSED] drm_test_damage_iter_single_damage_outside_src
[11:53:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[11:53:10] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[11:53:10] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[11:53:10] [PASSED] drm_test_damage_iter_single_damage_src_moved
[11:53:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[11:53:10] [PASSED] drm_test_damage_iter_damage
[11:53:10] [PASSED] drm_test_damage_iter_damage_one_intersect
[11:53:10] [PASSED] drm_test_damage_iter_damage_one_outside
[11:53:10] [PASSED] drm_test_damage_iter_damage_src_moved
[11:53:10] [PASSED] drm_test_damage_iter_damage_not_visible
[11:53:10] ================ [PASSED] drm_damage_helper ================
[11:53:10] ============== drm_dp_mst_helper (3 subtests) ==============
[11:53:10] ============== drm_test_dp_mst_calc_pbn_mode ==============
[11:53:10] [PASSED] Clock 154000 BPP 30 DSC disabled
[11:53:10] [PASSED] Clock 234000 BPP 30 DSC disabled
[11:53:10] [PASSED] Clock 297000 BPP 24 DSC disabled
[11:53:10] [PASSED] Clock 332880 BPP 24 DSC enabled
[11:53:10] [PASSED] Clock 324540 BPP 24 DSC enabled
[11:53:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[11:53:10] ============== drm_test_dp_mst_calc_pbn_div ===============
[11:53:10] [PASSED] Link rate 2000000 lane count 4
[11:53:10] [PASSED] Link rate 2000000 lane count 2
[11:53:10] [PASSED] Link rate 2000000 lane count 1
[11:53:10] [PASSED] Link rate 1350000 lane count 4
[11:53:10] [PASSED] Link rate 1350000 lane count 2
[11:53:10] [PASSED] Link rate 1350000 lane count 1
[11:53:10] [PASSED] Link rate 1000000 lane count 4
[11:53:10] [PASSED] Link rate 1000000 lane count 2
[11:53:10] [PASSED] Link rate 1000000 lane count 1
[11:53:10] [PASSED] Link rate 810000 lane count 4
[11:53:10] [PASSED] Link rate 810000 lane count 2
[11:53:10] [PASSED] Link rate 810000 lane count 1
[11:53:10] [PASSED] Link rate 540000 lane count 4
[11:53:10] [PASSED] Link rate 540000 lane count 2
[11:53:10] [PASSED] Link rate 540000 lane count 1
[11:53:10] [PASSED] Link rate 270000 lane count 4
[11:53:10] [PASSED] Link rate 270000 lane count 2
[11:53:10] [PASSED] Link rate 270000 lane count 1
[11:53:10] [PASSED] Link rate 162000 lane count 4
[11:53:10] [PASSED] Link rate 162000 lane count 2
[11:53:10] [PASSED] Link rate 162000 lane count 1
[11:53:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[11:53:10] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[11:53:10] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[11:53:10] [PASSED] DP_POWER_UP_PHY with port number
[11:53:10] [PASSED] DP_POWER_DOWN_PHY with port number
[11:53:10] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[11:53:10] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[11:53:10] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[11:53:10] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[11:53:10] [PASSED] DP_QUERY_PAYLOAD with port number
[11:53:10] [PASSED] DP_QUERY_PAYLOAD with VCPI
[11:53:10] [PASSED] DP_REMOTE_DPCD_READ with port number
[11:53:10] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[11:53:10] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[11:53:10] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[11:53:10] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[11:53:10] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[11:53:10] [PASSED] DP_REMOTE_I2C_READ with port number
[11:53:10] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[11:53:10] [PASSED] DP_REMOTE_I2C_READ with transactions array
[11:53:10] [PASSED] DP_REMOTE_I2C_WRITE with port number
[11:53:10] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[11:53:10] [PASSED] DP_REMOTE_I2C_WRITE with data array
[11:53:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[11:53:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[11:53:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[11:53:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[11:53:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[11:53:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[11:53:10] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[11:53:10] ================ [PASSED] drm_dp_mst_helper ================
[11:53:10] ================== drm_exec (7 subtests) ===================
[11:53:10] [PASSED] sanitycheck
[11:53:10] [PASSED] test_lock
[11:53:10] [PASSED] test_lock_unlock
[11:53:10] [PASSED] test_duplicates
[11:53:10] [PASSED] test_prepare
[11:53:10] [PASSED] test_prepare_array
[11:53:10] [PASSED] test_multiple_loops
[11:53:10] ==================== [PASSED] drm_exec =====================
[11:53:10] =========== drm_format_helper_test (17 subtests) ===========
[11:53:10] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[11:53:10] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[11:53:10] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[11:53:10] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[11:53:10] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[11:53:10] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[11:53:10] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[11:53:10] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[11:53:10] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[11:53:10] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[11:53:10] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[11:53:10] ============== drm_test_fb_xrgb8888_to_mono ===============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[11:53:10] ==================== drm_test_fb_swab =====================
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ================ [PASSED] drm_test_fb_swab =================
[11:53:10] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[11:53:10] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[11:53:10] [PASSED] single_pixel_source_buffer
[11:53:10] [PASSED] single_pixel_clip_rectangle
[11:53:10] [PASSED] well_known_colors
[11:53:10] [PASSED] destination_pitch
[11:53:10] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[11:53:10] ================= drm_test_fb_clip_offset =================
[11:53:10] [PASSED] pass through
[11:53:10] [PASSED] horizontal offset
[11:53:10] [PASSED] vertical offset
[11:53:10] [PASSED] horizontal and vertical offset
[11:53:10] [PASSED] horizontal offset (custom pitch)
[11:53:10] [PASSED] vertical offset (custom pitch)
[11:53:10] [PASSED] horizontal and vertical offset (custom pitch)
[11:53:10] ============= [PASSED] drm_test_fb_clip_offset =============
[11:53:10] =================== drm_test_fb_memcpy ====================
[11:53:10] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[11:53:10] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[11:53:10] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[11:53:10] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[11:53:10] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[11:53:10] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[11:53:10] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[11:53:10] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[11:53:10] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[11:53:10] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[11:53:10] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[11:53:10] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[11:53:10] =============== [PASSED] drm_test_fb_memcpy ================
[11:53:10] ============= [PASSED] drm_format_helper_test ==============
[11:53:10] ================= drm_format (18 subtests) =================
[11:53:10] [PASSED] drm_test_format_block_width_invalid
[11:53:10] [PASSED] drm_test_format_block_width_one_plane
[11:53:10] [PASSED] drm_test_format_block_width_two_plane
[11:53:10] [PASSED] drm_test_format_block_width_three_plane
[11:53:10] [PASSED] drm_test_format_block_width_tiled
[11:53:10] [PASSED] drm_test_format_block_height_invalid
[11:53:10] [PASSED] drm_test_format_block_height_one_plane
[11:53:10] [PASSED] drm_test_format_block_height_two_plane
[11:53:10] [PASSED] drm_test_format_block_height_three_plane
[11:53:10] [PASSED] drm_test_format_block_height_tiled
[11:53:10] [PASSED] drm_test_format_min_pitch_invalid
[11:53:10] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[11:53:10] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[11:53:10] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[11:53:10] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[11:53:10] [PASSED] drm_test_format_min_pitch_two_plane
[11:53:10] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[11:53:10] [PASSED] drm_test_format_min_pitch_tiled
[11:53:10] =================== [PASSED] drm_format ====================
[11:53:10] ============== drm_framebuffer (10 subtests) ===============
[11:53:10] ========== drm_test_framebuffer_check_src_coords ==========
[11:53:10] [PASSED] Success: source fits into fb
[11:53:10] [PASSED] Fail: overflowing fb with x-axis coordinate
[11:53:10] [PASSED] Fail: overflowing fb with y-axis coordinate
[11:53:10] [PASSED] Fail: overflowing fb with source width
[11:53:10] [PASSED] Fail: overflowing fb with source height
[11:53:10] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[11:53:10] [PASSED] drm_test_framebuffer_cleanup
[11:53:10] =============== drm_test_framebuffer_create ===============
[11:53:10] [PASSED] ABGR8888 normal sizes
[11:53:10] [PASSED] ABGR8888 max sizes
[11:53:10] [PASSED] ABGR8888 pitch greater than min required
[11:53:10] [PASSED] ABGR8888 pitch less than min required
[11:53:10] [PASSED] ABGR8888 Invalid width
[11:53:10] [PASSED] ABGR8888 Invalid buffer handle
[11:53:10] [PASSED] No pixel format
[11:53:10] [PASSED] ABGR8888 Width 0
[11:53:10] [PASSED] ABGR8888 Height 0
[11:53:10] [PASSED] ABGR8888 Out of bound height * pitch combination
[11:53:10] [PASSED] ABGR8888 Large buffer offset
[11:53:10] [PASSED] ABGR8888 Buffer offset for inexistent plane
[11:53:10] [PASSED] ABGR8888 Invalid flag
[11:53:10] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[11:53:10] [PASSED] ABGR8888 Valid buffer modifier
[11:53:10] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[11:53:10] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[11:53:10] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[11:53:10] [PASSED] NV12 Normal sizes
[11:53:10] [PASSED] NV12 Max sizes
[11:53:10] [PASSED] NV12 Invalid pitch
[11:53:10] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[11:53:10] [PASSED] NV12 different modifier per-plane
[11:53:10] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[11:53:10] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[11:53:10] [PASSED] NV12 Modifier for inexistent plane
[11:53:10] [PASSED] NV12 Handle for inexistent plane
[11:53:10] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[11:53:10] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[11:53:10] [PASSED] YVU420 Normal sizes
[11:53:10] [PASSED] YVU420 Max sizes
[11:53:10] [PASSED] YVU420 Invalid pitch
[11:53:10] [PASSED] YVU420 Different pitches
[11:53:10] [PASSED] YVU420 Different buffer offsets/pitches
[11:53:10] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[11:53:10] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[11:53:10] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[11:53:10] [PASSED] YVU420 Valid modifier
[11:53:10] [PASSED] YVU420 Different modifiers per plane
[11:53:10] [PASSED] YVU420 Modifier for inexistent plane
[11:53:10] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[11:53:10] [PASSED] X0L2 Normal sizes
[11:53:10] [PASSED] X0L2 Max sizes
[11:53:10] [PASSED] X0L2 Invalid pitch
[11:53:10] [PASSED] X0L2 Pitch greater than minimum required
[11:53:10] [PASSED] X0L2 Handle for inexistent plane
[11:53:10] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[11:53:10] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[11:53:10] [PASSED] X0L2 Valid modifier
[11:53:10] [PASSED] X0L2 Modifier for inexistent plane
[11:53:10] =========== [PASSED] drm_test_framebuffer_create ===========
[11:53:10] [PASSED] drm_test_framebuffer_free
[11:53:10] [PASSED] drm_test_framebuffer_init
[11:53:10] [PASSED] drm_test_framebuffer_init_bad_format
[11:53:10] [PASSED] drm_test_framebuffer_init_dev_mismatch
[11:53:10] [PASSED] drm_test_framebuffer_lookup
[11:53:10] [PASSED] drm_test_framebuffer_lookup_inexistent
[11:53:10] [PASSED] drm_test_framebuffer_modifiers_not_supported
[11:53:10] ================= [PASSED] drm_framebuffer =================
[11:53:10] ================ drm_gem_shmem (8 subtests) ================
[11:53:10] [PASSED] drm_gem_shmem_test_obj_create
[11:53:10] [PASSED] drm_gem_shmem_test_obj_create_private
[11:53:10] [PASSED] drm_gem_shmem_test_pin_pages
[11:53:10] [PASSED] drm_gem_shmem_test_vmap
[11:53:10] [PASSED] drm_gem_shmem_test_get_sg_table
[11:53:10] [PASSED] drm_gem_shmem_test_get_pages_sgt
[11:53:10] [PASSED] drm_gem_shmem_test_madvise
[11:53:10] [PASSED] drm_gem_shmem_test_purge
[11:53:10] ================== [PASSED] drm_gem_shmem ==================
[11:53:10] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[11:53:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[11:53:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[11:53:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[11:53:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[11:53:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[11:53:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[11:53:10] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[11:53:10] [PASSED] Automatic
[11:53:10] [PASSED] Full
[11:53:10] [PASSED] Limited 16:235
[11:53:10] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[11:53:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[11:53:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[11:53:10] [PASSED] drm_test_check_disable_connector
[11:53:10] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[11:53:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[11:53:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[11:53:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[11:53:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[11:53:10] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[11:53:10] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[11:53:10] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[11:53:10] [PASSED] drm_test_check_output_bpc_dvi
[11:53:10] [PASSED] drm_test_check_output_bpc_format_vic_1
[11:53:10] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[11:53:10] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[11:53:10] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[11:53:10] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[11:53:10] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[11:53:10] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[11:53:10] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[11:53:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[11:53:10] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[11:53:10] [PASSED] drm_test_check_broadcast_rgb_value
[11:53:10] [PASSED] drm_test_check_bpc_8_value
[11:53:10] [PASSED] drm_test_check_bpc_10_value
[11:53:10] [PASSED] drm_test_check_bpc_12_value
[11:53:10] [PASSED] drm_test_check_format_value
[11:53:10] [PASSED] drm_test_check_tmds_char_value
[11:53:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[11:53:10] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[11:53:10] [PASSED] drm_test_check_mode_valid
[11:53:10] [PASSED] drm_test_check_mode_valid_reject
[11:53:10] [PASSED] drm_test_check_mode_valid_reject_rate
[11:53:10] [PASSED] drm_test_check_mode_valid_reject_max_clock
[11:53:10] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[11:53:10] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[11:53:10] [PASSED] drm_test_check_infoframes
[11:53:10] [PASSED] drm_test_check_reject_avi_infoframe
[11:53:10] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[11:53:10] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[11:53:10] [PASSED] drm_test_check_reject_audio_infoframe
[11:53:10] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[11:53:10] ================= drm_managed (2 subtests) =================
[11:53:10] [PASSED] drm_test_managed_release_action
[11:53:10] [PASSED] drm_test_managed_run_action
[11:53:10] =================== [PASSED] drm_managed ===================
[11:53:10] =================== drm_mm (6 subtests) ====================
[11:53:10] [PASSED] drm_test_mm_init
[11:53:10] [PASSED] drm_test_mm_debug
[11:53:10] [PASSED] drm_test_mm_align32
[11:53:10] [PASSED] drm_test_mm_align64
[11:53:10] [PASSED] drm_test_mm_lowest
[11:53:10] [PASSED] drm_test_mm_highest
[11:53:10] ===================== [PASSED] drm_mm ======================
[11:53:10] ============= drm_modes_analog_tv (5 subtests) =============
[11:53:10] [PASSED] drm_test_modes_analog_tv_mono_576i
[11:53:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[11:53:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[11:53:10] [PASSED] drm_test_modes_analog_tv_pal_576i
[11:53:10] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[11:53:10] =============== [PASSED] drm_modes_analog_tv ===============
[11:53:10] ============== drm_plane_helper (2 subtests) ===============
[11:53:10] =============== drm_test_check_plane_state ================
[11:53:10] [PASSED] clipping_simple
[11:53:10] [PASSED] clipping_rotate_reflect
[11:53:10] [PASSED] positioning_simple
[11:53:10] [PASSED] upscaling
[11:53:10] [PASSED] downscaling
[11:53:10] [PASSED] rounding1
[11:53:10] [PASSED] rounding2
[11:53:10] [PASSED] rounding3
[11:53:10] [PASSED] rounding4
[11:53:10] =========== [PASSED] drm_test_check_plane_state ============
[11:53:10] =========== drm_test_check_invalid_plane_state ============
[11:53:10] [PASSED] positioning_invalid
[11:53:10] [PASSED] upscaling_invalid
[11:53:10] [PASSED] downscaling_invalid
[11:53:10] ======= [PASSED] drm_test_check_invalid_plane_state ========
[11:53:10] ================ [PASSED] drm_plane_helper =================
[11:53:10] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[11:53:10] ====== drm_test_connector_helper_tv_get_modes_check =======
[11:53:10] [PASSED] None
[11:53:10] [PASSED] PAL
[11:53:10] [PASSED] NTSC
[11:53:10] [PASSED] Both, NTSC Default
[11:53:10] [PASSED] Both, PAL Default
[11:53:10] [PASSED] Both, NTSC Default, with PAL on command-line
[11:53:10] [PASSED] Both, PAL Default, with NTSC on command-line
[11:53:10] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[11:53:10] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[11:53:10] ================== drm_rect (9 subtests) ===================
[11:53:10] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[11:53:10] [PASSED] drm_test_rect_clip_scaled_not_clipped
[11:53:10] [PASSED] drm_test_rect_clip_scaled_clipped
[11:53:10] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[11:53:10] ================= drm_test_rect_intersect =================
[11:53:10] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[11:53:10] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[11:53:10] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[11:53:10] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[11:53:10] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[11:53:10] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[11:53:10] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[11:53:10] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[11:53:10] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[11:53:10] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[11:53:10] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[11:53:10] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[11:53:10] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[11:53:10] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[11:53:10] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[11:53:10] ============= [PASSED] drm_test_rect_intersect =============
[11:53:10] ================ drm_test_rect_calc_hscale ================
[11:53:10] [PASSED] normal use
[11:53:10] [PASSED] out of max range
[11:53:10] [PASSED] out of min range
[11:53:10] [PASSED] zero dst
[11:53:10] [PASSED] negative src
[11:53:10] [PASSED] negative dst
[11:53:10] ============ [PASSED] drm_test_rect_calc_hscale ============
[11:53:10] ================ drm_test_rect_calc_vscale ================
[11:53:10] [PASSED] normal use
[11:53:10] [PASSED] out of max range
[11:53:10] [PASSED] out of min range
[11:53:10] [PASSED] zero dst
[11:53:10] [PASSED] negative src
[11:53:10] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[11:53:10] ============ [PASSED] drm_test_rect_calc_vscale ============
[11:53:10] ================== drm_test_rect_rotate ===================
[11:53:10] [PASSED] reflect-x
[11:53:10] [PASSED] reflect-y
[11:53:10] [PASSED] rotate-0
[11:53:10] [PASSED] rotate-90
[11:53:10] [PASSED] rotate-180
[11:53:10] [PASSED] rotate-270
[11:53:10] ============== [PASSED] drm_test_rect_rotate ===============
[11:53:10] ================ drm_test_rect_rotate_inv =================
[11:53:10] [PASSED] reflect-x
[11:53:10] [PASSED] reflect-y
[11:53:10] [PASSED] rotate-0
[11:53:10] [PASSED] rotate-90
[11:53:10] [PASSED] rotate-180
[11:53:10] [PASSED] rotate-270
[11:53:10] ============ [PASSED] drm_test_rect_rotate_inv =============
[11:53:10] ==================== [PASSED] drm_rect =====================
[11:53:10] ============ drm_sysfb_modeset_test (1 subtest) ============
[11:53:10] ============ drm_test_sysfb_build_fourcc_list =============
[11:53:10] [PASSED] no native formats
[11:53:10] [PASSED] XRGB8888 as native format
[11:53:10] [PASSED] remove duplicates
[11:53:10] [PASSED] convert alpha formats
[11:53:10] [PASSED] random formats
[11:53:10] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[11:53:10] ============= [PASSED] drm_sysfb_modeset_test ==============
[11:53:10] ================== drm_fixp (2 subtests) ===================
[11:53:10] [PASSED] drm_test_int2fixp
[11:53:10] [PASSED] drm_test_sm2fixp
[11:53:10] ==================== [PASSED] drm_fixp =====================
[11:53:10] ============================================================
[11:53:10] Testing complete. Ran 621 tests: passed: 621
[11:53:11] Elapsed time: 30.862s total, 1.665s configuring, 28.980s building, 0.178s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[11:53:11] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[11:53:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[11:53:21] Starting KUnit Kernel (1/1)...
[11:53:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[11:53:22] ================= ttm_device (5 subtests) ==================
[11:53:22] [PASSED] ttm_device_init_basic
[11:53:22] [PASSED] ttm_device_init_multiple
[11:53:22] [PASSED] ttm_device_fini_basic
[11:53:22] [PASSED] ttm_device_init_no_vma_man
[11:53:22] ================== ttm_device_init_pools ==================
[11:53:22] [PASSED] No DMA allocations, no DMA32 required
[11:53:22] [PASSED] DMA allocations, DMA32 required
[11:53:22] [PASSED] No DMA allocations, DMA32 required
[11:53:22] [PASSED] DMA allocations, no DMA32 required
[11:53:22] ============== [PASSED] ttm_device_init_pools ==============
[11:53:22] =================== [PASSED] ttm_device ====================
[11:53:22] ================== ttm_pool (8 subtests) ===================
[11:53:22] ================== ttm_pool_alloc_basic ===================
[11:53:22] [PASSED] One page
[11:53:22] [PASSED] More than one page
[11:53:22] [PASSED] Above the allocation limit
[11:53:22] [PASSED] One page, with coherent DMA mappings enabled
[11:53:22] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:53:22] ============== [PASSED] ttm_pool_alloc_basic ===============
[11:53:22] ============== ttm_pool_alloc_basic_dma_addr ==============
[11:53:22] [PASSED] One page
[11:53:22] [PASSED] More than one page
[11:53:22] [PASSED] Above the allocation limit
[11:53:22] [PASSED] One page, with coherent DMA mappings enabled
[11:53:22] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[11:53:22] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[11:53:22] [PASSED] ttm_pool_alloc_order_caching_match
[11:53:22] [PASSED] ttm_pool_alloc_caching_mismatch
[11:53:22] [PASSED] ttm_pool_alloc_order_mismatch
[11:53:22] [PASSED] ttm_pool_free_dma_alloc
[11:53:22] [PASSED] ttm_pool_free_no_dma_alloc
[11:53:22] [PASSED] ttm_pool_fini_basic
[11:53:22] ==================== [PASSED] ttm_pool =====================
[11:53:22] ================ ttm_resource (8 subtests) =================
[11:53:22] ================= ttm_resource_init_basic =================
[11:53:22] [PASSED] Init resource in TTM_PL_SYSTEM
[11:53:22] [PASSED] Init resource in TTM_PL_VRAM
[11:53:22] [PASSED] Init resource in a private placement
[11:53:22] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[11:53:22] ============= [PASSED] ttm_resource_init_basic =============
[11:53:22] [PASSED] ttm_resource_init_pinned
[11:53:22] [PASSED] ttm_resource_fini_basic
[11:53:22] [PASSED] ttm_resource_manager_init_basic
[11:53:22] [PASSED] ttm_resource_manager_usage_basic
[11:53:22] [PASSED] ttm_resource_manager_set_used_basic
[11:53:22] [PASSED] ttm_sys_man_alloc_basic
[11:53:22] [PASSED] ttm_sys_man_free_basic
[11:53:22] ================== [PASSED] ttm_resource ===================
[11:53:22] =================== ttm_tt (15 subtests) ===================
[11:53:22] ==================== ttm_tt_init_basic ====================
[11:53:22] [PASSED] Page-aligned size
[11:53:22] [PASSED] Extra pages requested
[11:53:22] ================ [PASSED] ttm_tt_init_basic ================
[11:53:22] [PASSED] ttm_tt_init_misaligned
[11:53:22] [PASSED] ttm_tt_fini_basic
[11:53:22] [PASSED] ttm_tt_fini_sg
[11:53:22] [PASSED] ttm_tt_fini_shmem
[11:53:22] [PASSED] ttm_tt_create_basic
[11:53:22] [PASSED] ttm_tt_create_invalid_bo_type
[11:53:22] [PASSED] ttm_tt_create_ttm_exists
[11:53:22] [PASSED] ttm_tt_create_failed
[11:53:22] [PASSED] ttm_tt_destroy_basic
[11:53:22] [PASSED] ttm_tt_populate_null_ttm
[11:53:22] [PASSED] ttm_tt_populate_populated_ttm
[11:53:22] [PASSED] ttm_tt_unpopulate_basic
[11:53:22] [PASSED] ttm_tt_unpopulate_empty_ttm
[11:53:22] [PASSED] ttm_tt_swapin_basic
[11:53:22] ===================== [PASSED] ttm_tt ======================
[11:53:22] =================== ttm_bo (14 subtests) ===================
[11:53:22] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[11:53:22] [PASSED] Cannot be interrupted and sleeps
[11:53:22] [PASSED] Cannot be interrupted, locks straight away
[11:53:22] [PASSED] Can be interrupted, sleeps
[11:53:22] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[11:53:22] [PASSED] ttm_bo_reserve_locked_no_sleep
[11:53:22] [PASSED] ttm_bo_reserve_no_wait_ticket
[11:53:22] [PASSED] ttm_bo_reserve_double_resv
[11:53:22] [PASSED] ttm_bo_reserve_interrupted
[11:53:22] [PASSED] ttm_bo_reserve_deadlock
[11:53:22] [PASSED] ttm_bo_unreserve_basic
[11:53:22] [PASSED] ttm_bo_unreserve_pinned
[11:53:22] [PASSED] ttm_bo_unreserve_bulk
[11:53:22] [PASSED] ttm_bo_fini_basic
[11:53:22] [PASSED] ttm_bo_fini_shared_resv
[11:53:22] [PASSED] ttm_bo_pin_basic
[11:53:22] [PASSED] ttm_bo_pin_unpin_resource
[11:53:22] [PASSED] ttm_bo_multiple_pin_one_unpin
[11:53:22] ===================== [PASSED] ttm_bo ======================
[11:53:22] ============== ttm_bo_validate (22 subtests) ===============
[11:53:22] ============== ttm_bo_init_reserved_sys_man ===============
[11:53:22] [PASSED] Buffer object for userspace
[11:53:22] [PASSED] Kernel buffer object
[11:53:22] [PASSED] Shared buffer object
[11:53:22] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[11:53:22] ============== ttm_bo_init_reserved_mock_man ==============
[11:53:22] [PASSED] Buffer object for userspace
[11:53:22] [PASSED] Kernel buffer object
[11:53:22] [PASSED] Shared buffer object
[11:53:22] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[11:53:22] [PASSED] ttm_bo_init_reserved_resv
[11:53:22] ================== ttm_bo_validate_basic ==================
[11:53:22] [PASSED] Buffer object for userspace
[11:53:22] [PASSED] Kernel buffer object
[11:53:22] [PASSED] Shared buffer object
[11:53:22] ============== [PASSED] ttm_bo_validate_basic ==============
[11:53:22] [PASSED] ttm_bo_validate_invalid_placement
[11:53:22] ============= ttm_bo_validate_same_placement ==============
[11:53:22] [PASSED] System manager
[11:53:22] [PASSED] VRAM manager
[11:53:22] ========= [PASSED] ttm_bo_validate_same_placement ==========
[11:53:22] [PASSED] ttm_bo_validate_failed_alloc
[11:53:22] [PASSED] ttm_bo_validate_pinned
[11:53:22] [PASSED] ttm_bo_validate_busy_placement
[11:53:22] ================ ttm_bo_validate_multihop =================
[11:53:22] [PASSED] Buffer object for userspace
[11:53:22] [PASSED] Kernel buffer object
[11:53:22] [PASSED] Shared buffer object
[11:53:22] ============ [PASSED] ttm_bo_validate_multihop =============
[11:53:22] ========== ttm_bo_validate_no_placement_signaled ==========
[11:53:22] [PASSED] Buffer object in system domain, no page vector
[11:53:22] [PASSED] Buffer object in system domain with an existing page vector
[11:53:22] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[11:53:22] ======== ttm_bo_validate_no_placement_not_signaled ========
[11:53:22] [PASSED] Buffer object for userspace
[11:53:22] [PASSED] Kernel buffer object
[11:53:22] [PASSED] Shared buffer object
[11:53:22] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[11:53:22] [PASSED] ttm_bo_validate_move_fence_signaled
[11:53:22] ========= ttm_bo_validate_move_fence_not_signaled =========
[11:53:22] [PASSED] Waits for GPU
[11:53:22] [PASSED] Tries to lock straight away
[11:53:22] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[11:53:22] [PASSED] ttm_bo_validate_swapout
[11:53:22] [PASSED] ttm_bo_validate_happy_evict
[11:53:22] [PASSED] ttm_bo_validate_all_pinned_evict
[11:53:22] [PASSED] ttm_bo_validate_allowed_only_evict
[11:53:22] [PASSED] ttm_bo_validate_deleted_evict
[11:53:22] [PASSED] ttm_bo_validate_busy_domain_evict
[11:53:22] [PASSED] ttm_bo_validate_evict_gutting
[11:53:22] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[11:53:22] ================= [PASSED] ttm_bo_validate =================
[11:53:22] ============================================================
[11:53:22] Testing complete. Ran 102 tests: passed: 102
[11:53:22] Elapsed time: 11.148s total, 1.651s configuring, 9.180s building, 0.287s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area
2026-03-27 11:45 [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area Jouni Högander
2026-03-27 11:51 ` ✗ CI.checkpatch: warning for " Patchwork
2026-03-27 11:53 ` ✓ CI.KUnit: success " Patchwork
@ 2026-03-27 11:55 ` Jani Nikula
2026-04-01 8:42 ` Kahola, Mika
` (4 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2026-03-27 11:55 UTC (permalink / raw)
To: Jouni Högander, intel-gfx, intel-xe; +Cc: Jouni Högander, stable
On Fri, 27 Mar 2026, Jouni Högander <jouni.hogander@intel.com> wrote:
> @@ -2866,6 +2867,9 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
> struct intel_plane_state *new_plane_state, *old_plane_state;
> struct intel_plane *plane;
> + struct drm_rect display_area = { .x1 = 0, .y1 = 0,
> + .x2 = crtc_state->hw.adjusted_mode.crtc_hdisplay,
> + .y2 = crtc_state->hw.adjusted_mode.crtc_vdisplay};
Nitpick, following the kernel style here actually improves clarity.
struct drm_rect display_area = {
.x1 = 0,
.y1 = 0,
.x2 = crtc_state->hw.adjusted_mode.crtc_hdisplay,
.y2 = crtc_state->hw.adjusted_mode.crtc_vdisplay,
};
BR,
Jani.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 10+ messages in thread* RE: [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area
2026-03-27 11:45 [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area Jouni Högander
` (2 preceding siblings ...)
2026-03-27 11:55 ` [PATCH] " Jani Nikula
@ 2026-04-01 8:42 ` Kahola, Mika
2026-04-02 6:11 ` Hogander, Jouni
2026-04-01 10:35 ` ✗ CI.checkpatch: warning for drm/i915/psr: Do not use pipe_src as borders for SU area (rev2) Patchwork
` (3 subsequent siblings)
7 siblings, 1 reply; 10+ messages in thread
From: Kahola, Mika @ 2026-04-01 8:42 UTC (permalink / raw)
To: Hogander, Jouni, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: Hogander, Jouni, stable@vger.kernel.org
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jouni Högander
> Sent: Friday, 27 March 2026 13.46
> To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Hogander, Jouni <jouni.hogander@intel.com>; stable@vger.kernel.org
> Subject: [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area
>
> This far using crtc_state->pipe_src as borders for Selective Update area haven't caused visible problems as
> drm_rect_width(crtc_state->pipe_src) == crtc_state->hw.adjusted_mode.crtc_hdisplay and
> drm_rect_height(crtc_state->pipe_src) == crtc_state->hw.adjusted_mode.crtc_vdisplay when pipe scaling is not used. On the
> other hand using pipe scaling is forcing full frame updates and all the Selective Update area calculations are skipped. Now this
> improper usage of crtc_state->pipe_src is causing following warnings:
>
> <4> [7771.978166] xe 0000:00:02.0: [drm] drm_WARN_ON_ONCE(su_lines % vdsc_cfg->slice_height)
>
> after WARN_ON_ONCE was added by commit:
>
> "drm/i915/dsc: Add helper for writing DSC Selective Update ET parameters"
>
> These warnings are seen when DSC and pipe scaling are enabled simultaneously. This is because on full frame update SU area
> is improperly set as pipe_src which is not aligned with DSC slice height.
>
> Fix these by creating local rectangle using crtc_state->hw.adjusted_mode.crtc_hdisplay and crtc_state-
> >hw.adjusted_mode.crtc_vdisplay. Use this local rectangle as borders for SU area.
>
> Fixes: d6774b8c3c58 ("drm/i915: Ensure damage clip area is within pipe area")
> Cc: <stable@vger.kernel.org> # v6.0+
With Jani's nit fixed this looks ok to me.
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 27 ++++++++++++++----------
> 1 file changed, 16 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 2f1b48cd8efd..33b2ae17274a 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2689,9 +2689,9 @@ static u32 psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,
>
> static void clip_area_update(struct drm_rect *overlap_damage_area,
> struct drm_rect *damage_area,
> - struct drm_rect *pipe_src)
> + struct drm_rect *display_area)
> {
> - if (!drm_rect_intersect(damage_area, pipe_src))
> + if (!drm_rect_intersect(damage_area, display_area))
> return;
>
> if (overlap_damage_area->y1 == -1) {
> @@ -2742,6 +2742,7 @@ static bool intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st static void
> intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
> struct intel_crtc *crtc,
> + struct drm_rect *display_area,
> bool *cursor_in_su_area)
> {
> struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); @@ -2769,7 +2770,7 @@
> intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
> continue;
>
> clip_area_update(&crtc_state->psr2_su_area, &new_plane_state->uapi.dst,
> - &crtc_state->pipe_src);
> + display_area);
> *cursor_in_su_area = true;
> }
> }
> @@ -2866,6 +2867,9 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
> struct intel_plane_state *new_plane_state, *old_plane_state;
> struct intel_plane *plane;
> + struct drm_rect display_area = { .x1 = 0, .y1 = 0,
> + .x2 = crtc_state->hw.adjusted_mode.crtc_hdisplay,
> + .y2 = crtc_state->hw.adjusted_mode.crtc_vdisplay};
> bool full_update = false, su_area_changed;
> int i, ret;
>
> @@ -2879,7 +2883,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
>
> crtc_state->psr2_su_area.x1 = 0;
> crtc_state->psr2_su_area.y1 = -1;
> - crtc_state->psr2_su_area.x2 = drm_rect_width(&crtc_state->pipe_src);
> + crtc_state->psr2_su_area.x2 = drm_rect_width(&display_area);
> crtc_state->psr2_su_area.y2 = -1;
>
> /*
> @@ -2917,14 +2921,14 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> damaged_area.y1 = old_plane_state->uapi.dst.y1;
> damaged_area.y2 = old_plane_state->uapi.dst.y2;
> clip_area_update(&crtc_state->psr2_su_area, &damaged_area,
> - &crtc_state->pipe_src);
> + &display_area);
> }
>
> if (new_plane_state->uapi.visible) {
> damaged_area.y1 = new_plane_state->uapi.dst.y1;
> damaged_area.y2 = new_plane_state->uapi.dst.y2;
> clip_area_update(&crtc_state->psr2_su_area, &damaged_area,
> - &crtc_state->pipe_src);
> + &display_area);
> }
> continue;
> } else if (new_plane_state->uapi.alpha != old_plane_state->uapi.alpha) { @@ -2932,7 +2936,7 @@ int
> intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> damaged_area.y1 = new_plane_state->uapi.dst.y1;
> damaged_area.y2 = new_plane_state->uapi.dst.y2;
> clip_area_update(&crtc_state->psr2_su_area, &damaged_area,
> - &crtc_state->pipe_src);
> + &display_area);
> continue;
> }
>
> @@ -2948,7 +2952,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> damaged_area.x1 += new_plane_state->uapi.dst.x1 - src.x1;
> damaged_area.x2 += new_plane_state->uapi.dst.x1 - src.x1;
>
> - clip_area_update(&crtc_state->psr2_su_area, &damaged_area, &crtc_state->pipe_src);
> + clip_area_update(&crtc_state->psr2_su_area, &damaged_area,
> +&display_area);
> }
>
> /*
> @@ -2983,7 +2987,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> * cursor is added into affected planes even when
> * cursor is not updated by itself.
> */
> - intel_psr2_sel_fetch_et_alignment(state, crtc, &cursor_in_su_area);
> + intel_psr2_sel_fetch_et_alignment(state, crtc, &display_area,
> + &cursor_in_su_area);
>
> su_area_changed = intel_psr2_sel_fetch_pipe_alignment(crtc_state);
>
> @@ -3059,8 +3064,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
>
> skip_sel_fetch_set_loop:
> if (full_update)
> - clip_area_update(&crtc_state->psr2_su_area, &crtc_state->pipe_src,
> - &crtc_state->pipe_src);
> + clip_area_update(&crtc_state->psr2_su_area, &display_area,
> + &display_area);
>
> psr2_man_trk_ctl_calc(crtc_state, full_update);
> crtc_state->pipe_srcsz_early_tpt =
> --
> 2.43.0
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area
2026-04-01 8:42 ` Kahola, Mika
@ 2026-04-02 6:11 ` Hogander, Jouni
0 siblings, 0 replies; 10+ messages in thread
From: Hogander, Jouni @ 2026-04-02 6:11 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Kahola, Mika,
intel-gfx@lists.freedesktop.org
Cc: stable@vger.kernel.org
On Wed, 2026-04-01 at 08:42 +0000, Kahola, Mika wrote:
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf
> > Of Jouni Högander
> > Sent: Friday, 27 March 2026 13.46
> > To: intel-gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> > Cc: Hogander, Jouni <jouni.hogander@intel.com>;
> > stable@vger.kernel.org
> > Subject: [PATCH] drm/i915/psr: Do not use pipe_src as borders for
> > SU area
> >
> > This far using crtc_state->pipe_src as borders for Selective Update
> > area haven't caused visible problems as
> > drm_rect_width(crtc_state->pipe_src) == crtc_state-
> > >hw.adjusted_mode.crtc_hdisplay and
> > drm_rect_height(crtc_state->pipe_src) == crtc_state-
> > >hw.adjusted_mode.crtc_vdisplay when pipe scaling is not used. On
> > the
> > other hand using pipe scaling is forcing full frame updates and all
> > the Selective Update area calculations are skipped. Now this
> > improper usage of crtc_state->pipe_src is causing following
> > warnings:
> >
> > <4> [7771.978166] xe 0000:00:02.0: [drm] drm_WARN_ON_ONCE(su_lines
> > % vdsc_cfg->slice_height)
> >
> > after WARN_ON_ONCE was added by commit:
> >
> > "drm/i915/dsc: Add helper for writing DSC Selective Update ET
> > parameters"
> >
> > These warnings are seen when DSC and pipe scaling are enabled
> > simultaneously. This is because on full frame update SU area
> > is improperly set as pipe_src which is not aligned with DSC slice
> > height.
> >
> > Fix these by creating local rectangle using crtc_state-
> > >hw.adjusted_mode.crtc_hdisplay and crtc_state-
> > > hw.adjusted_mode.crtc_vdisplay. Use this local rectangle as
> > > borders for SU area.
> >
> > Fixes: d6774b8c3c58 ("drm/i915: Ensure damage clip area is within
> > pipe area")
> > Cc: <stable@vger.kernel.org> # v6.0+
>
> With Jani's nit fixed this looks ok to me.
>
> Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Thank you Mika and Jani for the review. This is now pushed to drm-
intel-next with the change suggested by Jani.
BR,
Jouni Högander
>
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 27 ++++++++++++++------
> > ----
> > 1 file changed, 16 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 2f1b48cd8efd..33b2ae17274a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -2689,9 +2689,9 @@ static u32
> > psr2_pipe_srcsz_early_tpt_calc(struct intel_crtc_state *crtc_state,
> >
> > static void clip_area_update(struct drm_rect *overlap_damage_area,
> > struct drm_rect *damage_area,
> > - struct drm_rect *pipe_src)
> > + struct drm_rect *display_area)
> > {
> > - if (!drm_rect_intersect(damage_area, pipe_src))
> > + if (!drm_rect_intersect(damage_area, display_area))
> > return;
> >
> > if (overlap_damage_area->y1 == -1) {
> > @@ -2742,6 +2742,7 @@ static bool
> > intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state
> > *crtc_st static void
> > intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
> > struct intel_crtc *crtc,
> > + struct drm_rect *display_area,
> > bool *cursor_in_su_area)
> > {
> > struct intel_crtc_state *crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc); @@ -2769,7 +2770,7 @@
> > intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
> > continue;
> >
> > clip_area_update(&crtc_state->psr2_su_area,
> > &new_plane_state->uapi.dst,
> > - &crtc_state->pipe_src);
> > + display_area);
> > *cursor_in_su_area = true;
> > }
> > }
> > @@ -2866,6 +2867,9 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > struct intel_crtc_state *crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> > struct intel_plane_state *new_plane_state,
> > *old_plane_state;
> > struct intel_plane *plane;
> > + struct drm_rect display_area = { .x1 = 0, .y1 = 0,
> > + .x2 = crtc_state->hw.adjusted_mode.crtc_hdisplay,
> > + .y2 = crtc_state->hw.adjusted_mode.crtc_vdisplay};
> > bool full_update = false, su_area_changed;
> > int i, ret;
> >
> > @@ -2879,7 +2883,7 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> >
> > crtc_state->psr2_su_area.x1 = 0;
> > crtc_state->psr2_su_area.y1 = -1;
> > - crtc_state->psr2_su_area.x2 = drm_rect_width(&crtc_state-
> > >pipe_src);
> > + crtc_state->psr2_su_area.x2 =
> > drm_rect_width(&display_area);
> > crtc_state->psr2_su_area.y2 = -1;
> >
> > /*
> > @@ -2917,14 +2921,14 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > damaged_area.y1 = old_plane_state-
> > >uapi.dst.y1;
> > damaged_area.y2 = old_plane_state-
> > >uapi.dst.y2;
> > clip_area_update(&crtc_state-
> > >psr2_su_area, &damaged_area,
> > - &crtc_state-
> > >pipe_src);
> > + &display_area);
> > }
> >
> > if (new_plane_state->uapi.visible) {
> > damaged_area.y1 = new_plane_state-
> > >uapi.dst.y1;
> > damaged_area.y2 = new_plane_state-
> > >uapi.dst.y2;
> > clip_area_update(&crtc_state-
> > >psr2_su_area, &damaged_area,
> > - &crtc_state-
> > >pipe_src);
> > + &display_area);
> > }
> > continue;
> > } else if (new_plane_state->uapi.alpha !=
> > old_plane_state->uapi.alpha) { @@ -2932,7 +2936,7 @@ int
> > intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> > damaged_area.y1 = new_plane_state-
> > >uapi.dst.y1;
> > damaged_area.y2 = new_plane_state-
> > >uapi.dst.y2;
> > clip_area_update(&crtc_state-
> > >psr2_su_area, &damaged_area,
> > - &crtc_state->pipe_src);
> > + &display_area);
> > continue;
> > }
> >
> > @@ -2948,7 +2952,7 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > damaged_area.x1 += new_plane_state->uapi.dst.x1 -
> > src.x1;
> > damaged_area.x2 += new_plane_state->uapi.dst.x1 -
> > src.x1;
> >
> > - clip_area_update(&crtc_state->psr2_su_area,
> > &damaged_area, &crtc_state->pipe_src);
> > + clip_area_update(&crtc_state->psr2_su_area,
> > &damaged_area,
> > +&display_area);
> > }
> >
> > /*
> > @@ -2983,7 +2987,8 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > * cursor is added into affected planes even when
> > * cursor is not updated by itself.
> > */
> > - intel_psr2_sel_fetch_et_alignment(state, crtc,
> > &cursor_in_su_area);
> > + intel_psr2_sel_fetch_et_alignment(state, crtc,
> > &display_area,
> > +
> > &cursor_in_su_area);
> >
> > su_area_changed =
> > intel_psr2_sel_fetch_pipe_alignment(crtc_state);
> >
> > @@ -3059,8 +3064,8 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> >
> > skip_sel_fetch_set_loop:
> > if (full_update)
> > - clip_area_update(&crtc_state->psr2_su_area,
> > &crtc_state->pipe_src,
> > - &crtc_state->pipe_src);
> > + clip_area_update(&crtc_state->psr2_su_area,
> > &display_area,
> > + &display_area);
> >
> > psr2_man_trk_ctl_calc(crtc_state, full_update);
> > crtc_state->pipe_srcsz_early_tpt =
> > --
> > 2.43.0
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✗ CI.checkpatch: warning for drm/i915/psr: Do not use pipe_src as borders for SU area (rev2)
2026-03-27 11:45 [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area Jouni Högander
` (3 preceding siblings ...)
2026-04-01 8:42 ` Kahola, Mika
@ 2026-04-01 10:35 ` Patchwork
2026-04-01 10:36 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
7 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-04-01 10:35 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-xe
== Series Details ==
Series: drm/i915/psr: Do not use pipe_src as borders for SU area (rev2)
URL : https://patchwork.freedesktop.org/series/163985/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 533665a15135bd99ff672852ea7cbf8b6a426eec
Author: Jouni Högander <jouni.hogander@intel.com>
Date: Fri Mar 27 13:45:53 2026 +0200
drm/i915/psr: Do not use pipe_src as borders for SU area
This far using crtc_state->pipe_src as borders for Selective Update area
haven't caused visible problems as drm_rect_width(crtc_state->pipe_src) ==
crtc_state->hw.adjusted_mode.crtc_hdisplay and
drm_rect_height(crtc_state->pipe_src) ==
crtc_state->hw.adjusted_mode.crtc_vdisplay when pipe scaling is not
used. On the other hand using pipe scaling is forcing full frame updates and all the
Selective Update area calculations are skipped. Now this improper usage of
crtc_state->pipe_src is causing following warnings:
<4> [7771.978166] xe 0000:00:02.0: [drm] drm_WARN_ON_ONCE(su_lines % vdsc_cfg->slice_height)
after WARN_ON_ONCE was added by commit:
"drm/i915/dsc: Add helper for writing DSC Selective Update ET parameters"
These warnings are seen when DSC and pipe scaling are enabled
simultaneously. This is because on full frame update SU area is improperly
set as pipe_src which is not aligned with DSC slice height.
Fix these by creating local rectangle using
crtc_state->hw.adjusted_mode.crtc_hdisplay and
crtc_state->hw.adjusted_mode.crtc_vdisplay. Use this local rectangle as
borders for SU area.
Fixes: d6774b8c3c58 ("drm/i915: Ensure damage clip area is within pipe area")
Cc: <stable@vger.kernel.org> # v6.0+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
+ /mt/dim checkpatch 5d36e6d54e963f0c1137aaf2249d2baa781f08c2 drm-intel
533665a15135 drm/i915/psr: Do not use pipe_src as borders for SU area
-:14: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#14:
used. On the other hand using pipe scaling is forcing full frame updates and all the
total: 0 errors, 1 warnings, 0 checks, 94 lines checked
^ permalink raw reply [flat|nested] 10+ messages in thread* ✓ CI.KUnit: success for drm/i915/psr: Do not use pipe_src as borders for SU area (rev2)
2026-03-27 11:45 [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area Jouni Högander
` (4 preceding siblings ...)
2026-04-01 10:35 ` ✗ CI.checkpatch: warning for drm/i915/psr: Do not use pipe_src as borders for SU area (rev2) Patchwork
@ 2026-04-01 10:36 ` Patchwork
2026-04-01 11:10 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-01 16:24 ` ✓ Xe.CI.FULL: " Patchwork
7 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-04-01 10:36 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-xe
== Series Details ==
Series: drm/i915/psr: Do not use pipe_src as borders for SU area (rev2)
URL : https://patchwork.freedesktop.org/series/163985/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[10:35:37] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:35:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:36:13] Starting KUnit Kernel (1/1)...
[10:36:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:36:13] ================== guc_buf (11 subtests) ===================
[10:36:13] [PASSED] test_smallest
[10:36:13] [PASSED] test_largest
[10:36:13] [PASSED] test_granular
[10:36:13] [PASSED] test_unique
[10:36:13] [PASSED] test_overlap
[10:36:13] [PASSED] test_reusable
[10:36:13] [PASSED] test_too_big
[10:36:13] [PASSED] test_flush
[10:36:13] [PASSED] test_lookup
[10:36:13] [PASSED] test_data
[10:36:13] [PASSED] test_class
[10:36:13] ===================== [PASSED] guc_buf =====================
[10:36:13] =================== guc_dbm (7 subtests) ===================
[10:36:13] [PASSED] test_empty
[10:36:13] [PASSED] test_default
[10:36:13] ======================== test_size ========================
[10:36:13] [PASSED] 4
[10:36:13] [PASSED] 8
[10:36:13] [PASSED] 32
[10:36:13] [PASSED] 256
[10:36:13] ==================== [PASSED] test_size ====================
[10:36:13] ======================= test_reuse ========================
[10:36:13] [PASSED] 4
[10:36:13] [PASSED] 8
[10:36:13] [PASSED] 32
[10:36:13] [PASSED] 256
[10:36:13] =================== [PASSED] test_reuse ====================
[10:36:13] =================== test_range_overlap ====================
[10:36:13] [PASSED] 4
[10:36:13] [PASSED] 8
[10:36:13] [PASSED] 32
[10:36:13] [PASSED] 256
[10:36:13] =============== [PASSED] test_range_overlap ================
[10:36:13] =================== test_range_compact ====================
[10:36:13] [PASSED] 4
[10:36:13] [PASSED] 8
[10:36:13] [PASSED] 32
[10:36:13] [PASSED] 256
[10:36:13] =============== [PASSED] test_range_compact ================
[10:36:13] ==================== test_range_spare =====================
[10:36:13] [PASSED] 4
[10:36:13] [PASSED] 8
[10:36:13] [PASSED] 32
[10:36:13] [PASSED] 256
[10:36:13] ================ [PASSED] test_range_spare =================
[10:36:13] ===================== [PASSED] guc_dbm =====================
[10:36:13] =================== guc_idm (6 subtests) ===================
[10:36:13] [PASSED] bad_init
[10:36:13] [PASSED] no_init
[10:36:13] [PASSED] init_fini
[10:36:13] [PASSED] check_used
[10:36:13] [PASSED] check_quota
[10:36:13] [PASSED] check_all
[10:36:13] ===================== [PASSED] guc_idm =====================
[10:36:13] ================== no_relay (3 subtests) ===================
[10:36:13] [PASSED] xe_drops_guc2pf_if_not_ready
[10:36:13] [PASSED] xe_drops_guc2vf_if_not_ready
[10:36:13] [PASSED] xe_rejects_send_if_not_ready
[10:36:13] ==================== [PASSED] no_relay =====================
[10:36:13] ================== pf_relay (14 subtests) ==================
[10:36:13] [PASSED] pf_rejects_guc2pf_too_short
[10:36:13] [PASSED] pf_rejects_guc2pf_too_long
[10:36:13] [PASSED] pf_rejects_guc2pf_no_payload
[10:36:13] [PASSED] pf_fails_no_payload
[10:36:13] [PASSED] pf_fails_bad_origin
[10:36:13] [PASSED] pf_fails_bad_type
[10:36:13] [PASSED] pf_txn_reports_error
[10:36:13] [PASSED] pf_txn_sends_pf2guc
[10:36:13] [PASSED] pf_sends_pf2guc
[10:36:13] [SKIPPED] pf_loopback_nop
[10:36:13] [SKIPPED] pf_loopback_echo
[10:36:13] [SKIPPED] pf_loopback_fail
[10:36:13] [SKIPPED] pf_loopback_busy
[10:36:13] [SKIPPED] pf_loopback_retry
[10:36:13] ==================== [PASSED] pf_relay =====================
[10:36:13] ================== vf_relay (3 subtests) ===================
[10:36:13] [PASSED] vf_rejects_guc2vf_too_short
[10:36:13] [PASSED] vf_rejects_guc2vf_too_long
[10:36:13] [PASSED] vf_rejects_guc2vf_no_payload
[10:36:13] ==================== [PASSED] vf_relay =====================
[10:36:13] ================ pf_gt_config (9 subtests) =================
[10:36:13] [PASSED] fair_contexts_1vf
[10:36:13] [PASSED] fair_doorbells_1vf
[10:36:13] [PASSED] fair_ggtt_1vf
[10:36:13] ====================== fair_vram_1vf ======================
[10:36:13] [PASSED] 3.50 GiB
[10:36:13] [PASSED] 11.5 GiB
[10:36:13] [PASSED] 15.5 GiB
[10:36:13] [PASSED] 31.5 GiB
[10:36:13] [PASSED] 63.5 GiB
[10:36:13] [PASSED] 1.91 GiB
[10:36:13] ================== [PASSED] fair_vram_1vf ==================
[10:36:13] ================ fair_vram_1vf_admin_only =================
[10:36:13] [PASSED] 3.50 GiB
[10:36:13] [PASSED] 11.5 GiB
[10:36:13] [PASSED] 15.5 GiB
[10:36:13] [PASSED] 31.5 GiB
[10:36:13] [PASSED] 63.5 GiB
[10:36:13] [PASSED] 1.91 GiB
[10:36:13] ============ [PASSED] fair_vram_1vf_admin_only =============
[10:36:13] ====================== fair_contexts ======================
[10:36:13] [PASSED] 1 VF
[10:36:13] [PASSED] 2 VFs
[10:36:13] [PASSED] 3 VFs
[10:36:13] [PASSED] 4 VFs
[10:36:13] [PASSED] 5 VFs
[10:36:13] [PASSED] 6 VFs
[10:36:13] [PASSED] 7 VFs
[10:36:13] [PASSED] 8 VFs
[10:36:13] [PASSED] 9 VFs
[10:36:13] [PASSED] 10 VFs
[10:36:13] [PASSED] 11 VFs
[10:36:13] [PASSED] 12 VFs
[10:36:13] [PASSED] 13 VFs
[10:36:13] [PASSED] 14 VFs
[10:36:13] [PASSED] 15 VFs
[10:36:13] [PASSED] 16 VFs
[10:36:13] [PASSED] 17 VFs
[10:36:13] [PASSED] 18 VFs
[10:36:13] [PASSED] 19 VFs
[10:36:13] [PASSED] 20 VFs
[10:36:13] [PASSED] 21 VFs
[10:36:13] [PASSED] 22 VFs
[10:36:13] [PASSED] 23 VFs
[10:36:13] [PASSED] 24 VFs
[10:36:13] [PASSED] 25 VFs
[10:36:13] [PASSED] 26 VFs
[10:36:13] [PASSED] 27 VFs
[10:36:13] [PASSED] 28 VFs
[10:36:13] [PASSED] 29 VFs
[10:36:13] [PASSED] 30 VFs
[10:36:13] [PASSED] 31 VFs
[10:36:13] [PASSED] 32 VFs
[10:36:13] [PASSED] 33 VFs
[10:36:13] [PASSED] 34 VFs
[10:36:13] [PASSED] 35 VFs
[10:36:13] [PASSED] 36 VFs
[10:36:13] [PASSED] 37 VFs
[10:36:13] [PASSED] 38 VFs
[10:36:13] [PASSED] 39 VFs
[10:36:13] [PASSED] 40 VFs
[10:36:13] [PASSED] 41 VFs
[10:36:13] [PASSED] 42 VFs
[10:36:13] [PASSED] 43 VFs
[10:36:13] [PASSED] 44 VFs
[10:36:13] [PASSED] 45 VFs
[10:36:13] [PASSED] 46 VFs
[10:36:13] [PASSED] 47 VFs
[10:36:13] [PASSED] 48 VFs
[10:36:13] [PASSED] 49 VFs
[10:36:13] [PASSED] 50 VFs
[10:36:13] [PASSED] 51 VFs
[10:36:13] [PASSED] 52 VFs
[10:36:13] [PASSED] 53 VFs
[10:36:13] [PASSED] 54 VFs
[10:36:13] [PASSED] 55 VFs
[10:36:13] [PASSED] 56 VFs
[10:36:13] [PASSED] 57 VFs
[10:36:13] [PASSED] 58 VFs
[10:36:13] [PASSED] 59 VFs
[10:36:13] [PASSED] 60 VFs
[10:36:13] [PASSED] 61 VFs
[10:36:13] [PASSED] 62 VFs
[10:36:13] [PASSED] 63 VFs
[10:36:13] ================== [PASSED] fair_contexts ==================
[10:36:13] ===================== fair_doorbells ======================
[10:36:13] [PASSED] 1 VF
[10:36:13] [PASSED] 2 VFs
[10:36:13] [PASSED] 3 VFs
[10:36:13] [PASSED] 4 VFs
[10:36:13] [PASSED] 5 VFs
[10:36:13] [PASSED] 6 VFs
[10:36:13] [PASSED] 7 VFs
[10:36:13] [PASSED] 8 VFs
[10:36:13] [PASSED] 9 VFs
[10:36:13] [PASSED] 10 VFs
[10:36:13] [PASSED] 11 VFs
[10:36:13] [PASSED] 12 VFs
[10:36:13] [PASSED] 13 VFs
[10:36:13] [PASSED] 14 VFs
[10:36:13] [PASSED] 15 VFs
[10:36:13] [PASSED] 16 VFs
[10:36:13] [PASSED] 17 VFs
[10:36:13] [PASSED] 18 VFs
[10:36:13] [PASSED] 19 VFs
[10:36:13] [PASSED] 20 VFs
[10:36:13] [PASSED] 21 VFs
[10:36:13] [PASSED] 22 VFs
[10:36:13] [PASSED] 23 VFs
[10:36:13] [PASSED] 24 VFs
[10:36:13] [PASSED] 25 VFs
[10:36:13] [PASSED] 26 VFs
[10:36:13] [PASSED] 27 VFs
[10:36:13] [PASSED] 28 VFs
[10:36:13] [PASSED] 29 VFs
[10:36:13] [PASSED] 30 VFs
[10:36:13] [PASSED] 31 VFs
[10:36:13] [PASSED] 32 VFs
[10:36:13] [PASSED] 33 VFs
[10:36:13] [PASSED] 34 VFs
[10:36:13] [PASSED] 35 VFs
[10:36:13] [PASSED] 36 VFs
[10:36:13] [PASSED] 37 VFs
[10:36:13] [PASSED] 38 VFs
[10:36:13] [PASSED] 39 VFs
[10:36:13] [PASSED] 40 VFs
[10:36:13] [PASSED] 41 VFs
[10:36:13] [PASSED] 42 VFs
[10:36:13] [PASSED] 43 VFs
[10:36:13] [PASSED] 44 VFs
[10:36:13] [PASSED] 45 VFs
[10:36:13] [PASSED] 46 VFs
[10:36:13] [PASSED] 47 VFs
[10:36:13] [PASSED] 48 VFs
[10:36:13] [PASSED] 49 VFs
[10:36:13] [PASSED] 50 VFs
[10:36:13] [PASSED] 51 VFs
[10:36:13] [PASSED] 52 VFs
[10:36:13] [PASSED] 53 VFs
[10:36:13] [PASSED] 54 VFs
[10:36:13] [PASSED] 55 VFs
[10:36:13] [PASSED] 56 VFs
[10:36:13] [PASSED] 57 VFs
[10:36:13] [PASSED] 58 VFs
[10:36:13] [PASSED] 59 VFs
[10:36:13] [PASSED] 60 VFs
[10:36:13] [PASSED] 61 VFs
[10:36:13] [PASSED] 62 VFs
[10:36:13] [PASSED] 63 VFs
[10:36:13] ================= [PASSED] fair_doorbells ==================
[10:36:13] ======================== fair_ggtt ========================
[10:36:13] [PASSED] 1 VF
[10:36:13] [PASSED] 2 VFs
[10:36:13] [PASSED] 3 VFs
[10:36:13] [PASSED] 4 VFs
[10:36:13] [PASSED] 5 VFs
[10:36:13] [PASSED] 6 VFs
[10:36:13] [PASSED] 7 VFs
[10:36:13] [PASSED] 8 VFs
[10:36:13] [PASSED] 9 VFs
[10:36:13] [PASSED] 10 VFs
[10:36:13] [PASSED] 11 VFs
[10:36:13] [PASSED] 12 VFs
[10:36:13] [PASSED] 13 VFs
[10:36:13] [PASSED] 14 VFs
[10:36:13] [PASSED] 15 VFs
[10:36:13] [PASSED] 16 VFs
[10:36:13] [PASSED] 17 VFs
[10:36:13] [PASSED] 18 VFs
[10:36:13] [PASSED] 19 VFs
[10:36:13] [PASSED] 20 VFs
[10:36:13] [PASSED] 21 VFs
[10:36:13] [PASSED] 22 VFs
[10:36:13] [PASSED] 23 VFs
[10:36:13] [PASSED] 24 VFs
[10:36:13] [PASSED] 25 VFs
[10:36:13] [PASSED] 26 VFs
[10:36:13] [PASSED] 27 VFs
[10:36:13] [PASSED] 28 VFs
[10:36:13] [PASSED] 29 VFs
[10:36:13] [PASSED] 30 VFs
[10:36:13] [PASSED] 31 VFs
[10:36:13] [PASSED] 32 VFs
[10:36:13] [PASSED] 33 VFs
[10:36:13] [PASSED] 34 VFs
[10:36:13] [PASSED] 35 VFs
[10:36:13] [PASSED] 36 VFs
[10:36:13] [PASSED] 37 VFs
[10:36:13] [PASSED] 38 VFs
[10:36:13] [PASSED] 39 VFs
[10:36:13] [PASSED] 40 VFs
[10:36:13] [PASSED] 41 VFs
[10:36:13] [PASSED] 42 VFs
[10:36:13] [PASSED] 43 VFs
[10:36:13] [PASSED] 44 VFs
[10:36:13] [PASSED] 45 VFs
[10:36:13] [PASSED] 46 VFs
[10:36:13] [PASSED] 47 VFs
[10:36:13] [PASSED] 48 VFs
[10:36:13] [PASSED] 49 VFs
[10:36:13] [PASSED] 50 VFs
[10:36:13] [PASSED] 51 VFs
[10:36:13] [PASSED] 52 VFs
[10:36:13] [PASSED] 53 VFs
[10:36:13] [PASSED] 54 VFs
[10:36:13] [PASSED] 55 VFs
[10:36:13] [PASSED] 56 VFs
[10:36:13] [PASSED] 57 VFs
[10:36:13] [PASSED] 58 VFs
[10:36:13] [PASSED] 59 VFs
[10:36:13] [PASSED] 60 VFs
[10:36:13] [PASSED] 61 VFs
[10:36:13] [PASSED] 62 VFs
[10:36:13] [PASSED] 63 VFs
[10:36:13] ==================== [PASSED] fair_ggtt ====================
[10:36:13] ======================== fair_vram ========================
[10:36:13] [PASSED] 1 VF
[10:36:13] [PASSED] 2 VFs
[10:36:13] [PASSED] 3 VFs
[10:36:13] [PASSED] 4 VFs
[10:36:13] [PASSED] 5 VFs
[10:36:13] [PASSED] 6 VFs
[10:36:13] [PASSED] 7 VFs
[10:36:13] [PASSED] 8 VFs
[10:36:13] [PASSED] 9 VFs
[10:36:13] [PASSED] 10 VFs
[10:36:13] [PASSED] 11 VFs
[10:36:13] [PASSED] 12 VFs
[10:36:13] [PASSED] 13 VFs
[10:36:13] [PASSED] 14 VFs
[10:36:13] [PASSED] 15 VFs
[10:36:13] [PASSED] 16 VFs
[10:36:13] [PASSED] 17 VFs
[10:36:13] [PASSED] 18 VFs
[10:36:13] [PASSED] 19 VFs
[10:36:13] [PASSED] 20 VFs
[10:36:13] [PASSED] 21 VFs
[10:36:13] [PASSED] 22 VFs
[10:36:13] [PASSED] 23 VFs
[10:36:13] [PASSED] 24 VFs
[10:36:13] [PASSED] 25 VFs
[10:36:13] [PASSED] 26 VFs
[10:36:13] [PASSED] 27 VFs
[10:36:13] [PASSED] 28 VFs
[10:36:13] [PASSED] 29 VFs
[10:36:13] [PASSED] 30 VFs
[10:36:13] [PASSED] 31 VFs
[10:36:13] [PASSED] 32 VFs
[10:36:13] [PASSED] 33 VFs
[10:36:13] [PASSED] 34 VFs
[10:36:13] [PASSED] 35 VFs
[10:36:13] [PASSED] 36 VFs
[10:36:13] [PASSED] 37 VFs
[10:36:13] [PASSED] 38 VFs
[10:36:13] [PASSED] 39 VFs
[10:36:13] [PASSED] 40 VFs
[10:36:13] [PASSED] 41 VFs
[10:36:13] [PASSED] 42 VFs
[10:36:13] [PASSED] 43 VFs
[10:36:13] [PASSED] 44 VFs
[10:36:13] [PASSED] 45 VFs
[10:36:13] [PASSED] 46 VFs
[10:36:13] [PASSED] 47 VFs
[10:36:13] [PASSED] 48 VFs
[10:36:13] [PASSED] 49 VFs
[10:36:13] [PASSED] 50 VFs
[10:36:13] [PASSED] 51 VFs
[10:36:13] [PASSED] 52 VFs
[10:36:13] [PASSED] 53 VFs
[10:36:13] [PASSED] 54 VFs
[10:36:13] [PASSED] 55 VFs
[10:36:13] [PASSED] 56 VFs
[10:36:13] [PASSED] 57 VFs
[10:36:13] [PASSED] 58 VFs
[10:36:13] [PASSED] 59 VFs
[10:36:13] [PASSED] 60 VFs
[10:36:13] [PASSED] 61 VFs
[10:36:13] [PASSED] 62 VFs
[10:36:13] [PASSED] 63 VFs
[10:36:13] ==================== [PASSED] fair_vram ====================
[10:36:13] ================== [PASSED] pf_gt_config ===================
[10:36:13] ===================== lmtt (1 subtest) =====================
[10:36:13] ======================== test_ops =========================
[10:36:13] [PASSED] 2-level
[10:36:13] [PASSED] multi-level
[10:36:13] ==================== [PASSED] test_ops =====================
[10:36:13] ====================== [PASSED] lmtt =======================
[10:36:13] ================= pf_service (11 subtests) =================
[10:36:13] [PASSED] pf_negotiate_any
[10:36:13] [PASSED] pf_negotiate_base_match
[10:36:13] [PASSED] pf_negotiate_base_newer
[10:36:13] [PASSED] pf_negotiate_base_next
[10:36:13] [SKIPPED] pf_negotiate_base_older
[10:36:13] [PASSED] pf_negotiate_base_prev
[10:36:13] [PASSED] pf_negotiate_latest_match
[10:36:13] [PASSED] pf_negotiate_latest_newer
[10:36:13] [PASSED] pf_negotiate_latest_next
[10:36:13] [SKIPPED] pf_negotiate_latest_older
[10:36:13] [SKIPPED] pf_negotiate_latest_prev
[10:36:13] =================== [PASSED] pf_service ====================
[10:36:13] ================= xe_guc_g2g (2 subtests) ==================
[10:36:13] ============== xe_live_guc_g2g_kunit_default ==============
[10:36:13] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[10:36:13] ============== xe_live_guc_g2g_kunit_allmem ===============
[10:36:13] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[10:36:13] =================== [SKIPPED] xe_guc_g2g ===================
[10:36:13] =================== xe_mocs (2 subtests) ===================
[10:36:13] ================ xe_live_mocs_kernel_kunit ================
[10:36:13] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[10:36:13] ================ xe_live_mocs_reset_kunit =================
[10:36:13] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[10:36:13] ==================== [SKIPPED] xe_mocs =====================
[10:36:13] ================= xe_migrate (2 subtests) ==================
[10:36:13] ================= xe_migrate_sanity_kunit =================
[10:36:13] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[10:36:13] ================== xe_validate_ccs_kunit ==================
[10:36:13] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[10:36:13] =================== [SKIPPED] xe_migrate ===================
[10:36:13] ================== xe_dma_buf (1 subtest) ==================
[10:36:13] ==================== xe_dma_buf_kunit =====================
[10:36:13] ================ [SKIPPED] xe_dma_buf_kunit ================
[10:36:13] =================== [SKIPPED] xe_dma_buf ===================
[10:36:13] ================= xe_bo_shrink (1 subtest) =================
[10:36:13] =================== xe_bo_shrink_kunit ====================
[10:36:13] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[10:36:13] ================== [SKIPPED] xe_bo_shrink ==================
[10:36:13] ==================== xe_bo (2 subtests) ====================
[10:36:13] ================== xe_ccs_migrate_kunit ===================
[10:36:13] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[10:36:13] ==================== xe_bo_evict_kunit ====================
[10:36:13] =============== [SKIPPED] xe_bo_evict_kunit ================
[10:36:13] ===================== [SKIPPED] xe_bo ======================
[10:36:13] ==================== args (13 subtests) ====================
[10:36:13] [PASSED] count_args_test
[10:36:13] [PASSED] call_args_example
[10:36:13] [PASSED] call_args_test
[10:36:13] [PASSED] drop_first_arg_example
[10:36:13] [PASSED] drop_first_arg_test
[10:36:13] [PASSED] first_arg_example
[10:36:13] [PASSED] first_arg_test
[10:36:13] [PASSED] last_arg_example
[10:36:13] [PASSED] last_arg_test
[10:36:13] [PASSED] pick_arg_example
[10:36:13] [PASSED] if_args_example
[10:36:13] [PASSED] if_args_test
[10:36:13] [PASSED] sep_comma_example
[10:36:13] ====================== [PASSED] args =======================
[10:36:13] =================== xe_pci (3 subtests) ====================
[10:36:13] ==================== check_graphics_ip ====================
[10:36:13] [PASSED] 12.00 Xe_LP
[10:36:13] [PASSED] 12.10 Xe_LP+
[10:36:13] [PASSED] 12.55 Xe_HPG
[10:36:13] [PASSED] 12.60 Xe_HPC
[10:36:13] [PASSED] 12.70 Xe_LPG
[10:36:13] [PASSED] 12.71 Xe_LPG
[10:36:13] [PASSED] 12.74 Xe_LPG+
[10:36:13] [PASSED] 20.01 Xe2_HPG
[10:36:13] [PASSED] 20.02 Xe2_HPG
[10:36:13] [PASSED] 20.04 Xe2_LPG
[10:36:13] [PASSED] 30.00 Xe3_LPG
[10:36:13] [PASSED] 30.01 Xe3_LPG
[10:36:13] [PASSED] 30.03 Xe3_LPG
[10:36:13] [PASSED] 30.04 Xe3_LPG
[10:36:13] [PASSED] 30.05 Xe3_LPG
[10:36:13] [PASSED] 35.10 Xe3p_LPG
[10:36:13] [PASSED] 35.11 Xe3p_XPC
[10:36:13] ================ [PASSED] check_graphics_ip ================
[10:36:13] ===================== check_media_ip ======================
[10:36:13] [PASSED] 12.00 Xe_M
[10:36:13] [PASSED] 12.55 Xe_HPM
[10:36:13] [PASSED] 13.00 Xe_LPM+
[10:36:13] [PASSED] 13.01 Xe2_HPM
[10:36:13] [PASSED] 20.00 Xe2_LPM
[10:36:13] [PASSED] 30.00 Xe3_LPM
[10:36:13] [PASSED] 30.02 Xe3_LPM
[10:36:13] [PASSED] 35.00 Xe3p_LPM
[10:36:13] [PASSED] 35.03 Xe3p_HPM
[10:36:13] ================= [PASSED] check_media_ip ==================
[10:36:13] =================== check_platform_desc ===================
[10:36:13] [PASSED] 0x9A60 (TIGERLAKE)
[10:36:13] [PASSED] 0x9A68 (TIGERLAKE)
[10:36:13] [PASSED] 0x9A70 (TIGERLAKE)
[10:36:13] [PASSED] 0x9A40 (TIGERLAKE)
[10:36:13] [PASSED] 0x9A49 (TIGERLAKE)
[10:36:13] [PASSED] 0x9A59 (TIGERLAKE)
[10:36:13] [PASSED] 0x9A78 (TIGERLAKE)
[10:36:13] [PASSED] 0x9AC0 (TIGERLAKE)
[10:36:13] [PASSED] 0x9AC9 (TIGERLAKE)
[10:36:13] [PASSED] 0x9AD9 (TIGERLAKE)
[10:36:13] [PASSED] 0x9AF8 (TIGERLAKE)
[10:36:13] [PASSED] 0x4C80 (ROCKETLAKE)
[10:36:13] [PASSED] 0x4C8A (ROCKETLAKE)
[10:36:13] [PASSED] 0x4C8B (ROCKETLAKE)
[10:36:13] [PASSED] 0x4C8C (ROCKETLAKE)
[10:36:13] [PASSED] 0x4C90 (ROCKETLAKE)
[10:36:13] [PASSED] 0x4C9A (ROCKETLAKE)
[10:36:13] [PASSED] 0x4680 (ALDERLAKE_S)
[10:36:13] [PASSED] 0x4682 (ALDERLAKE_S)
[10:36:13] [PASSED] 0x4688 (ALDERLAKE_S)
[10:36:13] [PASSED] 0x468A (ALDERLAKE_S)
[10:36:13] [PASSED] 0x468B (ALDERLAKE_S)
[10:36:13] [PASSED] 0x4690 (ALDERLAKE_S)
[10:36:13] [PASSED] 0x4692 (ALDERLAKE_S)
[10:36:13] [PASSED] 0x4693 (ALDERLAKE_S)
[10:36:13] [PASSED] 0x46A0 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46A1 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46A2 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46A3 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46A6 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46A8 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46AA (ALDERLAKE_P)
[10:36:13] [PASSED] 0x462A (ALDERLAKE_P)
[10:36:13] [PASSED] 0x4626 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x4628 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46B0 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46B1 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46B2 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46B3 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46C0 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46C1 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46C2 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46C3 (ALDERLAKE_P)
[10:36:13] [PASSED] 0x46D0 (ALDERLAKE_N)
[10:36:13] [PASSED] 0x46D1 (ALDERLAKE_N)
[10:36:13] [PASSED] 0x46D2 (ALDERLAKE_N)
[10:36:13] [PASSED] 0x46D3 (ALDERLAKE_N)
[10:36:13] [PASSED] 0x46D4 (ALDERLAKE_N)
[10:36:13] [PASSED] 0xA721 (ALDERLAKE_P)
[10:36:13] [PASSED] 0xA7A1 (ALDERLAKE_P)
[10:36:13] [PASSED] 0xA7A9 (ALDERLAKE_P)
[10:36:13] [PASSED] 0xA7AC (ALDERLAKE_P)
[10:36:13] [PASSED] 0xA7AD (ALDERLAKE_P)
[10:36:13] [PASSED] 0xA720 (ALDERLAKE_P)
[10:36:13] [PASSED] 0xA7A0 (ALDERLAKE_P)
[10:36:13] [PASSED] 0xA7A8 (ALDERLAKE_P)
[10:36:13] [PASSED] 0xA7AA (ALDERLAKE_P)
[10:36:13] [PASSED] 0xA7AB (ALDERLAKE_P)
[10:36:13] [PASSED] 0xA780 (ALDERLAKE_S)
[10:36:13] [PASSED] 0xA781 (ALDERLAKE_S)
[10:36:13] [PASSED] 0xA782 (ALDERLAKE_S)
[10:36:13] [PASSED] 0xA783 (ALDERLAKE_S)
[10:36:13] [PASSED] 0xA788 (ALDERLAKE_S)
[10:36:13] [PASSED] 0xA789 (ALDERLAKE_S)
[10:36:13] [PASSED] 0xA78A (ALDERLAKE_S)
[10:36:13] [PASSED] 0xA78B (ALDERLAKE_S)
[10:36:13] [PASSED] 0x4905 (DG1)
[10:36:13] [PASSED] 0x4906 (DG1)
[10:36:13] [PASSED] 0x4907 (DG1)
[10:36:13] [PASSED] 0x4908 (DG1)
[10:36:13] [PASSED] 0x4909 (DG1)
[10:36:13] [PASSED] 0x56C0 (DG2)
[10:36:13] [PASSED] 0x56C2 (DG2)
[10:36:13] [PASSED] 0x56C1 (DG2)
[10:36:13] [PASSED] 0x7D51 (METEORLAKE)
[10:36:13] [PASSED] 0x7DD1 (METEORLAKE)
[10:36:13] [PASSED] 0x7D41 (METEORLAKE)
[10:36:13] [PASSED] 0x7D67 (METEORLAKE)
[10:36:13] [PASSED] 0xB640 (METEORLAKE)
[10:36:13] [PASSED] 0x56A0 (DG2)
[10:36:13] [PASSED] 0x56A1 (DG2)
[10:36:13] [PASSED] 0x56A2 (DG2)
[10:36:13] [PASSED] 0x56BE (DG2)
[10:36:13] [PASSED] 0x56BF (DG2)
[10:36:13] [PASSED] 0x5690 (DG2)
[10:36:13] [PASSED] 0x5691 (DG2)
[10:36:13] [PASSED] 0x5692 (DG2)
[10:36:13] [PASSED] 0x56A5 (DG2)
[10:36:13] [PASSED] 0x56A6 (DG2)
[10:36:13] [PASSED] 0x56B0 (DG2)
[10:36:13] [PASSED] 0x56B1 (DG2)
[10:36:13] [PASSED] 0x56BA (DG2)
[10:36:13] [PASSED] 0x56BB (DG2)
[10:36:13] [PASSED] 0x56BC (DG2)
[10:36:13] [PASSED] 0x56BD (DG2)
[10:36:13] [PASSED] 0x5693 (DG2)
[10:36:13] [PASSED] 0x5694 (DG2)
[10:36:13] [PASSED] 0x5695 (DG2)
[10:36:13] [PASSED] 0x56A3 (DG2)
[10:36:13] [PASSED] 0x56A4 (DG2)
[10:36:13] [PASSED] 0x56B2 (DG2)
[10:36:13] [PASSED] 0x56B3 (DG2)
[10:36:13] [PASSED] 0x5696 (DG2)
[10:36:13] [PASSED] 0x5697 (DG2)
[10:36:13] [PASSED] 0xB69 (PVC)
[10:36:13] [PASSED] 0xB6E (PVC)
[10:36:13] [PASSED] 0xBD4 (PVC)
[10:36:13] [PASSED] 0xBD5 (PVC)
[10:36:13] [PASSED] 0xBD6 (PVC)
[10:36:13] [PASSED] 0xBD7 (PVC)
[10:36:13] [PASSED] 0xBD8 (PVC)
[10:36:13] [PASSED] 0xBD9 (PVC)
[10:36:13] [PASSED] 0xBDA (PVC)
[10:36:13] [PASSED] 0xBDB (PVC)
[10:36:13] [PASSED] 0xBE0 (PVC)
[10:36:13] [PASSED] 0xBE1 (PVC)
[10:36:13] [PASSED] 0xBE5 (PVC)
[10:36:13] [PASSED] 0x7D40 (METEORLAKE)
[10:36:13] [PASSED] 0x7D45 (METEORLAKE)
[10:36:13] [PASSED] 0x7D55 (METEORLAKE)
[10:36:13] [PASSED] 0x7D60 (METEORLAKE)
[10:36:13] [PASSED] 0x7DD5 (METEORLAKE)
[10:36:13] [PASSED] 0x6420 (LUNARLAKE)
[10:36:13] [PASSED] 0x64A0 (LUNARLAKE)
[10:36:13] [PASSED] 0x64B0 (LUNARLAKE)
[10:36:13] [PASSED] 0xE202 (BATTLEMAGE)
[10:36:13] [PASSED] 0xE209 (BATTLEMAGE)
[10:36:13] [PASSED] 0xE20B (BATTLEMAGE)
[10:36:13] [PASSED] 0xE20C (BATTLEMAGE)
[10:36:13] [PASSED] 0xE20D (BATTLEMAGE)
[10:36:13] [PASSED] 0xE210 (BATTLEMAGE)
[10:36:13] [PASSED] 0xE211 (BATTLEMAGE)
[10:36:13] [PASSED] 0xE212 (BATTLEMAGE)
[10:36:13] [PASSED] 0xE216 (BATTLEMAGE)
[10:36:13] [PASSED] 0xE220 (BATTLEMAGE)
[10:36:13] [PASSED] 0xE221 (BATTLEMAGE)
[10:36:13] [PASSED] 0xE222 (BATTLEMAGE)
[10:36:13] [PASSED] 0xE223 (BATTLEMAGE)
[10:36:13] [PASSED] 0xB080 (PANTHERLAKE)
[10:36:13] [PASSED] 0xB081 (PANTHERLAKE)
[10:36:13] [PASSED] 0xB082 (PANTHERLAKE)
[10:36:13] [PASSED] 0xB083 (PANTHERLAKE)
[10:36:13] [PASSED] 0xB084 (PANTHERLAKE)
[10:36:13] [PASSED] 0xB085 (PANTHERLAKE)
[10:36:13] [PASSED] 0xB086 (PANTHERLAKE)
[10:36:13] [PASSED] 0xB087 (PANTHERLAKE)
[10:36:13] [PASSED] 0xB08F (PANTHERLAKE)
[10:36:13] [PASSED] 0xB090 (PANTHERLAKE)
[10:36:13] [PASSED] 0xB0A0 (PANTHERLAKE)
[10:36:13] [PASSED] 0xB0B0 (PANTHERLAKE)
[10:36:13] [PASSED] 0xFD80 (PANTHERLAKE)
[10:36:13] [PASSED] 0xFD81 (PANTHERLAKE)
[10:36:13] [PASSED] 0xD740 (NOVALAKE_S)
[10:36:13] [PASSED] 0xD741 (NOVALAKE_S)
[10:36:13] [PASSED] 0xD742 (NOVALAKE_S)
[10:36:13] [PASSED] 0xD743 (NOVALAKE_S)
[10:36:13] [PASSED] 0xD744 (NOVALAKE_S)
[10:36:13] [PASSED] 0xD745 (NOVALAKE_S)
[10:36:13] [PASSED] 0x674C (CRESCENTISLAND)
[10:36:13] [PASSED] 0xD750 (NOVALAKE_P)
[10:36:13] [PASSED] 0xD751 (NOVALAKE_P)
[10:36:13] [PASSED] 0xD752 (NOVALAKE_P)
[10:36:13] [PASSED] 0xD753 (NOVALAKE_P)
[10:36:13] [PASSED] 0xD754 (NOVALAKE_P)
[10:36:13] [PASSED] 0xD755 (NOVALAKE_P)
[10:36:13] [PASSED] 0xD756 (NOVALAKE_P)
[10:36:13] [PASSED] 0xD757 (NOVALAKE_P)
[10:36:13] [PASSED] 0xD75F (NOVALAKE_P)
[10:36:13] =============== [PASSED] check_platform_desc ===============
[10:36:13] ===================== [PASSED] xe_pci ======================
[10:36:13] =================== xe_rtp (2 subtests) ====================
[10:36:13] =============== xe_rtp_process_to_sr_tests ================
[10:36:13] [PASSED] coalesce-same-reg
[10:36:13] [PASSED] no-match-no-add
[10:36:13] [PASSED] match-or
[10:36:13] [PASSED] match-or-xfail
[10:36:13] [PASSED] no-match-no-add-multiple-rules
[10:36:13] [PASSED] two-regs-two-entries
[10:36:13] [PASSED] clr-one-set-other
[10:36:13] [PASSED] set-field
[10:36:13] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[10:36:13] [PASSED] conflict-not-disjoint
[10:36:13] [PASSED] conflict-reg-type
[10:36:13] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[10:36:13] ================== xe_rtp_process_tests ===================
[10:36:13] [PASSED] active1
[10:36:13] [PASSED] active2
[10:36:13] [PASSED] active-inactive
[10:36:13] [PASSED] inactive-active
[10:36:13] [PASSED] inactive-1st_or_active-inactive
[10:36:13] [PASSED] inactive-2nd_or_active-inactive
[10:36:13] [PASSED] inactive-last_or_active-inactive
[10:36:13] [PASSED] inactive-no_or_active-inactive
[10:36:13] ============== [PASSED] xe_rtp_process_tests ===============
[10:36:13] ===================== [PASSED] xe_rtp ======================
[10:36:13] ==================== xe_wa (1 subtest) =====================
[10:36:13] ======================== xe_wa_gt =========================
[10:36:13] [PASSED] TIGERLAKE B0
[10:36:13] [PASSED] DG1 A0
[10:36:13] [PASSED] DG1 B0
[10:36:13] [PASSED] ALDERLAKE_S A0
[10:36:13] [PASSED] ALDERLAKE_S B0
[10:36:13] [PASSED] ALDERLAKE_S C0
[10:36:13] [PASSED] ALDERLAKE_S D0
[10:36:13] [PASSED] ALDERLAKE_P A0
[10:36:13] [PASSED] ALDERLAKE_P B0
[10:36:13] [PASSED] ALDERLAKE_P C0
[10:36:13] [PASSED] ALDERLAKE_S RPLS D0
[10:36:13] [PASSED] ALDERLAKE_P RPLU E0
[10:36:13] [PASSED] DG2 G10 C0
[10:36:13] [PASSED] DG2 G11 B1
[10:36:13] [PASSED] DG2 G12 A1
[10:36:13] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:36:13] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[10:36:13] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[10:36:13] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[10:36:13] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[10:36:13] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[10:36:13] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[10:36:13] ==================== [PASSED] xe_wa_gt =====================
[10:36:13] ====================== [PASSED] xe_wa ======================
[10:36:13] ============================================================
[10:36:13] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[10:36:13] Elapsed time: 36.282s total, 4.288s configuring, 31.377s building, 0.594s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[10:36:13] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:36:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:36:40] Starting KUnit Kernel (1/1)...
[10:36:40] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:36:40] ============ drm_test_pick_cmdline (2 subtests) ============
[10:36:40] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[10:36:40] =============== drm_test_pick_cmdline_named ===============
[10:36:40] [PASSED] NTSC
[10:36:40] [PASSED] NTSC-J
[10:36:40] [PASSED] PAL
[10:36:40] [PASSED] PAL-M
[10:36:40] =========== [PASSED] drm_test_pick_cmdline_named ===========
[10:36:40] ============== [PASSED] drm_test_pick_cmdline ==============
[10:36:40] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[10:36:40] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[10:36:40] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[10:36:40] =========== drm_validate_clone_mode (2 subtests) ===========
[10:36:40] ============== drm_test_check_in_clone_mode ===============
[10:36:40] [PASSED] in_clone_mode
[10:36:40] [PASSED] not_in_clone_mode
[10:36:40] ========== [PASSED] drm_test_check_in_clone_mode ===========
[10:36:40] =============== drm_test_check_valid_clones ===============
[10:36:40] [PASSED] not_in_clone_mode
[10:36:40] [PASSED] valid_clone
[10:36:40] [PASSED] invalid_clone
[10:36:40] =========== [PASSED] drm_test_check_valid_clones ===========
[10:36:40] ============= [PASSED] drm_validate_clone_mode =============
[10:36:40] ============= drm_validate_modeset (1 subtest) =============
[10:36:40] [PASSED] drm_test_check_connector_changed_modeset
[10:36:40] ============== [PASSED] drm_validate_modeset ===============
[10:36:40] ====== drm_test_bridge_get_current_state (2 subtests) ======
[10:36:40] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[10:36:40] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[10:36:40] ======== [PASSED] drm_test_bridge_get_current_state ========
[10:36:40] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[10:36:40] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[10:36:40] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[10:36:40] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[10:36:40] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[10:36:40] ============== drm_bridge_alloc (2 subtests) ===============
[10:36:40] [PASSED] drm_test_drm_bridge_alloc_basic
[10:36:40] [PASSED] drm_test_drm_bridge_alloc_get_put
[10:36:40] ================ [PASSED] drm_bridge_alloc =================
[10:36:40] ============= drm_cmdline_parser (40 subtests) =============
[10:36:40] [PASSED] drm_test_cmdline_force_d_only
[10:36:40] [PASSED] drm_test_cmdline_force_D_only_dvi
[10:36:40] [PASSED] drm_test_cmdline_force_D_only_hdmi
[10:36:40] [PASSED] drm_test_cmdline_force_D_only_not_digital
[10:36:40] [PASSED] drm_test_cmdline_force_e_only
[10:36:40] [PASSED] drm_test_cmdline_res
[10:36:40] [PASSED] drm_test_cmdline_res_vesa
[10:36:40] [PASSED] drm_test_cmdline_res_vesa_rblank
[10:36:40] [PASSED] drm_test_cmdline_res_rblank
[10:36:40] [PASSED] drm_test_cmdline_res_bpp
[10:36:40] [PASSED] drm_test_cmdline_res_refresh
[10:36:40] [PASSED] drm_test_cmdline_res_bpp_refresh
[10:36:40] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[10:36:40] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[10:36:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[10:36:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[10:36:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[10:36:40] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[10:36:40] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[10:36:40] [PASSED] drm_test_cmdline_res_margins_force_on
[10:36:40] [PASSED] drm_test_cmdline_res_vesa_margins
[10:36:40] [PASSED] drm_test_cmdline_name
[10:36:40] [PASSED] drm_test_cmdline_name_bpp
[10:36:40] [PASSED] drm_test_cmdline_name_option
[10:36:40] [PASSED] drm_test_cmdline_name_bpp_option
[10:36:40] [PASSED] drm_test_cmdline_rotate_0
[10:36:40] [PASSED] drm_test_cmdline_rotate_90
[10:36:40] [PASSED] drm_test_cmdline_rotate_180
[10:36:40] [PASSED] drm_test_cmdline_rotate_270
[10:36:40] [PASSED] drm_test_cmdline_hmirror
[10:36:40] [PASSED] drm_test_cmdline_vmirror
[10:36:40] [PASSED] drm_test_cmdline_margin_options
[10:36:40] [PASSED] drm_test_cmdline_multiple_options
[10:36:40] [PASSED] drm_test_cmdline_bpp_extra_and_option
[10:36:40] [PASSED] drm_test_cmdline_extra_and_option
[10:36:40] [PASSED] drm_test_cmdline_freestanding_options
[10:36:40] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[10:36:40] [PASSED] drm_test_cmdline_panel_orientation
[10:36:40] ================ drm_test_cmdline_invalid =================
[10:36:40] [PASSED] margin_only
[10:36:40] [PASSED] interlace_only
[10:36:40] [PASSED] res_missing_x
[10:36:40] [PASSED] res_missing_y
[10:36:40] [PASSED] res_bad_y
[10:36:40] [PASSED] res_missing_y_bpp
[10:36:40] [PASSED] res_bad_bpp
[10:36:40] [PASSED] res_bad_refresh
[10:36:40] [PASSED] res_bpp_refresh_force_on_off
[10:36:40] [PASSED] res_invalid_mode
[10:36:40] [PASSED] res_bpp_wrong_place_mode
[10:36:40] [PASSED] name_bpp_refresh
[10:36:40] [PASSED] name_refresh
[10:36:40] [PASSED] name_refresh_wrong_mode
[10:36:40] [PASSED] name_refresh_invalid_mode
[10:36:40] [PASSED] rotate_multiple
[10:36:40] [PASSED] rotate_invalid_val
[10:36:40] [PASSED] rotate_truncated
[10:36:40] [PASSED] invalid_option
[10:36:40] [PASSED] invalid_tv_option
[10:36:40] [PASSED] truncated_tv_option
[10:36:40] ============ [PASSED] drm_test_cmdline_invalid =============
[10:36:40] =============== drm_test_cmdline_tv_options ===============
[10:36:40] [PASSED] NTSC
[10:36:40] [PASSED] NTSC_443
[10:36:40] [PASSED] NTSC_J
[10:36:40] [PASSED] PAL
[10:36:40] [PASSED] PAL_M
[10:36:40] [PASSED] PAL_N
[10:36:40] [PASSED] SECAM
[10:36:40] [PASSED] MONO_525
[10:36:40] [PASSED] MONO_625
[10:36:40] =========== [PASSED] drm_test_cmdline_tv_options ===========
[10:36:40] =============== [PASSED] drm_cmdline_parser ================
[10:36:40] ========== drmm_connector_hdmi_init (20 subtests) ==========
[10:36:40] [PASSED] drm_test_connector_hdmi_init_valid
[10:36:40] [PASSED] drm_test_connector_hdmi_init_bpc_8
[10:36:40] [PASSED] drm_test_connector_hdmi_init_bpc_10
[10:36:40] [PASSED] drm_test_connector_hdmi_init_bpc_12
[10:36:40] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[10:36:40] [PASSED] drm_test_connector_hdmi_init_bpc_null
[10:36:40] [PASSED] drm_test_connector_hdmi_init_formats_empty
[10:36:40] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[10:36:40] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:36:40] [PASSED] supported_formats=0x9 yuv420_allowed=1
[10:36:40] [PASSED] supported_formats=0x9 yuv420_allowed=0
[10:36:40] [PASSED] supported_formats=0x5 yuv420_allowed=1
[10:36:40] [PASSED] supported_formats=0x5 yuv420_allowed=0
[10:36:40] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[10:36:40] [PASSED] drm_test_connector_hdmi_init_null_ddc
[10:36:40] [PASSED] drm_test_connector_hdmi_init_null_product
[10:36:40] [PASSED] drm_test_connector_hdmi_init_null_vendor
[10:36:40] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[10:36:40] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[10:36:40] [PASSED] drm_test_connector_hdmi_init_product_valid
[10:36:40] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[10:36:40] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[10:36:40] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[10:36:40] ========= drm_test_connector_hdmi_init_type_valid =========
[10:36:40] [PASSED] HDMI-A
[10:36:40] [PASSED] HDMI-B
[10:36:40] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[10:36:40] ======== drm_test_connector_hdmi_init_type_invalid ========
[10:36:40] [PASSED] Unknown
[10:36:40] [PASSED] VGA
[10:36:40] [PASSED] DVI-I
[10:36:40] [PASSED] DVI-D
[10:36:40] [PASSED] DVI-A
[10:36:40] [PASSED] Composite
[10:36:40] [PASSED] SVIDEO
[10:36:40] [PASSED] LVDS
[10:36:40] [PASSED] Component
[10:36:40] [PASSED] DIN
[10:36:40] [PASSED] DP
[10:36:40] [PASSED] TV
[10:36:40] [PASSED] eDP
[10:36:40] [PASSED] Virtual
[10:36:40] [PASSED] DSI
[10:36:40] [PASSED] DPI
[10:36:40] [PASSED] Writeback
[10:36:40] [PASSED] SPI
[10:36:40] [PASSED] USB
[10:36:40] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[10:36:40] ============ [PASSED] drmm_connector_hdmi_init =============
[10:36:40] ============= drmm_connector_init (3 subtests) =============
[10:36:40] [PASSED] drm_test_drmm_connector_init
[10:36:40] [PASSED] drm_test_drmm_connector_init_null_ddc
[10:36:40] ========= drm_test_drmm_connector_init_type_valid =========
[10:36:40] [PASSED] Unknown
[10:36:40] [PASSED] VGA
[10:36:40] [PASSED] DVI-I
[10:36:40] [PASSED] DVI-D
[10:36:40] [PASSED] DVI-A
[10:36:40] [PASSED] Composite
[10:36:40] [PASSED] SVIDEO
[10:36:40] [PASSED] LVDS
[10:36:40] [PASSED] Component
[10:36:40] [PASSED] DIN
[10:36:40] [PASSED] DP
[10:36:40] [PASSED] HDMI-A
[10:36:40] [PASSED] HDMI-B
[10:36:40] [PASSED] TV
[10:36:40] [PASSED] eDP
[10:36:40] [PASSED] Virtual
[10:36:40] [PASSED] DSI
[10:36:40] [PASSED] DPI
[10:36:40] [PASSED] Writeback
[10:36:40] [PASSED] SPI
[10:36:40] [PASSED] USB
[10:36:40] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[10:36:40] =============== [PASSED] drmm_connector_init ===============
[10:36:40] ========= drm_connector_dynamic_init (6 subtests) ==========
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_init
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_init_properties
[10:36:40] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[10:36:40] [PASSED] Unknown
[10:36:40] [PASSED] VGA
[10:36:40] [PASSED] DVI-I
[10:36:40] [PASSED] DVI-D
[10:36:40] [PASSED] DVI-A
[10:36:40] [PASSED] Composite
[10:36:40] [PASSED] SVIDEO
[10:36:40] [PASSED] LVDS
[10:36:40] [PASSED] Component
[10:36:40] [PASSED] DIN
[10:36:40] [PASSED] DP
[10:36:40] [PASSED] HDMI-A
[10:36:40] [PASSED] HDMI-B
[10:36:40] [PASSED] TV
[10:36:40] [PASSED] eDP
[10:36:40] [PASSED] Virtual
[10:36:40] [PASSED] DSI
[10:36:40] [PASSED] DPI
[10:36:40] [PASSED] Writeback
[10:36:40] [PASSED] SPI
[10:36:40] [PASSED] USB
[10:36:40] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[10:36:40] ======== drm_test_drm_connector_dynamic_init_name =========
[10:36:40] [PASSED] Unknown
[10:36:40] [PASSED] VGA
[10:36:40] [PASSED] DVI-I
[10:36:40] [PASSED] DVI-D
[10:36:40] [PASSED] DVI-A
[10:36:40] [PASSED] Composite
[10:36:40] [PASSED] SVIDEO
[10:36:40] [PASSED] LVDS
[10:36:40] [PASSED] Component
[10:36:40] [PASSED] DIN
[10:36:40] [PASSED] DP
[10:36:40] [PASSED] HDMI-A
[10:36:40] [PASSED] HDMI-B
[10:36:40] [PASSED] TV
[10:36:40] [PASSED] eDP
[10:36:40] [PASSED] Virtual
[10:36:40] [PASSED] DSI
[10:36:40] [PASSED] DPI
[10:36:40] [PASSED] Writeback
[10:36:40] [PASSED] SPI
[10:36:40] [PASSED] USB
[10:36:40] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[10:36:40] =========== [PASSED] drm_connector_dynamic_init ============
[10:36:40] ==== drm_connector_dynamic_register_early (4 subtests) =====
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[10:36:40] ====== [PASSED] drm_connector_dynamic_register_early =======
[10:36:40] ======= drm_connector_dynamic_register (7 subtests) ========
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[10:36:40] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[10:36:40] ========= [PASSED] drm_connector_dynamic_register ==========
[10:36:40] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[10:36:40] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[10:36:40] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[10:36:40] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[10:36:40] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[10:36:40] ========== drm_test_get_tv_mode_from_name_valid ===========
[10:36:40] [PASSED] NTSC
[10:36:40] [PASSED] NTSC-443
[10:36:40] [PASSED] NTSC-J
[10:36:40] [PASSED] PAL
[10:36:40] [PASSED] PAL-M
[10:36:40] [PASSED] PAL-N
[10:36:40] [PASSED] SECAM
[10:36:40] [PASSED] Mono
[10:36:40] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[10:36:40] [PASSED] drm_test_get_tv_mode_from_name_truncated
[10:36:40] ============ [PASSED] drm_get_tv_mode_from_name ============
[10:36:40] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[10:36:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[10:36:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[10:36:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[10:36:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[10:36:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[10:36:40] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[10:36:40] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[10:36:40] [PASSED] VIC 96
[10:36:40] [PASSED] VIC 97
[10:36:40] [PASSED] VIC 101
[10:36:40] [PASSED] VIC 102
[10:36:40] [PASSED] VIC 106
[10:36:40] [PASSED] VIC 107
[10:36:40] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[10:36:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[10:36:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[10:36:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[10:36:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[10:36:40] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[10:36:40] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[10:36:40] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[10:36:40] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[10:36:40] [PASSED] Automatic
[10:36:40] [PASSED] Full
[10:36:40] [PASSED] Limited 16:235
[10:36:40] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[10:36:40] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[10:36:40] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[10:36:40] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[10:36:40] === drm_test_drm_hdmi_connector_get_output_format_name ====
[10:36:40] [PASSED] RGB
[10:36:40] [PASSED] YUV 4:2:0
[10:36:40] [PASSED] YUV 4:2:2
[10:36:40] [PASSED] YUV 4:4:4
[10:36:40] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[10:36:40] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[10:36:40] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[10:36:40] ============= drm_damage_helper (21 subtests) ==============
[10:36:40] [PASSED] drm_test_damage_iter_no_damage
[10:36:40] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[10:36:40] [PASSED] drm_test_damage_iter_no_damage_src_moved
[10:36:40] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[10:36:40] [PASSED] drm_test_damage_iter_no_damage_not_visible
[10:36:40] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[10:36:40] [PASSED] drm_test_damage_iter_no_damage_no_fb
[10:36:40] [PASSED] drm_test_damage_iter_simple_damage
[10:36:40] [PASSED] drm_test_damage_iter_single_damage
[10:36:40] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[10:36:40] [PASSED] drm_test_damage_iter_single_damage_outside_src
[10:36:40] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[10:36:40] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[10:36:40] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[10:36:40] [PASSED] drm_test_damage_iter_single_damage_src_moved
[10:36:40] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[10:36:40] [PASSED] drm_test_damage_iter_damage
[10:36:40] [PASSED] drm_test_damage_iter_damage_one_intersect
[10:36:40] [PASSED] drm_test_damage_iter_damage_one_outside
[10:36:40] [PASSED] drm_test_damage_iter_damage_src_moved
[10:36:40] [PASSED] drm_test_damage_iter_damage_not_visible
[10:36:40] ================ [PASSED] drm_damage_helper ================
[10:36:40] ============== drm_dp_mst_helper (3 subtests) ==============
[10:36:40] ============== drm_test_dp_mst_calc_pbn_mode ==============
[10:36:40] [PASSED] Clock 154000 BPP 30 DSC disabled
[10:36:40] [PASSED] Clock 234000 BPP 30 DSC disabled
[10:36:40] [PASSED] Clock 297000 BPP 24 DSC disabled
[10:36:40] [PASSED] Clock 332880 BPP 24 DSC enabled
[10:36:40] [PASSED] Clock 324540 BPP 24 DSC enabled
[10:36:40] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[10:36:40] ============== drm_test_dp_mst_calc_pbn_div ===============
[10:36:40] [PASSED] Link rate 2000000 lane count 4
[10:36:40] [PASSED] Link rate 2000000 lane count 2
[10:36:40] [PASSED] Link rate 2000000 lane count 1
[10:36:40] [PASSED] Link rate 1350000 lane count 4
[10:36:40] [PASSED] Link rate 1350000 lane count 2
[10:36:40] [PASSED] Link rate 1350000 lane count 1
[10:36:40] [PASSED] Link rate 1000000 lane count 4
[10:36:40] [PASSED] Link rate 1000000 lane count 2
[10:36:40] [PASSED] Link rate 1000000 lane count 1
[10:36:40] [PASSED] Link rate 810000 lane count 4
[10:36:40] [PASSED] Link rate 810000 lane count 2
[10:36:40] [PASSED] Link rate 810000 lane count 1
[10:36:40] [PASSED] Link rate 540000 lane count 4
[10:36:40] [PASSED] Link rate 540000 lane count 2
[10:36:40] [PASSED] Link rate 540000 lane count 1
[10:36:40] [PASSED] Link rate 270000 lane count 4
[10:36:40] [PASSED] Link rate 270000 lane count 2
[10:36:40] [PASSED] Link rate 270000 lane count 1
[10:36:40] [PASSED] Link rate 162000 lane count 4
[10:36:40] [PASSED] Link rate 162000 lane count 2
[10:36:40] [PASSED] Link rate 162000 lane count 1
[10:36:40] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[10:36:40] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[10:36:40] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[10:36:40] [PASSED] DP_POWER_UP_PHY with port number
[10:36:40] [PASSED] DP_POWER_DOWN_PHY with port number
[10:36:40] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[10:36:40] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[10:36:40] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[10:36:40] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[10:36:40] [PASSED] DP_QUERY_PAYLOAD with port number
[10:36:40] [PASSED] DP_QUERY_PAYLOAD with VCPI
[10:36:40] [PASSED] DP_REMOTE_DPCD_READ with port number
[10:36:40] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[10:36:40] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[10:36:40] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[10:36:40] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[10:36:40] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[10:36:40] [PASSED] DP_REMOTE_I2C_READ with port number
[10:36:40] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[10:36:40] [PASSED] DP_REMOTE_I2C_READ with transactions array
[10:36:40] [PASSED] DP_REMOTE_I2C_WRITE with port number
[10:36:40] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[10:36:40] [PASSED] DP_REMOTE_I2C_WRITE with data array
[10:36:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[10:36:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[10:36:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[10:36:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[10:36:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[10:36:40] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[10:36:40] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[10:36:40] ================ [PASSED] drm_dp_mst_helper ================
[10:36:40] ================== drm_exec (7 subtests) ===================
[10:36:40] [PASSED] sanitycheck
[10:36:40] [PASSED] test_lock
[10:36:40] [PASSED] test_lock_unlock
[10:36:40] [PASSED] test_duplicates
[10:36:40] [PASSED] test_prepare
[10:36:40] [PASSED] test_prepare_array
[10:36:40] [PASSED] test_multiple_loops
[10:36:40] ==================== [PASSED] drm_exec =====================
[10:36:40] =========== drm_format_helper_test (17 subtests) ===========
[10:36:40] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[10:36:40] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[10:36:40] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[10:36:40] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[10:36:40] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[10:36:40] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[10:36:40] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[10:36:40] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[10:36:40] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[10:36:40] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[10:36:40] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[10:36:40] ============== drm_test_fb_xrgb8888_to_mono ===============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[10:36:40] ==================== drm_test_fb_swab =====================
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ================ [PASSED] drm_test_fb_swab =================
[10:36:40] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[10:36:40] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[10:36:40] [PASSED] single_pixel_source_buffer
[10:36:40] [PASSED] single_pixel_clip_rectangle
[10:36:40] [PASSED] well_known_colors
[10:36:40] [PASSED] destination_pitch
[10:36:40] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[10:36:40] ================= drm_test_fb_clip_offset =================
[10:36:40] [PASSED] pass through
[10:36:40] [PASSED] horizontal offset
[10:36:40] [PASSED] vertical offset
[10:36:40] [PASSED] horizontal and vertical offset
[10:36:40] [PASSED] horizontal offset (custom pitch)
[10:36:40] [PASSED] vertical offset (custom pitch)
[10:36:40] [PASSED] horizontal and vertical offset (custom pitch)
[10:36:40] ============= [PASSED] drm_test_fb_clip_offset =============
[10:36:40] =================== drm_test_fb_memcpy ====================
[10:36:40] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[10:36:40] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[10:36:40] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[10:36:40] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[10:36:40] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[10:36:40] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[10:36:40] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[10:36:40] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[10:36:40] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[10:36:40] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[10:36:40] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[10:36:40] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[10:36:40] =============== [PASSED] drm_test_fb_memcpy ================
[10:36:40] ============= [PASSED] drm_format_helper_test ==============
[10:36:40] ================= drm_format (18 subtests) =================
[10:36:40] [PASSED] drm_test_format_block_width_invalid
[10:36:40] [PASSED] drm_test_format_block_width_one_plane
[10:36:40] [PASSED] drm_test_format_block_width_two_plane
[10:36:40] [PASSED] drm_test_format_block_width_three_plane
[10:36:40] [PASSED] drm_test_format_block_width_tiled
[10:36:40] [PASSED] drm_test_format_block_height_invalid
[10:36:40] [PASSED] drm_test_format_block_height_one_plane
[10:36:40] [PASSED] drm_test_format_block_height_two_plane
[10:36:40] [PASSED] drm_test_format_block_height_three_plane
[10:36:40] [PASSED] drm_test_format_block_height_tiled
[10:36:40] [PASSED] drm_test_format_min_pitch_invalid
[10:36:40] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[10:36:40] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[10:36:40] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[10:36:40] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[10:36:40] [PASSED] drm_test_format_min_pitch_two_plane
[10:36:40] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[10:36:40] [PASSED] drm_test_format_min_pitch_tiled
[10:36:40] =================== [PASSED] drm_format ====================
[10:36:40] ============== drm_framebuffer (10 subtests) ===============
[10:36:40] ========== drm_test_framebuffer_check_src_coords ==========
[10:36:40] [PASSED] Success: source fits into fb
[10:36:40] [PASSED] Fail: overflowing fb with x-axis coordinate
[10:36:40] [PASSED] Fail: overflowing fb with y-axis coordinate
[10:36:40] [PASSED] Fail: overflowing fb with source width
[10:36:40] [PASSED] Fail: overflowing fb with source height
[10:36:40] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[10:36:40] [PASSED] drm_test_framebuffer_cleanup
[10:36:40] =============== drm_test_framebuffer_create ===============
[10:36:40] [PASSED] ABGR8888 normal sizes
[10:36:40] [PASSED] ABGR8888 max sizes
[10:36:40] [PASSED] ABGR8888 pitch greater than min required
[10:36:40] [PASSED] ABGR8888 pitch less than min required
[10:36:40] [PASSED] ABGR8888 Invalid width
[10:36:40] [PASSED] ABGR8888 Invalid buffer handle
[10:36:40] [PASSED] No pixel format
[10:36:40] [PASSED] ABGR8888 Width 0
[10:36:40] [PASSED] ABGR8888 Height 0
[10:36:40] [PASSED] ABGR8888 Out of bound height * pitch combination
[10:36:40] [PASSED] ABGR8888 Large buffer offset
[10:36:40] [PASSED] ABGR8888 Buffer offset for inexistent plane
[10:36:40] [PASSED] ABGR8888 Invalid flag
[10:36:40] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[10:36:40] [PASSED] ABGR8888 Valid buffer modifier
[10:36:40] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[10:36:40] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[10:36:40] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[10:36:40] [PASSED] NV12 Normal sizes
[10:36:40] [PASSED] NV12 Max sizes
[10:36:40] [PASSED] NV12 Invalid pitch
[10:36:40] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[10:36:40] [PASSED] NV12 different modifier per-plane
[10:36:40] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[10:36:40] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[10:36:40] [PASSED] NV12 Modifier for inexistent plane
[10:36:40] [PASSED] NV12 Handle for inexistent plane
[10:36:40] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[10:36:40] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[10:36:40] [PASSED] YVU420 Normal sizes
[10:36:40] [PASSED] YVU420 Max sizes
[10:36:40] [PASSED] YVU420 Invalid pitch
[10:36:40] [PASSED] YVU420 Different pitches
[10:36:40] [PASSED] YVU420 Different buffer offsets/pitches
[10:36:40] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[10:36:40] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[10:36:40] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[10:36:40] [PASSED] YVU420 Valid modifier
[10:36:40] [PASSED] YVU420 Different modifiers per plane
[10:36:40] [PASSED] YVU420 Modifier for inexistent plane
[10:36:40] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[10:36:40] [PASSED] X0L2 Normal sizes
[10:36:40] [PASSED] X0L2 Max sizes
[10:36:40] [PASSED] X0L2 Invalid pitch
[10:36:40] [PASSED] X0L2 Pitch greater than minimum required
[10:36:40] [PASSED] X0L2 Handle for inexistent plane
[10:36:40] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[10:36:40] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[10:36:40] [PASSED] X0L2 Valid modifier
[10:36:40] [PASSED] X0L2 Modifier for inexistent plane
[10:36:40] =========== [PASSED] drm_test_framebuffer_create ===========
[10:36:40] [PASSED] drm_test_framebuffer_free
[10:36:40] [PASSED] drm_test_framebuffer_init
[10:36:40] [PASSED] drm_test_framebuffer_init_bad_format
[10:36:40] [PASSED] drm_test_framebuffer_init_dev_mismatch
[10:36:40] [PASSED] drm_test_framebuffer_lookup
[10:36:40] [PASSED] drm_test_framebuffer_lookup_inexistent
[10:36:40] [PASSED] drm_test_framebuffer_modifiers_not_supported
[10:36:40] ================= [PASSED] drm_framebuffer =================
[10:36:40] ================ drm_gem_shmem (8 subtests) ================
[10:36:40] [PASSED] drm_gem_shmem_test_obj_create
[10:36:40] [PASSED] drm_gem_shmem_test_obj_create_private
[10:36:40] [PASSED] drm_gem_shmem_test_pin_pages
[10:36:40] [PASSED] drm_gem_shmem_test_vmap
[10:36:40] [PASSED] drm_gem_shmem_test_get_sg_table
[10:36:40] [PASSED] drm_gem_shmem_test_get_pages_sgt
[10:36:40] [PASSED] drm_gem_shmem_test_madvise
[10:36:40] [PASSED] drm_gem_shmem_test_purge
[10:36:40] ================== [PASSED] drm_gem_shmem ==================
[10:36:40] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[10:36:40] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[10:36:40] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[10:36:40] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[10:36:40] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[10:36:40] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[10:36:40] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[10:36:40] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[10:36:40] [PASSED] Automatic
[10:36:40] [PASSED] Full
[10:36:40] [PASSED] Limited 16:235
[10:36:40] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[10:36:40] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[10:36:40] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[10:36:40] [PASSED] drm_test_check_disable_connector
[10:36:40] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[10:36:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[10:36:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[10:36:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[10:36:40] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[10:36:40] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[10:36:40] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[10:36:40] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[10:36:40] [PASSED] drm_test_check_output_bpc_dvi
[10:36:40] [PASSED] drm_test_check_output_bpc_format_vic_1
[10:36:40] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[10:36:40] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[10:36:40] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[10:36:40] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[10:36:40] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[10:36:40] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[10:36:40] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[10:36:40] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[10:36:40] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[10:36:40] [PASSED] drm_test_check_broadcast_rgb_value
[10:36:40] [PASSED] drm_test_check_bpc_8_value
[10:36:40] [PASSED] drm_test_check_bpc_10_value
[10:36:40] [PASSED] drm_test_check_bpc_12_value
[10:36:40] [PASSED] drm_test_check_format_value
[10:36:40] [PASSED] drm_test_check_tmds_char_value
[10:36:40] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[10:36:40] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[10:36:40] [PASSED] drm_test_check_mode_valid
[10:36:40] [PASSED] drm_test_check_mode_valid_reject
[10:36:40] [PASSED] drm_test_check_mode_valid_reject_rate
[10:36:40] [PASSED] drm_test_check_mode_valid_reject_max_clock
[10:36:40] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[10:36:40] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[10:36:40] [PASSED] drm_test_check_infoframes
[10:36:40] [PASSED] drm_test_check_reject_avi_infoframe
[10:36:40] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[10:36:40] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[10:36:40] [PASSED] drm_test_check_reject_audio_infoframe
[10:36:40] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[10:36:40] ================= drm_managed (2 subtests) =================
[10:36:40] [PASSED] drm_test_managed_release_action
[10:36:40] [PASSED] drm_test_managed_run_action
[10:36:40] =================== [PASSED] drm_managed ===================
[10:36:40] =================== drm_mm (6 subtests) ====================
[10:36:40] [PASSED] drm_test_mm_init
[10:36:40] [PASSED] drm_test_mm_debug
[10:36:40] [PASSED] drm_test_mm_align32
[10:36:40] [PASSED] drm_test_mm_align64
[10:36:40] [PASSED] drm_test_mm_lowest
[10:36:40] [PASSED] drm_test_mm_highest
[10:36:40] ===================== [PASSED] drm_mm ======================
[10:36:40] ============= drm_modes_analog_tv (5 subtests) =============
[10:36:40] [PASSED] drm_test_modes_analog_tv_mono_576i
[10:36:40] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[10:36:40] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[10:36:40] [PASSED] drm_test_modes_analog_tv_pal_576i
[10:36:40] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[10:36:40] =============== [PASSED] drm_modes_analog_tv ===============
[10:36:40] ============== drm_plane_helper (2 subtests) ===============
[10:36:40] =============== drm_test_check_plane_state ================
[10:36:40] [PASSED] clipping_simple
[10:36:40] [PASSED] clipping_rotate_reflect
[10:36:40] [PASSED] positioning_simple
[10:36:40] [PASSED] upscaling
[10:36:40] [PASSED] downscaling
[10:36:40] [PASSED] rounding1
[10:36:40] [PASSED] rounding2
[10:36:40] [PASSED] rounding3
[10:36:40] [PASSED] rounding4
[10:36:40] =========== [PASSED] drm_test_check_plane_state ============
[10:36:40] =========== drm_test_check_invalid_plane_state ============
[10:36:40] [PASSED] positioning_invalid
[10:36:40] [PASSED] upscaling_invalid
[10:36:40] [PASSED] downscaling_invalid
[10:36:40] ======= [PASSED] drm_test_check_invalid_plane_state ========
[10:36:40] ================ [PASSED] drm_plane_helper =================
[10:36:40] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[10:36:40] ====== drm_test_connector_helper_tv_get_modes_check =======
[10:36:40] [PASSED] None
[10:36:40] [PASSED] PAL
[10:36:40] [PASSED] NTSC
[10:36:40] [PASSED] Both, NTSC Default
[10:36:40] [PASSED] Both, PAL Default
[10:36:40] [PASSED] Both, NTSC Default, with PAL on command-line
[10:36:40] [PASSED] Both, PAL Default, with NTSC on command-line
[10:36:40] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[10:36:40] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[10:36:40] ================== drm_rect (9 subtests) ===================
[10:36:40] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[10:36:40] [PASSED] drm_test_rect_clip_scaled_not_clipped
[10:36:40] [PASSED] drm_test_rect_clip_scaled_clipped
[10:36:40] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[10:36:40] ================= drm_test_rect_intersect =================
[10:36:40] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[10:36:40] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[10:36:40] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[10:36:40] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[10:36:40] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[10:36:40] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[10:36:40] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[10:36:40] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[10:36:40] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[10:36:40] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[10:36:40] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[10:36:40] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[10:36:40] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[10:36:40] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[10:36:40] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[10:36:40] ============= [PASSED] drm_test_rect_intersect =============
[10:36:40] ================ drm_test_rect_calc_hscale ================
[10:36:40] [PASSED] normal use
[10:36:40] [PASSED] out of max range
[10:36:40] [PASSED] out of min range
[10:36:40] [PASSED] zero dst
[10:36:40] [PASSED] negative src
[10:36:40] [PASSED] negative dst
[10:36:40] ============ [PASSED] drm_test_rect_calc_hscale ============
[10:36:40] ================ drm_test_rect_calc_vscale ================
[10:36:40] [PASSED] normal use
[10:36:40] [PASSED] out of max range
[10:36:40] [PASSED] out of min range
[10:36:40] [PASSED] zero dst
[10:36:40] [PASSED] negative src
[10:36:40] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[10:36:40] ============ [PASSED] drm_test_rect_calc_vscale ============
[10:36:40] ================== drm_test_rect_rotate ===================
[10:36:40] [PASSED] reflect-x
[10:36:40] [PASSED] reflect-y
[10:36:40] [PASSED] rotate-0
[10:36:40] [PASSED] rotate-90
[10:36:40] [PASSED] rotate-180
[10:36:40] [PASSED] rotate-270
[10:36:40] ============== [PASSED] drm_test_rect_rotate ===============
[10:36:40] ================ drm_test_rect_rotate_inv =================
[10:36:40] [PASSED] reflect-x
[10:36:40] [PASSED] reflect-y
[10:36:40] [PASSED] rotate-0
[10:36:40] [PASSED] rotate-90
[10:36:40] [PASSED] rotate-180
[10:36:40] [PASSED] rotate-270
[10:36:40] ============ [PASSED] drm_test_rect_rotate_inv =============
[10:36:40] ==================== [PASSED] drm_rect =====================
[10:36:40] ============ drm_sysfb_modeset_test (1 subtest) ============
[10:36:40] ============ drm_test_sysfb_build_fourcc_list =============
[10:36:40] [PASSED] no native formats
[10:36:40] [PASSED] XRGB8888 as native format
[10:36:40] [PASSED] remove duplicates
[10:36:40] [PASSED] convert alpha formats
[10:36:40] [PASSED] random formats
[10:36:40] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[10:36:40] ============= [PASSED] drm_sysfb_modeset_test ==============
[10:36:40] ================== drm_fixp (2 subtests) ===================
[10:36:40] [PASSED] drm_test_int2fixp
[10:36:40] [PASSED] drm_test_sm2fixp
[10:36:40] ==================== [PASSED] drm_fixp =====================
[10:36:40] ============================================================
[10:36:40] Testing complete. Ran 621 tests: passed: 621
[10:36:40] Elapsed time: 26.541s total, 1.765s configuring, 24.560s building, 0.168s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[10:36:40] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[10:36:42] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[10:36:51] Starting KUnit Kernel (1/1)...
[10:36:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[10:36:51] ================= ttm_device (5 subtests) ==================
[10:36:51] [PASSED] ttm_device_init_basic
[10:36:51] [PASSED] ttm_device_init_multiple
[10:36:51] [PASSED] ttm_device_fini_basic
[10:36:51] [PASSED] ttm_device_init_no_vma_man
[10:36:51] ================== ttm_device_init_pools ==================
[10:36:51] [PASSED] No DMA allocations, no DMA32 required
[10:36:51] [PASSED] DMA allocations, DMA32 required
[10:36:51] [PASSED] No DMA allocations, DMA32 required
[10:36:51] [PASSED] DMA allocations, no DMA32 required
[10:36:51] ============== [PASSED] ttm_device_init_pools ==============
[10:36:51] =================== [PASSED] ttm_device ====================
[10:36:51] ================== ttm_pool (8 subtests) ===================
[10:36:51] ================== ttm_pool_alloc_basic ===================
[10:36:51] [PASSED] One page
[10:36:51] [PASSED] More than one page
[10:36:51] [PASSED] Above the allocation limit
[10:36:51] [PASSED] One page, with coherent DMA mappings enabled
[10:36:51] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:36:51] ============== [PASSED] ttm_pool_alloc_basic ===============
[10:36:51] ============== ttm_pool_alloc_basic_dma_addr ==============
[10:36:51] [PASSED] One page
[10:36:51] [PASSED] More than one page
[10:36:51] [PASSED] Above the allocation limit
[10:36:51] [PASSED] One page, with coherent DMA mappings enabled
[10:36:51] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[10:36:51] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[10:36:51] [PASSED] ttm_pool_alloc_order_caching_match
[10:36:51] [PASSED] ttm_pool_alloc_caching_mismatch
[10:36:51] [PASSED] ttm_pool_alloc_order_mismatch
[10:36:51] [PASSED] ttm_pool_free_dma_alloc
[10:36:51] [PASSED] ttm_pool_free_no_dma_alloc
[10:36:51] [PASSED] ttm_pool_fini_basic
[10:36:51] ==================== [PASSED] ttm_pool =====================
[10:36:51] ================ ttm_resource (8 subtests) =================
[10:36:51] ================= ttm_resource_init_basic =================
[10:36:51] [PASSED] Init resource in TTM_PL_SYSTEM
[10:36:51] [PASSED] Init resource in TTM_PL_VRAM
[10:36:51] [PASSED] Init resource in a private placement
[10:36:51] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[10:36:51] ============= [PASSED] ttm_resource_init_basic =============
[10:36:51] [PASSED] ttm_resource_init_pinned
[10:36:51] [PASSED] ttm_resource_fini_basic
[10:36:51] [PASSED] ttm_resource_manager_init_basic
[10:36:51] [PASSED] ttm_resource_manager_usage_basic
[10:36:51] [PASSED] ttm_resource_manager_set_used_basic
[10:36:51] [PASSED] ttm_sys_man_alloc_basic
[10:36:51] [PASSED] ttm_sys_man_free_basic
[10:36:51] ================== [PASSED] ttm_resource ===================
[10:36:51] =================== ttm_tt (15 subtests) ===================
[10:36:51] ==================== ttm_tt_init_basic ====================
[10:36:51] [PASSED] Page-aligned size
[10:36:51] [PASSED] Extra pages requested
[10:36:51] ================ [PASSED] ttm_tt_init_basic ================
[10:36:51] [PASSED] ttm_tt_init_misaligned
[10:36:51] [PASSED] ttm_tt_fini_basic
[10:36:51] [PASSED] ttm_tt_fini_sg
[10:36:51] [PASSED] ttm_tt_fini_shmem
[10:36:51] [PASSED] ttm_tt_create_basic
[10:36:51] [PASSED] ttm_tt_create_invalid_bo_type
[10:36:51] [PASSED] ttm_tt_create_ttm_exists
[10:36:51] [PASSED] ttm_tt_create_failed
[10:36:51] [PASSED] ttm_tt_destroy_basic
[10:36:51] [PASSED] ttm_tt_populate_null_ttm
[10:36:51] [PASSED] ttm_tt_populate_populated_ttm
[10:36:51] [PASSED] ttm_tt_unpopulate_basic
[10:36:51] [PASSED] ttm_tt_unpopulate_empty_ttm
[10:36:51] [PASSED] ttm_tt_swapin_basic
[10:36:51] ===================== [PASSED] ttm_tt ======================
[10:36:51] =================== ttm_bo (14 subtests) ===================
[10:36:51] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[10:36:51] [PASSED] Cannot be interrupted and sleeps
[10:36:51] [PASSED] Cannot be interrupted, locks straight away
[10:36:51] [PASSED] Can be interrupted, sleeps
[10:36:51] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[10:36:51] [PASSED] ttm_bo_reserve_locked_no_sleep
[10:36:51] [PASSED] ttm_bo_reserve_no_wait_ticket
[10:36:51] [PASSED] ttm_bo_reserve_double_resv
[10:36:51] [PASSED] ttm_bo_reserve_interrupted
[10:36:51] [PASSED] ttm_bo_reserve_deadlock
[10:36:51] [PASSED] ttm_bo_unreserve_basic
[10:36:51] [PASSED] ttm_bo_unreserve_pinned
[10:36:51] [PASSED] ttm_bo_unreserve_bulk
[10:36:51] [PASSED] ttm_bo_fini_basic
[10:36:51] [PASSED] ttm_bo_fini_shared_resv
[10:36:51] [PASSED] ttm_bo_pin_basic
[10:36:51] [PASSED] ttm_bo_pin_unpin_resource
[10:36:51] [PASSED] ttm_bo_multiple_pin_one_unpin
[10:36:51] ===================== [PASSED] ttm_bo ======================
[10:36:51] ============== ttm_bo_validate (22 subtests) ===============
[10:36:51] ============== ttm_bo_init_reserved_sys_man ===============
[10:36:51] [PASSED] Buffer object for userspace
[10:36:51] [PASSED] Kernel buffer object
[10:36:51] [PASSED] Shared buffer object
[10:36:51] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[10:36:51] ============== ttm_bo_init_reserved_mock_man ==============
[10:36:51] [PASSED] Buffer object for userspace
[10:36:51] [PASSED] Kernel buffer object
[10:36:51] [PASSED] Shared buffer object
[10:36:51] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[10:36:51] [PASSED] ttm_bo_init_reserved_resv
[10:36:51] ================== ttm_bo_validate_basic ==================
[10:36:51] [PASSED] Buffer object for userspace
[10:36:51] [PASSED] Kernel buffer object
[10:36:51] [PASSED] Shared buffer object
[10:36:51] ============== [PASSED] ttm_bo_validate_basic ==============
[10:36:51] [PASSED] ttm_bo_validate_invalid_placement
[10:36:51] ============= ttm_bo_validate_same_placement ==============
[10:36:51] [PASSED] System manager
[10:36:51] [PASSED] VRAM manager
[10:36:51] ========= [PASSED] ttm_bo_validate_same_placement ==========
[10:36:51] [PASSED] ttm_bo_validate_failed_alloc
[10:36:51] [PASSED] ttm_bo_validate_pinned
[10:36:51] [PASSED] ttm_bo_validate_busy_placement
[10:36:51] ================ ttm_bo_validate_multihop =================
[10:36:51] [PASSED] Buffer object for userspace
[10:36:51] [PASSED] Kernel buffer object
[10:36:51] [PASSED] Shared buffer object
[10:36:51] ============ [PASSED] ttm_bo_validate_multihop =============
[10:36:51] ========== ttm_bo_validate_no_placement_signaled ==========
[10:36:51] [PASSED] Buffer object in system domain, no page vector
[10:36:51] [PASSED] Buffer object in system domain with an existing page vector
[10:36:51] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[10:36:51] ======== ttm_bo_validate_no_placement_not_signaled ========
[10:36:51] [PASSED] Buffer object for userspace
[10:36:51] [PASSED] Kernel buffer object
[10:36:51] [PASSED] Shared buffer object
[10:36:51] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[10:36:51] [PASSED] ttm_bo_validate_move_fence_signaled
[10:36:51] ========= ttm_bo_validate_move_fence_not_signaled =========
[10:36:51] [PASSED] Waits for GPU
[10:36:51] [PASSED] Tries to lock straight away
[10:36:51] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[10:36:51] [PASSED] ttm_bo_validate_swapout
[10:36:51] [PASSED] ttm_bo_validate_happy_evict
[10:36:51] [PASSED] ttm_bo_validate_all_pinned_evict
[10:36:51] [PASSED] ttm_bo_validate_allowed_only_evict
[10:36:51] [PASSED] ttm_bo_validate_deleted_evict
[10:36:51] [PASSED] ttm_bo_validate_busy_domain_evict
[10:36:51] [PASSED] ttm_bo_validate_evict_gutting
[10:36:51] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[10:36:51] ================= [PASSED] ttm_bo_validate =================
[10:36:51] ============================================================
[10:36:51] Testing complete. Ran 102 tests: passed: 102
[10:36:51] Elapsed time: 11.389s total, 1.690s configuring, 9.483s building, 0.180s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 10+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915/psr: Do not use pipe_src as borders for SU area (rev2)
2026-03-27 11:45 [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area Jouni Högander
` (5 preceding siblings ...)
2026-04-01 10:36 ` ✓ CI.KUnit: success " Patchwork
@ 2026-04-01 11:10 ` Patchwork
2026-04-01 16:24 ` ✓ Xe.CI.FULL: " Patchwork
7 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-04-01 11:10 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-xe
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== Series Details ==
Series: drm/i915/psr: Do not use pipe_src as borders for SU area (rev2)
URL : https://patchwork.freedesktop.org/series/163985/
State : success
== Summary ==
CI Bug Log - changes from xe-4832-693faeb5d81d15bbf46552dc3a225072e645d6dc_BAT -> xe-pw-163985v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-163985v2_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
- bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7483])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4832-693faeb5d81d15bbf46552dc3a225072e645d6dc/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163985v2/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
#### Possible fixes ####
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- bat-adlp-7: [DMESG-WARN][3] ([Intel XE#7483]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4832-693faeb5d81d15bbf46552dc3a225072e645d6dc/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163985v2/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
[Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483
Build changes
-------------
* Linux: xe-4832-693faeb5d81d15bbf46552dc3a225072e645d6dc -> xe-pw-163985v2
IGT_8839: 8839
xe-4832-693faeb5d81d15bbf46552dc3a225072e645d6dc: 693faeb5d81d15bbf46552dc3a225072e645d6dc
xe-pw-163985v2: 163985v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163985v2/index.html
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^ permalink raw reply [flat|nested] 10+ messages in thread* ✓ Xe.CI.FULL: success for drm/i915/psr: Do not use pipe_src as borders for SU area (rev2)
2026-03-27 11:45 [PATCH] drm/i915/psr: Do not use pipe_src as borders for SU area Jouni Högander
` (6 preceding siblings ...)
2026-04-01 11:10 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-04-01 16:24 ` Patchwork
7 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-04-01 16:24 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2278 bytes --]
== Series Details ==
Series: drm/i915/psr: Do not use pipe_src as borders for SU area (rev2)
URL : https://patchwork.freedesktop.org/series/163985/
State : success
== Summary ==
CI Bug Log - changes from xe-4832-693faeb5d81d15bbf46552dc3a225072e645d6dc_FULL -> xe-pw-163985v2_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-163985v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-32bpp-rotate-0:
- shard-lnl: [PASS][1] -> [INCOMPLETE][2] ([Intel XE#5643])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4832-693faeb5d81d15bbf46552dc3a225072e645d6dc/shard-lnl-2/igt@kms_big_fb@linear-32bpp-rotate-0.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163985v2/shard-lnl-4/igt@kms_big_fb@linear-32bpp-rotate-0.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [PASS][3] -> [FAIL][4] ([Intel XE#301]) +1 other test fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4832-693faeb5d81d15bbf46552dc3a225072e645d6dc/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163985v2/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@xe_exec_multi_queue@many-queues-close-fd:
- shard-lnl: NOTRUN -> [SKIP][5] ([Intel XE#6874])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163985v2/shard-lnl-7/igt@xe_exec_multi_queue@many-queues-close-fd.html
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#5643]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5643
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
Build changes
-------------
* Linux: xe-4832-693faeb5d81d15bbf46552dc3a225072e645d6dc -> xe-pw-163985v2
IGT_8839: 8839
xe-4832-693faeb5d81d15bbf46552dc3a225072e645d6dc: 693faeb5d81d15bbf46552dc3a225072e645d6dc
xe-pw-163985v2: 163985v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163985v2/index.html
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^ permalink raw reply [flat|nested] 10+ messages in thread