* [PATCH 00/15] Optimize vrr.guardband and fix LRR
@ 2025-08-04 13:24 Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 01/15] drm/i915/skl_watermark: Fix the scaling factor for chroma subsampling Ankit Nautiyal
` (18 more replies)
0 siblings, 19 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Instead of setting vrr.guardband to vblank, use optimal guardband that
works for most of the cases. This will help in avoiding need of change
in guardband and fix the LRR feature that needs seamless switching to
a lower refresh rate.
First few patches fix/refactor and extract common functions required for
dsc/scaler prefill time computation. Later patches use these helpers to
compute an optimized guardband.
Also, for seamless_mn where vtotal is same but mode clock is changed to
seamlessly switch to lower rate, re-compute the vrr timings.
Few things that still need work:
-The timestamps corresponding with next start of vactive still need to be
fixed with the new scheme.
-Re-enabling CMRR
Rev2:
-Address comments from Mitul.
-Extract helpers for dsc/scaler prefill latencies.
-Fix downscaling factor for chroma subsampling.
-Use missing pkg C max latency.
-Fix guardband computation for seamless mn, always use vblank for
higher resolution.
Ankit Nautiyal (15):
drm/i915/skl_watermark: Fix the scaling factor for chroma subsampling
drm/i915/skl_watermark: Add bounds check for scaler array access
drm/i915/skl_watermark: Pass linetime as argument to latency helpers
drm/i915/skl_scaler: Introduce helper for chroma downscale factor
drm/i915/display: Extract helpers to set dsc/scaler prefill latencies
drm/i915/dp: Add SDP latency computation helper
drm/i915/psr: Add function to compute max link-wake latency
drm/i915/psr: Store max PSR2/Panel Replay latency in crtc_state
drm/i915/vrr: Use vrr.sync_start for getting vtotal
drm/i915/display: Add guardband check for feature latencies
drm/i915/skl_watermark: Remove redundant latency checks from vblank
validation
drm/i915/vrr: Use static guardband to support seamless LRR switching
drm/i915/vrr: Set vrr.vmin to min Vtotal
drm/i915/panel: Add helper to get highest fixed mode
drm/i915/vrr: Fix seamless_mn drrs for PTL
drivers/gpu/drm/i915/display/intel_display.c | 174 +++++++++++-
drivers/gpu/drm/i915/display/intel_display.h | 8 +
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 53 +++-
drivers/gpu/drm/i915/display/intel_dp.h | 2 +
drivers/gpu/drm/i915/display/intel_panel.c | 13 +
drivers/gpu/drm/i915/display/intel_panel.h | 2 +
drivers/gpu/drm/i915/display/intel_psr.c | 64 +++++
drivers/gpu/drm/i915/display/intel_psr.h | 3 +
drivers/gpu/drm/i915/display/intel_vrr.c | 265 ++++++++++++++++--
drivers/gpu/drm/i915/display/intel_vrr.h | 3 +-
drivers/gpu/drm/i915/display/skl_scaler.c | 5 +
drivers/gpu/drm/i915/display/skl_scaler.h | 2 +
drivers/gpu/drm/i915/display/skl_watermark.c | 89 +-----
drivers/gpu/drm/i915/display/skl_watermark.h | 1 +
15 files changed, 570 insertions(+), 115 deletions(-)
--
2.45.2
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH 01/15] drm/i915/skl_watermark: Fix the scaling factor for chroma subsampling
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 02/15] drm/i915/skl_watermark: Add bounds check for scaler array access Ankit Nautiyal
` (17 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
The Bspec:70151, mentions Chroma subsampling is a 2x downscale
operation. This means that the downscale factor is 2 in each direction.
So correct the downscaling factor to 4.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 222c069fdadb..5a120c1f66f4 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2186,7 +2186,7 @@ dsc_prefill_latency(const struct intel_crtc_state *crtc_state)
crtc_state->hw.adjusted_mode.clock);
int num_scaler_users = hweight32(scaler_state->scaler_users);
int chroma_downscaling_factor =
- crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1;
+ crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
u32 dsc_prefill_latency = 0;
if (!crtc_state->dsc.compression_enable ||
@@ -2229,7 +2229,7 @@ scaler_prefill_latency(const struct intel_crtc_state *crtc_state)
u64 hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16);
u64 vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16);
int chroma_downscaling_factor =
- crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 2 : 1;
+ crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
int latency;
latency = DIV_ROUND_UP_ULL((4 * linetime * hscale_k * vscale_k *
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 02/15] drm/i915/skl_watermark: Add bounds check for scaler array access
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 01/15] drm/i915/skl_watermark: Fix the scaling factor for chroma subsampling Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 03/15] drm/i915/skl_watermark: Pass linetime as argument to latency helpers Ankit Nautiyal
` (16 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Ensure num_scaler_users does not exceed the size of scaler_state->scalers[]
before accessing scaler parameters in dsc_prefill_latency.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 5a120c1f66f4..9d52727b81b1 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2191,7 +2191,8 @@ dsc_prefill_latency(const struct intel_crtc_state *crtc_state)
if (!crtc_state->dsc.compression_enable ||
!num_scaler_users ||
- num_scaler_users > crtc->num_scalers)
+ num_scaler_users > crtc->num_scalers ||
+ num_scaler_users > ARRAY_SIZE(scaler_state->scalers))
return dsc_prefill_latency;
dsc_prefill_latency = DIV_ROUND_UP(15 * linetime * chroma_downscaling_factor, 10);
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 03/15] drm/i915/skl_watermark: Pass linetime as argument to latency helpers
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 01/15] drm/i915/skl_watermark: Fix the scaling factor for chroma subsampling Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 02/15] drm/i915/skl_watermark: Add bounds check for scaler array access Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 04/15] drm/i915/skl_scaler: Introduce helper for chroma downscale factor Ankit Nautiyal
` (15 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Refactor dsc_prefill_latency and scaler_prefill_latency to take
linetime as an explicit parameter instead of computing it internally.
This avoids redundant calculations and simplifies scanline conversion
logic in skl_is_vblank_too_short().
This change also facilitates future extraction of these helpers for use
cases where latencies are computed for an optimized guardband, based on the
highest resolution mode, rather than the current mode.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 9d52727b81b1..97f08d78d22f 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2177,13 +2177,11 @@ cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state)
}
static int
-dsc_prefill_latency(const struct intel_crtc_state *crtc_state)
+dsc_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
const struct intel_crtc_scaler_state *scaler_state =
&crtc_state->scaler_state;
- int linetime = DIV_ROUND_UP(1000 * crtc_state->hw.adjusted_mode.htotal,
- crtc_state->hw.adjusted_mode.clock);
int num_scaler_users = hweight32(scaler_state->scaler_users);
int chroma_downscaling_factor =
crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
@@ -2208,18 +2206,16 @@ dsc_prefill_latency(const struct intel_crtc_state *crtc_state)
dsc_prefill_latency *= cdclk_prefill_adjustment(crtc_state);
- return intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, dsc_prefill_latency);
+ return dsc_prefill_latency;
}
static int
-scaler_prefill_latency(const struct intel_crtc_state *crtc_state)
+scaler_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
{
const struct intel_crtc_scaler_state *scaler_state =
&crtc_state->scaler_state;
int num_scaler_users = hweight32(scaler_state->scaler_users);
int scaler_prefill_latency = 0;
- int linetime = DIV_ROUND_UP(1000 * crtc_state->hw.adjusted_mode.htotal,
- crtc_state->hw.adjusted_mode.clock);
if (!num_scaler_users)
return scaler_prefill_latency;
@@ -2240,7 +2236,7 @@ scaler_prefill_latency(const struct intel_crtc_state *crtc_state)
scaler_prefill_latency *= cdclk_prefill_adjustment(crtc_state);
- return intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode, scaler_prefill_latency);
+ return scaler_prefill_latency;
}
static bool
@@ -2249,11 +2245,13 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
{
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
+ int linetime = DIV_ROUND_UP(1000 * adjusted_mode->htotal,
+ adjusted_mode->clock);
return crtc_state->framestart_delay +
intel_usecs_to_scanlines(adjusted_mode, latency) +
- scaler_prefill_latency(crtc_state) +
- dsc_prefill_latency(crtc_state) +
+ DIV_ROUND_UP(scaler_prefill_latency(crtc_state, linetime), linetime) +
+ DIV_ROUND_UP(dsc_prefill_latency(crtc_state, linetime), linetime) +
wm0_lines >
adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 04/15] drm/i915/skl_scaler: Introduce helper for chroma downscale factor
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (2 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 03/15] drm/i915/skl_watermark: Pass linetime as argument to latency helpers Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 05/15] drm/i915/display: Extract helpers to set dsc/scaler prefill latencies Ankit Nautiyal
` (14 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
For 444 to 420 output format conversion, scaler uses 2x downscaling in
each direction. Introduce skl_scaler_chroma_downscale_factor() to
encapsulate the chroma subsampling adjustment used in scaler/dsc
pre-fill latency calculations.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/skl_scaler.c | 5 +++++
drivers/gpu/drm/i915/display/skl_scaler.h | 2 ++
drivers/gpu/drm/i915/display/skl_watermark.c | 7 +++----
3 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 4cc55f4e1f9f..a8244684df62 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -938,3 +938,8 @@ void skl_scaler_get_config(struct intel_crtc_state *crtc_state)
else
scaler_state->scaler_users &= ~(1 << SKL_CRTC_INDEX);
}
+
+int skl_scaler_chroma_downscale_factor(const struct intel_crtc_state *crtc_state)
+{
+ return crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
+}
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h
index e3b35d2c13be..80b0eaa64bde 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.h
+++ b/drivers/gpu/drm/i915/display/skl_scaler.h
@@ -42,4 +42,6 @@ skl_scaler_mode_valid(struct intel_display *display,
enum intel_output_format output_format,
int num_joined_pipes);
+int skl_scaler_chroma_downscale_factor(const struct intel_crtc_state *crtc_state);
+
#endif
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 97f08d78d22f..6c7e9e7d7b8e 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -31,6 +31,7 @@
#include "intel_plane.h"
#include "intel_wm.h"
#include "skl_universal_plane_regs.h"
+#include "skl_scaler.h"
#include "skl_watermark.h"
#include "skl_watermark_regs.h"
@@ -2183,8 +2184,7 @@ dsc_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
const struct intel_crtc_scaler_state *scaler_state =
&crtc_state->scaler_state;
int num_scaler_users = hweight32(scaler_state->scaler_users);
- int chroma_downscaling_factor =
- crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
+ int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
u32 dsc_prefill_latency = 0;
if (!crtc_state->dsc.compression_enable ||
@@ -2225,8 +2225,7 @@ scaler_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
if (num_scaler_users > 1) {
u64 hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16);
u64 vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16);
- int chroma_downscaling_factor =
- crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ? 4 : 1;
+ int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
int latency;
latency = DIV_ROUND_UP_ULL((4 * linetime * hscale_k * vscale_k *
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 05/15] drm/i915/display: Extract helpers to set dsc/scaler prefill latencies
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (3 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 04/15] drm/i915/skl_scaler: Introduce helper for chroma downscale factor Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 06/15] drm/i915/dp: Add SDP latency computation helper Ankit Nautiyal
` (13 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Currently dsc/scaler prefill latencies are handled during watermark
calculations. With the optimized guardband, we need to compute the
latencies to find the minimum guardband that works for most cases.
Extract the helpers to compute these latencies, so that they can be used
while computing vrr guardband.
While at it, put declarations in reverse xmas tree order for better
redability.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 34 +++++++++++++++
drivers/gpu/drm/i915/display/intel_display.h | 8 ++++
drivers/gpu/drm/i915/display/skl_watermark.c | 46 +++++++++-----------
3 files changed, 63 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7035c1fc9033..91abfaad86b8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8322,3 +8322,37 @@ bool intel_scanout_needs_vtd_wa(struct intel_display *display)
return IS_DISPLAY_VER(display, 6, 11) && i915_vtd_active(i915);
}
+
+int intel_display_scaler_prefill_latency(int num_scaler_users, u64 hscale, u64 vscale,
+ int chroma_downscaling_factor,
+ int cdclk_prefill_adjustment,
+ int linetime)
+{
+ int scaler_prefill_latency;
+
+ scaler_prefill_latency = 4 * linetime;
+ if (num_scaler_users > 1)
+ scaler_prefill_latency += DIV_ROUND_UP_ULL((4 * linetime * hscale * vscale *
+ chroma_downscaling_factor), 1000000);
+
+ scaler_prefill_latency *= cdclk_prefill_adjustment;
+
+ return scaler_prefill_latency;
+}
+
+int intel_display_dsc_prefill_latency(int num_scaler_users, u64 *hscale, u64 *vscale,
+ int chroma_downscaling_factor,
+ int cdclk_prefill_adjustment,
+ int linetime)
+{
+ int dsc_prefill_latency;
+
+ dsc_prefill_latency = DIV_ROUND_UP(15 * linetime * chroma_downscaling_factor, 10);
+
+ for (int i = 0; i < num_scaler_users; i++)
+ dsc_prefill_latency = DIV_ROUND_UP_ULL(dsc_prefill_latency * hscale[i] * vscale[i],
+ 1000000);
+ dsc_prefill_latency *= cdclk_prefill_adjustment;
+
+ return dsc_prefill_latency;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 37e2ab301a80..8d094b0a8c6b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -559,5 +559,13 @@ bool assert_port_valid(struct intel_display *display, enum port port);
bool intel_scanout_needs_vtd_wa(struct intel_display *display);
int intel_crtc_num_joined_pipes(const struct intel_crtc_state *crtc_state);
+int intel_display_scaler_prefill_latency(int num_scaler_users, u64 hscale, u64 vscale,
+ int chroma_downscaling_factor,
+ int cdclk_prefill_adjustment,
+ int linetime);
+int intel_display_dsc_prefill_latency(int num_scaler_users, u64 *hscale, u64 *vscale,
+ int chroma_downscaling_factor,
+ int cdclk_prefill_adjustment,
+ int linetime);
#endif
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 6c7e9e7d7b8e..76278153fc0b 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2180,11 +2180,12 @@ cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state)
static int
dsc_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
{
+ const struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
+ int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- const struct intel_crtc_scaler_state *scaler_state =
- &crtc_state->scaler_state;
int num_scaler_users = hweight32(scaler_state->scaler_users);
- int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
+ u64 hscale_k[ARRAY_SIZE(scaler_state->scalers)];
+ u64 vscale_k[ARRAY_SIZE(scaler_state->scalers)];
u32 dsc_prefill_latency = 0;
if (!crtc_state->dsc.compression_enable ||
@@ -2193,18 +2194,16 @@ dsc_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
num_scaler_users > ARRAY_SIZE(scaler_state->scalers))
return dsc_prefill_latency;
- dsc_prefill_latency = DIV_ROUND_UP(15 * linetime * chroma_downscaling_factor, 10);
-
for (int i = 0; i < num_scaler_users; i++) {
- u64 hscale_k, vscale_k;
-
- hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[i].hscale, 1000) >> 16);
- vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[i].vscale, 1000) >> 16);
- dsc_prefill_latency = DIV_ROUND_UP_ULL(dsc_prefill_latency * hscale_k * vscale_k,
- 1000000);
+ hscale_k[i] = max(1000, mul_u32_u32(scaler_state->scalers[i].hscale, 1000) >> 16);
+ vscale_k[i] = max(1000, mul_u32_u32(scaler_state->scalers[i].vscale, 1000) >> 16);
}
- dsc_prefill_latency *= cdclk_prefill_adjustment(crtc_state);
+ dsc_prefill_latency =
+ intel_display_dsc_prefill_latency(num_scaler_users, hscale_k, vscale_k,
+ chroma_downscaling_factor,
+ cdclk_prefill_adjustment(crtc_state),
+ linetime);
return dsc_prefill_latency;
}
@@ -2212,28 +2211,25 @@ dsc_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
static int
scaler_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
{
- const struct intel_crtc_scaler_state *scaler_state =
- &crtc_state->scaler_state;
+ const struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
+ int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
int num_scaler_users = hweight32(scaler_state->scaler_users);
+ u64 hscale_k = 1000, vscale_k = 1000;
int scaler_prefill_latency = 0;
if (!num_scaler_users)
return scaler_prefill_latency;
- scaler_prefill_latency = 4 * linetime;
-
if (num_scaler_users > 1) {
- u64 hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16);
- u64 vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16);
- int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
- int latency;
-
- latency = DIV_ROUND_UP_ULL((4 * linetime * hscale_k * vscale_k *
- chroma_downscaling_factor), 1000000);
- scaler_prefill_latency += latency;
+ hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16);
+ vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16);
}
- scaler_prefill_latency *= cdclk_prefill_adjustment(crtc_state);
+ scaler_prefill_latency =
+ intel_display_scaler_prefill_latency(num_scaler_users, hscale_k, vscale_k,
+ chroma_downscaling_factor,
+ cdclk_prefill_adjustment(crtc_state),
+ linetime);
return scaler_prefill_latency;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 06/15] drm/i915/dp: Add SDP latency computation helper
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (4 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 05/15] drm/i915/display: Extract helpers to set dsc/scaler prefill latencies Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 07/15] drm/i915/psr: Add function to compute max link-wake latency Ankit Nautiyal
` (12 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Add a helper to compute vblank time needed for transmitting specific
DisplayPort SDPs like PPS, GAMUT_METADATA, and VSC_EXT. Latency is
based on line count per packet type and current line time.
Used to ensure adequate vblank when features like DSC/HDR are enabled.
Bspec: 70151
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 47 +++++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
2 files changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 54d88f24b689..a7ecc8ad67f2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6807,3 +6807,50 @@ void intel_dp_mst_resume(struct intel_display *display)
}
}
}
+
+static
+int intel_dp_get_sdp_latency(u32 type, int linetime_us)
+{
+ int lines;
+
+ switch (type) {
+ case DP_SDP_VSC_EXT_VESA:
+ case DP_SDP_VSC_EXT_CEA:
+ lines = 10;
+ break;
+ case HDMI_PACKET_TYPE_GAMUT_METADATA:
+ lines = 8;
+ break;
+ case DP_SDP_PPS:
+ lines = 6;
+ break;
+ default:
+ lines = 0;
+ break;
+ }
+
+ return lines * linetime_us;
+}
+
+int intel_dp_compute_sdp_latency(struct intel_crtc_state *crtc_state,
+ bool assume_all_enabled)
+{
+ const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ int sdp_latency = 0;
+ int linetime_us;
+
+ linetime_us = DIV_ROUND_UP(adjusted_mode->crtc_htotal * 1000,
+ adjusted_mode->crtc_clock);
+ if (assume_all_enabled ||
+ crtc_state->infoframes.enable &
+ intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA))
+ sdp_latency = max(sdp_latency,
+ intel_dp_get_sdp_latency(HDMI_PACKET_TYPE_GAMUT_METADATA,
+ linetime_us));
+
+ if (assume_all_enabled || crtc_state->dsc.compression_enable)
+ sdp_latency = max(sdp_latency,
+ intel_dp_get_sdp_latency(DP_SDP_PPS, linetime_us));
+
+ return sdp_latency;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 0657f5681196..994994d68475 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -214,5 +214,6 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state,
int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector);
void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external);
+int intel_dp_compute_sdp_latency(struct intel_crtc_state *crtc_state, bool assume_all_enabled);
#endif /* __INTEL_DP_H__ */
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 07/15] drm/i915/psr: Add function to compute max link-wake latency
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (5 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 06/15] drm/i915/dp: Add SDP latency computation helper Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 20:54 ` Jani Nikula
2025-08-04 13:24 ` [PATCH 08/15] drm/i915/psr: Store max PSR2/Panel Replay latency in crtc_state Ankit Nautiyal
` (11 subsequent siblings)
18 siblings, 1 reply; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Introduce a helper to compute the max link wake latency when using
Auxless/Aux wake mechanism for PSR/Panel Replay/LOBF features.
This will be used to compute the minimum guardband so that the link wake
latencies are accounted and these features work smoothly for higher
refresh rate panels.
Bspec: 70151, 71477
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 64 ++++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_psr.h | 3 ++
2 files changed, 67 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 6bd3454bb00e..6cdaff3ccc9f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -33,6 +33,7 @@
#include "intel_atomic.h"
#include "intel_crtc.h"
#include "intel_cursor_regs.h"
+#include "intel_cx0_phy.h"
#include "intel_ddi.h"
#include "intel_de.h"
#include "intel_display_irq.h"
@@ -4249,3 +4250,66 @@ bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
{
return intel_dp_is_edp(intel_dp) && crtc_state->has_panel_replay;
}
+
+static
+int intel_psr_compute_aux_wake_latency(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state)
+{
+#define TFW_EXIT_LATENCY_MS 20000
+#define FAST_WAKE_LATENCY_MS 12000 /* Preamble: 8us; PHY wake: 4us */
+ struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+ int aux_wake_latency_us;
+ int io_buffer_wake_ms;
+
+ io_buffer_wake_ms = intel_encoder_is_c10phy(encoder) ? 9790 : 14790;
+
+ aux_wake_latency_us =
+ DIV_ROUND_UP(io_buffer_wake_ms + TFW_EXIT_LATENCY_MS + FAST_WAKE_LATENCY_MS, 1000);
+
+ return aux_wake_latency_us;
+}
+
+static
+int intel_psr_compute_auxless_latency(struct intel_crtc_state *crtc_state)
+{
+#define PHY_ESTABLISHMENT_PERIOD_MS 50000
+#define LFPS_PERIOD_MS 800
+#define SILENCE_MAX_MS 180
+ int linkrate_mhz = crtc_state->port_clock / 1000;
+ int clock_data_switch_ms;
+ int auxless_latency_us;
+ int time_ml_phy_lock_ms;
+ int num_ml_phy_lock;
+ /*
+ * TPS4 length = 252
+ * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
+ * Number ML_PHY_LOCK = ( 7 + CEILING(6.5us / tML_PHY_LOCK ) + 1)
+ * t2 = Number ML_PHY_LOCK * tML_PHY_LOCK
+ * tCDS term = 2 * t2
+ * =>tCDS_term = 2 * (7 * (252 * (10 /linkrate))+6.5)
+ */
+ time_ml_phy_lock_ms = (1000 * 252 * 10) / linkrate_mhz;
+ num_ml_phy_lock = 7 + DIV_ROUND_UP(6500 * 1000, time_ml_phy_lock_ms) / 1000 + 1;
+ clock_data_switch_ms = 2 * time_ml_phy_lock_ms * num_ml_phy_lock;
+
+ auxless_latency_us = (LFPS_PERIOD_MS + SILENCE_MAX_MS + PHY_ESTABLISHMENT_PERIOD_MS +
+ clock_data_switch_ms) / 1000;
+
+ return auxless_latency_us;
+}
+
+int intel_psr_compute_max_link_wake_latency(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state,
+ bool assume_all_enabled)
+{
+ int aux_wake_latency = 0;
+ int auxless_latency = 0;
+
+ if (assume_all_enabled || crtc_state->has_sel_update)
+ auxless_latency = intel_psr_compute_aux_wake_latency(intel_dp, crtc_state);
+
+ if (assume_all_enabled || crtc_state->has_panel_replay)
+ aux_wake_latency = intel_psr_compute_auxless_latency(crtc_state);
+
+ return max(auxless_latency, aux_wake_latency);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index 9b061a22361f..c58d29620b49 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -81,5 +81,8 @@ void intel_psr_debugfs_register(struct intel_display *display);
bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);
bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
const struct intel_crtc_state *crtc_state);
+int intel_psr_compute_max_link_wake_latency(struct intel_dp *intel_dp,
+ struct intel_crtc_state *crtc_state,
+ bool assume_all_enabled);
#endif /* __INTEL_PSR_H__ */
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 08/15] drm/i915/psr: Store max PSR2/Panel Replay latency in crtc_state
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (6 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 07/15] drm/i915/psr: Add function to compute max link-wake latency Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 09/15] drm/i915/vrr: Use vrr.sync_start for getting vtotal Ankit Nautiyal
` (10 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Add a new `psr_latency` field to intel_crtc_state to hold the maximum
link wake latency for PSR2 and Panel Replay. This value is computed during
intel_dp_compute_config() when encoder context is available.
This allows the latency to be used later during guardband calculations,
where only the CRTC state is available and encoder-specific functions
can't be accessed.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 4d9df803ad47..91d19906f85e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1119,6 +1119,7 @@ struct intel_crtc_state {
bool enable_psr2_su_region_et;
bool req_psr2_sdp_prior_scanline;
bool has_panel_replay;
+ int psr_latency; /* PSR2/PR Vblank time */
bool wm_level_disabled;
u32 dc3co_exitline;
u16 su_y_granularity;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a7ecc8ad67f2..59808acbc314 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3299,6 +3299,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
intel_dp_compute_as_sdp(intel_dp, pipe_config);
intel_psr_compute_config(intel_dp, pipe_config, conn_state);
intel_alpm_lobf_compute_config(intel_dp, pipe_config, conn_state);
+
+ pipe_config->psr_latency =
+ intel_psr_compute_max_link_wake_latency(intel_dp, pipe_config, false);
+
intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 09/15] drm/i915/vrr: Use vrr.sync_start for getting vtotal
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (7 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 08/15] drm/i915/psr: Store max PSR2/Panel Replay latency in crtc_state Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 10/15] drm/i915/display: Add guardband check for feature latencies Ankit Nautiyal
` (9 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal, Mitul Golani
Currently, in intel_vrr_get_config() crtc_vtotal is computed from
vrr.vmin vtotal, since the VTOTAL.Vtotal bits are deprecated.
Since vmin is currently set to crtc_vtotal, this gives us the vtotal.
However, as we move to optimized guardband, vmin will be modified to set
to the minimum Vtotal for highest refresh rate supported.
Instead of depending on vmin, compute vtotal from crtc_vsync_start and
vrr.vsync_start. This works since vrr.vsync_start is measured from the
end of vblank, and crtc_vsync_start is measured from start of the
scanline. Together their sum is equal to the crtc_vtotal.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 21 ++++++++++-----------
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 3eed37f271b0..46a85720411f 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -735,17 +735,6 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
TRANS_VRR_VMAX(display, cpu_transcoder)) + 1;
crtc_state->vrr.vmin = intel_de_read(display,
TRANS_VRR_VMIN(display, cpu_transcoder)) + 1;
-
- /*
- * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
- * bits are not filled. Since for these platforms TRAN_VMIN is always
- * filled with crtc_vtotal, use TRAN_VRR_VMIN to get the vtotal for
- * adjusted_mode.
- */
- if (intel_vrr_always_use_vrr_tg(display))
- crtc_state->hw.adjusted_mode.crtc_vtotal =
- intel_vrr_vmin_vtotal(crtc_state);
-
if (HAS_AS_SDP(display)) {
trans_vrr_vsync =
intel_de_read(display,
@@ -755,6 +744,16 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
crtc_state->vrr.vsync_end =
REG_FIELD_GET(VRR_VSYNC_END_MASK, trans_vrr_vsync);
}
+ /*
+ * For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
+ * bits are not filled. Since vrr.vsync_start is computed as:
+ * crtc_vtotal - crtc_vsync_start, we can derive vtotal from
+ * vrr.vsync_start and crtc_vsync_start.
+ */
+ if (intel_vrr_always_use_vrr_tg(display))
+ crtc_state->hw.adjusted_mode.crtc_vtotal =
+ crtc_state->hw.adjusted_mode.crtc_vsync_start +
+ crtc_state->vrr.vsync_start;
}
vrr_enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE;
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 10/15] drm/i915/display: Add guardband check for feature latencies
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (8 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 09/15] drm/i915/vrr: Use vrr.sync_start for getting vtotal Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 11/15] drm/i915/skl_watermark: Remove redundant latency checks from vblank validation Ankit Nautiyal
` (8 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Add a check during atomic crtc check phase to ensure the programmed VRR
guardband is sufficient to cover latencies introduced by enabled features
such as DSC, PSR/PR, scalers, and DP SDPs.
Currently, the guardband is programmed to match the vblank length, so
existing checks in skl_is_vblank_too_short() are valid. However, upcoming
changes will optimize the guardband independently of vblank, making those
checks incorrect.
Introduce an explicit guardband check to prepare for future updates
that will remove checking against the vblank length and later program an
optimized guardband.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 138 +++++++++++++++++++
drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
drivers/gpu/drm/i915/display/skl_watermark.h | 1 +
3 files changed, 140 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 91abfaad86b8..7246d86bd29c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4221,6 +4221,138 @@ static int hsw_compute_linetime_wm(struct intel_atomic_state *state,
return 0;
}
+static int
+cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_atomic_state *state =
+ to_intel_atomic_state(crtc_state->uapi.state);
+ const struct intel_cdclk_state *cdclk_state;
+
+ cdclk_state = intel_atomic_get_cdclk_state(state);
+ if (IS_ERR(cdclk_state)) {
+ drm_WARN_ON(display->drm, PTR_ERR(cdclk_state));
+ return 1;
+ }
+
+ return min(1, DIV_ROUND_UP(crtc_state->pixel_rate,
+ 2 * intel_cdclk_logical(cdclk_state)));
+}
+
+static int
+dsc_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
+{
+ const struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
+ int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ int num_scaler_users = hweight32(scaler_state->scaler_users);
+ u64 hscale_k[ARRAY_SIZE(scaler_state->scalers)];
+ u64 vscale_k[ARRAY_SIZE(scaler_state->scalers)];
+ u32 dsc_prefill_latency = 0;
+
+ if (!crtc_state->dsc.compression_enable ||
+ !num_scaler_users ||
+ num_scaler_users > crtc->num_scalers ||
+ num_scaler_users > ARRAY_SIZE(scaler_state->scalers))
+ return dsc_prefill_latency;
+
+ for (int i = 0; i < num_scaler_users; i++) {
+ hscale_k[i] = max(1000, mul_u32_u32(scaler_state->scalers[i].hscale, 1000) >> 16);
+ vscale_k[i] = max(1000, mul_u32_u32(scaler_state->scalers[i].vscale, 1000) >> 16);
+ }
+
+ dsc_prefill_latency =
+ intel_display_dsc_prefill_latency(num_scaler_users, hscale_k, vscale_k,
+ chroma_downscaling_factor,
+ cdclk_prefill_adjustment(crtc_state),
+ linetime);
+
+ return dsc_prefill_latency;
+}
+
+static int
+scaler_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
+{
+ const struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
+ int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
+ int num_scaler_users = hweight32(scaler_state->scaler_users);
+ u64 hscale_k = 1000, vscale_k = 1000;
+ int scaler_prefill_latency = 0;
+
+ if (!num_scaler_users)
+ return scaler_prefill_latency;
+
+ if (num_scaler_users > 1) {
+ hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16);
+ vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16);
+ }
+
+ scaler_prefill_latency =
+ intel_display_scaler_prefill_latency(num_scaler_users, hscale_k, vscale_k,
+ chroma_downscaling_factor,
+ cdclk_prefill_adjustment(crtc_state),
+ linetime);
+
+ return scaler_prefill_latency;
+}
+
+static int intel_crtc_check_guardband(struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ int dsc_prefill_time = 0;
+ int scaler_prefill_time;
+ int wm0_prefill_time;
+ int pkgc_max_latency;
+ int psr2_pr_latency;
+ int min_guardband;
+ int guardband_us;
+ int sagv_latency;
+ int linetime_us;
+ int sdp_latency;
+ int pm_delay;
+
+ if (!crtc_state->vrr.enable && !intel_vrr_always_use_vrr_tg(display))
+ return 0;
+
+ if (!adjusted_mode->crtc_clock)
+ return 0;
+
+ linetime_us = DIV_ROUND_UP(adjusted_mode->crtc_htotal * 1000,
+ adjusted_mode->crtc_clock);
+
+ pkgc_max_latency = skl_watermark_max_latency(display, 1);
+ sagv_latency = display->sagv.block_time_us;
+
+ wm0_prefill_time = skl_max_wm0_lines(crtc_state) * linetime_us + 20;
+
+ scaler_prefill_time = scaler_prefill_latency(crtc_state, linetime_us);
+
+ if (crtc_state->dsc.compression_enable)
+ dsc_prefill_time = dsc_prefill_latency(crtc_state, linetime_us);
+
+ pm_delay = crtc_state->framestart_delay +
+ max(sagv_latency, pkgc_max_latency) +
+ wm0_prefill_time +
+ scaler_prefill_time +
+ dsc_prefill_time;
+
+ psr2_pr_latency = crtc_state->psr_latency;
+ sdp_latency = intel_dp_compute_sdp_latency(crtc_state, false);
+
+ guardband_us = max(sdp_latency, psr2_pr_latency);
+ guardband_us = max(guardband_us, pm_delay);
+ min_guardband = DIV_ROUND_UP(guardband_us, linetime_us);
+
+ if (crtc_state->vrr.guardband < min_guardband) {
+ drm_dbg_kms(display->drm, "vrr.guardband %d < min guardband %d\n",
+ crtc_state->vrr.guardband, min_guardband);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int intel_crtc_atomic_check(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
@@ -4283,6 +4415,12 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
if (ret)
return ret;
+ if (HAS_VRR(display) && intel_vrr_possible(crtc_state)) {
+ ret = intel_crtc_check_guardband(crtc_state);
+ if (ret)
+ return ret;
+ }
+
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 76278153fc0b..a8e8e1fbad8f 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2251,7 +2251,7 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
}
-static int skl_max_wm0_lines(const struct intel_crtc_state *crtc_state)
+int skl_max_wm0_lines(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
enum plane_id plane_id;
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h
index 62790816f030..8706c2010ebe 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.h
+++ b/drivers/gpu/drm/i915/display/skl_watermark.h
@@ -78,6 +78,7 @@ void intel_dbuf_mbus_post_ddb_update(struct intel_atomic_state *state);
void intel_program_dpkgc_latency(struct intel_atomic_state *state);
bool intel_dbuf_pmdemand_needs_update(struct intel_atomic_state *state);
+int skl_max_wm0_lines(const struct intel_crtc_state *crtc_state);
#endif /* __SKL_WATERMARK_H__ */
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 11/15] drm/i915/skl_watermark: Remove redundant latency checks from vblank validation
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (9 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 10/15] drm/i915/display: Add guardband check for feature latencies Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 12/15] drm/i915/vrr: Use static guardband to support seamless LRR switching Ankit Nautiyal
` (7 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Drop DSC and scaler prefill latency checks from skl_is_vblank_too_short().
These are now covered by the guardband validation added during the atomic
CRTC check phase.
This cleanup prepares for future changes where the guardband will be
optimized independently of vblank length, making vblank-based checks
obsolete.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 79 --------------------
1 file changed, 79 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index a8e8e1fbad8f..55dbd05bd7dd 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2159,94 +2159,15 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
return 0;
}
-static int
-cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state)
-{
- struct intel_display *display = to_intel_display(crtc_state);
- struct intel_atomic_state *state =
- to_intel_atomic_state(crtc_state->uapi.state);
- const struct intel_cdclk_state *cdclk_state;
-
- cdclk_state = intel_atomic_get_cdclk_state(state);
- if (IS_ERR(cdclk_state)) {
- drm_WARN_ON(display->drm, PTR_ERR(cdclk_state));
- return 1;
- }
-
- return min(1, DIV_ROUND_UP(crtc_state->pixel_rate,
- 2 * intel_cdclk_logical(cdclk_state)));
-}
-
-static int
-dsc_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
-{
- const struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
- int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- int num_scaler_users = hweight32(scaler_state->scaler_users);
- u64 hscale_k[ARRAY_SIZE(scaler_state->scalers)];
- u64 vscale_k[ARRAY_SIZE(scaler_state->scalers)];
- u32 dsc_prefill_latency = 0;
-
- if (!crtc_state->dsc.compression_enable ||
- !num_scaler_users ||
- num_scaler_users > crtc->num_scalers ||
- num_scaler_users > ARRAY_SIZE(scaler_state->scalers))
- return dsc_prefill_latency;
-
- for (int i = 0; i < num_scaler_users; i++) {
- hscale_k[i] = max(1000, mul_u32_u32(scaler_state->scalers[i].hscale, 1000) >> 16);
- vscale_k[i] = max(1000, mul_u32_u32(scaler_state->scalers[i].vscale, 1000) >> 16);
- }
-
- dsc_prefill_latency =
- intel_display_dsc_prefill_latency(num_scaler_users, hscale_k, vscale_k,
- chroma_downscaling_factor,
- cdclk_prefill_adjustment(crtc_state),
- linetime);
-
- return dsc_prefill_latency;
-}
-
-static int
-scaler_prefill_latency(const struct intel_crtc_state *crtc_state, int linetime)
-{
- const struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
- int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
- int num_scaler_users = hweight32(scaler_state->scaler_users);
- u64 hscale_k = 1000, vscale_k = 1000;
- int scaler_prefill_latency = 0;
-
- if (!num_scaler_users)
- return scaler_prefill_latency;
-
- if (num_scaler_users > 1) {
- hscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].hscale, 1000) >> 16);
- vscale_k = max(1000, mul_u32_u32(scaler_state->scalers[0].vscale, 1000) >> 16);
- }
-
- scaler_prefill_latency =
- intel_display_scaler_prefill_latency(num_scaler_users, hscale_k, vscale_k,
- chroma_downscaling_factor,
- cdclk_prefill_adjustment(crtc_state),
- linetime);
-
- return scaler_prefill_latency;
-}
-
static bool
skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
int wm0_lines, int latency)
{
const struct drm_display_mode *adjusted_mode =
&crtc_state->hw.adjusted_mode;
- int linetime = DIV_ROUND_UP(1000 * adjusted_mode->htotal,
- adjusted_mode->clock);
return crtc_state->framestart_delay +
intel_usecs_to_scanlines(adjusted_mode, latency) +
- DIV_ROUND_UP(scaler_prefill_latency(crtc_state, linetime), linetime) +
- DIV_ROUND_UP(dsc_prefill_latency(crtc_state, linetime), linetime) +
wm0_lines >
adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
}
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 12/15] drm/i915/vrr: Use static guardband to support seamless LRR switching
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (10 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 11/15] drm/i915/skl_watermark: Remove redundant latency checks from vblank validation Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 13/15] drm/i915/vrr: Set vrr.vmin to min Vtotal Ankit Nautiyal
` (6 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
In the current VRR implementation, vrr.vmin and vrr.guardband are set such
that they do not need to change when switching from fixed refresh rate to
variable refresh rate. Specifically, vrr.guardband is always set to match
the vblank length. This approach works for most cases, but not for LRR,
where the guardband would need to change while the VRR timing generator is
still active.
With the VRR TG always active, live updates to guardband are unsafe and not
recommended. To ensure hardware safety, guardband was moved out of the
!fastset block, meaning any change now requires a full modeset.
This breaks seamless LRR switching, which was previously supported.
Since the problem arises from guardband being matched to the vblank length,
solution is to use a minimal, sufficient static value, instead. So we use a
static guardband defined during mode-set that fits within the smallest
expected vblank and remains unchanged in case of features like LRR where
vtotal changes. To compute this minimum guardband we take into account
latencies/delays due to different features as mentioned in the Bspec.
v2:
-Use helpers for dsc/scaler prefill latencies. (Mitul)
-Account for pkgc latency and take max of pkgc and sagv latencies.
Bspec: 70151
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_vrr.c | 136 ++++++++++++++++++-
drivers/gpu/drm/i915/display/intel_vrr.h | 3 +-
3 files changed, 137 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7246d86bd29c..542998626f2f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4892,7 +4892,6 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state,
struct drm_connector *connector;
int i;
- intel_vrr_compute_config_late(crtc_state);
for_each_new_connector_in_state(&state->base, connector,
conn_state, i) {
@@ -4904,6 +4903,7 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state,
!encoder->compute_config_late)
continue;
+ intel_vrr_compute_config_late(crtc_state, conn_state);
ret = encoder->compute_config_late(encoder, crtc_state,
conn_state);
if (ret)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 46a85720411f..d3cce063a041 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -10,8 +10,12 @@
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_dp.h"
+#include "intel_panel.h"
+#include "intel_psr.h"
#include "intel_vrr.h"
#include "intel_vrr_regs.h"
+#include "skl_scaler.h"
+#include "skl_watermark.h"
#define FIXED_POINT_PRECISION 100
#define CMRR_PRECISION_TOLERANCE 10
@@ -413,15 +417,143 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
}
}
-void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state)
+static
+int scaler_prefill_latency(struct intel_crtc_state *crtc_state, int linetime_us)
+{
+ int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
+ u64 hscale_k, vscale_k;
+ int cdclk_adjustment;
+ int num_scaler_users;
+
+ /*
+ * Assuming:
+ * Both scaler enabled.
+ * scaler 1 downscaling factor as 2 x 2 (Horiz x Vert)
+ * scaler 2 downscaling factor as 2 x 1 (Horiz x Vert)
+ * Cdclk Adjustment : 1
+ */
+ num_scaler_users = 2;
+ hscale_k = 2 * 1000;
+ vscale_k = 2 * 1000;
+ cdclk_adjustment = 1;
+
+ return intel_display_scaler_prefill_latency(num_scaler_users, hscale_k, vscale_k,
+ chroma_downscaling_factor,
+ cdclk_adjustment,
+ linetime_us);
+}
+
+static
+int dsc_prefill_latency(struct intel_crtc_state *crtc_state, int linetime_us)
+{
+#define MAX_SCALERS 2
+ int chroma_downscaling_factor = skl_scaler_chroma_downscale_factor(crtc_state);
+ u64 hscale_k[MAX_SCALERS], vscale_k[MAX_SCALERS];
+ int cdclk_adjustment;
+ int num_scaler_users;
+
+ /*
+ * Assuming:
+ * Both scaler enabled.
+ * scaler 1 downscaling factor as 2 x 2 (Horiz x Vert)
+ * scaler 2 downscaling factor as 2 x 1 (Horiz x Vert)
+ * Cdclk Adjustment : 1
+ */
+ num_scaler_users = MAX_SCALERS;
+ hscale_k[0] = 2 * 1000;
+ vscale_k[0] = 2 * 1000;
+ hscale_k[1] = 2 * 1000;
+ vscale_k[1] = 1 * 1000;
+
+ cdclk_adjustment = 1;
+
+ return intel_display_dsc_prefill_latency(num_scaler_users, hscale_k, vscale_k,
+ chroma_downscaling_factor,
+ cdclk_adjustment,
+ linetime_us);
+}
+
+static
+int intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector)
+{
+ const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ struct intel_display *display = to_intel_display(crtc_state);
+ struct intel_dp *intel_dp;
+ int dsc_prefill_time = 0;
+ int psr2_pr_latency = 0;
+ int scaler_prefill_time;
+ int wm0_prefill_time;
+ int pkgc_max_latency;
+ int sagv_latency;
+ int sdp_latency = 0;
+ int guardband_us;
+ int linetime_us;
+ int guardband;
+ int pm_delay;
+
+ linetime_us = DIV_ROUND_UP(adjusted_mode->crtc_htotal * 1000,
+ adjusted_mode->crtc_clock);
+
+ pkgc_max_latency = skl_watermark_max_latency(display, 1);
+ sagv_latency = display->sagv.block_time_us;
+
+ /* Assuming max wm0 lines = 4 */
+ wm0_prefill_time = 4 * linetime_us + 20;
+
+ scaler_prefill_time = scaler_prefill_latency(crtc_state, linetime_us);
+
+ if (crtc_state->dsc.compression_enable)
+ dsc_prefill_time = dsc_prefill_latency(crtc_state, linetime_us);
+
+ pm_delay = crtc_state->framestart_delay +
+ max(sagv_latency, pkgc_max_latency) +
+ wm0_prefill_time +
+ scaler_prefill_time +
+ dsc_prefill_time;
+
+ switch (connector->base.connector_type) {
+ case DRM_MODE_CONNECTOR_eDP:
+ case DRM_MODE_CONNECTOR_DisplayPort:
+ intel_dp = intel_attached_dp(connector);
+ psr2_pr_latency =
+ intel_psr_compute_max_link_wake_latency(intel_dp, crtc_state, true);
+ sdp_latency = intel_dp_compute_sdp_latency(crtc_state, true);
+ break;
+ default:
+ break;
+ }
+
+ guardband_us = max(sdp_latency, psr2_pr_latency);
+ guardband_us = max(guardband_us, pm_delay);
+
+ guardband = DIV_ROUND_UP(guardband_us, linetime_us);
+
+ /* guardband cannot be more than the Vmax vblank */
+ guardband = min(guardband, crtc_state->vrr.vmax - adjusted_mode->crtc_vblank_start);
+
+ return guardband;
+}
+
+void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state)
{
struct intel_display *display = to_intel_display(crtc_state);
const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ struct intel_connector *connector =
+ to_intel_connector(conn_state->connector);
if (!intel_vrr_possible(crtc_state))
return;
- if (DISPLAY_VER(display) >= 13) {
+ if (intel_vrr_always_use_vrr_tg(display)) {
+ crtc_state->vrr.guardband = intel_vrr_compute_guardband(crtc_state, connector);
+ if (crtc_state->uapi.vrr_enabled) {
+ crtc_state->vrr.vmin = crtc_state->vrr.guardband +
+ adjusted_mode->crtc_vblank_start;
+ crtc_state->vrr.flipline = crtc_state->vrr.vmin;
+ }
+ } else if (DISPLAY_VER(display) >= 13) {
crtc_state->vrr.guardband =
crtc_state->vrr.vmin - adjusted_mode->crtc_vblank_start;
} else {
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h
index 38bf9996b883..4b15c2838492 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -21,7 +21,8 @@ bool intel_vrr_possible(const struct intel_crtc_state *crtc_state);
void intel_vrr_check_modeset(struct intel_atomic_state *state);
void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state);
-void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state);
+void intel_vrr_compute_config_late(struct intel_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state);
void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
void intel_vrr_enable(const struct intel_crtc_state *crtc_state);
void intel_vrr_send_push(struct intel_dsb *dsb,
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 13/15] drm/i915/vrr: Set vrr.vmin to min Vtotal
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (11 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 12/15] drm/i915/vrr: Use static guardband to support seamless LRR switching Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 14/15] drm/i915/panel: Add helper to get highest fixed mode Ankit Nautiyal
` (5 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Previously, when vrr.guardband was matched to vblank length, vrr.vmin was
set to crtc_vtotal for all cases to avoid having vrr.vmin changed when we
switch from fixed refresh rate timings to variable refresh rate timings.
Now that we are using an optimized vrr.guardband, we can simply set the
vrr.vmin to the lowest Vtotal (for highest refresh rate supported by the
panel) .
For non-vrr panels, the vrr.vmin stays the same i.e. crtc_vtotal.
v2: Fix vmin calculation.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_vrr.c | 37 ++++++++++++++++--------
1 file changed, 25 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index d3cce063a041..642a57a958ec 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -282,6 +282,9 @@ int intel_vrr_fixed_rr_vmin(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
+ if (crtc_state->vrr.in_range)
+ return crtc_state->vrr.vmin;
+
return intel_vrr_fixed_rr_vtotal(crtc_state) -
intel_vrr_flipline_offset(display);
}
@@ -312,26 +315,37 @@ static
void intel_vrr_compute_fixed_rr_timings(struct intel_crtc_state *crtc_state)
{
/*
- * For fixed rr, vmin = vmax = flipline.
- * vmin is already set to crtc_vtotal set vmax and flipline the same.
+ * For fixed rr vmax = flipline.
+ * set vmax and flipline same as vtotal.
*/
crtc_state->vrr.vmax = crtc_state->hw.adjusted_mode.crtc_vtotal;
crtc_state->vrr.flipline = crtc_state->hw.adjusted_mode.crtc_vtotal;
}
static
-int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state)
+int intel_vrr_compute_fixed_vmin(struct intel_crtc_state *crtc_state)
{
/*
- * To make fixed rr and vrr work seamless the guardband/pipeline full
- * should be set such that it satisfies both the fixed and variable
- * timings.
- * For this set the vmin as crtc_vtotal. With this we never need to
- * change anything to do with the guardband.
+ * For non VRR supporting panels/config, set the vmin to crtc_vtotal.
+ * This will help the case where VRR TG is used even for non-vrr panels/config.
*/
return crtc_state->hw.adjusted_mode.crtc_vtotal;
}
+static
+int intel_vrr_compute_vmin(struct intel_connector *connector,
+ const struct drm_display_mode *adjusted_mode)
+{
+ const struct drm_display_info *info = &connector->base.display_info;
+ int vmin;
+
+ vmin = adjusted_mode->crtc_clock * 1000 /
+ (adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq);
+ vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal);
+
+ return vmin;
+}
+
static
int intel_vrr_compute_vmax(struct intel_connector *connector,
const struct drm_display_mode *adjusted_mode)
@@ -378,13 +392,13 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
if (crtc_state->joiner_pipes)
crtc_state->vrr.in_range = false;
- vmin = intel_vrr_compute_vmin(crtc_state);
-
if (crtc_state->vrr.in_range) {
if (HAS_LRR(display))
crtc_state->update_lrr = true;
vmax = intel_vrr_compute_vmax(connector, adjusted_mode);
+ vmin = intel_vrr_compute_vmin(connector, adjusted_mode);
} else {
+ vmin = intel_vrr_compute_fixed_vmin(crtc_state);
vmax = vmin;
}
@@ -826,8 +840,7 @@ void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state)
bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state)
{
return crtc_state->vrr.flipline &&
- crtc_state->vrr.flipline == crtc_state->vrr.vmax &&
- crtc_state->vrr.flipline == intel_vrr_vmin_flipline(crtc_state);
+ crtc_state->vrr.flipline == crtc_state->vrr.vmax;
}
void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 14/15] drm/i915/panel: Add helper to get highest fixed mode
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (12 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 13/15] drm/i915/vrr: Set vrr.vmin to min Vtotal Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 15/15] drm/i915/vrr: Fix seamless_mn drrs for PTL Ankit Nautiyal
` (4 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
Add intel_panel_highest_fixed_mode() to return the fixed mode with the
highest pixel clock. Unlike intel_panel_highest_mode(), this function
does not fall back to the adjusted mode and returns NULL if no fixed
modes are available.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_panel.c | 13 +++++++++++++
drivers/gpu/drm/i915/display/intel_panel.h | 2 ++
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 2a20aaaaac39..ea4351d11e63 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -158,6 +158,19 @@ intel_panel_highest_mode(struct intel_connector *connector,
return best_mode;
}
+const struct drm_display_mode *
+intel_panel_highest_fixed_mode(struct intel_connector *connector)
+{
+ const struct drm_display_mode *fixed_mode, *highest_mode = NULL;
+
+ list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) {
+ if (!highest_mode || fixed_mode->clock > highest_mode->clock)
+ highest_mode = fixed_mode;
+ }
+
+ return highest_mode;
+}
+
int intel_panel_get_modes(struct intel_connector *connector)
{
const struct drm_display_mode *fixed_mode;
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index 56a6412cf0fb..60f6873cdbaa 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -39,6 +39,8 @@ intel_panel_downclock_mode(struct intel_connector *connector,
const struct drm_display_mode *
intel_panel_highest_mode(struct intel_connector *connector,
const struct drm_display_mode *adjusted_mode);
+const struct drm_display_mode *
+intel_panel_highest_fixed_mode(struct intel_connector *connector);
int intel_panel_get_modes(struct intel_connector *connector);
enum drrs_type intel_panel_drrs_type(struct intel_connector *connector);
enum drm_mode_status
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH 15/15] drm/i915/vrr: Fix seamless_mn drrs for PTL
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (13 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 14/15] drm/i915/panel: Add helper to get highest fixed mode Ankit Nautiyal
@ 2025-08-04 13:24 ` Ankit Nautiyal
2025-08-04 15:03 ` ✓ CI.KUnit: success for Optimize vrr.guardband and fix LRR (rev2) Patchwork
` (3 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Ankit Nautiyal @ 2025-08-04 13:24 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
With VRR timing generator always on, the fixed refresh rate is achieved
by setting vrr.flipline and vrr.vmax as the vtotal for the desired mode.
This creates a problem for seamless_mn drrs feature, where user can
seamlessly set a lower mode on the supporting panels by just changing
the mode clock, with desired lower rate. With VRR timing generator,
the vrr.flipline and vrr.vmax are set to vtotal, but that corresponds
to the higher mode.
To fix this, re-compute the vrr timings when seamless_mn drrs is in
picture. At the same time make sure that the vrr.guardband is set as
per the highest mode for such panels, so that switching between higher
to lower mode, does not change the vrr.guardband.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
drivers/gpu/drm/i915/display/intel_vrr.c | 71 ++++++++++++++++++++++++
3 files changed, 73 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 59808acbc314..ac67c57e8b70 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1741,7 +1741,7 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
return bpp;
}
-static bool has_seamless_m_n(struct intel_connector *connector)
+bool has_seamless_m_n(struct intel_connector *connector)
{
struct intel_display *display = to_intel_display(connector);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 994994d68475..75470eb7022a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -215,5 +215,6 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state,
int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector);
void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external);
int intel_dp_compute_sdp_latency(struct intel_crtc_state *crtc_state, bool assume_all_enabled);
+bool has_seamless_m_n(struct intel_connector *connector);
#endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 642a57a958ec..1821d9e75912 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -303,6 +303,16 @@ void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state)
if (!intel_vrr_possible(crtc_state))
return;
+ if (crtc_state->update_m_n) {
+ intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
+ crtc_state->vrr.vmin - 1);
+ intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
+ crtc_state->vrr.vmax - 1);
+ intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder),
+ crtc_state->vrr.flipline - 1);
+ return;
+ }
+
intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder),
intel_vrr_fixed_rr_vmin(crtc_state) - 1);
intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder),
@@ -322,6 +332,47 @@ void intel_vrr_compute_fixed_rr_timings(struct intel_crtc_state *crtc_state)
crtc_state->vrr.flipline = crtc_state->hw.adjusted_mode.crtc_vtotal;
}
+static bool needs_seamless_m_n_timings(struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector)
+{
+ if (!has_seamless_m_n(connector) || crtc_state->joiner_pipes)
+ return false;
+
+ return true;
+}
+
+static
+void intel_vrr_compute_fixed_rr_for_seamless_m_n(struct intel_crtc_state *crtc_state,
+ struct intel_connector *connector)
+{
+ const struct drm_display_mode *highest_mode = intel_panel_highest_fixed_mode(connector);
+ const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+ int vtotal_new;
+
+ /*
+ * For panels with seamless_m_n drrs, the user can seamlessly switch to
+ * a lower mode, which has a lower clock. This works with legacy timing
+ * generator, but not with the VRR timing generator. To run the
+ * VRR timing generator in fixed refresh rate mode flipline and vmax
+ * need to be set to same value.
+ *
+ * The function intel_vrr_compute_fixed_rr_timings set these to the
+ * VTOTAL. However, for this case we need to set the set the flipline
+ * and vmax to a higher value such that the VRR Timing generator can
+ * work with the desired fixed lower rate.
+ */
+ if (highest_mode && adjusted_mode->crtc_clock < highest_mode->clock) {
+ vtotal_new = adjusted_mode->crtc_vtotal * DIV_ROUND_UP(highest_mode->clock,
+ adjusted_mode->crtc_clock);
+ crtc_state->vrr.flipline = vtotal_new;
+ crtc_state->vrr.vmax = vtotal_new;
+
+ return;
+ }
+
+ intel_vrr_compute_fixed_rr_timings(crtc_state);
+}
+
static
int intel_vrr_compute_fixed_vmin(struct intel_crtc_state *crtc_state)
{
@@ -411,6 +462,9 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
intel_vrr_compute_vrr_timings(crtc_state);
else if (is_cmrr_frac_required(crtc_state) && is_edp)
intel_vrr_compute_cmrr_timings(crtc_state);
+
+ else if (needs_seamless_m_n_timings(crtc_state, connector))
+ intel_vrr_compute_fixed_rr_for_seamless_m_n(crtc_state, connector);
else
intel_vrr_compute_fixed_rr_timings(crtc_state);
@@ -493,6 +547,7 @@ int intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state,
{
const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
struct intel_display *display = to_intel_display(crtc_state);
+ const struct drm_display_mode *highest_mode;
struct intel_dp *intel_dp;
int dsc_prefill_time = 0;
int psr2_pr_latency = 0;
@@ -506,6 +561,22 @@ int intel_vrr_compute_guardband(struct intel_crtc_state *crtc_state,
int guardband;
int pm_delay;
+ /*
+ * For seamless m_n the clock is changed while other modeline
+ * parameters are same. In that case the linetime_us will change,
+ * causing the guardband to change, and the seamless switch to
+ * lower mode would not take place.
+ * To avoid this, take the highest mode where panel supports
+ * seamless drrs and make guardband equal to the vblank length
+ * for the highest mode.
+ */
+ highest_mode = intel_panel_highest_fixed_mode(connector);
+ if (needs_seamless_m_n_timings(crtc_state, connector) && highest_mode) {
+ guardband = highest_mode->vtotal - highest_mode->vdisplay;
+
+ return guardband;
+ }
+
linetime_us = DIV_ROUND_UP(adjusted_mode->crtc_htotal * 1000,
adjusted_mode->crtc_clock);
--
2.45.2
^ permalink raw reply related [flat|nested] 22+ messages in thread
* ✓ CI.KUnit: success for Optimize vrr.guardband and fix LRR (rev2)
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (14 preceding siblings ...)
2025-08-04 13:24 ` [PATCH 15/15] drm/i915/vrr: Fix seamless_mn drrs for PTL Ankit Nautiyal
@ 2025-08-04 15:03 ` Patchwork
2025-08-04 15:18 ` ✗ CI.checksparse: warning " Patchwork
` (2 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-08-04 15:03 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-xe
== Series Details ==
Series: Optimize vrr.guardband and fix LRR (rev2)
URL : https://patchwork.freedesktop.org/series/151244/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[15:02:49] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:02:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:03:20] Starting KUnit Kernel (1/1)...
[15:03:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:03:21] ================== guc_buf (11 subtests) ===================
[15:03:21] [PASSED] test_smallest
[15:03:21] [PASSED] test_largest
[15:03:21] [PASSED] test_granular
[15:03:21] [PASSED] test_unique
[15:03:21] [PASSED] test_overlap
[15:03:21] [PASSED] test_reusable
[15:03:21] [PASSED] test_too_big
[15:03:21] [PASSED] test_flush
[15:03:21] [PASSED] test_lookup
[15:03:21] [PASSED] test_data
[15:03:21] [PASSED] test_class
[15:03:21] ===================== [PASSED] guc_buf =====================
[15:03:21] =================== guc_dbm (7 subtests) ===================
[15:03:21] [PASSED] test_empty
[15:03:21] [PASSED] test_default
[15:03:21] ======================== test_size ========================
[15:03:21] [PASSED] 4
[15:03:21] [PASSED] 8
[15:03:21] [PASSED] 32
[15:03:21] [PASSED] 256
[15:03:21] ==================== [PASSED] test_size ====================
[15:03:21] ======================= test_reuse ========================
[15:03:21] [PASSED] 4
[15:03:21] [PASSED] 8
[15:03:21] [PASSED] 32
[15:03:21] [PASSED] 256
[15:03:21] =================== [PASSED] test_reuse ====================
[15:03:21] =================== test_range_overlap ====================
[15:03:21] [PASSED] 4
[15:03:21] [PASSED] 8
[15:03:21] [PASSED] 32
[15:03:21] [PASSED] 256
[15:03:21] =============== [PASSED] test_range_overlap ================
[15:03:21] =================== test_range_compact ====================
[15:03:21] [PASSED] 4
[15:03:21] [PASSED] 8
[15:03:21] [PASSED] 32
[15:03:21] [PASSED] 256
[15:03:21] =============== [PASSED] test_range_compact ================
[15:03:21] ==================== test_range_spare =====================
[15:03:21] [PASSED] 4
[15:03:21] [PASSED] 8
[15:03:21] [PASSED] 32
[15:03:21] [PASSED] 256
[15:03:21] ================ [PASSED] test_range_spare =================
[15:03:21] ===================== [PASSED] guc_dbm =====================
[15:03:21] =================== guc_idm (6 subtests) ===================
[15:03:21] [PASSED] bad_init
[15:03:21] [PASSED] no_init
[15:03:21] [PASSED] init_fini
[15:03:21] [PASSED] check_used
[15:03:21] [PASSED] check_quota
[15:03:21] [PASSED] check_all
[15:03:21] ===================== [PASSED] guc_idm =====================
[15:03:21] ================== no_relay (3 subtests) ===================
[15:03:21] [PASSED] xe_drops_guc2pf_if_not_ready
[15:03:21] [PASSED] xe_drops_guc2vf_if_not_ready
[15:03:21] [PASSED] xe_rejects_send_if_not_ready
[15:03:21] ==================== [PASSED] no_relay =====================
[15:03:21] ================== pf_relay (14 subtests) ==================
[15:03:21] [PASSED] pf_rejects_guc2pf_too_short
[15:03:21] [PASSED] pf_rejects_guc2pf_too_long
[15:03:21] [PASSED] pf_rejects_guc2pf_no_payload
[15:03:21] [PASSED] pf_fails_no_payload
[15:03:21] [PASSED] pf_fails_bad_origin
[15:03:21] [PASSED] pf_fails_bad_type
[15:03:21] [PASSED] pf_txn_reports_error
[15:03:21] [PASSED] pf_txn_sends_pf2guc
[15:03:21] [PASSED] pf_sends_pf2guc
[15:03:21] [SKIPPED] pf_loopback_nop
[15:03:21] [SKIPPED] pf_loopback_echo
[15:03:21] [SKIPPED] pf_loopback_fail
[15:03:21] [SKIPPED] pf_loopback_busy
[15:03:21] [SKIPPED] pf_loopback_retry
[15:03:21] ==================== [PASSED] pf_relay =====================
[15:03:21] ================== vf_relay (3 subtests) ===================
[15:03:21] [PASSED] vf_rejects_guc2vf_too_short
[15:03:21] [PASSED] vf_rejects_guc2vf_too_long
[15:03:21] [PASSED] vf_rejects_guc2vf_no_payload
[15:03:21] ==================== [PASSED] vf_relay =====================
[15:03:21] ===================== lmtt (1 subtest) =====================
[15:03:21] ======================== test_ops =========================
[15:03:21] [PASSED] 2-level
[15:03:21] [PASSED] multi-level
[15:03:21] ==================== [PASSED] test_ops =====================
[15:03:21] ====================== [PASSED] lmtt =======================
[15:03:21] ================= pf_service (11 subtests) =================
[15:03:21] [PASSED] pf_negotiate_any
[15:03:21] [PASSED] pf_negotiate_base_match
[15:03:21] [PASSED] pf_negotiate_base_newer
[15:03:21] [PASSED] pf_negotiate_base_next
[15:03:21] [SKIPPED] pf_negotiate_base_older
[15:03:21] [PASSED] pf_negotiate_base_prev
[15:03:21] [PASSED] pf_negotiate_latest_match
[15:03:21] [PASSED] pf_negotiate_latest_newer
[15:03:21] [PASSED] pf_negotiate_latest_next
[15:03:21] [SKIPPED] pf_negotiate_latest_older
[15:03:21] [SKIPPED] pf_negotiate_latest_prev
[15:03:21] =================== [PASSED] pf_service ====================
[15:03:21] =================== xe_mocs (2 subtests) ===================
[15:03:21] ================ xe_live_mocs_kernel_kunit ================
[15:03:21] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[15:03:21] ================ xe_live_mocs_reset_kunit =================
[15:03:21] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[15:03:21] ==================== [SKIPPED] xe_mocs =====================
[15:03:21] ================= xe_migrate (2 subtests) ==================
[15:03:21] ================= xe_migrate_sanity_kunit =================
[15:03:21] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[15:03:21] ================== xe_validate_ccs_kunit ==================
[15:03:21] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[15:03:21] =================== [SKIPPED] xe_migrate ===================
[15:03:21] ================== xe_dma_buf (1 subtest) ==================
[15:03:21] ==================== xe_dma_buf_kunit =====================
[15:03:21] ================ [SKIPPED] xe_dma_buf_kunit ================
[15:03:21] =================== [SKIPPED] xe_dma_buf ===================
[15:03:21] ================= xe_bo_shrink (1 subtest) =================
[15:03:21] =================== xe_bo_shrink_kunit ====================
[15:03:21] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[15:03:21] ================== [SKIPPED] xe_bo_shrink ==================
[15:03:21] ==================== xe_bo (2 subtests) ====================
[15:03:21] ================== xe_ccs_migrate_kunit ===================
[15:03:21] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[15:03:21] ==================== xe_bo_evict_kunit ====================
[15:03:21] =============== [SKIPPED] xe_bo_evict_kunit ================
[15:03:21] ===================== [SKIPPED] xe_bo ======================
[15:03:21] ==================== args (11 subtests) ====================
[15:03:21] [PASSED] count_args_test
[15:03:21] [PASSED] call_args_example
[15:03:21] [PASSED] call_args_test
[15:03:21] [PASSED] drop_first_arg_example
[15:03:21] [PASSED] drop_first_arg_test
[15:03:21] [PASSED] first_arg_example
[15:03:21] [PASSED] first_arg_test
[15:03:21] [PASSED] last_arg_example
[15:03:21] [PASSED] last_arg_test
[15:03:21] [PASSED] pick_arg_example
[15:03:21] [PASSED] sep_comma_example
[15:03:21] ====================== [PASSED] args =======================
[15:03:21] =================== xe_pci (3 subtests) ====================
[15:03:21] ==================== check_graphics_ip ====================
[15:03:21] [PASSED] 12.70 Xe_LPG
[15:03:21] [PASSED] 12.71 Xe_LPG
[15:03:21] [PASSED] 12.74 Xe_LPG+
[15:03:21] [PASSED] 20.01 Xe2_HPG
[15:03:21] [PASSED] 20.02 Xe2_HPG
[15:03:21] [PASSED] 20.04 Xe2_LPG
[15:03:21] [PASSED] 30.00 Xe3_LPG
[15:03:21] [PASSED] 30.01 Xe3_LPG
[15:03:21] [PASSED] 30.03 Xe3_LPG
[15:03:21] ================ [PASSED] check_graphics_ip ================
[15:03:21] ===================== check_media_ip ======================
[15:03:21] [PASSED] 13.00 Xe_LPM+
[15:03:21] [PASSED] 13.01 Xe2_HPM
[15:03:21] [PASSED] 20.00 Xe2_LPM
[15:03:21] [PASSED] 30.00 Xe3_LPM
[15:03:21] [PASSED] 30.02 Xe3_LPM
[15:03:21] ================= [PASSED] check_media_ip ==================
[15:03:21] ================= check_platform_gt_count =================
[15:03:21] [PASSED] 0x9A60 (TIGERLAKE)
[15:03:21] [PASSED] 0x9A68 (TIGERLAKE)
[15:03:21] [PASSED] 0x9A70 (TIGERLAKE)
[15:03:21] [PASSED] 0x9A40 (TIGERLAKE)
[15:03:21] [PASSED] 0x9A49 (TIGERLAKE)
[15:03:21] [PASSED] 0x9A59 (TIGERLAKE)
[15:03:21] [PASSED] 0x9A78 (TIGERLAKE)
[15:03:21] [PASSED] 0x9AC0 (TIGERLAKE)
[15:03:21] [PASSED] 0x9AC9 (TIGERLAKE)
[15:03:21] [PASSED] 0x9AD9 (TIGERLAKE)
[15:03:21] [PASSED] 0x9AF8 (TIGERLAKE)
[15:03:21] [PASSED] 0x4C80 (ROCKETLAKE)
[15:03:21] [PASSED] 0x4C8A (ROCKETLAKE)
[15:03:21] [PASSED] 0x4C8B (ROCKETLAKE)
[15:03:21] [PASSED] 0x4C8C (ROCKETLAKE)
[15:03:21] [PASSED] 0x4C90 (ROCKETLAKE)
[15:03:21] [PASSED] 0x4C9A (ROCKETLAKE)
[15:03:21] [PASSED] 0x4680 (ALDERLAKE_S)
[15:03:21] [PASSED] 0x4682 (ALDERLAKE_S)
[15:03:21] [PASSED] 0x4688 (ALDERLAKE_S)
[15:03:21] [PASSED] 0x468A (ALDERLAKE_S)
[15:03:21] [PASSED] 0x468B (ALDERLAKE_S)
[15:03:21] [PASSED] 0x4690 (ALDERLAKE_S)
[15:03:21] [PASSED] 0x4692 (ALDERLAKE_S)
[15:03:21] [PASSED] 0x4693 (ALDERLAKE_S)
[15:03:21] [PASSED] 0x46A0 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46A1 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46A2 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46A3 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46A6 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46A8 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46AA (ALDERLAKE_P)
[15:03:21] [PASSED] 0x462A (ALDERLAKE_P)
[15:03:21] [PASSED] 0x4626 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x4628 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46B0 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46B1 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46B2 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46B3 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46C0 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46C1 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46C2 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46C3 (ALDERLAKE_P)
[15:03:21] [PASSED] 0x46D0 (ALDERLAKE_N)
[15:03:21] [PASSED] 0x46D1 (ALDERLAKE_N)
[15:03:21] [PASSED] 0x46D2 (ALDERLAKE_N)
[15:03:21] [PASSED] 0x46D3 (ALDERLAKE_N)
[15:03:21] [PASSED] 0x46D4 (ALDERLAKE_N)
[15:03:21] [PASSED] 0xA721 (ALDERLAKE_P)
[15:03:21] [PASSED] 0xA7A1 (ALDERLAKE_P)
[15:03:21] [PASSED] 0xA7A9 (ALDERLAKE_P)
[15:03:21] [PASSED] 0xA7AC (ALDERLAKE_P)
[15:03:21] [PASSED] 0xA7AD (ALDERLAKE_P)
[15:03:21] [PASSED] 0xA720 (ALDERLAKE_P)
[15:03:21] [PASSED] 0xA7A0 (ALDERLAKE_P)
[15:03:21] [PASSED] 0xA7A8 (ALDERLAKE_P)
[15:03:21] [PASSED] 0xA7AA (ALDERLAKE_P)
[15:03:21] [PASSED] 0xA7AB (ALDERLAKE_P)
[15:03:21] [PASSED] 0xA780 (ALDERLAKE_S)
[15:03:21] [PASSED] 0xA781 (ALDERLAKE_S)
[15:03:21] [PASSED] 0xA782 (ALDERLAKE_S)
[15:03:21] [PASSED] 0xA783 (ALDERLAKE_S)
[15:03:21] [PASSED] 0xA788 (ALDERLAKE_S)
[15:03:21] [PASSED] 0xA789 (ALDERLAKE_S)
[15:03:21] [PASSED] 0xA78A (ALDERLAKE_S)
[15:03:21] [PASSED] 0xA78B (ALDERLAKE_S)
[15:03:21] [PASSED] 0x4905 (DG1)
[15:03:21] [PASSED] 0x4906 (DG1)
[15:03:21] [PASSED] 0x4907 (DG1)
[15:03:21] [PASSED] 0x4908 (DG1)
[15:03:21] [PASSED] 0x4909 (DG1)
[15:03:21] [PASSED] 0x56C0 (DG2)
[15:03:21] [PASSED] 0x56C2 (DG2)
[15:03:21] [PASSED] 0x56C1 (DG2)
[15:03:21] [PASSED] 0x7D51 (METEORLAKE)
[15:03:21] [PASSED] 0x7DD1 (METEORLAKE)
[15:03:21] [PASSED] 0x7D41 (METEORLAKE)
[15:03:21] [PASSED] 0x7D67 (METEORLAKE)
[15:03:21] [PASSED] 0xB640 (METEORLAKE)
[15:03:21] [PASSED] 0x56A0 (DG2)
[15:03:21] [PASSED] 0x56A1 (DG2)
[15:03:21] [PASSED] 0x56A2 (DG2)
[15:03:21] [PASSED] 0x56BE (DG2)
[15:03:21] [PASSED] 0x56BF (DG2)
[15:03:21] [PASSED] 0x5690 (DG2)
[15:03:21] [PASSED] 0x5691 (DG2)
[15:03:21] [PASSED] 0x5692 (DG2)
[15:03:21] [PASSED] 0x56A5 (DG2)
[15:03:21] [PASSED] 0x56A6 (DG2)
[15:03:21] [PASSED] 0x56B0 (DG2)
[15:03:21] [PASSED] 0x56B1 (DG2)
[15:03:21] [PASSED] 0x56BA (DG2)
[15:03:21] [PASSED] 0x56BB (DG2)
[15:03:21] [PASSED] 0x56BC (DG2)
[15:03:21] [PASSED] 0x56BD (DG2)
[15:03:21] [PASSED] 0x5693 (DG2)
[15:03:21] [PASSED] 0x5694 (DG2)
[15:03:21] [PASSED] 0x5695 (DG2)
[15:03:21] [PASSED] 0x56A3 (DG2)
[15:03:21] [PASSED] 0x56A4 (DG2)
[15:03:21] [PASSED] 0x56B2 (DG2)
[15:03:21] [PASSED] 0x56B3 (DG2)
[15:03:21] [PASSED] 0x5696 (DG2)
[15:03:21] [PASSED] 0x5697 (DG2)
[15:03:21] [PASSED] 0xB69 (PVC)
[15:03:21] [PASSED] 0xB6E (PVC)
[15:03:21] [PASSED] 0xBD4 (PVC)
[15:03:21] [PASSED] 0xBD5 (PVC)
[15:03:21] [PASSED] 0xBD6 (PVC)
[15:03:21] [PASSED] 0xBD7 (PVC)
[15:03:21] [PASSED] 0xBD8 (PVC)
[15:03:21] [PASSED] 0xBD9 (PVC)
[15:03:21] [PASSED] 0xBDA (PVC)
[15:03:21] [PASSED] 0xBDB (PVC)
[15:03:21] [PASSED] 0xBE0 (PVC)
[15:03:21] [PASSED] 0xBE1 (PVC)
[15:03:21] [PASSED] 0xBE5 (PVC)
[15:03:21] [PASSED] 0x7D40 (METEORLAKE)
[15:03:21] [PASSED] 0x7D45 (METEORLAKE)
[15:03:21] [PASSED] 0x7D55 (METEORLAKE)
[15:03:21] [PASSED] 0x7D60 (METEORLAKE)
[15:03:21] [PASSED] 0x7DD5 (METEORLAKE)
[15:03:21] [PASSED] 0x6420 (LUNARLAKE)
[15:03:21] [PASSED] 0x64A0 (LUNARLAKE)
[15:03:21] [PASSED] 0x64B0 (LUNARLAKE)
[15:03:21] [PASSED] 0xE202 (BATTLEMAGE)
[15:03:21] [PASSED] 0xE209 (BATTLEMAGE)
[15:03:21] [PASSED] 0xE20B (BATTLEMAGE)
[15:03:21] [PASSED] 0xE20C (BATTLEMAGE)
[15:03:21] [PASSED] 0xE20D (BATTLEMAGE)
[15:03:21] [PASSED] 0xE210 (BATTLEMAGE)
[15:03:21] [PASSED] 0xE211 (BATTLEMAGE)
[15:03:21] [PASSED] 0xE212 (BATTLEMAGE)
[15:03:21] [PASSED] 0xE216 (BATTLEMAGE)
[15:03:21] [PASSED] 0xE220 (BATTLEMAGE)
[15:03:21] [PASSED] 0xE221 (BATTLEMAGE)
[15:03:21] [PASSED] 0xE222 (BATTLEMAGE)
[15:03:21] [PASSED] 0xE223 (BATTLEMAGE)
[15:03:21] [PASSED] 0xB080 (PANTHERLAKE)
[15:03:21] [PASSED] 0xB081 (PANTHERLAKE)
[15:03:21] [PASSED] 0xB082 (PANTHERLAKE)
[15:03:21] [PASSED] 0xB083 (PANTHERLAKE)
[15:03:21] [PASSED] 0xB084 (PANTHERLAKE)
[15:03:21] [PASSED] 0xB085 (PANTHERLAKE)
[15:03:21] [PASSED] 0xB086 (PANTHERLAKE)
[15:03:21] [PASSED] 0xB087 (PANTHERLAKE)
[15:03:21] [PASSED] 0xB08F (PANTHERLAKE)
[15:03:21] [PASSED] 0xB090 (PANTHERLAKE)
[15:03:21] [PASSED] 0xB0A0 (PANTHERLAKE)
[15:03:21] [PASSED] 0xB0B0 (PANTHERLAKE)
[15:03:21] [PASSED] 0xFD80 (PANTHERLAKE)
[15:03:21] [PASSED] 0xFD81 (PANTHERLAKE)
[15:03:21] ============= [PASSED] check_platform_gt_count =============
[15:03:21] ===================== [PASSED] xe_pci ======================
[15:03:21] =================== xe_rtp (2 subtests) ====================
[15:03:21] =============== xe_rtp_process_to_sr_tests ================
[15:03:21] [PASSED] coalesce-same-reg
[15:03:21] [PASSED] no-match-no-add
[15:03:21] [PASSED] match-or
[15:03:21] [PASSED] match-or-xfail
[15:03:21] [PASSED] no-match-no-add-multiple-rules
[15:03:21] [PASSED] two-regs-two-entries
[15:03:21] [PASSED] clr-one-set-other
[15:03:21] [PASSED] set-field
[15:03:21] [PASSED] conflict-duplicate
[15:03:21] [PASSED] conflict-not-disjoint
[15:03:21] [PASSED] conflict-reg-type
[15:03:21] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[15:03:21] ================== xe_rtp_process_tests ===================
[15:03:21] [PASSED] active1
[15:03:21] [PASSED] active2
[15:03:21] [PASSED] active-inactive
[15:03:21] [PASSED] inactive-active
[15:03:21] [PASSED] inactive-1st_or_active-inactive
[15:03:21] [PASSED] inactive-2nd_or_active-inactive
[15:03:21] [PASSED] inactive-last_or_active-inactive
[15:03:21] [PASSED] inactive-no_or_active-inactive
[15:03:21] ============== [PASSED] xe_rtp_process_tests ===============
[15:03:21] ===================== [PASSED] xe_rtp ======================
[15:03:21] ==================== xe_wa (1 subtest) =====================
[15:03:21] ======================== xe_wa_gt =========================
[15:03:21] [PASSED] TIGERLAKE (B0)
[15:03:21] [PASSED] DG1 (A0)
[15:03:21] [PASSED] DG1 (B0)
[15:03:21] [PASSED] ALDERLAKE_S (A0)
[15:03:21] [PASSED] ALDERLAKE_S (B0)
[15:03:21] [PASSED] ALDERLAKE_S (C0)
[15:03:21] [PASSED] ALDERLAKE_S (D0)
[15:03:21] [PASSED] ALDERLAKE_P (A0)
[15:03:21] [PASSED] ALDERLAKE_P (B0)
[15:03:21] [PASSED] ALDERLAKE_P (C0)
[15:03:21] [PASSED] ALDERLAKE_S_RPLS (D0)
[15:03:21] [PASSED] ALDERLAKE_P_RPLU (E0)
[15:03:21] [PASSED] DG2_G10 (C0)
[15:03:21] [PASSED] DG2_G11 (B1)
[15:03:21] [PASSED] DG2_G12 (A1)
[15:03:21] [PASSED] METEORLAKE (g:A0, m:A0)
[15:03:21] [PASSED] METEORLAKE (g:A0, m:A0)
[15:03:21] [PASSED] METEORLAKE (g:A0, m:A0)
[15:03:21] [PASSED] LUNARLAKE (g:A0, m:A0)
[15:03:21] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[15:03:21] [PASSED] BATTLEMAGE (g:A0, m:A1)
[15:03:21] ==================== [PASSED] xe_wa_gt =====================
[15:03:21] ====================== [PASSED] xe_wa ======================
[15:03:21] ============================================================
[15:03:21] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[15:03:21] Elapsed time: 31.721s total, 4.161s configuring, 27.193s building, 0.324s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[15:03:21] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:03:23] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:03:44] Starting KUnit Kernel (1/1)...
[15:03:44] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:03:44] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[15:03:44] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[15:03:44] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[15:03:44] =========== drm_validate_clone_mode (2 subtests) ===========
[15:03:44] ============== drm_test_check_in_clone_mode ===============
[15:03:44] [PASSED] in_clone_mode
[15:03:44] [PASSED] not_in_clone_mode
[15:03:44] ========== [PASSED] drm_test_check_in_clone_mode ===========
[15:03:44] =============== drm_test_check_valid_clones ===============
[15:03:44] [PASSED] not_in_clone_mode
[15:03:44] [PASSED] valid_clone
[15:03:44] [PASSED] invalid_clone
[15:03:44] =========== [PASSED] drm_test_check_valid_clones ===========
[15:03:44] ============= [PASSED] drm_validate_clone_mode =============
[15:03:44] ============= drm_validate_modeset (1 subtest) =============
[15:03:44] [PASSED] drm_test_check_connector_changed_modeset
[15:03:44] ============== [PASSED] drm_validate_modeset ===============
[15:03:44] ====== drm_test_bridge_get_current_state (2 subtests) ======
[15:03:44] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[15:03:44] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[15:03:44] ======== [PASSED] drm_test_bridge_get_current_state ========
[15:03:44] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[15:03:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[15:03:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[15:03:44] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[15:03:44] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[15:03:44] ============== drm_bridge_alloc (2 subtests) ===============
[15:03:44] [PASSED] drm_test_drm_bridge_alloc_basic
[15:03:44] [PASSED] drm_test_drm_bridge_alloc_get_put
[15:03:44] ================ [PASSED] drm_bridge_alloc =================
[15:03:44] ================== drm_buddy (7 subtests) ==================
[15:03:44] [PASSED] drm_test_buddy_alloc_limit
[15:03:44] [PASSED] drm_test_buddy_alloc_optimistic
[15:03:44] [PASSED] drm_test_buddy_alloc_pessimistic
[15:03:44] [PASSED] drm_test_buddy_alloc_pathological
[15:03:44] [PASSED] drm_test_buddy_alloc_contiguous
[15:03:44] [PASSED] drm_test_buddy_alloc_clear
[15:03:44] [PASSED] drm_test_buddy_alloc_range_bias
[15:03:44] ==================== [PASSED] drm_buddy ====================
[15:03:44] ============= drm_cmdline_parser (40 subtests) =============
[15:03:44] [PASSED] drm_test_cmdline_force_d_only
[15:03:44] [PASSED] drm_test_cmdline_force_D_only_dvi
[15:03:44] [PASSED] drm_test_cmdline_force_D_only_hdmi
[15:03:44] [PASSED] drm_test_cmdline_force_D_only_not_digital
[15:03:44] [PASSED] drm_test_cmdline_force_e_only
[15:03:44] [PASSED] drm_test_cmdline_res
[15:03:44] [PASSED] drm_test_cmdline_res_vesa
[15:03:44] [PASSED] drm_test_cmdline_res_vesa_rblank
[15:03:44] [PASSED] drm_test_cmdline_res_rblank
[15:03:44] [PASSED] drm_test_cmdline_res_bpp
[15:03:44] [PASSED] drm_test_cmdline_res_refresh
[15:03:44] [PASSED] drm_test_cmdline_res_bpp_refresh
[15:03:44] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[15:03:44] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[15:03:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[15:03:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[15:03:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[15:03:44] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[15:03:44] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[15:03:44] [PASSED] drm_test_cmdline_res_margins_force_on
[15:03:44] [PASSED] drm_test_cmdline_res_vesa_margins
[15:03:44] [PASSED] drm_test_cmdline_name
[15:03:44] [PASSED] drm_test_cmdline_name_bpp
[15:03:44] [PASSED] drm_test_cmdline_name_option
[15:03:44] [PASSED] drm_test_cmdline_name_bpp_option
[15:03:44] [PASSED] drm_test_cmdline_rotate_0
[15:03:44] [PASSED] drm_test_cmdline_rotate_90
[15:03:44] [PASSED] drm_test_cmdline_rotate_180
[15:03:44] [PASSED] drm_test_cmdline_rotate_270
[15:03:44] [PASSED] drm_test_cmdline_hmirror
[15:03:44] [PASSED] drm_test_cmdline_vmirror
[15:03:44] [PASSED] drm_test_cmdline_margin_options
[15:03:44] [PASSED] drm_test_cmdline_multiple_options
[15:03:44] [PASSED] drm_test_cmdline_bpp_extra_and_option
[15:03:44] [PASSED] drm_test_cmdline_extra_and_option
[15:03:44] [PASSED] drm_test_cmdline_freestanding_options
[15:03:44] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[15:03:44] [PASSED] drm_test_cmdline_panel_orientation
[15:03:44] ================ drm_test_cmdline_invalid =================
[15:03:44] [PASSED] margin_only
[15:03:44] [PASSED] interlace_only
[15:03:44] [PASSED] res_missing_x
[15:03:44] [PASSED] res_missing_y
[15:03:44] [PASSED] res_bad_y
[15:03:44] [PASSED] res_missing_y_bpp
[15:03:44] [PASSED] res_bad_bpp
[15:03:44] [PASSED] res_bad_refresh
[15:03:44] [PASSED] res_bpp_refresh_force_on_off
[15:03:44] [PASSED] res_invalid_mode
[15:03:44] [PASSED] res_bpp_wrong_place_mode
[15:03:44] [PASSED] name_bpp_refresh
[15:03:44] [PASSED] name_refresh
[15:03:44] [PASSED] name_refresh_wrong_mode
[15:03:44] [PASSED] name_refresh_invalid_mode
[15:03:44] [PASSED] rotate_multiple
[15:03:44] [PASSED] rotate_invalid_val
[15:03:44] [PASSED] rotate_truncated
[15:03:44] [PASSED] invalid_option
[15:03:44] [PASSED] invalid_tv_option
[15:03:44] [PASSED] truncated_tv_option
[15:03:44] ============ [PASSED] drm_test_cmdline_invalid =============
[15:03:44] =============== drm_test_cmdline_tv_options ===============
[15:03:44] [PASSED] NTSC
[15:03:44] [PASSED] NTSC_443
[15:03:44] [PASSED] NTSC_J
[15:03:44] [PASSED] PAL
[15:03:44] [PASSED] PAL_M
[15:03:44] [PASSED] PAL_N
[15:03:44] [PASSED] SECAM
[15:03:44] [PASSED] MONO_525
[15:03:44] [PASSED] MONO_625
[15:03:44] =========== [PASSED] drm_test_cmdline_tv_options ===========
[15:03:44] =============== [PASSED] drm_cmdline_parser ================
[15:03:44] ========== drmm_connector_hdmi_init (20 subtests) ==========
[15:03:44] [PASSED] drm_test_connector_hdmi_init_valid
[15:03:44] [PASSED] drm_test_connector_hdmi_init_bpc_8
[15:03:44] [PASSED] drm_test_connector_hdmi_init_bpc_10
[15:03:44] [PASSED] drm_test_connector_hdmi_init_bpc_12
[15:03:44] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[15:03:44] [PASSED] drm_test_connector_hdmi_init_bpc_null
[15:03:44] [PASSED] drm_test_connector_hdmi_init_formats_empty
[15:03:44] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[15:03:44] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:03:44] [PASSED] supported_formats=0x9 yuv420_allowed=1
[15:03:44] [PASSED] supported_formats=0x9 yuv420_allowed=0
[15:03:44] [PASSED] supported_formats=0x3 yuv420_allowed=1
[15:03:44] [PASSED] supported_formats=0x3 yuv420_allowed=0
[15:03:44] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:03:44] [PASSED] drm_test_connector_hdmi_init_null_ddc
[15:03:44] [PASSED] drm_test_connector_hdmi_init_null_product
[15:03:44] [PASSED] drm_test_connector_hdmi_init_null_vendor
[15:03:44] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[15:03:44] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[15:03:44] [PASSED] drm_test_connector_hdmi_init_product_valid
[15:03:44] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[15:03:44] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[15:03:44] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[15:03:44] ========= drm_test_connector_hdmi_init_type_valid =========
[15:03:44] [PASSED] HDMI-A
[15:03:44] [PASSED] HDMI-B
[15:03:44] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[15:03:44] ======== drm_test_connector_hdmi_init_type_invalid ========
[15:03:44] [PASSED] Unknown
[15:03:44] [PASSED] VGA
[15:03:44] [PASSED] DVI-I
[15:03:44] [PASSED] DVI-D
[15:03:44] [PASSED] DVI-A
[15:03:44] [PASSED] Composite
[15:03:44] [PASSED] SVIDEO
[15:03:44] [PASSED] LVDS
[15:03:44] [PASSED] Component
[15:03:44] [PASSED] DIN
[15:03:44] [PASSED] DP
[15:03:44] [PASSED] TV
[15:03:44] [PASSED] eDP
[15:03:44] [PASSED] Virtual
[15:03:44] [PASSED] DSI
[15:03:44] [PASSED] DPI
[15:03:44] [PASSED] Writeback
[15:03:44] [PASSED] SPI
[15:03:44] [PASSED] USB
[15:03:44] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[15:03:44] ============ [PASSED] drmm_connector_hdmi_init =============
[15:03:44] ============= drmm_connector_init (3 subtests) =============
[15:03:44] [PASSED] drm_test_drmm_connector_init
[15:03:44] [PASSED] drm_test_drmm_connector_init_null_ddc
[15:03:44] ========= drm_test_drmm_connector_init_type_valid =========
[15:03:44] [PASSED] Unknown
[15:03:44] [PASSED] VGA
[15:03:44] [PASSED] DVI-I
[15:03:44] [PASSED] DVI-D
[15:03:44] [PASSED] DVI-A
[15:03:44] [PASSED] Composite
[15:03:44] [PASSED] SVIDEO
[15:03:44] [PASSED] LVDS
[15:03:44] [PASSED] Component
[15:03:44] [PASSED] DIN
[15:03:44] [PASSED] DP
[15:03:44] [PASSED] HDMI-A
[15:03:44] [PASSED] HDMI-B
[15:03:44] [PASSED] TV
[15:03:44] [PASSED] eDP
[15:03:44] [PASSED] Virtual
[15:03:44] [PASSED] DSI
[15:03:44] [PASSED] DPI
[15:03:44] [PASSED] Writeback
[15:03:44] [PASSED] SPI
[15:03:44] [PASSED] USB
[15:03:44] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[15:03:44] =============== [PASSED] drmm_connector_init ===============
[15:03:44] ========= drm_connector_dynamic_init (6 subtests) ==========
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_init
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_init_properties
[15:03:44] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[15:03:44] [PASSED] Unknown
[15:03:44] [PASSED] VGA
[15:03:44] [PASSED] DVI-I
[15:03:44] [PASSED] DVI-D
[15:03:44] [PASSED] DVI-A
[15:03:44] [PASSED] Composite
[15:03:44] [PASSED] SVIDEO
[15:03:44] [PASSED] LVDS
[15:03:44] [PASSED] Component
[15:03:44] [PASSED] DIN
[15:03:44] [PASSED] DP
[15:03:44] [PASSED] HDMI-A
[15:03:44] [PASSED] HDMI-B
[15:03:44] [PASSED] TV
[15:03:44] [PASSED] eDP
[15:03:44] [PASSED] Virtual
[15:03:44] [PASSED] DSI
[15:03:44] [PASSED] DPI
[15:03:44] [PASSED] Writeback
[15:03:44] [PASSED] SPI
[15:03:44] [PASSED] USB
[15:03:44] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[15:03:44] ======== drm_test_drm_connector_dynamic_init_name =========
[15:03:44] [PASSED] Unknown
[15:03:44] [PASSED] VGA
[15:03:44] [PASSED] DVI-I
[15:03:44] [PASSED] DVI-D
[15:03:44] [PASSED] DVI-A
[15:03:44] [PASSED] Composite
[15:03:44] [PASSED] SVIDEO
[15:03:44] [PASSED] LVDS
[15:03:44] [PASSED] Component
[15:03:44] [PASSED] DIN
[15:03:44] [PASSED] DP
[15:03:44] [PASSED] HDMI-A
[15:03:44] [PASSED] HDMI-B
[15:03:44] [PASSED] TV
[15:03:44] [PASSED] eDP
[15:03:44] [PASSED] Virtual
[15:03:44] [PASSED] DSI
[15:03:44] [PASSED] DPI
[15:03:44] [PASSED] Writeback
[15:03:44] [PASSED] SPI
[15:03:44] [PASSED] USB
[15:03:44] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[15:03:44] =========== [PASSED] drm_connector_dynamic_init ============
[15:03:44] ==== drm_connector_dynamic_register_early (4 subtests) =====
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[15:03:44] ====== [PASSED] drm_connector_dynamic_register_early =======
[15:03:44] ======= drm_connector_dynamic_register (7 subtests) ========
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[15:03:44] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[15:03:44] ========= [PASSED] drm_connector_dynamic_register ==========
[15:03:44] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[15:03:44] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[15:03:44] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[15:03:44] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[15:03:44] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[15:03:44] ========== drm_test_get_tv_mode_from_name_valid ===========
[15:03:44] [PASSED] NTSC
[15:03:44] [PASSED] NTSC-443
[15:03:44] [PASSED] NTSC-J
[15:03:44] [PASSED] PAL
[15:03:44] [PASSED] PAL-M
[15:03:44] [PASSED] PAL-N
[15:03:44] [PASSED] SECAM
[15:03:44] [PASSED] Mono
[15:03:44] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[15:03:44] [PASSED] drm_test_get_tv_mode_from_name_truncated
[15:03:44] ============ [PASSED] drm_get_tv_mode_from_name ============
[15:03:44] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[15:03:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[15:03:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[15:03:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[15:03:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[15:03:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[15:03:44] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[15:03:44] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[15:03:44] [PASSED] VIC 96
[15:03:44] [PASSED] VIC 97
[15:03:44] [PASSED] VIC 101
[15:03:44] [PASSED] VIC 102
[15:03:44] [PASSED] VIC 106
[15:03:44] [PASSED] VIC 107
[15:03:44] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[15:03:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[15:03:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[15:03:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[15:03:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[15:03:44] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[15:03:44] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[15:03:44] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[15:03:44] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[15:03:44] [PASSED] Automatic
[15:03:44] [PASSED] Full
[15:03:44] [PASSED] Limited 16:235
[15:03:44] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[15:03:44] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[15:03:44] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[15:03:44] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[15:03:44] === drm_test_drm_hdmi_connector_get_output_format_name ====
[15:03:44] [PASSED] RGB
[15:03:44] [PASSED] YUV 4:2:0
[15:03:44] [PASSED] YUV 4:2:2
[15:03:44] [PASSED] YUV 4:4:4
[15:03:44] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[15:03:44] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[15:03:44] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[15:03:44] ============= drm_damage_helper (21 subtests) ==============
[15:03:44] [PASSED] drm_test_damage_iter_no_damage
[15:03:44] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[15:03:44] [PASSED] drm_test_damage_iter_no_damage_src_moved
[15:03:44] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[15:03:44] [PASSED] drm_test_damage_iter_no_damage_not_visible
[15:03:44] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[15:03:44] [PASSED] drm_test_damage_iter_no_damage_no_fb
[15:03:44] [PASSED] drm_test_damage_iter_simple_damage
[15:03:44] [PASSED] drm_test_damage_iter_single_damage
[15:03:44] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[15:03:44] [PASSED] drm_test_damage_iter_single_damage_outside_src
[15:03:44] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[15:03:44] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[15:03:44] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[15:03:44] [PASSED] drm_test_damage_iter_single_damage_src_moved
[15:03:44] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[15:03:44] [PASSED] drm_test_damage_iter_damage
[15:03:44] [PASSED] drm_test_damage_iter_damage_one_intersect
[15:03:44] [PASSED] drm_test_damage_iter_damage_one_outside
[15:03:44] [PASSED] drm_test_damage_iter_damage_src_moved
[15:03:44] [PASSED] drm_test_damage_iter_damage_not_visible
[15:03:44] ================ [PASSED] drm_damage_helper ================
[15:03:44] ============== drm_dp_mst_helper (3 subtests) ==============
[15:03:44] ============== drm_test_dp_mst_calc_pbn_mode ==============
[15:03:44] [PASSED] Clock 154000 BPP 30 DSC disabled
[15:03:44] [PASSED] Clock 234000 BPP 30 DSC disabled
[15:03:44] [PASSED] Clock 297000 BPP 24 DSC disabled
[15:03:44] [PASSED] Clock 332880 BPP 24 DSC enabled
[15:03:44] [PASSED] Clock 324540 BPP 24 DSC enabled
[15:03:44] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[15:03:44] ============== drm_test_dp_mst_calc_pbn_div ===============
[15:03:44] [PASSED] Link rate 2000000 lane count 4
[15:03:44] [PASSED] Link rate 2000000 lane count 2
[15:03:44] [PASSED] Link rate 2000000 lane count 1
[15:03:44] [PASSED] Link rate 1350000 lane count 4
[15:03:44] [PASSED] Link rate 1350000 lane count 2
[15:03:44] [PASSED] Link rate 1350000 lane count 1
[15:03:44] [PASSED] Link rate 1000000 lane count 4
[15:03:44] [PASSED] Link rate 1000000 lane count 2
[15:03:44] [PASSED] Link rate 1000000 lane count 1
[15:03:44] [PASSED] Link rate 810000 lane count 4
[15:03:44] [PASSED] Link rate 810000 lane count 2
[15:03:44] [PASSED] Link rate 810000 lane count 1
[15:03:44] [PASSED] Link rate 540000 lane count 4
[15:03:44] [PASSED] Link rate 540000 lane count 2
[15:03:44] [PASSED] Link rate 540000 lane count 1
[15:03:44] [PASSED] Link rate 270000 lane count 4
[15:03:44] [PASSED] Link rate 270000 lane count 2
[15:03:44] [PASSED] Link rate 270000 lane count 1
[15:03:44] [PASSED] Link rate 162000 lane count 4
[15:03:44] [PASSED] Link rate 162000 lane count 2
[15:03:44] [PASSED] Link rate 162000 lane count 1
[15:03:44] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[15:03:44] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[15:03:44] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[15:03:44] [PASSED] DP_POWER_UP_PHY with port number
[15:03:44] [PASSED] DP_POWER_DOWN_PHY with port number
[15:03:44] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[15:03:44] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[15:03:44] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[15:03:44] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[15:03:44] [PASSED] DP_QUERY_PAYLOAD with port number
[15:03:44] [PASSED] DP_QUERY_PAYLOAD with VCPI
[15:03:44] [PASSED] DP_REMOTE_DPCD_READ with port number
[15:03:44] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[15:03:44] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[15:03:44] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[15:03:44] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[15:03:44] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[15:03:44] [PASSED] DP_REMOTE_I2C_READ with port number
[15:03:44] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[15:03:44] [PASSED] DP_REMOTE_I2C_READ with transactions array
[15:03:44] [PASSED] DP_REMOTE_I2C_WRITE with port number
[15:03:44] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[15:03:44] [PASSED] DP_REMOTE_I2C_WRITE with data array
[15:03:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[15:03:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[15:03:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[15:03:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[15:03:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[15:03:44] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[15:03:44] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[15:03:44] ================ [PASSED] drm_dp_mst_helper ================
[15:03:44] ================== drm_exec (7 subtests) ===================
[15:03:44] [PASSED] sanitycheck
[15:03:44] [PASSED] test_lock
[15:03:44] [PASSED] test_lock_unlock
[15:03:44] [PASSED] test_duplicates
[15:03:44] [PASSED] test_prepare
[15:03:44] [PASSED] test_prepare_array
[15:03:44] [PASSED] test_multiple_loops
[15:03:44] ==================== [PASSED] drm_exec =====================
[15:03:44] =========== drm_format_helper_test (17 subtests) ===========
[15:03:44] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[15:03:44] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[15:03:44] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[15:03:44] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[15:03:44] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[15:03:44] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[15:03:44] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[15:03:44] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[15:03:44] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[15:03:44] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[15:03:44] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[15:03:44] ============== drm_test_fb_xrgb8888_to_mono ===============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[15:03:44] ==================== drm_test_fb_swab =====================
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ================ [PASSED] drm_test_fb_swab =================
[15:03:44] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[15:03:44] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[15:03:44] [PASSED] single_pixel_source_buffer
[15:03:44] [PASSED] single_pixel_clip_rectangle
[15:03:44] [PASSED] well_known_colors
[15:03:44] [PASSED] destination_pitch
[15:03:44] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[15:03:44] ================= drm_test_fb_clip_offset =================
[15:03:44] [PASSED] pass through
[15:03:44] [PASSED] horizontal offset
[15:03:44] [PASSED] vertical offset
[15:03:44] [PASSED] horizontal and vertical offset
[15:03:44] [PASSED] horizontal offset (custom pitch)
[15:03:44] [PASSED] vertical offset (custom pitch)
[15:03:44] [PASSED] horizontal and vertical offset (custom pitch)
[15:03:44] ============= [PASSED] drm_test_fb_clip_offset =============
[15:03:44] =================== drm_test_fb_memcpy ====================
[15:03:44] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[15:03:44] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[15:03:44] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[15:03:44] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[15:03:44] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[15:03:44] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[15:03:44] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[15:03:44] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[15:03:44] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[15:03:44] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[15:03:44] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[15:03:44] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[15:03:44] =============== [PASSED] drm_test_fb_memcpy ================
[15:03:44] ============= [PASSED] drm_format_helper_test ==============
[15:03:44] ================= drm_format (18 subtests) =================
[15:03:44] [PASSED] drm_test_format_block_width_invalid
[15:03:44] [PASSED] drm_test_format_block_width_one_plane
[15:03:44] [PASSED] drm_test_format_block_width_two_plane
[15:03:44] [PASSED] drm_test_format_block_width_three_plane
[15:03:44] [PASSED] drm_test_format_block_width_tiled
[15:03:44] [PASSED] drm_test_format_block_height_invalid
[15:03:44] [PASSED] drm_test_format_block_height_one_plane
[15:03:44] [PASSED] drm_test_format_block_height_two_plane
[15:03:44] [PASSED] drm_test_format_block_height_three_plane
[15:03:44] [PASSED] drm_test_format_block_height_tiled
[15:03:44] [PASSED] drm_test_format_min_pitch_invalid
[15:03:44] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[15:03:44] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[15:03:44] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[15:03:44] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[15:03:44] [PASSED] drm_test_format_min_pitch_two_plane
[15:03:44] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[15:03:44] [PASSED] drm_test_format_min_pitch_tiled
[15:03:44] =================== [PASSED] drm_format ====================
[15:03:44] ============== drm_framebuffer (10 subtests) ===============
[15:03:44] ========== drm_test_framebuffer_check_src_coords ==========
[15:03:44] [PASSED] Success: source fits into fb
[15:03:44] [PASSED] Fail: overflowing fb with x-axis coordinate
[15:03:44] [PASSED] Fail: overflowing fb with y-axis coordinate
[15:03:44] [PASSED] Fail: overflowing fb with source width
[15:03:44] [PASSED] Fail: overflowing fb with source height
[15:03:44] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[15:03:44] [PASSED] drm_test_framebuffer_cleanup
[15:03:44] =============== drm_test_framebuffer_create ===============
[15:03:44] [PASSED] ABGR8888 normal sizes
[15:03:44] [PASSED] ABGR8888 max sizes
[15:03:44] [PASSED] ABGR8888 pitch greater than min required
[15:03:44] [PASSED] ABGR8888 pitch less than min required
[15:03:44] [PASSED] ABGR8888 Invalid width
[15:03:44] [PASSED] ABGR8888 Invalid buffer handle
[15:03:44] [PASSED] No pixel format
[15:03:44] [PASSED] ABGR8888 Width 0
[15:03:44] [PASSED] ABGR8888 Height 0
[15:03:44] [PASSED] ABGR8888 Out of bound height * pitch combination
[15:03:44] [PASSED] ABGR8888 Large buffer offset
[15:03:44] [PASSED] ABGR8888 Buffer offset for inexistent plane
[15:03:44] [PASSED] ABGR8888 Invalid flag
[15:03:44] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[15:03:44] [PASSED] ABGR8888 Valid buffer modifier
[15:03:44] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[15:03:44] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[15:03:44] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[15:03:44] [PASSED] NV12 Normal sizes
[15:03:44] [PASSED] NV12 Max sizes
[15:03:44] [PASSED] NV12 Invalid pitch
[15:03:44] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[15:03:44] [PASSED] NV12 different modifier per-plane
[15:03:44] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[15:03:44] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[15:03:44] [PASSED] NV12 Modifier for inexistent plane
[15:03:44] [PASSED] NV12 Handle for inexistent plane
[15:03:44] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[15:03:44] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[15:03:44] [PASSED] YVU420 Normal sizes
[15:03:44] [PASSED] YVU420 Max sizes
[15:03:44] [PASSED] YVU420 Invalid pitch
[15:03:44] [PASSED] YVU420 Different pitches
[15:03:44] [PASSED] YVU420 Different buffer offsets/pitches
[15:03:44] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[15:03:44] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[15:03:44] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[15:03:44] [PASSED] YVU420 Valid modifier
[15:03:44] [PASSED] YVU420 Different modifiers per plane
[15:03:44] [PASSED] YVU420 Modifier for inexistent plane
[15:03:44] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[15:03:44] [PASSED] X0L2 Normal sizes
[15:03:44] [PASSED] X0L2 Max sizes
[15:03:44] [PASSED] X0L2 Invalid pitch
[15:03:44] [PASSED] X0L2 Pitch greater than minimum required
[15:03:44] [PASSED] X0L2 Handle for inexistent plane
[15:03:44] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[15:03:44] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[15:03:44] [PASSED] X0L2 Valid modifier
[15:03:44] [PASSED] X0L2 Modifier for inexistent plane
[15:03:44] =========== [PASSED] drm_test_framebuffer_create ===========
[15:03:44] [PASSED] drm_test_framebuffer_free
[15:03:44] [PASSED] drm_test_framebuffer_init
[15:03:44] [PASSED] drm_test_framebuffer_init_bad_format
[15:03:44] [PASSED] drm_test_framebuffer_init_dev_mismatch
[15:03:44] [PASSED] drm_test_framebuffer_lookup
[15:03:44] [PASSED] drm_test_framebuffer_lookup_inexistent
[15:03:44] [PASSED] drm_test_framebuffer_modifiers_not_supported
[15:03:44] ================= [PASSED] drm_framebuffer =================
[15:03:44] ================ drm_gem_shmem (8 subtests) ================
[15:03:44] [PASSED] drm_gem_shmem_test_obj_create
[15:03:44] [PASSED] drm_gem_shmem_test_obj_create_private
[15:03:44] [PASSED] drm_gem_shmem_test_pin_pages
[15:03:44] [PASSED] drm_gem_shmem_test_vmap
[15:03:44] [PASSED] drm_gem_shmem_test_get_pages_sgt
[15:03:44] [PASSED] drm_gem_shmem_test_get_sg_table
[15:03:44] [PASSED] drm_gem_shmem_test_madvise
[15:03:44] [PASSED] drm_gem_shmem_test_purge
[15:03:44] ================== [PASSED] drm_gem_shmem ==================
[15:03:44] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[15:03:44] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[15:03:44] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[15:03:44] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[15:03:44] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[15:03:44] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[15:03:44] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[15:03:44] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[15:03:44] [PASSED] Automatic
[15:03:44] [PASSED] Full
[15:03:44] [PASSED] Limited 16:235
[15:03:44] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[15:03:44] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[15:03:44] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[15:03:44] [PASSED] drm_test_check_disable_connector
[15:03:44] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[15:03:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[15:03:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[15:03:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[15:03:44] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[15:03:44] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[15:03:44] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[15:03:44] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[15:03:44] [PASSED] drm_test_check_output_bpc_dvi
[15:03:44] [PASSED] drm_test_check_output_bpc_format_vic_1
[15:03:44] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[15:03:44] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[15:03:44] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[15:03:44] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[15:03:44] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[15:03:44] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[15:03:44] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[15:03:44] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[15:03:44] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[15:03:44] [PASSED] drm_test_check_broadcast_rgb_value
[15:03:44] [PASSED] drm_test_check_bpc_8_value
[15:03:44] [PASSED] drm_test_check_bpc_10_value
[15:03:44] [PASSED] drm_test_check_bpc_12_value
[15:03:44] [PASSED] drm_test_check_format_value
[15:03:44] [PASSED] drm_test_check_tmds_char_value
[15:03:44] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[15:03:44] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[15:03:44] [PASSED] drm_test_check_mode_valid
[15:03:44] [PASSED] drm_test_check_mode_valid_reject
[15:03:44] [PASSED] drm_test_check_mode_valid_reject_rate
[15:03:44] [PASSED] drm_test_check_mode_valid_reject_max_clock
[15:03:44] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[15:03:44] ================= drm_managed (2 subtests) =================
[15:03:44] [PASSED] drm_test_managed_release_action
[15:03:44] [PASSED] drm_test_managed_run_action
[15:03:44] =================== [PASSED] drm_managed ===================
[15:03:44] =================== drm_mm (6 subtests) ====================
[15:03:44] [PASSED] drm_test_mm_init
[15:03:44] [PASSED] drm_test_mm_debug
[15:03:44] [PASSED] drm_test_mm_align32
[15:03:44] [PASSED] drm_test_mm_align64
[15:03:44] [PASSED] drm_test_mm_lowest
[15:03:44] [PASSED] drm_test_mm_highest
[15:03:44] ===================== [PASSED] drm_mm ======================
[15:03:44] ============= drm_modes_analog_tv (5 subtests) =============
[15:03:44] [PASSED] drm_test_modes_analog_tv_mono_576i
[15:03:44] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[15:03:44] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[15:03:44] [PASSED] drm_test_modes_analog_tv_pal_576i
[15:03:44] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[15:03:44] =============== [PASSED] drm_modes_analog_tv ===============
[15:03:44] ============== drm_plane_helper (2 subtests) ===============
[15:03:44] =============== drm_test_check_plane_state ================
[15:03:44] [PASSED] clipping_simple
[15:03:44] [PASSED] clipping_rotate_reflect
[15:03:44] [PASSED] positioning_simple
[15:03:44] [PASSED] upscaling
[15:03:44] [PASSED] downscaling
[15:03:44] [PASSED] rounding1
[15:03:44] [PASSED] rounding2
[15:03:44] [PASSED] rounding3
[15:03:44] [PASSED] rounding4
[15:03:44] =========== [PASSED] drm_test_check_plane_state ============
[15:03:44] =========== drm_test_check_invalid_plane_state ============
[15:03:44] [PASSED] positioning_invalid
[15:03:44] [PASSED] upscaling_invalid
[15:03:44] [PASSED] downscaling_invalid
[15:03:44] ======= [PASSED] drm_test_check_invalid_plane_state ========
[15:03:44] ================ [PASSED] drm_plane_helper =================
[15:03:44] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[15:03:44] ====== drm_test_connector_helper_tv_get_modes_check =======
[15:03:44] [PASSED] None
[15:03:44] [PASSED] PAL
[15:03:44] [PASSED] NTSC
[15:03:44] [PASSED] Both, NTSC Default
[15:03:44] [PASSED] Both, PAL Default
[15:03:44] [PASSED] Both, NTSC Default, with PAL on command-line
[15:03:44] [PASSED] Both, PAL Default, with NTSC on command-line
[15:03:44] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[15:03:44] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[15:03:44] ================== drm_rect (9 subtests) ===================
[15:03:44] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[15:03:44] [PASSED] drm_test_rect_clip_scaled_not_clipped
[15:03:44] [PASSED] drm_test_rect_clip_scaled_clipped
[15:03:44] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[15:03:44] ================= drm_test_rect_intersect =================
[15:03:44] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[15:03:44] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[15:03:44] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[15:03:44] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[15:03:44] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[15:03:44] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[15:03:44] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[15:03:44] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[15:03:44] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[15:03:44] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[15:03:44] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[15:03:44] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[15:03:44] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[15:03:44] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[15:03:44] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[15:03:44] ============= [PASSED] drm_test_rect_intersect =============
[15:03:44] ================ drm_test_rect_calc_hscale ================
[15:03:44] [PASSED] normal use
[15:03:44] [PASSED] out of max range
[15:03:44] [PASSED] out of min range
[15:03:44] [PASSED] zero dst
[15:03:44] [PASSED] negative src
[15:03:44] [PASSED] negative dst
[15:03:44] ============ [PASSED] drm_test_rect_calc_hscale ============
[15:03:44] ================ drm_test_rect_calc_vscale ================
[15:03:44] [PASSED] normal use
[15:03:44] [PASSED] out of max range
[15:03:44] [PASSED] out of min range
[15:03:44] [PASSED] zero dst
[15:03:44] [PASSED] negative src
[15:03:44] [PASSED] negative dst
[15:03:44] ============ [PASSED] drm_test_rect_calc_vscale ============
[15:03:44] ================== drm_test_rect_rotate ===================
[15:03:44] [PASSED] reflect-x
[15:03:44] [PASSED] reflect-y
[15:03:44] [PASSED] rotate-0
[15:03:44] [PASSED] rotate-90
[15:03:44] [PASSED] rotate-180
[15:03:44] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[15:03:44] ============== [PASSED] drm_test_rect_rotate ===============
[15:03:44] ================ drm_test_rect_rotate_inv =================
[15:03:44] [PASSED] reflect-x
[15:03:44] [PASSED] reflect-y
[15:03:44] [PASSED] rotate-0
[15:03:44] [PASSED] rotate-90
[15:03:44] [PASSED] rotate-180
[15:03:44] [PASSED] rotate-270
[15:03:44] ============ [PASSED] drm_test_rect_rotate_inv =============
[15:03:44] ==================== [PASSED] drm_rect =====================
[15:03:44] ============ drm_sysfb_modeset_test (1 subtest) ============
[15:03:44] ============ drm_test_sysfb_build_fourcc_list =============
[15:03:44] [PASSED] no native formats
[15:03:44] [PASSED] XRGB8888 as native format
[15:03:44] [PASSED] remove duplicates
[15:03:44] [PASSED] convert alpha formats
[15:03:44] [PASSED] random formats
[15:03:44] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[15:03:44] ============= [PASSED] drm_sysfb_modeset_test ==============
[15:03:44] ============================================================
[15:03:44] Testing complete. Ran 616 tests: passed: 616
[15:03:44] Elapsed time: 23.319s total, 1.637s configuring, 21.515s building, 0.146s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[15:03:44] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:03:46] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:03:54] Starting KUnit Kernel (1/1)...
[15:03:54] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:03:54] ================= ttm_device (5 subtests) ==================
[15:03:54] [PASSED] ttm_device_init_basic
[15:03:54] [PASSED] ttm_device_init_multiple
[15:03:54] [PASSED] ttm_device_fini_basic
[15:03:54] [PASSED] ttm_device_init_no_vma_man
[15:03:54] ================== ttm_device_init_pools ==================
[15:03:54] [PASSED] No DMA allocations, no DMA32 required
[15:03:54] [PASSED] DMA allocations, DMA32 required
[15:03:54] [PASSED] No DMA allocations, DMA32 required
[15:03:54] [PASSED] DMA allocations, no DMA32 required
[15:03:54] ============== [PASSED] ttm_device_init_pools ==============
[15:03:54] =================== [PASSED] ttm_device ====================
[15:03:54] ================== ttm_pool (8 subtests) ===================
[15:03:54] ================== ttm_pool_alloc_basic ===================
[15:03:54] [PASSED] One page
[15:03:54] [PASSED] More than one page
[15:03:54] [PASSED] Above the allocation limit
[15:03:54] [PASSED] One page, with coherent DMA mappings enabled
[15:03:54] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:03:54] ============== [PASSED] ttm_pool_alloc_basic ===============
[15:03:54] ============== ttm_pool_alloc_basic_dma_addr ==============
[15:03:54] [PASSED] One page
[15:03:54] [PASSED] More than one page
[15:03:54] [PASSED] Above the allocation limit
[15:03:54] [PASSED] One page, with coherent DMA mappings enabled
[15:03:54] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:03:54] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[15:03:54] [PASSED] ttm_pool_alloc_order_caching_match
[15:03:54] [PASSED] ttm_pool_alloc_caching_mismatch
[15:03:54] [PASSED] ttm_pool_alloc_order_mismatch
[15:03:54] [PASSED] ttm_pool_free_dma_alloc
[15:03:54] [PASSED] ttm_pool_free_no_dma_alloc
[15:03:54] [PASSED] ttm_pool_fini_basic
[15:03:54] ==================== [PASSED] ttm_pool =====================
[15:03:54] ================ ttm_resource (8 subtests) =================
[15:03:54] ================= ttm_resource_init_basic =================
[15:03:54] [PASSED] Init resource in TTM_PL_SYSTEM
[15:03:54] [PASSED] Init resource in TTM_PL_VRAM
[15:03:54] [PASSED] Init resource in a private placement
[15:03:54] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[15:03:54] ============= [PASSED] ttm_resource_init_basic =============
[15:03:54] [PASSED] ttm_resource_init_pinned
[15:03:54] [PASSED] ttm_resource_fini_basic
[15:03:54] [PASSED] ttm_resource_manager_init_basic
[15:03:54] [PASSED] ttm_resource_manager_usage_basic
[15:03:54] [PASSED] ttm_resource_manager_set_used_basic
[15:03:54] [PASSED] ttm_sys_man_alloc_basic
[15:03:54] [PASSED] ttm_sys_man_free_basic
[15:03:54] ================== [PASSED] ttm_resource ===================
[15:03:54] =================== ttm_tt (15 subtests) ===================
[15:03:54] ==================== ttm_tt_init_basic ====================
[15:03:54] [PASSED] Page-aligned size
[15:03:54] [PASSED] Extra pages requested
[15:03:54] ================ [PASSED] ttm_tt_init_basic ================
[15:03:54] [PASSED] ttm_tt_init_misaligned
[15:03:54] [PASSED] ttm_tt_fini_basic
[15:03:54] [PASSED] ttm_tt_fini_sg
[15:03:54] [PASSED] ttm_tt_fini_shmem
[15:03:54] [PASSED] ttm_tt_create_basic
[15:03:54] [PASSED] ttm_tt_create_invalid_bo_type
[15:03:54] [PASSED] ttm_tt_create_ttm_exists
[15:03:54] [PASSED] ttm_tt_create_failed
[15:03:54] [PASSED] ttm_tt_destroy_basic
[15:03:54] [PASSED] ttm_tt_populate_null_ttm
[15:03:54] [PASSED] ttm_tt_populate_populated_ttm
[15:03:54] [PASSED] ttm_tt_unpopulate_basic
[15:03:54] [PASSED] ttm_tt_unpopulate_empty_ttm
[15:03:54] [PASSED] ttm_tt_swapin_basic
[15:03:54] ===================== [PASSED] ttm_tt ======================
[15:03:54] =================== ttm_bo (14 subtests) ===================
[15:03:54] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[15:03:54] [PASSED] Cannot be interrupted and sleeps
[15:03:54] [PASSED] Cannot be interrupted, locks straight away
[15:03:54] [PASSED] Can be interrupted, sleeps
[15:03:54] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[15:03:54] [PASSED] ttm_bo_reserve_locked_no_sleep
[15:03:54] [PASSED] ttm_bo_reserve_no_wait_ticket
[15:03:54] [PASSED] ttm_bo_reserve_double_resv
[15:03:54] [PASSED] ttm_bo_reserve_interrupted
[15:03:54] [PASSED] ttm_bo_reserve_deadlock
[15:03:54] [PASSED] ttm_bo_unreserve_basic
[15:03:54] [PASSED] ttm_bo_unreserve_pinned
[15:03:54] [PASSED] ttm_bo_unreserve_bulk
[15:03:54] [PASSED] ttm_bo_put_basic
[15:03:54] [PASSED] ttm_bo_put_shared_resv
[15:03:54] [PASSED] ttm_bo_pin_basic
[15:03:54] [PASSED] ttm_bo_pin_unpin_resource
[15:03:54] [PASSED] ttm_bo_multiple_pin_one_unpin
[15:03:54] ===================== [PASSED] ttm_bo ======================
[15:03:54] ============== ttm_bo_validate (21 subtests) ===============
[15:03:54] ============== ttm_bo_init_reserved_sys_man ===============
[15:03:54] [PASSED] Buffer object for userspace
[15:03:54] [PASSED] Kernel buffer object
[15:03:54] [PASSED] Shared buffer object
[15:03:54] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[15:03:54] ============== ttm_bo_init_reserved_mock_man ==============
[15:03:54] [PASSED] Buffer object for userspace
[15:03:54] [PASSED] Kernel buffer object
[15:03:54] [PASSED] Shared buffer object
[15:03:54] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[15:03:54] [PASSED] ttm_bo_init_reserved_resv
[15:03:54] ================== ttm_bo_validate_basic ==================
[15:03:54] [PASSED] Buffer object for userspace
[15:03:54] [PASSED] Kernel buffer object
[15:03:54] [PASSED] Shared buffer object
[15:03:54] ============== [PASSED] ttm_bo_validate_basic ==============
[15:03:54] [PASSED] ttm_bo_validate_invalid_placement
[15:03:54] ============= ttm_bo_validate_same_placement ==============
[15:03:54] [PASSED] System manager
[15:03:54] [PASSED] VRAM manager
[15:03:54] ========= [PASSED] ttm_bo_validate_same_placement ==========
[15:03:54] [PASSED] ttm_bo_validate_failed_alloc
[15:03:54] [PASSED] ttm_bo_validate_pinned
[15:03:54] [PASSED] ttm_bo_validate_busy_placement
[15:03:54] ================ ttm_bo_validate_multihop =================
[15:03:54] [PASSED] Buffer object for userspace
[15:03:54] [PASSED] Kernel buffer object
[15:03:54] [PASSED] Shared buffer object
[15:03:54] ============ [PASSED] ttm_bo_validate_multihop =============
[15:03:54] ========== ttm_bo_validate_no_placement_signaled ==========
[15:03:54] [PASSED] Buffer object in system domain, no page vector
[15:03:54] [PASSED] Buffer object in system domain with an existing page vector
[15:03:54] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[15:03:54] ======== ttm_bo_validate_no_placement_not_signaled ========
[15:03:54] [PASSED] Buffer object for userspace
[15:03:54] [PASSED] Kernel buffer object
[15:03:54] [PASSED] Shared buffer object
[15:03:54] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[15:03:54] [PASSED] ttm_bo_validate_move_fence_signaled
[15:03:54] ========= ttm_bo_validate_move_fence_not_signaled =========
[15:03:54] [PASSED] Waits for GPU
[15:03:54] [PASSED] Tries to lock straight away
[15:03:54] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[15:03:54] [PASSED] ttm_bo_validate_happy_evict
[15:03:54] [PASSED] ttm_bo_validate_all_pinned_evict
[15:03:54] [PASSED] ttm_bo_validate_allowed_only_evict
[15:03:54] [PASSED] ttm_bo_validate_deleted_evict
[15:03:54] [PASSED] ttm_bo_validate_busy_domain_evict
[15:03:54] [PASSED] ttm_bo_validate_evict_gutting
[15:03:54] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[15:03:54] ================= [PASSED] ttm_bo_validate =================
[15:03:54] ============================================================
[15:03:54] Testing complete. Ran 101 tests: passed: 101
[15:03:54] Elapsed time: 9.633s total, 1.666s configuring, 7.701s building, 0.229s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* ✗ CI.checksparse: warning for Optimize vrr.guardband and fix LRR (rev2)
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (15 preceding siblings ...)
2025-08-04 15:03 ` ✓ CI.KUnit: success for Optimize vrr.guardband and fix LRR (rev2) Patchwork
@ 2025-08-04 15:18 ` Patchwork
2025-08-04 16:28 ` ✓ Xe.CI.BAT: success " Patchwork
2025-08-04 17:42 ` ✓ Xe.CI.Full: " Patchwork
18 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-08-04 15:18 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-xe
== Series Details ==
Series: Optimize vrr.guardband and fix LRR (rev2)
URL : https://patchwork.freedesktop.org/series/151244/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 17262f8d028e5fbfe1100d031735a36de54fa56f
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:2019:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2019:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2019:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2032:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ Xe.CI.BAT: success for Optimize vrr.guardband and fix LRR (rev2)
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (16 preceding siblings ...)
2025-08-04 15:18 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-08-04 16:28 ` Patchwork
2025-08-04 17:42 ` ✓ Xe.CI.Full: " Patchwork
18 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-08-04 16:28 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 995 bytes --]
== Series Details ==
Series: Optimize vrr.guardband and fix LRR (rev2)
URL : https://patchwork.freedesktop.org/series/151244/
State : success
== Summary ==
CI Bug Log - changes from xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97_BAT -> xe-pw-151244v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (8 -> 7)
------------------------------
Missing (1): bat-adlp-vm
Changes
-------
No changes found
Build changes
-------------
* IGT: IGT_8484 -> IGT_8485
* Linux: xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97 -> xe-pw-151244v2
IGT_8484: 8484
IGT_8485: cb040c57e8bbc1cdac111ada808d5a7dd569a546 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97: 8ef111c44cc83f182055c33c552523ac3f3f7a97
xe-pw-151244v2: 151244v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/index.html
[-- Attachment #2: Type: text/html, Size: 1557 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ Xe.CI.Full: success for Optimize vrr.guardband and fix LRR (rev2)
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
` (17 preceding siblings ...)
2025-08-04 16:28 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-08-04 17:42 ` Patchwork
18 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2025-08-04 17:42 UTC (permalink / raw)
To: Nautiyal, Ankit K; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 129979 bytes --]
== Series Details ==
Series: Optimize vrr.guardband and fix LRR (rev2)
URL : https://patchwork.freedesktop.org/series/151244/
State : success
== Summary ==
CI Bug Log - changes from xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97_FULL -> xe-pw-151244v2_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-151244v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@hotrebind:
- shard-bmg: [PASS][1] -> [SKIP][2] ([Intel XE#4963]) +1 other test skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-8/igt@core_hotunplug@hotrebind.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@core_hotunplug@hotrebind.html
* igt@core_setmaster@master-drop-set-user:
- shard-bmg: [PASS][3] -> [FAIL][4] ([Intel XE#4674])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@core_setmaster@master-drop-set-user.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@core_setmaster@master-drop-set-user.html
* igt@device_reset@unbind-reset-rebind:
- shard-bmg: [PASS][5] -> [SKIP][6] ([Intel XE#5547])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@device_reset@unbind-reset-rebind.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@device_reset@unbind-reset-rebind.html
* igt@fbdev@unaligned-read:
- shard-bmg: [PASS][7] -> [SKIP][8] ([Intel XE#2134]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@fbdev@unaligned-read.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@fbdev@unaligned-read.html
* igt@intel_hwmon@hwmon-write:
- shard-bmg: [PASS][9] -> [FAIL][10] ([Intel XE#4665])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-1/igt@intel_hwmon@hwmon-write.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@intel_hwmon@hwmon-write.html
* igt@kms_addfb_basic@bad-pitch-999:
- shard-bmg: [PASS][11] -> [SKIP][12] ([Intel XE#4950]) +73 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-4/igt@kms_addfb_basic@bad-pitch-999.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_addfb_basic@bad-pitch-999.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-1-y:
- shard-adlp: [PASS][13] -> [DMESG-WARN][14] ([Intel XE#4543]) +3 other tests dmesg-warn
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-2/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-1-y.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-8/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-1-y.html
* igt@kms_atomic@plane-immutable-zpos:
- shard-adlp: [PASS][15] -> [DMESG-WARN][16] ([Intel XE#2953] / [Intel XE#4173])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-1/igt@kms_atomic@plane-immutable-zpos.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-1/igt@kms_atomic@plane-immutable-zpos.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-180:
- shard-adlp: NOTRUN -> [DMESG-FAIL][17] ([Intel XE#4543]) +1 other test dmesg-fail
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-3/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][18] ([Intel XE#316])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-436/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#2327])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-3/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-addfb:
- shard-bmg: [PASS][20] -> [SKIP][21] ([Intel XE#4947]) +21 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-2/igt@kms_big_fb@x-tiled-addfb.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_big_fb@x-tiled-addfb.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#1124])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-adlp: [PASS][23] -> [DMESG-FAIL][24] ([Intel XE#4543]) +8 other tests dmesg-fail
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#1124]) +2 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-dg2-set2: NOTRUN -> [SKIP][26] ([Intel XE#1124]) +5 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-464/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-adlp: NOTRUN -> [SKIP][27] ([Intel XE#1124]) +4 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_bw@linear-tiling-2-displays-3840x2160p:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#367]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-463/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
- shard-adlp: NOTRUN -> [SKIP][29] ([Intel XE#367])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-6/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#367]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-1920x1080p:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#367])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-4/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs:
- shard-lnl: NOTRUN -> [SKIP][32] ([Intel XE#2887]) +6 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-1/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][33] ([Intel XE#455] / [Intel XE#787]) +34 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-466/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2887]) +4 other tests skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-basic-y-tiled-ccs:
- shard-adlp: NOTRUN -> [SKIP][35] ([Intel XE#455] / [Intel XE#787]) +15 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-8/igt@kms_ccs@crc-primary-basic-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][36] ([Intel XE#3442])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#2652] / [Intel XE#787]) +32 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#3432])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#3432])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-5/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#787]) +181 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-435/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs-cc@pipe-c-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][41] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345]) +1 other test incomplete
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][42] ([Intel XE#787]) +23 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-1/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][43] ([Intel XE#2705] / [Intel XE#4212])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-dp-4.html
* igt@kms_cdclk@mode-transition:
- shard-adlp: NOTRUN -> [SKIP][44] ([Intel XE#4417] / [Intel XE#455])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-3/igt@kms_cdclk@mode-transition.html
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2724])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-1/igt@kms_cdclk@mode-transition.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#4418])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-434/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@mode-transition@pipe-a-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][47] ([Intel XE#4417]) +2 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-3/igt@kms_cdclk@mode-transition@pipe-a-hdmi-a-1.html
* igt@kms_cdclk@mode-transition@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][48] ([Intel XE#4417]) +3 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-436/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2325]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@gamma:
- shard-dg2-set2: NOTRUN -> [SKIP][50] ([Intel XE#306]) +1 other test skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@kms_chamelium_color@gamma.html
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#306])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-3/igt@kms_chamelium_color@gamma.html
- shard-adlp: NOTRUN -> [SKIP][52] ([Intel XE#306])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-4/igt@kms_chamelium_color@gamma.html
* igt@kms_chamelium_edid@hdmi-edid-read:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#2252]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-8/igt@kms_chamelium_edid@hdmi-edid-read.html
* igt@kms_chamelium_hpd@dp-hpd:
- shard-adlp: NOTRUN -> [SKIP][54] ([Intel XE#373]) +6 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-2/igt@kms_chamelium_hpd@dp-hpd.html
* igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode:
- shard-lnl: NOTRUN -> [SKIP][55] ([Intel XE#373]) +4 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-2/igt@kms_chamelium_hpd@vga-hpd-enable-disable-mode.html
* igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][56] ([Intel XE#373]) +7 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-464/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html
* igt@kms_content_protection@atomic@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][57] ([Intel XE#1178]) +2 other tests fail
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-8/igt@kms_content_protection@atomic@pipe-a-dp-2.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#307])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-7/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@srm:
- shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#3278])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-2/igt@kms_content_protection@srm.html
* igt@kms_content_protection@srm@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][60] ([Intel XE#1178]) +2 other tests fail
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-466/igt@kms_content_protection@srm@pipe-a-dp-4.html
* igt@kms_content_protection@uevent@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [FAIL][61] ([Intel XE#1188])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@kms_content_protection@uevent@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-dg2-set2: NOTRUN -> [SKIP][62] ([Intel XE#308]) +1 other test skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-466/igt@kms_cursor_crc@cursor-onscreen-512x512.html
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#2321]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_crc@cursor-rapid-movement-256x85:
- shard-lnl: NOTRUN -> [SKIP][64] ([Intel XE#1424])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-4/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
- shard-bmg: [PASS][65] -> [SKIP][66] ([Intel XE#2291]) +1 other test skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-adlp: NOTRUN -> [SKIP][67] ([Intel XE#309]) +2 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-2/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#2291]) +1 other test skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][69] ([Intel XE#5428])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html
* igt@kms_dp_link_training@non-uhbr-sst:
- shard-bmg: [PASS][70] -> [SKIP][71] ([Intel XE#4354])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-1/igt@kms_dp_link_training@non-uhbr-sst.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_dp_link_training@non-uhbr-sst.html
* igt@kms_feature_discovery@chamelium:
- shard-adlp: NOTRUN -> [SKIP][72] ([Intel XE#701])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-3/igt@kms_feature_discovery@chamelium.html
* igt@kms_feature_discovery@display-3x:
- shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#703])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-4/igt@kms_feature_discovery@display-3x.html
* igt@kms_flip@2x-flip-vs-wf_vblank:
- shard-adlp: NOTRUN -> [SKIP][74] ([Intel XE#310]) +2 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-8/igt@kms_flip@2x-flip-vs-wf_vblank.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#4950]) +13 other tests skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_flip@2x-nonexisting-fb.html
- shard-lnl: NOTRUN -> [SKIP][76] ([Intel XE#1421])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-5/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@basic-plain-flip@a-hdmi-a1:
- shard-adlp: NOTRUN -> [DMESG-WARN][77] ([Intel XE#2953] / [Intel XE#4173]) +1 other test dmesg-warn
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-9/igt@kms_flip@basic-plain-flip@a-hdmi-a1.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-dg2-set2: [PASS][78] -> [INCOMPLETE][79] ([Intel XE#2049] / [Intel XE#2597])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-433/igt@kms_flip@flip-vs-suspend-interruptible.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend-interruptible@d-dp2:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][80] ([Intel XE#2049] / [Intel XE#2597])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@kms_flip@flip-vs-suspend-interruptible@d-dp2.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][81] ([Intel XE#1397] / [Intel XE#1745])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][82] ([Intel XE#1397])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][83] ([Intel XE#2380])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#1401] / [Intel XE#1745])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][85] ([Intel XE#1401])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
- shard-adlp: NOTRUN -> [SKIP][86] ([Intel XE#455]) +12 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
- shard-bmg: NOTRUN -> [SKIP][87] ([Intel XE#2293] / [Intel XE#2380]) +1 other test skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][88] ([Intel XE#2293]) +5 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#2311]) +8 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][90] ([Intel XE#651]) +16 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-adlp: NOTRUN -> [SKIP][91] ([Intel XE#656]) +13 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][92] ([Intel XE#4947]) +18 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html
- shard-lnl: NOTRUN -> [SKIP][93] ([Intel XE#651]) +1 other test skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-5/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][94] ([Intel XE#5390]) +2 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][95] ([Intel XE#656]) +12 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html
- shard-bmg: NOTRUN -> [SKIP][96] ([Intel XE#2312])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscren-pri-shrfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][97] ([Intel XE#651]) +5 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-1/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
- shard-adlp: NOTRUN -> [SKIP][98] ([Intel XE#653]) +6 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-dg2-set2: NOTRUN -> [SKIP][99] ([Intel XE#653]) +17 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
- shard-adlp: NOTRUN -> [SKIP][100] ([Intel XE#1151])
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-1/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: NOTRUN -> [SKIP][101] ([Intel XE#2313]) +9 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_hdr@static-toggle-dpms:
- shard-lnl: NOTRUN -> [SKIP][102] ([Intel XE#1503])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-8/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-dg2-set2: NOTRUN -> [SKIP][103] ([Intel XE#455]) +6 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-435/igt@kms_panel_fitting@atomic-fastset.html
- shard-bmg: NOTRUN -> [SKIP][104] ([Intel XE#2486])
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-3/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0:
- shard-adlp: NOTRUN -> [FAIL][105] ([Intel XE#5195]) +4 other tests fail
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-9/igt@kms_plane@pixel-format-source-clamping@pipe-b-plane-0.html
* igt@kms_plane_multiple@2x-tiling-4:
- shard-lnl: NOTRUN -> [SKIP][106] ([Intel XE#4596]) +1 other test skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-7/igt@kms_plane_multiple@2x-tiling-4.html
* igt@kms_plane_multiple@2x-tiling-x:
- shard-adlp: NOTRUN -> [SKIP][107] ([Intel XE#4596])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-3/igt@kms_plane_multiple@2x-tiling-x.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75:
- shard-bmg: NOTRUN -> [SKIP][108] ([Intel XE#2763]) +4 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-a:
- shard-lnl: NOTRUN -> [SKIP][109] ([Intel XE#2763]) +3 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-5/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-75@pipe-a.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-bmg: NOTRUN -> [SKIP][110] ([Intel XE#2938])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][111] ([Intel XE#2499])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@i2c:
- shard-bmg: [PASS][112] -> [SKIP][113] ([Intel XE#4962]) +3 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-3/igt@kms_pm_rpm@i2c.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_pm_rpm@i2c.html
* igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][114] ([Intel XE#1489]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-3/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-lnl: NOTRUN -> [SKIP][115] ([Intel XE#2893] / [Intel XE#4608]) +1 other test skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][116] ([Intel XE#4608]) +3 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][117] ([Intel XE#1489]) +3 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-435/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
- shard-lnl: NOTRUN -> [SKIP][118] ([Intel XE#2893])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-2/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-adlp: NOTRUN -> [SKIP][119] ([Intel XE#1489]) +3 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-1/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr@fbc-psr-dpms:
- shard-adlp: NOTRUN -> [SKIP][120] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-8/igt@kms_psr@fbc-psr-dpms.html
- shard-bmg: NOTRUN -> [SKIP][121] ([Intel XE#2234] / [Intel XE#2850])
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_psr@fbc-psr-dpms.html
* igt@kms_psr@pr-sprite-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][122] ([Intel XE#2850] / [Intel XE#929]) +3 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@kms_psr@pr-sprite-blt.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-lnl: [PASS][123] -> [SKIP][124] ([Intel XE#4692]) +1 other test skip
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-lnl-5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-3/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-lnl: NOTRUN -> [SKIP][125] ([Intel XE#3414] / [Intel XE#3904])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-5/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_vrr@negative-basic:
- shard-lnl: NOTRUN -> [SKIP][126] ([Intel XE#1499])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-3/igt@kms_vrr@negative-basic.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-dg2-set2: NOTRUN -> [SKIP][127] ([Intel XE#1091] / [Intel XE#2849])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@xe_ccs@suspend-resume:
- shard-adlp: NOTRUN -> [SKIP][128] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-2/igt@xe_ccs@suspend-resume.html
* igt@xe_copy_basic@mem-set-linear-0x3fff:
- shard-adlp: NOTRUN -> [SKIP][129] ([Intel XE#1126])
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-9/igt@xe_copy_basic@mem-set-linear-0x3fff.html
- shard-dg2-set2: NOTRUN -> [SKIP][130] ([Intel XE#1126])
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-466/igt@xe_copy_basic@mem-set-linear-0x3fff.html
* igt@xe_eudebug@basic-close:
- shard-dg2-set2: NOTRUN -> [SKIP][131] ([Intel XE#4837]) +6 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@xe_eudebug@basic-close.html
* igt@xe_eudebug@basic-vm-access-parameters:
- shard-lnl: NOTRUN -> [SKIP][132] ([Intel XE#4837]) +2 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-1/igt@xe_eudebug@basic-vm-access-parameters.html
* igt@xe_eudebug_online@basic-breakpoint:
- shard-bmg: NOTRUN -> [SKIP][133] ([Intel XE#4837]) +5 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@xe_eudebug_online@basic-breakpoint.html
- shard-adlp: NOTRUN -> [SKIP][134] ([Intel XE#4837] / [Intel XE#5565]) +6 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-4/igt@xe_eudebug_online@basic-breakpoint.html
* igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen:
- shard-lnl: NOTRUN -> [SKIP][135] ([Intel XE#688])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-2/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
- shard-adlp: NOTRUN -> [SKIP][136] ([Intel XE#5563] / [Intel XE#688]) +1 other test skip
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-8/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate:
- shard-dg2-set2: [PASS][137] -> [SKIP][138] ([Intel XE#1392]) +2 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-466/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr:
- shard-dg2-set2: NOTRUN -> [SKIP][139] ([Intel XE#1392])
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
- shard-adlp: NOTRUN -> [SKIP][140] ([Intel XE#1392] / [Intel XE#5575]) +4 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-once-null-rebind:
- shard-bmg: NOTRUN -> [SKIP][141] ([Intel XE#2322]) +6 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-3/igt@xe_exec_basic@multigpu-once-null-rebind.html
* igt@xe_exec_basic@multigpu-once-userptr-invalidate:
- shard-lnl: NOTRUN -> [SKIP][142] ([Intel XE#1392]) +3 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-2/igt@xe_exec_basic@multigpu-once-userptr-invalidate.html
* igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][143] ([Intel XE#288]) +10 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-434/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-rebind-imm.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate-race-imm:
- shard-adlp: NOTRUN -> [SKIP][144] ([Intel XE#288] / [Intel XE#5561]) +8 other tests skip
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-6/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-invalidate-race-imm.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence:
- shard-adlp: NOTRUN -> [SKIP][145] ([Intel XE#2360] / [Intel XE#5573])
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-8/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html
- shard-dg2-set2: NOTRUN -> [SKIP][146] ([Intel XE#2360])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-434/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html
* igt@xe_exec_system_allocator@process-many-mmap-new-huge-nomemset:
- shard-lnl: NOTRUN -> [SKIP][147] ([Intel XE#4943]) +2 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-8/igt@xe_exec_system_allocator@process-many-mmap-new-huge-nomemset.html
* igt@xe_exec_system_allocator@threads-many-large-mmap-mlock:
- shard-dg2-set2: NOTRUN -> [SKIP][148] ([Intel XE#4915]) +117 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-466/igt@xe_exec_system_allocator@threads-many-large-mmap-mlock.html
* igt@xe_exec_system_allocator@threads-many-stride-free-nomemset:
- shard-bmg: [PASS][149] -> [SKIP][150] ([Intel XE#4945]) +427 other tests skip
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-4/igt@xe_exec_system_allocator@threads-many-stride-free-nomemset.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_exec_system_allocator@threads-many-stride-free-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-new-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][151] ([Intel XE#4943]) +3 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-new-huge-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset:
- shard-lnl: [PASS][152] -> [FAIL][153] ([Intel XE#5018])
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-lnl-8/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
* igt@xe_exec_system_allocator@twice-large-new-race:
- shard-adlp: NOTRUN -> [SKIP][154] ([Intel XE#4915] / [Intel XE#5560]) +78 other tests skip
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-4/igt@xe_exec_system_allocator@twice-large-new-race.html
* igt@xe_exec_system_allocator@twice-mmap-remap-ro-dontunmap-eocheck:
- shard-bmg: NOTRUN -> [SKIP][155] ([Intel XE#4945]) +45 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_exec_system_allocator@twice-mmap-remap-ro-dontunmap-eocheck.html
* igt@xe_exec_threads@threads-fd-rebind:
- shard-adlp: [PASS][156] -> [DMESG-FAIL][157] ([Intel XE#3876])
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-9/igt@xe_exec_threads@threads-fd-rebind.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-1/igt@xe_exec_threads@threads-fd-rebind.html
* igt@xe_gt_freq@freq_suspend:
- shard-lnl: NOTRUN -> [SKIP][158] ([Intel XE#584])
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-5/igt@xe_gt_freq@freq_suspend.html
* igt@xe_media_fill@media-fill:
- shard-lnl: NOTRUN -> [SKIP][159] ([Intel XE#560])
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-8/igt@xe_media_fill@media-fill.html
* igt@xe_mmap@pci-membarrier-bad-pagesize:
- shard-adlp: NOTRUN -> [SKIP][160] ([Intel XE#5100])
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-1/igt@xe_mmap@pci-membarrier-bad-pagesize.html
* igt@xe_oa@enable-disable:
- shard-adlp: NOTRUN -> [SKIP][161] ([Intel XE#3573]) +1 other test skip
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-2/igt@xe_oa@enable-disable.html
* igt@xe_oa@non-privileged-access-vaddr:
- shard-dg2-set2: NOTRUN -> [SKIP][162] ([Intel XE#3573]) +3 other tests skip
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@xe_oa@non-privileged-access-vaddr.html
* igt@xe_pat@display-vs-wb-transient:
- shard-dg2-set2: NOTRUN -> [SKIP][163] ([Intel XE#1337])
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-434/igt@xe_pat@display-vs-wb-transient.html
* igt@xe_pm@d3cold-mocs:
- shard-bmg: NOTRUN -> [SKIP][164] ([Intel XE#2284])
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@xe_pm@d3cold-mocs.html
- shard-dg2-set2: NOTRUN -> [SKIP][165] ([Intel XE#2284])
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-434/igt@xe_pm@d3cold-mocs.html
* igt@xe_pmu@fn-engine-activity-load:
- shard-bmg: NOTRUN -> [SKIP][166] ([Intel XE#4650]) +1 other test skip
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-1/igt@xe_pmu@fn-engine-activity-load.html
- shard-dg2-set2: NOTRUN -> [SKIP][167] ([Intel XE#4650]) +1 other test skip
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-436/igt@xe_pmu@fn-engine-activity-load.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-lnl: NOTRUN -> [SKIP][168] ([Intel XE#4650])
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-4/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
* igt@xe_pmu@gt-frequency:
- shard-dg2-set2: [PASS][169] -> [FAIL][170] ([Intel XE#4819]) +1 other test fail
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-436/igt@xe_pmu@gt-frequency.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@xe_pmu@gt-frequency.html
* igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
- shard-lnl: NOTRUN -> [SKIP][171] ([Intel XE#944])
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-5/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html
* igt@xe_query@multigpu-query-topology-l3-bank-mask:
- shard-adlp: NOTRUN -> [SKIP][172] ([Intel XE#944])
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-4/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
- shard-bmg: NOTRUN -> [SKIP][173] ([Intel XE#944])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
- shard-dg2-set2: NOTRUN -> [SKIP][174] ([Intel XE#944])
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-463/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-lnl: NOTRUN -> [SKIP][175] ([Intel XE#3342])
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-7/igt@xe_sriov_flr@flr-vf1-clear.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- shard-bmg: [SKIP][176] ([Intel XE#4963]) -> [PASS][177]
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@core_hotunplug@unbind-rebind.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@core_hotunplug@unbind-rebind.html
* igt@core_setmaster@master-drop-set-shared-fd:
- shard-bmg: [SKIP][178] ([Intel XE#5715]) -> [PASS][179]
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@core_setmaster@master-drop-set-shared-fd.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@core_setmaster@master-drop-set-shared-fd.html
* igt@fbdev@info:
- shard-bmg: [SKIP][180] ([Intel XE#2134]) -> [PASS][181] +2 other tests pass
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@fbdev@info.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@fbdev@info.html
* igt@fbdev@pan:
- shard-dg2-set2: [SKIP][182] ([Intel XE#2134]) -> [PASS][183]
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@fbdev@pan.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-434/igt@fbdev@pan.html
* igt@kms_big_fb@linear-8bpp-rotate-180:
- shard-bmg: [SKIP][184] ([Intel XE#4947]) -> [PASS][185] +18 other tests pass
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_big_fb@linear-8bpp-rotate-180.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@kms_big_fb@linear-8bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-adlp: [DMESG-FAIL][186] ([Intel XE#4543]) -> [PASS][187] +8 other tests pass
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-8/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
- shard-bmg: [SKIP][188] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][189]
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
* igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [SKIP][190] ([Intel XE#2351] / [Intel XE#4208]) -> [PASS][191]
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs.html
* igt@kms_cursor_crc@cursor-random-128x128:
- shard-dg2-set2: [SKIP][192] ([Intel XE#4208] / [i915#2575]) -> [PASS][193] +12 other tests pass
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_cursor_crc@cursor-random-128x128.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@kms_cursor_crc@cursor-random-128x128.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
- shard-bmg: [SKIP][194] ([Intel XE#2291]) -> [PASS][195] +3 other tests pass
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
- shard-bmg: [SKIP][196] ([Intel XE#2316]) -> [PASS][197] +2 other tests pass
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
* igt@kms_flip@flip-vs-rmfb:
- shard-adlp: [DMESG-WARN][198] ([Intel XE#4543] / [Intel XE#5208]) -> [PASS][199]
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-6/igt@kms_flip@flip-vs-rmfb.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-6/igt@kms_flip@flip-vs-rmfb.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-bmg: [INCOMPLETE][200] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][201] +3 other tests pass
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_flip@flip-vs-suspend-interruptible.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-8/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@flip-vs-suspend@d-dp4:
- shard-dg2-set2: [INCOMPLETE][202] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][203] +1 other test pass
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_flip@flip-vs-suspend@d-dp4.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-436/igt@kms_flip@flip-vs-suspend@d-dp4.html
* igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1:
- shard-adlp: [DMESG-WARN][204] ([Intel XE#4543]) -> [PASS][205] +4 other tests pass
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-8/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-1/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-adlp: [DMESG-FAIL][206] ([Intel XE#4543] / [Intel XE#4921]) -> [PASS][207] +3 other tests pass
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_hdr@static-toggle-suspend:
- shard-bmg: [SKIP][208] ([Intel XE#1503]) -> [PASS][209]
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_plane_cursor@viewport:
- shard-dg2-set2: [FAIL][210] ([Intel XE#616]) -> [PASS][211]
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-432/igt@kms_plane_cursor@viewport.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-463/igt@kms_plane_cursor@viewport.html
* igt@kms_pm_dc@dc6-dpms:
- shard-lnl: [FAIL][212] ([Intel XE#718]) -> [PASS][213] +1 other test pass
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-lnl-1/igt@kms_pm_dc@dc6-dpms.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-2/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_rpm@universal-planes:
- shard-bmg: [SKIP][214] ([Intel XE#4962]) -> [PASS][215]
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_pm_rpm@universal-planes.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@kms_pm_rpm@universal-planes.html
* igt@kms_sequence@get-idle:
- shard-bmg: [SKIP][216] ([Intel XE#4950]) -> [PASS][217] +81 other tests pass
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_sequence@get-idle.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_sequence@get-idle.html
* igt@kms_setmode@basic@pipe-a-edp-1:
- shard-lnl: [FAIL][218] ([Intel XE#5535]) -> [PASS][219]
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-lnl-1/igt@kms_setmode@basic@pipe-a-edp-1.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-5/igt@kms_setmode@basic@pipe-a-edp-1.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: [FAIL][220] ([Intel XE#2883]) -> [PASS][221] +1 other test pass
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-lnl-1/igt@kms_setmode@basic@pipe-b-edp-1.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-5/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@kms_vrr@cmrr@pipe-a-edp-1:
- shard-lnl: [FAIL][222] ([Intel XE#4459]) -> [PASS][223] +1 other test pass
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-lnl-2/igt@kms_vrr@cmrr@pipe-a-edp-1.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-lnl-2/igt@kms_vrr@cmrr@pipe-a-edp-1.html
* igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap:
- shard-dg2-set2: [SKIP][224] ([Intel XE#1392]) -> [PASS][225] +5 other tests pass
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-436/igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap.html
* igt@xe_exec_basic@no-exec-rebind:
- shard-dg2-set2: [SKIP][226] ([Intel XE#4208]) -> [PASS][227] +23 other tests pass
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@xe_exec_basic@no-exec-rebind.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-464/igt@xe_exec_basic@no-exec-rebind.html
* igt@xe_exec_capture@reset:
- shard-bmg: [INCOMPLETE][228] -> [PASS][229]
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-8/igt@xe_exec_capture@reset.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-1/igt@xe_exec_capture@reset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-malloc-race:
- shard-bmg: [SKIP][230] ([Intel XE#4945]) -> [PASS][231] +380 other tests pass
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-malloc-race.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-malloc-race.html
* igt@xe_exec_threads@threads-hang-userptr-rebind-err:
- shard-adlp: [DMESG-FAIL][232] ([Intel XE#3876]) -> [PASS][233] +1 other test pass
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-8/igt@xe_exec_threads@threads-hang-userptr-rebind-err.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-8/igt@xe_exec_threads@threads-hang-userptr-rebind-err.html
* igt@xe_live_ktest@xe_bo:
- shard-bmg: [SKIP][234] ([Intel XE#2229]) -> [PASS][235] +1 other test pass
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_live_ktest@xe_bo.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@xe_live_ktest@xe_bo.html
#### Warnings ####
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
- shard-bmg: [SKIP][236] ([Intel XE#4950]) -> [SKIP][237] ([Intel XE#2370])
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-bmg: [SKIP][238] ([Intel XE#2370]) -> [SKIP][239] ([Intel XE#4950])
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-bmg: [SKIP][240] ([Intel XE#2327]) -> [SKIP][241] ([Intel XE#4947]) +4 other tests skip
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-8/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-270:
- shard-bmg: [SKIP][242] ([Intel XE#4947]) -> [SKIP][243] ([Intel XE#2327]) +3 other tests skip
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-8/igt@kms_big_fb@x-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0:
- shard-adlp: [DMESG-FAIL][244] ([Intel XE#4543]) -> [FAIL][245] ([Intel XE#1874])
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-0:
- shard-bmg: [SKIP][246] ([Intel XE#4947]) -> [SKIP][247] ([Intel XE#1124]) +10 other tests skip
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-1/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-addfb:
- shard-bmg: [SKIP][248] ([Intel XE#2328]) -> [SKIP][249] ([Intel XE#4947])
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-3/igt@kms_big_fb@y-tiled-addfb.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_big_fb@y-tiled-addfb.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-dg2-set2: [SKIP][250] ([Intel XE#4208]) -> [SKIP][251] ([Intel XE#1124])
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-463/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-bmg: [SKIP][252] ([Intel XE#4947]) -> [SKIP][253] ([Intel XE#607])
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
- shard-bmg: [SKIP][254] ([Intel XE#1124]) -> [SKIP][255] ([Intel XE#4947]) +12 other tests skip
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
- shard-bmg: [SKIP][256] ([Intel XE#2314] / [Intel XE#2894]) -> [SKIP][257] ([Intel XE#4950]) +2 other tests skip
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-8/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2160x1440p:
- shard-bmg: [SKIP][258] ([Intel XE#367]) -> [SKIP][259] ([Intel XE#4950]) +2 other tests skip
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-1/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-3-displays-1920x1080p:
- shard-dg2-set2: [SKIP][260] ([Intel XE#4208] / [i915#2575]) -> [SKIP][261] ([Intel XE#367])
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-464/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-4-displays-1920x1080p:
- shard-bmg: [SKIP][262] ([Intel XE#4950]) -> [SKIP][263] ([Intel XE#367]) +2 other tests skip
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_bw@linear-tiling-4-displays-1920x1080p.html
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-3/igt@kms_bw@linear-tiling-4-displays-1920x1080p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
- shard-bmg: [SKIP][264] ([Intel XE#4947]) -> [SKIP][265] ([Intel XE#2887]) +10 other tests skip
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-8/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs:
- shard-dg2-set2: [SKIP][266] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][267] ([Intel XE#455] / [Intel XE#787]) +1 other test skip
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-463/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-primary-basic-y-tiled-ccs:
- shard-bmg: [SKIP][268] ([Intel XE#2887]) -> [SKIP][269] ([Intel XE#4947]) +16 other tests skip
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-2/igt@kms_ccs@crc-primary-basic-y-tiled-ccs.html
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_ccs@crc-primary-basic-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-bmg: [SKIP][270] ([Intel XE#4947]) -> [SKIP][271] ([Intel XE#3432]) +1 other test skip
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
- shard-bmg: [SKIP][272] ([Intel XE#3432]) -> [SKIP][273] ([Intel XE#4947])
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-bmg: [SKIP][274] ([Intel XE#4947]) -> [SKIP][275] ([Intel XE#2652] / [Intel XE#787]) +2 other tests skip
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [SKIP][276] ([Intel XE#4208]) -> [INCOMPLETE][277] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345])
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_cdclk@plane-scaling:
- shard-bmg: [SKIP][278] ([Intel XE#2724]) -> [SKIP][279] ([Intel XE#4947])
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-3/igt@kms_cdclk@plane-scaling.html
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium_audio@hdmi-audio-edid:
- shard-bmg: [SKIP][280] ([Intel XE#4950]) -> [SKIP][281] ([Intel XE#2252]) +7 other tests skip
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_chamelium_audio@hdmi-audio-edid.html
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@kms_chamelium_audio@hdmi-audio-edid.html
* igt@kms_chamelium_color@ctm-negative:
- shard-bmg: [SKIP][282] ([Intel XE#2325]) -> [SKIP][283] ([Intel XE#4950]) +1 other test skip
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-2/igt@kms_chamelium_color@ctm-negative.html
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_chamelium_color@ctm-negative.html
* igt@kms_chamelium_color@degamma:
- shard-bmg: [SKIP][284] ([Intel XE#4950]) -> [SKIP][285] ([Intel XE#2325])
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_chamelium_color@degamma.html
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-bmg: [SKIP][286] ([Intel XE#2252]) -> [SKIP][287] ([Intel XE#4950]) +8 other tests skip
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
- shard-dg2-set2: [SKIP][288] ([Intel XE#4208] / [i915#2575]) -> [SKIP][289] ([Intel XE#373])
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-434/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
* igt@kms_content_protection@atomic:
- shard-bmg: [SKIP][290] ([Intel XE#4950]) -> [FAIL][291] ([Intel XE#1178])
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_content_protection@atomic.html
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-8/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-dg2-set2: [SKIP][292] ([Intel XE#4208] / [i915#2575]) -> [SKIP][293] ([Intel XE#307])
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_content_protection@dp-mst-lic-type-1.html
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@dp-mst-type-0:
- shard-bmg: [SKIP][294] ([Intel XE#2390]) -> [SKIP][295] ([Intel XE#4950])
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-2/igt@kms_content_protection@dp-mst-type-0.html
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_content_protection@dp-mst-type-0.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-bmg: [SKIP][296] ([Intel XE#4950]) -> [SKIP][297] ([Intel XE#2390])
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_content_protection@dp-mst-type-1.html
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@legacy:
- shard-bmg: [FAIL][298] ([Intel XE#1178]) -> [SKIP][299] ([Intel XE#2341])
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-8/igt@kms_content_protection@legacy.html
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@type1:
- shard-bmg: [SKIP][300] ([Intel XE#4950]) -> [SKIP][301] ([Intel XE#2341])
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_content_protection@type1.html
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@cursor-offscreen-128x42:
- shard-bmg: [SKIP][302] ([Intel XE#2320]) -> [SKIP][303] ([Intel XE#4950]) +6 other tests skip
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_cursor_crc@cursor-offscreen-128x42.html
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_cursor_crc@cursor-offscreen-128x42.html
* igt@kms_cursor_crc@cursor-onscreen-256x85:
- shard-bmg: [SKIP][304] ([Intel XE#4950]) -> [SKIP][305] ([Intel XE#2320]) +3 other tests skip
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_cursor_crc@cursor-onscreen-256x85.html
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_cursor_crc@cursor-onscreen-256x85.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-bmg: [SKIP][306] ([Intel XE#4950]) -> [SKIP][307] ([Intel XE#2321])
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_cursor_crc@cursor-onscreen-512x170.html
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x170:
- shard-bmg: [SKIP][308] ([Intel XE#2321]) -> [SKIP][309] ([Intel XE#4950])
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-8/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-bmg: [SKIP][310] ([Intel XE#4950]) -> [SKIP][311] ([Intel XE#2286])
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dsc@dsc-fractional-bpp-with-bpc:
- shard-bmg: [SKIP][312] ([Intel XE#4947]) -> [SKIP][313] ([Intel XE#2244])
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-8/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-bmg: [SKIP][314] ([Intel XE#2244]) -> [SKIP][315] ([Intel XE#4947]) +2 other tests skip
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-3/igt@kms_dsc@dsc-with-bpc-formats.html
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbcon_fbt@fbc:
- shard-bmg: [SKIP][316] ([Intel XE#4947]) -> [SKIP][317] ([Intel XE#5425])
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_fbcon_fbt@fbc.html
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-3/igt@kms_fbcon_fbt@fbc.html
* igt@kms_fbcon_fbt@psr:
- shard-bmg: [SKIP][318] ([Intel XE#776]) -> [SKIP][319] ([Intel XE#4947])
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-3/igt@kms_fbcon_fbt@psr.html
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_fbcon_fbt@psr.html
* igt@kms_feature_discovery@display-3x:
- shard-bmg: [SKIP][320] ([Intel XE#4950]) -> [SKIP][321] ([Intel XE#2373])
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_feature_discovery@display-3x.html
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@kms_feature_discovery@display-3x.html
- shard-dg2-set2: [SKIP][322] ([Intel XE#4208] / [i915#2575]) -> [SKIP][323] ([Intel XE#703])
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_feature_discovery@display-3x.html
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-464/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@psr1:
- shard-bmg: [SKIP][324] ([Intel XE#2374]) -> [SKIP][325] ([Intel XE#4950]) +1 other test skip
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-3/igt@kms_feature_discovery@psr1.html
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_feature_discovery@psr1.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-bmg: [SKIP][326] ([Intel XE#2316]) -> [SKIP][327] ([Intel XE#4950])
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-bmg: [SKIP][328] ([Intel XE#4950]) -> [SKIP][329] ([Intel XE#2316])
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_flip@2x-plain-flip-fb-recreate.html
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-bmg: [SKIP][330] ([Intel XE#2293] / [Intel XE#2380]) -> [SKIP][331] ([Intel XE#4947]) +4 other tests skip
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-bmg: [SKIP][332] ([Intel XE#4947]) -> [SKIP][333] ([Intel XE#2380])
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
- shard-bmg: [SKIP][334] ([Intel XE#4947]) -> [SKIP][335] ([Intel XE#2293] / [Intel XE#2380]) +3 other tests skip
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt:
- shard-bmg: [SKIP][336] ([Intel XE#4947]) -> [SKIP][337] ([Intel XE#2311]) +22 other tests skip
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][338] ([Intel XE#2312]) -> [SKIP][339] ([Intel XE#4947]) +4 other tests skip
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][340] ([Intel XE#2311]) -> [SKIP][341] ([Intel XE#4947]) +26 other tests skip
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][342] ([Intel XE#2311]) -> [SKIP][343] ([Intel XE#2312]) +5 other tests skip
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-blt.html
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: [SKIP][344] ([Intel XE#2312]) -> [SKIP][345] ([Intel XE#2311]) +9 other tests skip
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][346] ([Intel XE#5390]) -> [SKIP][347] ([Intel XE#4947]) +15 other tests skip
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen.html
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][348] ([Intel XE#2312]) -> [SKIP][349] ([Intel XE#5390]) +1 other test skip
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][350] ([Intel XE#5390]) -> [SKIP][351] ([Intel XE#2312]) +2 other tests skip
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][352] ([Intel XE#4947]) -> [SKIP][353] ([Intel XE#5390]) +10 other tests skip
[352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
[353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-pgflip-blt:
- shard-dg2-set2: [SKIP][354] ([Intel XE#4208]) -> [SKIP][355] ([Intel XE#651])
[354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-pgflip-blt.html
[355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
- shard-bmg: [SKIP][356] ([Intel XE#2312]) -> [SKIP][357] ([Intel XE#2313]) +5 other tests skip
[356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
[357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][358] ([Intel XE#4947]) -> [SKIP][359] ([Intel XE#2313]) +24 other tests skip
[358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
[359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][360] ([Intel XE#4947]) -> [SKIP][361] ([Intel XE#2312]) +3 other tests skip
[360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
[361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt:
- shard-bmg: [SKIP][362] ([Intel XE#2313]) -> [SKIP][363] ([Intel XE#2312]) +2 other tests skip
[362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt.html
[363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary:
- shard-bmg: [SKIP][364] ([Intel XE#2313]) -> [SKIP][365] ([Intel XE#4947]) +23 other tests skip
[364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
[365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-dg2-set2: [SKIP][366] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][367] ([Intel XE#653])
[366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc.html
[367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-pgflip-blt:
- shard-dg2-set2: [SKIP][368] ([Intel XE#4208]) -> [SKIP][369] ([Intel XE#653]) +4 other tests skip
[368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-pgflip-blt.html
[369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-pgflip-blt.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][370] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][371] ([Intel XE#3544])
[370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
[371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][372] ([Intel XE#1503]) -> [SKIP][373] ([Intel XE#4950])
[372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-1/igt@kms_hdr@invalid-hdr.html
[373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-bmg: [SKIP][374] ([Intel XE#2934]) -> [SKIP][375] ([Intel XE#4947])
[374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-4/igt@kms_joiner@basic-force-ultra-joiner.html
[375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-bmg: [SKIP][376] ([Intel XE#4298]) -> [SKIP][377] ([Intel XE#4947])
[376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_joiner@basic-max-non-joiner.html
[377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-bmg: [SKIP][378] ([Intel XE#2927]) -> [SKIP][379] ([Intel XE#4947])
[378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_joiner@basic-ultra-joiner.html
[379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-bmg: [SKIP][380] ([Intel XE#4947]) -> [SKIP][381] ([Intel XE#346])
[380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_joiner@invalid-modeset-big-joiner.html
[381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_plane_lowres@tiling-y:
- shard-bmg: [SKIP][382] ([Intel XE#2393]) -> [SKIP][383] ([Intel XE#4950])
[382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-8/igt@kms_plane_lowres@tiling-y.html
[383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-bmg: [SKIP][384] ([Intel XE#5021]) -> [SKIP][385] ([Intel XE#4596])
[384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-yf.html
[385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75:
- shard-bmg: [SKIP][386] ([Intel XE#2763]) -> [SKIP][387] ([Intel XE#4950])
[386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-1/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
[387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-bmg: [SKIP][388] ([Intel XE#4947]) -> [SKIP][389] ([Intel XE#870])
[388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_pm_backlight@fade-with-dpms.html
[389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_pm_backlight@fade-with-dpms.html
- shard-dg2-set2: [SKIP][390] ([Intel XE#4208]) -> [SKIP][391] ([Intel XE#870])
[390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_pm_backlight@fade-with-dpms.html
[391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-463/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-bmg: [SKIP][392] ([Intel XE#870]) -> [SKIP][393] ([Intel XE#4947])
[392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-3/igt@kms_pm_backlight@fade-with-suspend.html
[393]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-bmg: [SKIP][394] ([Intel XE#4962]) -> [SKIP][395] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
[394]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_pm_rpm@modeset-lpsp-stress.html
[395]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-bmg: [SKIP][396] ([Intel XE#4947]) -> [SKIP][397] ([Intel XE#1489]) +8 other tests skip
[396]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
[397]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
- shard-dg2-set2: [SKIP][398] ([Intel XE#4208]) -> [SKIP][399] ([Intel XE#1489]) +2 other tests skip
[398]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
[399]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
- shard-bmg: [SKIP][400] ([Intel XE#1489]) -> [SKIP][401] ([Intel XE#4947]) +6 other tests skip
[400]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-2/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
[401]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_su@page_flip-p010:
- shard-bmg: [SKIP][402] ([Intel XE#4947]) -> [SKIP][403] ([Intel XE#2387]) +2 other tests skip
[402]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_psr2_su@page_flip-p010.html
[403]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-8/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@fbc-psr-cursor-render:
- shard-dg2-set2: [SKIP][404] ([Intel XE#4208]) -> [SKIP][405] ([Intel XE#2850] / [Intel XE#929])
[404]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_psr@fbc-psr-cursor-render.html
[405]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-432/igt@kms_psr@fbc-psr-cursor-render.html
* igt@kms_psr@fbc-psr2-cursor-blt:
- shard-bmg: [SKIP][406] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][407] ([Intel XE#4947]) +16 other tests skip
[406]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-4/igt@kms_psr@fbc-psr2-cursor-blt.html
[407]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_psr@fbc-psr2-cursor-blt.html
* igt@kms_psr@psr-primary-page-flip:
- shard-bmg: [SKIP][408] ([Intel XE#4947]) -> [SKIP][409] ([Intel XE#2234] / [Intel XE#2850]) +12 other tests skip
[408]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_psr@psr-primary-page-flip.html
[409]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_psr@psr-primary-page-flip.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-bmg: [SKIP][410] ([Intel XE#3414] / [Intel XE#3904]) -> [SKIP][411] ([Intel XE#4950]) +2 other tests skip
[410]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@kms_rotation_crc@bad-pixel-format.html
[411]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-dg2-set2: [SKIP][412] ([Intel XE#4208] / [i915#2575]) -> [SKIP][413] ([Intel XE#3414])
[412]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_rotation_crc@primary-rotation-270.html
[413]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-435/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-bmg: [SKIP][414] ([Intel XE#4950]) -> [SKIP][415] ([Intel XE#2330])
[414]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
[415]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-bmg: [SKIP][416] ([Intel XE#2330]) -> [SKIP][417] ([Intel XE#4950])
[416]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
[417]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-bmg: [SKIP][418] ([Intel XE#4950]) -> [SKIP][419] ([Intel XE#3414] / [Intel XE#3904])
[418]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_rotation_crc@sprite-rotation-90.html
[419]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@kms_scaling_modes@scaling-mode-center:
- shard-bmg: [SKIP][420] ([Intel XE#2413]) -> [SKIP][421] ([Intel XE#4950])
[420]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-2/igt@kms_scaling_modes@scaling-mode-center.html
[421]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_scaling_modes@scaling-mode-center.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-bmg: [SKIP][422] ([Intel XE#1435]) -> [SKIP][423] ([Intel XE#4950]) +1 other test skip
[422]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_setmode@basic-clone-single-crtc.html
[423]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [SKIP][424] ([Intel XE#362]) -> [FAIL][425] ([Intel XE#1729])
[424]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
[425]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][426] ([Intel XE#2426]) -> [SKIP][427] ([Intel XE#4950])
[426]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[427]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_tv_load_detect@load-detect:
- shard-bmg: [SKIP][428] ([Intel XE#4950]) -> [SKIP][429] ([Intel XE#2450])
[428]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_tv_load_detect@load-detect.html
[429]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-1/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@flip-basic-fastset:
- shard-dg2-set2: [SKIP][430] ([Intel XE#4208] / [i915#2575]) -> [SKIP][431] ([Intel XE#455])
[430]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@kms_vrr@flip-basic-fastset.html
[431]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-466/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_vrr@seamless-rr-switch-virtual:
- shard-bmg: [SKIP][432] ([Intel XE#4950]) -> [SKIP][433] ([Intel XE#1499]) +1 other test skip
[432]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@kms_vrr@seamless-rr-switch-virtual.html
[433]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@kms_vrr@seamless-rr-switch-virtual.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-bmg: [SKIP][434] ([Intel XE#4950]) -> [SKIP][435] ([Intel XE#1091] / [Intel XE#2849]) +1 other test skip
[434]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@sriov_basic@enable-vfs-autoprobe-off.html
[435]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-4/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@xe_create@multigpu-create-massive-size:
- shard-bmg: [SKIP][436] ([Intel XE#4945]) -> [SKIP][437] ([Intel XE#2504])
[436]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_create@multigpu-create-massive-size.html
[437]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@xe_create@multigpu-create-massive-size.html
* igt@xe_eu_stall@invalid-gt-id:
- shard-dg2-set2: [SKIP][438] ([Intel XE#4208]) -> [SKIP][439] ([Intel XE#5626])
[438]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@xe_eu_stall@invalid-gt-id.html
[439]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@xe_eu_stall@invalid-gt-id.html
* igt@xe_eudebug@basic-vm-access-parameters-userptr-faultable:
- shard-dg2-set2: [SKIP][440] ([Intel XE#4208]) -> [SKIP][441] ([Intel XE#4837])
[440]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@xe_eudebug@basic-vm-access-parameters-userptr-faultable.html
[441]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-435/igt@xe_eudebug@basic-vm-access-parameters-userptr-faultable.html
* igt@xe_eudebug@basic-vm-bind-metadata-discovery:
- shard-bmg: [SKIP][442] ([Intel XE#4837]) -> [SKIP][443] ([Intel XE#4945]) +11 other tests skip
[442]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-3/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
[443]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
* igt@xe_eudebug_online@single-step:
- shard-bmg: [SKIP][444] ([Intel XE#4945]) -> [SKIP][445] ([Intel XE#4837]) +12 other tests skip
[444]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_eudebug_online@single-step.html
[445]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@xe_eudebug_online@single-step.html
* igt@xe_eudebug_sriov@deny-sriov:
- shard-bmg: [SKIP][446] ([Intel XE#4518]) -> [SKIP][447] ([Intel XE#4945]) +1 other test skip
[446]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@xe_eudebug_sriov@deny-sriov.html
[447]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_eudebug_sriov@deny-sriov.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
- shard-bmg: [SKIP][448] ([Intel XE#4945]) -> [SKIP][449] ([Intel XE#2322]) +7 other tests skip
[448]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
[449]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind:
- shard-bmg: [SKIP][450] ([Intel XE#2322]) -> [SKIP][451] ([Intel XE#4945]) +6 other tests skip
[450]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-2/igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind.html
[451]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind.html
* igt@xe_exec_fault_mode@twice-invalid-userptr-fault:
- shard-dg2-set2: [SKIP][452] ([Intel XE#4208]) -> [SKIP][453] ([Intel XE#288]) +4 other tests skip
[452]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@xe_exec_fault_mode@twice-invalid-userptr-fault.html
[453]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-434/igt@xe_exec_fault_mode@twice-invalid-userptr-fault.html
* igt@xe_exec_system_allocator@many-large-mmap-free-race-nomemset:
- shard-dg2-set2: [SKIP][454] ([Intel XE#4208]) -> [SKIP][455] ([Intel XE#4915]) +33 other tests skip
[454]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@xe_exec_system_allocator@many-large-mmap-free-race-nomemset.html
[455]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-466/igt@xe_exec_system_allocator@many-large-mmap-free-race-nomemset.html
* igt@xe_exec_system_allocator@process-many-execqueues-mmap-free-huge:
- shard-bmg: [SKIP][456] ([Intel XE#4945]) -> [SKIP][457] ([Intel XE#4943]) +18 other tests skip
[456]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_exec_system_allocator@process-many-execqueues-mmap-free-huge.html
[457]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-3/igt@xe_exec_system_allocator@process-many-execqueues-mmap-free-huge.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge:
- shard-bmg: [SKIP][458] ([Intel XE#4943]) -> [SKIP][459] ([Intel XE#4945]) +26 other tests skip
[458]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge.html
[459]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge.html
* igt@xe_media_fill@media-fill:
- shard-bmg: [SKIP][460] ([Intel XE#4945]) -> [SKIP][461] ([Intel XE#2459] / [Intel XE#2596])
[460]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_media_fill@media-fill.html
[461]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-1/igt@xe_media_fill@media-fill.html
- shard-dg2-set2: [SKIP][462] ([Intel XE#4208]) -> [SKIP][463] ([Intel XE#560])
[462]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@xe_media_fill@media-fill.html
[463]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-436/igt@xe_media_fill@media-fill.html
* igt@xe_mmap@small-bar:
- shard-bmg: [SKIP][464] ([Intel XE#4945]) -> [SKIP][465] ([Intel XE#586])
[464]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_mmap@small-bar.html
[465]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@xe_mmap@small-bar.html
* igt@xe_oa@blocking:
- shard-dg2-set2: [SKIP][466] ([Intel XE#4208]) -> [SKIP][467] ([Intel XE#3573])
[466]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@xe_oa@blocking.html
[467]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@xe_oa@blocking.html
* igt@xe_pat@pat-index-xehpc:
- shard-bmg: [SKIP][468] ([Intel XE#4945]) -> [SKIP][469] ([Intel XE#1420])
[468]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_pat@pat-index-xehpc.html
[469]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pm@d3cold-i2c:
- shard-bmg: [SKIP][470] ([Intel XE#4945]) -> [SKIP][471] ([Intel XE#5694])
[470]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_pm@d3cold-i2c.html
[471]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@xe_pm@d3cold-i2c.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-adlp: [ABORT][472] ([Intel XE#5545]) -> [SKIP][473] ([Intel XE#2284] / [Intel XE#366])
[472]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-adlp-8/igt@xe_pm@d3cold-mmap-vram.html
[473]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-adlp-1/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_pm@d3cold-multiple-execs:
- shard-bmg: [SKIP][474] ([Intel XE#2284]) -> [SKIP][475] ([Intel XE#4945]) +1 other test skip
[474]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-4/igt@xe_pm@d3cold-multiple-execs.html
[475]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_pm@d3cold-multiple-execs.html
* igt@xe_pm@s2idle-d3cold-basic-exec:
- shard-bmg: [SKIP][476] ([Intel XE#4945]) -> [SKIP][477] ([Intel XE#2284]) +1 other test skip
[476]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_pm@s2idle-d3cold-basic-exec.html
[477]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-1/igt@xe_pm@s2idle-d3cold-basic-exec.html
* igt@xe_pmu@all-fn-engine-activity-load:
- shard-bmg: [SKIP][478] ([Intel XE#4945]) -> [SKIP][479] ([Intel XE#4650])
[478]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_pmu@all-fn-engine-activity-load.html
[479]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-8/igt@xe_pmu@all-fn-engine-activity-load.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-bmg: [SKIP][480] ([Intel XE#4945]) -> [SKIP][481] ([Intel XE#4733]) +3 other tests skip
[480]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
[481]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-3/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
* igt@xe_pxp@regular-src-to-pxp-dest-rendercopy:
- shard-bmg: [SKIP][482] ([Intel XE#4733]) -> [SKIP][483] ([Intel XE#4945]) +1 other test skip
[482]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-4/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html
[483]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html
* igt@xe_query@multigpu-query-hwconfig:
- shard-bmg: [SKIP][484] ([Intel XE#944]) -> [SKIP][485] ([Intel XE#4945]) +2 other tests skip
[484]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-7/igt@xe_query@multigpu-query-hwconfig.html
[485]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_query@multigpu-query-hwconfig.html
* igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
- shard-dg2-set2: [SKIP][486] ([Intel XE#4208]) -> [SKIP][487] ([Intel XE#944])
[486]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html
[487]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-435/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-bmg: [SKIP][488] ([Intel XE#4945]) -> [SKIP][489] ([Intel XE#944])
[488]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_query@multigpu-query-pxp-status.html
[489]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-2/igt@xe_query@multigpu-query-pxp-status.html
* igt@xe_sriov_auto_provisioning@exclusive-ranges:
- shard-bmg: [SKIP][490] ([Intel XE#4130]) -> [SKIP][491] ([Intel XE#4945]) +1 other test skip
[490]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-6/igt@xe_sriov_auto_provisioning@exclusive-ranges.html
[491]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_sriov_auto_provisioning@exclusive-ranges.html
* igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs:
- shard-bmg: [SKIP][492] ([Intel XE#4945]) -> [SKIP][493] ([Intel XE#4130])
[492]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html
[493]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-6/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-reduce-numvfs.html
* igt@xe_sriov_flr@flr-each-isolation:
- shard-bmg: [SKIP][494] ([Intel XE#3342]) -> [SKIP][495] ([Intel XE#4945])
[494]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-8/igt@xe_sriov_flr@flr-each-isolation.html
[495]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-5/igt@xe_sriov_flr@flr-each-isolation.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-dg2-set2: [SKIP][496] ([Intel XE#4208]) -> [SKIP][497] ([Intel XE#3342])
[496]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-dg2-464/igt@xe_sriov_flr@flr-vf1-clear.html
[497]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-dg2-433/igt@xe_sriov_flr@flr-vf1-clear.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets:
- shard-bmg: [SKIP][498] ([Intel XE#4945]) -> [SKIP][499] ([Intel XE#4351])
[498]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97/shard-bmg-5/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
[499]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/shard-bmg-7/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1151
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1337]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1337
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
[Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
[Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
[Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
[Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
[Intel XE#4518]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4518
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
[Intel XE#4665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4665
[Intel XE#4674]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4674
[Intel XE#4692]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4692
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4819
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#4945]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4945
[Intel XE#4947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4947
[Intel XE#4950]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4950
[Intel XE#4962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4962
[Intel XE#4963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4963
[Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
[Intel XE#5195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5195
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5425
[Intel XE#5428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5428
[Intel XE#5535]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5535
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#5547]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5547
[Intel XE#5560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5560
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5563]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5563
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5573
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
[Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
[Intel XE#5624]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5624
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
[Intel XE#5715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5715
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#586]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/586
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#701]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/701
[Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
Build changes
-------------
* IGT: IGT_8484 -> IGT_8485
* Linux: xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97 -> xe-pw-151244v2
IGT_8484: 8484
IGT_8485: cb040c57e8bbc1cdac111ada808d5a7dd569a546 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3503-8ef111c44cc83f182055c33c552523ac3f3f7a97: 8ef111c44cc83f182055c33c552523ac3f3f7a97
xe-pw-151244v2: 151244v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151244v2/index.html
[-- Attachment #2: Type: text/html, Size: 159948 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 07/15] drm/i915/psr: Add function to compute max link-wake latency
2025-08-04 13:24 ` [PATCH 07/15] drm/i915/psr: Add function to compute max link-wake latency Ankit Nautiyal
@ 2025-08-04 20:54 ` Jani Nikula
2025-08-05 6:27 ` Nautiyal, Ankit K
0 siblings, 1 reply; 22+ messages in thread
From: Jani Nikula @ 2025-08-04 20:54 UTC (permalink / raw)
To: Ankit Nautiyal, intel-gfx, intel-xe; +Cc: ville.syrjala, Ankit Nautiyal
On Mon, 04 Aug 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Introduce a helper to compute the max link wake latency when using
> Auxless/Aux wake mechanism for PSR/Panel Replay/LOBF features.
>
> This will be used to compute the minimum guardband so that the link wake
> latencies are accounted and these features work smoothly for higher
> refresh rate panels.
>
> Bspec: 70151, 71477
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 64 ++++++++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_psr.h | 3 ++
> 2 files changed, 67 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 6bd3454bb00e..6cdaff3ccc9f 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -33,6 +33,7 @@
> #include "intel_atomic.h"
> #include "intel_crtc.h"
> #include "intel_cursor_regs.h"
> +#include "intel_cx0_phy.h"
> #include "intel_ddi.h"
> #include "intel_de.h"
> #include "intel_display_irq.h"
> @@ -4249,3 +4250,66 @@ bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
> {
> return intel_dp_is_edp(intel_dp) && crtc_state->has_panel_replay;
> }
> +
> +static
> +int intel_psr_compute_aux_wake_latency(struct intel_dp *intel_dp,
> + struct intel_crtc_state *crtc_state)
> +{
> +#define TFW_EXIT_LATENCY_MS 20000
> +#define FAST_WAKE_LATENCY_MS 12000 /* Preamble: 8us; PHY wake: 4us */
> + struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> + int aux_wake_latency_us;
> + int io_buffer_wake_ms;
> +
> + io_buffer_wake_ms = intel_encoder_is_c10phy(encoder) ? 9790 : 14790;
> +
> + aux_wake_latency_us =
> + DIV_ROUND_UP(io_buffer_wake_ms + TFW_EXIT_LATENCY_MS + FAST_WAKE_LATENCY_MS, 1000);
See https://lore.kernel.org/r/eeda84457c813151a3459a46a91946b4fbbb9e44@intel.com
> +
> + return aux_wake_latency_us;
> +}
> +
> +static
> +int intel_psr_compute_auxless_latency(struct intel_crtc_state *crtc_state)
> +{
> +#define PHY_ESTABLISHMENT_PERIOD_MS 50000
> +#define LFPS_PERIOD_MS 800
> +#define SILENCE_MAX_MS 180
> + int linkrate_mhz = crtc_state->port_clock / 1000;
> + int clock_data_switch_ms;
> + int auxless_latency_us;
> + int time_ml_phy_lock_ms;
> + int num_ml_phy_lock;
> + /*
> + * TPS4 length = 252
> + * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
> + * Number ML_PHY_LOCK = ( 7 + CEILING(6.5us / tML_PHY_LOCK ) + 1)
> + * t2 = Number ML_PHY_LOCK * tML_PHY_LOCK
> + * tCDS term = 2 * t2
> + * =>tCDS_term = 2 * (7 * (252 * (10 /linkrate))+6.5)
> + */
> + time_ml_phy_lock_ms = (1000 * 252 * 10) / linkrate_mhz;
> + num_ml_phy_lock = 7 + DIV_ROUND_UP(6500 * 1000, time_ml_phy_lock_ms) / 1000 + 1;
> + clock_data_switch_ms = 2 * time_ml_phy_lock_ms * num_ml_phy_lock;
> +
> + auxless_latency_us = (LFPS_PERIOD_MS + SILENCE_MAX_MS + PHY_ESTABLISHMENT_PERIOD_MS +
> + clock_data_switch_ms) / 1000;
> +
> + return auxless_latency_us;
> +}
> +
> +int intel_psr_compute_max_link_wake_latency(struct intel_dp *intel_dp,
> + struct intel_crtc_state *crtc_state,
> + bool assume_all_enabled)
> +{
> + int aux_wake_latency = 0;
> + int auxless_latency = 0;
> +
> + if (assume_all_enabled || crtc_state->has_sel_update)
> + auxless_latency = intel_psr_compute_aux_wake_latency(intel_dp, crtc_state);
> +
> + if (assume_all_enabled || crtc_state->has_panel_replay)
> + aux_wake_latency = intel_psr_compute_auxless_latency(crtc_state);
> +
> + return max(auxless_latency, aux_wake_latency);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
> index 9b061a22361f..c58d29620b49 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> @@ -81,5 +81,8 @@ void intel_psr_debugfs_register(struct intel_display *display);
> bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);
> bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state);
> +int intel_psr_compute_max_link_wake_latency(struct intel_dp *intel_dp,
> + struct intel_crtc_state *crtc_state,
> + bool assume_all_enabled);
>
> #endif /* __INTEL_PSR_H__ */
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH 07/15] drm/i915/psr: Add function to compute max link-wake latency
2025-08-04 20:54 ` Jani Nikula
@ 2025-08-05 6:27 ` Nautiyal, Ankit K
0 siblings, 0 replies; 22+ messages in thread
From: Nautiyal, Ankit K @ 2025-08-05 6:27 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe; +Cc: ville.syrjala
On 8/5/2025 2:24 AM, Jani Nikula wrote:
> On Mon, 04 Aug 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Introduce a helper to compute the max link wake latency when using
>> Auxless/Aux wake mechanism for PSR/Panel Replay/LOBF features.
>>
>> This will be used to compute the minimum guardband so that the link wake
>> latencies are accounted and these features work smoothly for higher
>> refresh rate panels.
>>
>> Bspec: 70151, 71477
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> ---
>> drivers/gpu/drm/i915/display/intel_psr.c | 64 ++++++++++++++++++++++++
>> drivers/gpu/drm/i915/display/intel_psr.h | 3 ++
>> 2 files changed, 67 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
>> index 6bd3454bb00e..6cdaff3ccc9f 100644
>> --- a/drivers/gpu/drm/i915/display/intel_psr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
>> @@ -33,6 +33,7 @@
>> #include "intel_atomic.h"
>> #include "intel_crtc.h"
>> #include "intel_cursor_regs.h"
>> +#include "intel_cx0_phy.h"
>> #include "intel_ddi.h"
>> #include "intel_de.h"
>> #include "intel_display_irq.h"
>> @@ -4249,3 +4250,66 @@ bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
>> {
>> return intel_dp_is_edp(intel_dp) && crtc_state->has_panel_replay;
>> }
>> +
>> +static
>> +int intel_psr_compute_aux_wake_latency(struct intel_dp *intel_dp,
>> + struct intel_crtc_state *crtc_state)
>> +{
>> +#define TFW_EXIT_LATENCY_MS 20000
>> +#define FAST_WAKE_LATENCY_MS 12000 /* Preamble: 8us; PHY wake: 4us */
>> + struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
>> + int aux_wake_latency_us;
>> + int io_buffer_wake_ms;
>> +
>> + io_buffer_wake_ms = intel_encoder_is_c10phy(encoder) ? 9790 : 14790;
>> +
>> + aux_wake_latency_us =
>> + DIV_ROUND_UP(io_buffer_wake_ms + TFW_EXIT_LATENCY_MS + FAST_WAKE_LATENCY_MS, 1000);
> See https://lore.kernel.org/r/eeda84457c813151a3459a46a91946b4fbbb9e44@intel.com
Oops! I think I have messed up msecs and usecs in the calculations.
I have realized, part of these calculations are already there in
functions in intel_alpm.c which can be used here.
I will correct this and rework on the patch.
Thanks Jani, for pointing this out.
Regards,
Ankit
>
>> +
>> + return aux_wake_latency_us;
>> +}
>> +
>> +static
>> +int intel_psr_compute_auxless_latency(struct intel_crtc_state *crtc_state)
>> +{
>> +#define PHY_ESTABLISHMENT_PERIOD_MS 50000
>> +#define LFPS_PERIOD_MS 800
>> +#define SILENCE_MAX_MS 180
>> + int linkrate_mhz = crtc_state->port_clock / 1000;
>> + int clock_data_switch_ms;
>> + int auxless_latency_us;
>> + int time_ml_phy_lock_ms;
>> + int num_ml_phy_lock;
>> + /*
>> + * TPS4 length = 252
>> + * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
>> + * Number ML_PHY_LOCK = ( 7 + CEILING(6.5us / tML_PHY_LOCK ) + 1)
>> + * t2 = Number ML_PHY_LOCK * tML_PHY_LOCK
>> + * tCDS term = 2 * t2
>> + * =>tCDS_term = 2 * (7 * (252 * (10 /linkrate))+6.5)
>> + */
>> + time_ml_phy_lock_ms = (1000 * 252 * 10) / linkrate_mhz;
>> + num_ml_phy_lock = 7 + DIV_ROUND_UP(6500 * 1000, time_ml_phy_lock_ms) / 1000 + 1;
>> + clock_data_switch_ms = 2 * time_ml_phy_lock_ms * num_ml_phy_lock;
>> +
>> + auxless_latency_us = (LFPS_PERIOD_MS + SILENCE_MAX_MS + PHY_ESTABLISHMENT_PERIOD_MS +
>> + clock_data_switch_ms) / 1000;
>> +
>> + return auxless_latency_us;
>> +}
>> +
>> +int intel_psr_compute_max_link_wake_latency(struct intel_dp *intel_dp,
>> + struct intel_crtc_state *crtc_state,
>> + bool assume_all_enabled)
>> +{
>> + int aux_wake_latency = 0;
>> + int auxless_latency = 0;
>> +
>> + if (assume_all_enabled || crtc_state->has_sel_update)
>> + auxless_latency = intel_psr_compute_aux_wake_latency(intel_dp, crtc_state);
>> +
>> + if (assume_all_enabled || crtc_state->has_panel_replay)
>> + aux_wake_latency = intel_psr_compute_auxless_latency(crtc_state);
>> +
>> + return max(auxless_latency, aux_wake_latency);
>> +}
>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
>> index 9b061a22361f..c58d29620b49 100644
>> --- a/drivers/gpu/drm/i915/display/intel_psr.h
>> +++ b/drivers/gpu/drm/i915/display/intel_psr.h
>> @@ -81,5 +81,8 @@ void intel_psr_debugfs_register(struct intel_display *display);
>> bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);
>> bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
>> const struct intel_crtc_state *crtc_state);
>> +int intel_psr_compute_max_link_wake_latency(struct intel_dp *intel_dp,
>> + struct intel_crtc_state *crtc_state,
>> + bool assume_all_enabled);
>>
>> #endif /* __INTEL_PSR_H__ */
^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2025-08-05 6:27 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-08-04 13:24 [PATCH 00/15] Optimize vrr.guardband and fix LRR Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 01/15] drm/i915/skl_watermark: Fix the scaling factor for chroma subsampling Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 02/15] drm/i915/skl_watermark: Add bounds check for scaler array access Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 03/15] drm/i915/skl_watermark: Pass linetime as argument to latency helpers Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 04/15] drm/i915/skl_scaler: Introduce helper for chroma downscale factor Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 05/15] drm/i915/display: Extract helpers to set dsc/scaler prefill latencies Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 06/15] drm/i915/dp: Add SDP latency computation helper Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 07/15] drm/i915/psr: Add function to compute max link-wake latency Ankit Nautiyal
2025-08-04 20:54 ` Jani Nikula
2025-08-05 6:27 ` Nautiyal, Ankit K
2025-08-04 13:24 ` [PATCH 08/15] drm/i915/psr: Store max PSR2/Panel Replay latency in crtc_state Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 09/15] drm/i915/vrr: Use vrr.sync_start for getting vtotal Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 10/15] drm/i915/display: Add guardband check for feature latencies Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 11/15] drm/i915/skl_watermark: Remove redundant latency checks from vblank validation Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 12/15] drm/i915/vrr: Use static guardband to support seamless LRR switching Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 13/15] drm/i915/vrr: Set vrr.vmin to min Vtotal Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 14/15] drm/i915/panel: Add helper to get highest fixed mode Ankit Nautiyal
2025-08-04 13:24 ` [PATCH 15/15] drm/i915/vrr: Fix seamless_mn drrs for PTL Ankit Nautiyal
2025-08-04 15:03 ` ✓ CI.KUnit: success for Optimize vrr.guardband and fix LRR (rev2) Patchwork
2025-08-04 15:18 ` ✗ CI.checksparse: warning " Patchwork
2025-08-04 16:28 ` ✓ Xe.CI.BAT: success " Patchwork
2025-08-04 17:42 ` ✓ Xe.CI.Full: " Patchwork
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