Re: [PATCH v3 2/2] drm/xe/display: Use xe_bo_addr_iter in remapped DPT pinning

[Jani Nikula <jani.nikula@linux.intel.com>]

On Tue, 27 Oct 2026, Maarten Lankhorst <dev@lankhorst.se> wrote:
> Right now we're using xe_bo_addr() on each individual address, which gives
> problems at larger resolution and sizes, since it's a O(N²).
>
> By using xe_bo_addr_iter_first() + xe_bo_addr_iter_addr(), the time
> complexity is reduced again to O(N).
>
> To fix rotated pinning requires some thinking.
>
> Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
> ---
> Changes since v1:
> - handle plane->src_stride != plane->width
> Changes since v2:
> - Add missing u32 casts.
> ---
>  drivers/gpu/drm/xe/display/xe_fb_pin.c | 29 ++++++++++++++------------
>  1 file changed, 16 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index e09116265ae95..e6c375f47a65b 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -17,6 +17,7 @@
>  #include "xe_ggtt.h"
>  #include "xe_pat.h"
>  #include "xe_pm.h"
> +#include "xe_res_cursor.h"
>  #include "xe_vram_types.h"
>  
>  static void
> @@ -67,15 +68,15 @@ write_dpt_remapped_linear(struct xe_bo *bo, struct iosys_map *map,
>  	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
>  	const u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo,
>  						 xe_cache_pat_idx(xe, XE_CACHE_NONE));
> -	unsigned int offset = plane->offset * XE_PAGE_SIZE;
> -	unsigned int size = plane->size;
> +	unsigned int offset = (u32)plane->offset * XE_PAGE_SIZE;
> +	unsigned int size = (u32)plane->size * XE_PAGE_SIZE;

What do you need the casts for? Useless?

> +	struct xe_res_cursor cur;
>  
> -	while (size--) {
> -		u64 addr = xe_bo_addr(bo, offset, XE_PAGE_SIZE);
> +	for (xe_bo_addr_iter_first(bo, &cur, offset, size); cur.remaining; xe_res_next(&cur, XE_PAGE_SIZE)) {
> +		u64 addr = xe_bo_addr_iter_addr(&cur);
>  
>  		iosys_map_wr(map, dest, u64, addr | pte);
>  		dest += sizeof(u64);
> -		offset += XE_PAGE_SIZE;
>  	}
>  
>  	return dest;
> @@ -90,20 +91,22 @@ write_dpt_remapped_tiled(struct xe_bo *bo, struct iosys_map *map,
>  	struct xe_ggtt *ggtt = xe_device_get_root_tile(xe)->mem.ggtt;
>  	const u64 pte = xe_ggtt_encode_pte_flags(ggtt, bo,
>  						 xe_cache_pat_idx(xe, XE_CACHE_NONE));
> -	unsigned int offset, column, row;
> +	u32 offset = (u32)plane->offset * XE_PAGE_SIZE;

Ditto.

> +	struct xe_res_cursor cur;
>  
> -	for (row = 0; row < plane->height; row++) {
> -		offset = (plane->offset + plane->src_stride * row) *
> -			 XE_PAGE_SIZE;
> -
> -		for (column = 0; column < plane->width; column++) {
> -			u64 addr = xe_bo_addr(bo, offset, XE_PAGE_SIZE);
> +	xe_bo_addr_iter_first(bo, &cur, offset, (u32)plane->height * plane->src_stride * XE_PAGE_SIZE);
> +	while (cur.remaining) {
> +		for (u32 column = 0; column < plane->width; column++) {
> +			u64 addr = xe_bo_addr_iter_addr(&cur);
>  
>  			iosys_map_wr(map, dest, u64, addr | pte);
>  			dest += sizeof(u64);
> -			offset += XE_PAGE_SIZE;
> +			xe_res_next(&cur, XE_PAGE_SIZE);
>  		}
>  
> +		if (plane->src_stride != plane->width)
> +			xe_res_next(&cur, (u32)(plane->src_stride - plane->width) * XE_PAGE_SIZE);
> +
>  		dest = write_dpt_padding(map, dest,
>  					 plane->dst_stride - plane->width);
>  	}

-- 
Jani Nikula, Intel