* [PATCH v2 01/13] drm/i915/edram: extract i915_edram.[ch] for edram detection
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 02/13] drm/i915: split out i915_freq.[ch] Jani Nikula
` (22 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
While edram detection ostensibly belongs with the rest of the dram stuff
in soc/intel_dram.c, it's only required by i915 core, not
display. Extract it to a separate i915_edram.[ch] file.
This allows us to drop the edram_size_mb member from struct xe_device.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_driver.c | 3 +-
drivers/gpu/drm/i915/i915_edram.c | 44 +++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_edram.h | 11 +++++++
drivers/gpu/drm/i915/soc/intel_dram.c | 36 ----------------------
drivers/gpu/drm/i915/soc/intel_dram.h | 1 -
drivers/gpu/drm/xe/xe_device_types.h | 6 ----
7 files changed, 58 insertions(+), 44 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_edram.c
create mode 100644 drivers/gpu/drm/i915/i915_edram.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 9a4f89c9a1cd..3ca4e0cace76 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -27,6 +27,7 @@ i915-y += \
i915_config.o \
i915_driver.o \
i915_drm_client.o \
+ i915_edram.o \
i915_getparam.o \
i915_ioctl.o \
i915_irq.o \
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 7c60b6873934..44a17ffc3058 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -94,6 +94,7 @@
#include "i915_driver.h"
#include "i915_drm_client.h"
#include "i915_drv.h"
+#include "i915_edram.h"
#include "i915_file_private.h"
#include "i915_getparam.h"
#include "i915_hwmon.h"
@@ -493,7 +494,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
}
/* needs to be done before ggtt probe */
- intel_dram_edram_detect(dev_priv);
+ i915_edram_detect(dev_priv);
ret = i915_set_dma_info(dev_priv);
if (ret)
diff --git a/drivers/gpu/drm/i915/i915_edram.c b/drivers/gpu/drm/i915/i915_edram.c
new file mode 100644
index 000000000000..5818ec396d1e
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_edram.c
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+#include <drm/drm_print.h>
+
+#include "i915_drv.h"
+#include "i915_edram.h"
+#include "i915_reg.h"
+
+static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap)
+{
+ static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 };
+ static const u8 sets[4] = { 1, 1, 2, 2 };
+
+ return EDRAM_NUM_BANKS(cap) *
+ ways[EDRAM_WAYS_IDX(cap)] *
+ sets[EDRAM_SETS_IDX(cap)];
+}
+
+void i915_edram_detect(struct drm_i915_private *i915)
+{
+ u32 edram_cap = 0;
+
+ if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9))
+ return;
+
+ edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP);
+
+ /* NB: We can't write IDICR yet because we don't have gt funcs set up */
+
+ if (!(edram_cap & EDRAM_ENABLED))
+ return;
+
+ /*
+ * The needed capability bits for size calculation are not there with
+ * pre gen9 so return 128MB always.
+ */
+ if (GRAPHICS_VER(i915) < 9)
+ i915->edram_size_mb = 128;
+ else
+ i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap);
+
+ drm_info(&i915->drm, "Found %uMB of eDRAM\n", i915->edram_size_mb);
+}
diff --git a/drivers/gpu/drm/i915/i915_edram.h b/drivers/gpu/drm/i915/i915_edram.h
new file mode 100644
index 000000000000..8319422ace9d
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_edram.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_DRAM_H__
+#define __I915_DRAM_H__
+
+struct drm_i915_private;
+
+void i915_edram_detect(struct drm_i915_private *i915);
+
+#endif /* __I915_DRAM_H__ */
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
index 739cfe48f6db..cfe96c3c1b1a 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
@@ -861,39 +861,3 @@ const struct dram_info *intel_dram_info(struct drm_device *drm)
return i915->dram_info;
}
-
-static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap)
-{
- static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 };
- static const u8 sets[4] = { 1, 1, 2, 2 };
-
- return EDRAM_NUM_BANKS(cap) *
- ways[EDRAM_WAYS_IDX(cap)] *
- sets[EDRAM_SETS_IDX(cap)];
-}
-
-void intel_dram_edram_detect(struct drm_i915_private *i915)
-{
- u32 edram_cap = 0;
-
- if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9))
- return;
-
- edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP);
-
- /* NB: We can't write IDICR yet because we don't have gt funcs set up */
-
- if (!(edram_cap & EDRAM_ENABLED))
- return;
-
- /*
- * The needed capability bits for size calculation are not there with
- * pre gen9 so return 128MB always.
- */
- if (GRAPHICS_VER(i915) < 9)
- i915->edram_size_mb = 128;
- else
- i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap);
-
- drm_info(&i915->drm, "Found %uMB of eDRAM\n", i915->edram_size_mb);
-}
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.h b/drivers/gpu/drm/i915/soc/intel_dram.h
index 8475ee379daa..58aaf2f91afe 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.h
+++ b/drivers/gpu/drm/i915/soc/intel_dram.h
@@ -35,7 +35,6 @@ struct dram_info {
bool has_16gb_dimms;
};
-void intel_dram_edram_detect(struct drm_i915_private *i915);
int intel_dram_detect(struct drm_i915_private *i915);
unsigned int intel_fsb_freq(struct drm_i915_private *i915);
unsigned int intel_mem_freq(struct drm_i915_private *i915);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 0b2fa7c56d38..a072c020b84b 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -650,12 +650,6 @@ struct xe_device {
*/
const struct dram_info *dram_info;
- /*
- * edram size in MB.
- * Cannot be determined by PCIID. You must always read a register.
- */
- u32 edram_size_mb;
-
struct intel_uncore {
spinlock_t lock;
} uncore;
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 02/13] drm/i915: split out i915_freq.[ch]
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
2025-11-19 18:52 ` [PATCH v2 01/13] drm/i915/edram: extract i915_edram.[ch] for edram detection Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 03/13] drm/i915: move intel_dram.[ch] from soc/ to display/ Jani Nikula
` (21 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
The i915 core only needs three rather specific functions from
soc/intel_dram.[ch]: i9xx_fsb_freq(), ilk_fsb_freq(), and
ilk_mem_freq(). Add new i915_freq.[ch] and duplicate those functions for
i915 to reduce the dependency on soc/ code.
Wile duplication in general is bad, here it's a tradeoff to simplify the
i915, xe and display interactions.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
.../gpu/drm/i915/gt/intel_gt_clock_utils.c | 4 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 6 +-
drivers/gpu/drm/i915/i915_freq.c | 111 ++++++++++++++++++
drivers/gpu/drm/i915/i915_freq.h | 13 ++
5 files changed, 130 insertions(+), 5 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_freq.c
create mode 100644 drivers/gpu/drm/i915/i915_freq.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 3ca4e0cace76..a696d8b77b4d 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -28,6 +28,7 @@ i915-y += \
i915_driver.o \
i915_drm_client.o \
i915_edram.o \
+ i915_freq.o \
i915_getparam.o \
i915_ioctl.o \
i915_irq.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c b/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
index c90b35881a26..aecd120972ea 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
@@ -4,12 +4,12 @@
*/
#include "i915_drv.h"
+#include "i915_freq.h"
#include "i915_reg.h"
#include "intel_gt.h"
#include "intel_gt_clock_utils.h"
#include "intel_gt_print.h"
#include "intel_gt_regs.h"
-#include "soc/intel_dram.h"
static u32 read_reference_ts_freq(struct intel_uncore *uncore)
{
@@ -148,7 +148,7 @@ static u32 gen4_read_clock_frequency(struct intel_uncore *uncore)
*
* Testing on actual hardware has shown there is no /16.
*/
- return DIV_ROUND_CLOSEST(intel_fsb_freq(uncore->i915), 4) * 1000;
+ return DIV_ROUND_CLOSEST(i9xx_fsb_freq(uncore->i915), 4) * 1000;
}
static u32 read_clock_frequency(struct intel_uncore *uncore)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index d233dc122bd7..90b7eee78f1f 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -10,9 +10,9 @@
#include "display/intel_display_rps.h"
#include "display/vlv_clock.h"
-#include "soc/intel_dram.h"
#include "i915_drv.h"
+#include "i915_freq.h"
#include "i915_irq.h"
#include "i915_reg.h"
#include "i915_wait_util.h"
@@ -285,8 +285,8 @@ static void gen5_rps_init(struct intel_rps *rps)
u32 rgvmodectl;
int c_m, i;
- fsb_freq = intel_fsb_freq(i915);
- mem_freq = intel_mem_freq(i915);
+ fsb_freq = ilk_fsb_freq(i915);
+ mem_freq = ilk_mem_freq(i915);
if (fsb_freq <= 3200000)
c_m = 0;
diff --git a/drivers/gpu/drm/i915/i915_freq.c b/drivers/gpu/drm/i915/i915_freq.c
new file mode 100644
index 000000000000..9bdaea34aef9
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_freq.c
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+#include <drm/drm_print.h>
+
+#include "i915_drv.h"
+#include "i915_freq.h"
+#include "intel_mchbar_regs.h"
+
+unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
+{
+ u32 fsb;
+
+ /*
+ * Note that this only reads the state of the FSB
+ * straps, not the actual FSB frequency. Some BIOSen
+ * let you configure each independently. Ideally we'd
+ * read out the actual FSB frequency but sadly we
+ * don't know which registers have that information,
+ * and all the relevant docs have gone to bit heaven :(
+ */
+ fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
+
+ if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
+ switch (fsb) {
+ case CLKCFG_FSB_400:
+ return 400000;
+ case CLKCFG_FSB_533:
+ return 533333;
+ case CLKCFG_FSB_667:
+ return 666667;
+ case CLKCFG_FSB_800:
+ return 800000;
+ case CLKCFG_FSB_1067:
+ return 1066667;
+ case CLKCFG_FSB_1333:
+ return 1333333;
+ default:
+ MISSING_CASE(fsb);
+ return 1333333;
+ }
+ } else {
+ switch (fsb) {
+ case CLKCFG_FSB_400_ALT:
+ return 400000;
+ case CLKCFG_FSB_533:
+ return 533333;
+ case CLKCFG_FSB_667:
+ return 666667;
+ case CLKCFG_FSB_800:
+ return 800000;
+ case CLKCFG_FSB_1067_ALT:
+ return 1066667;
+ case CLKCFG_FSB_1333_ALT:
+ return 1333333;
+ case CLKCFG_FSB_1600_ALT:
+ return 1600000;
+ default:
+ MISSING_CASE(fsb);
+ return 1333333;
+ }
+ }
+}
+
+unsigned int ilk_fsb_freq(struct drm_i915_private *i915)
+{
+ u16 fsb;
+
+ fsb = intel_uncore_read16(&i915->uncore, CSIPLL0) & 0x3ff;
+
+ switch (fsb) {
+ case 0x00c:
+ return 3200000;
+ case 0x00e:
+ return 3733333;
+ case 0x010:
+ return 4266667;
+ case 0x012:
+ return 4800000;
+ case 0x014:
+ return 5333333;
+ case 0x016:
+ return 5866667;
+ case 0x018:
+ return 6400000;
+ default:
+ drm_dbg(&i915->drm, "unknown fsb frequency 0x%04x\n", fsb);
+ return 0;
+ }
+}
+
+unsigned int ilk_mem_freq(struct drm_i915_private *i915)
+{
+ u16 ddrpll;
+
+ ddrpll = intel_uncore_read16(&i915->uncore, DDRMPLL1);
+ switch (ddrpll & 0xff) {
+ case 0xc:
+ return 800000;
+ case 0x10:
+ return 1066667;
+ case 0x14:
+ return 1333333;
+ case 0x18:
+ return 1600000;
+ default:
+ drm_dbg(&i915->drm, "unknown memory frequency 0x%02x\n",
+ ddrpll & 0xff);
+ return 0;
+ }
+}
diff --git a/drivers/gpu/drm/i915/i915_freq.h b/drivers/gpu/drm/i915/i915_freq.h
new file mode 100644
index 000000000000..53b0ecb95440
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_freq.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_FREQ_H__
+#define __I915_FREQ_H__
+
+struct drm_i915_private;
+
+unsigned int i9xx_fsb_freq(struct drm_i915_private *i915);
+unsigned int ilk_fsb_freq(struct drm_i915_private *i915);
+unsigned int ilk_mem_freq(struct drm_i915_private *i915);
+
+#endif /* __I915_FREQ_H__ */
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 03/13] drm/i915: move intel_dram.[ch] from soc/ to display/
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
2025-11-19 18:52 ` [PATCH v2 01/13] drm/i915/edram: extract i915_edram.[ch] for edram detection Jani Nikula
2025-11-19 18:52 ` [PATCH v2 02/13] drm/i915: split out i915_freq.[ch] Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 04/13] drm/xe: remove MISSING_CASE() from compat i915_utils.h Jani Nikula
` (20 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
The remaining users of intel_dram.[ch] are all in display. Move them
under display.
This allows us to remove the compat soc/intel_dram.h from xe.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/display/i9xx_wm.c | 3 +--
drivers/gpu/drm/i915/display/intel_bw.c | 3 +--
drivers/gpu/drm/i915/display/intel_cdclk.c | 3 +--
drivers/gpu/drm/i915/display/intel_display_power.c | 3 +--
drivers/gpu/drm/i915/{soc => display}/intel_dram.c | 5 ++---
drivers/gpu/drm/i915/{soc => display}/intel_dram.h | 0
drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/xe/Makefile | 2 +-
| 6 ------
drivers/gpu/drm/xe/display/xe_display.c | 2 +-
12 files changed, 11 insertions(+), 22 deletions(-)
rename drivers/gpu/drm/i915/{soc => display}/intel_dram.c (99%)
rename drivers/gpu/drm/i915/{soc => display}/intel_dram.h (100%)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index a696d8b77b4d..838c8e58e4a2 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -58,7 +58,6 @@ i915-y += \
# core peripheral code
i915-y += \
- soc/intel_dram.o \
soc/intel_gmch.o \
soc/intel_rom.o
@@ -268,6 +267,7 @@ i915-y += \
display/intel_dpll_mgr.o \
display/intel_dpt.o \
display/intel_dpt_common.o \
+ display/intel_dram.o \
display/intel_drrs.o \
display/intel_dsb.o \
display/intel_dsb_buffer.o \
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 01f3803fa09f..27e2d73bc505 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -7,8 +7,6 @@
#include <drm/drm_print.h>
-#include "soc/intel_dram.h"
-
#include "i915_drv.h"
#include "i915_reg.h"
#include "i9xx_wm.h"
@@ -19,6 +17,7 @@
#include "intel_display.h"
#include "intel_display_regs.h"
#include "intel_display_trace.h"
+#include "intel_dram.h"
#include "intel_fb.h"
#include "intel_mchbar_regs.h"
#include "intel_wm.h"
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 1f6461be50ef..957c90e62569 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -6,8 +6,6 @@
#include <drm/drm_atomic_state_helper.h>
#include <drm/drm_print.h>
-#include "soc/intel_dram.h"
-
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_bw.h"
@@ -16,6 +14,7 @@
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
+#include "intel_dram.h"
#include "intel_mchbar_regs.h"
#include "intel_pcode.h"
#include "intel_uncore.h"
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 37801c744b05..531819391c8c 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -28,8 +28,6 @@
#include <drm/drm_fixed.h>
#include <drm/drm_print.h>
-#include "soc/intel_dram.h"
-
#include "hsw_ips.h"
#include "i915_drv.h"
#include "i915_reg.h"
@@ -42,6 +40,7 @@
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
+#include "intel_dram.h"
#include "intel_mchbar_regs.h"
#include "intel_pci_config.h"
#include "intel_pcode.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index a383ef23391d..9c5f0277d8c2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -8,8 +8,6 @@
#include <drm/drm_print.h>
-#include "soc/intel_dram.h"
-
#include "i915_drv.h"
#include "i915_reg.h"
#include "intel_backlight_regs.h"
@@ -25,6 +23,7 @@
#include "intel_display_types.h"
#include "intel_display_utils.h"
#include "intel_dmc.h"
+#include "intel_dram.h"
#include "intel_mchbar_regs.h"
#include "intel_parent.h"
#include "intel_pch_refclk.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
similarity index 99%
rename from drivers/gpu/drm/i915/soc/intel_dram.c
rename to drivers/gpu/drm/i915/display/intel_dram.c
index cfe96c3c1b1a..7142772f2a6e 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -8,11 +8,10 @@
#include <drm/drm_managed.h>
#include <drm/drm_print.h>
-#include "../display/intel_display_core.h" /* FIXME */
-
#include "i915_drv.h"
#include "i915_reg.h"
-#include "i915_utils.h"
+#include "intel_display_core.h"
+#include "intel_display_utils.h"
#include "intel_dram.h"
#include "intel_mchbar_regs.h"
#include "intel_pcode.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
similarity index 100%
rename from drivers/gpu/drm/i915/soc/intel_dram.h
rename to drivers/gpu/drm/i915/display/intel_dram.h
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 54e9e0be019d..a33e0cec8cba 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -8,7 +8,6 @@
#include <drm/drm_blend.h>
#include <drm/drm_print.h>
-#include "soc/intel_dram.h"
#include "i915_reg.h"
#include "i9xx_wm.h"
#include "intel_atomic.h"
@@ -23,6 +22,7 @@
#include "intel_display_rpm.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
+#include "intel_dram.h"
#include "intel_fb.h"
#include "intel_fixed.h"
#include "intel_flipq.h"
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 44a17ffc3058..d1f573f1b6cc 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -59,6 +59,7 @@
#include "display/intel_dmc.h"
#include "display/intel_dp.h"
#include "display/intel_dpt.h"
+#include "display/intel_dram.h"
#include "display/intel_encoder.h"
#include "display/intel_fbdev.h"
#include "display/intel_gmbus.h"
@@ -87,7 +88,6 @@
#include "pxp/intel_pxp_debugfs.h"
#include "pxp/intel_pxp_pm.h"
-#include "soc/intel_dram.h"
#include "soc/intel_gmch.h"
#include "i915_debugfs.h"
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 1a3aa041820d..85642340a8fa 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -224,7 +224,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
# SOC code shared with i915
xe-$(CONFIG_DRM_XE_DISPLAY) += \
- i915-soc/intel_dram.o \
i915-soc/intel_rom.o
# Display code shared with i915
@@ -276,6 +275,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_dpll.o \
i915-display/intel_dpll_mgr.o \
i915-display/intel_dpt_common.o \
+ i915-display/intel_dram.o \
i915-display/intel_drrs.o \
i915-display/intel_dsb.o \
i915-display/intel_dsi.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h b/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
deleted file mode 100644
index 65707e20c557..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../../i915/soc/intel_dram.h"
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index e3320d9e6314..9b1d21e03df0 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -17,7 +17,6 @@
#include <drm/intel/display_parent_interface.h>
#include <uapi/drm/xe_drm.h>
-#include "soc/intel_dram.h"
#include "intel_acpi.h"
#include "intel_audio.h"
#include "intel_bw.h"
@@ -29,6 +28,7 @@
#include "intel_dmc.h"
#include "intel_dmc_wl.h"
#include "intel_dp.h"
+#include "intel_dram.h"
#include "intel_encoder.h"
#include "intel_fbdev.h"
#include "intel_hdcp.h"
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 04/13] drm/xe: remove MISSING_CASE() from compat i915_utils.h
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (2 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 03/13] drm/i915: move intel_dram.[ch] from soc/ to display/ Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 05/13] drm/i915/dram: convert to struct intel_display Jani Nikula
` (19 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
There are no longer users for MISSING_CASE() in the compat
i915_utils.h. Remove it to prevent new users from showing up.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
| 6 ------
1 file changed, 6 deletions(-)
--git a/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
index bcd441dc0fce..3639721f0bf8 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h
@@ -3,11 +3,5 @@
* Copyright © 2023 Intel Corporation
*/
-/* for soc/ */
-#ifndef MISSING_CASE
-#define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
- __stringify(x), (long)(x))
-#endif
-
/* for a couple of users under i915/display */
#define i915_inject_probe_failure(unused) ((unused) && 0)
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 05/13] drm/i915/dram: convert to struct intel_display
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (3 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 04/13] drm/xe: remove MISSING_CASE() from compat i915_utils.h Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-20 8:31 ` Jani Nikula
2025-11-20 16:18 ` [PATCH v3] " Jani Nikula
2025-11-19 18:52 ` [PATCH v2 06/13] drm/i915: move dram_info " Jani Nikula
` (18 subsequent siblings)
23 siblings, 2 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Convert everything except uncore access to struct intel_display.
While at it, convert logging to drm_dbg_kms().
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +-
.../drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/display/intel_dram.c | 205 +++++++++---------
drivers/gpu/drm/i915/display/intel_dram.h | 11 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 4 +-
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/xe/display/xe_display.c | 2 +-
9 files changed, 120 insertions(+), 114 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 27e2d73bc505..167277cd8877 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -90,7 +90,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
int i;
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 957c90e62569..d27835ed49c2 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -799,7 +799,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
void intel_bw_init_hw(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
if (!HAS_DISPLAY(display))
return;
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 531819391c8c..5c90e53b4e46 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3737,10 +3737,8 @@ static int pch_rawclk(struct intel_display *display)
static int i9xx_hrawclk(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
/* hrawclock is 1/4 the FSB frequency */
- return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
+ return DIV_ROUND_CLOSEST(intel_fsb_freq(display), 4);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 9c5f0277d8c2..08db9bbbfcb1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1616,7 +1616,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
static void tgl_bw_buddy_init(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
const struct buddy_page_mask *table;
unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask;
int config, i;
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index 7142772f2a6e..3dfcc7938740 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -56,14 +56,17 @@ const char *intel_dram_type_str(enum intel_dram_type type)
#undef DRAM_TYPE_STR
-static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
+static enum intel_dram_type pnv_dram_type(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
}
-static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
+static unsigned int pnv_mem_freq(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 tmp;
tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG);
@@ -80,8 +83,9 @@ static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
return 0;
}
-static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
+static unsigned int ilk_mem_freq(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u16 ddrpll;
ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1);
@@ -95,19 +99,19 @@ static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
case 0x18:
return 1600000;
default:
- drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n",
- ddrpll & 0xff);
+ drm_dbg_kms(display->drm, "unknown memory frequency 0x%02x\n",
+ ddrpll & 0xff);
return 0;
}
}
-static unsigned int chv_mem_freq(struct drm_i915_private *i915)
+static unsigned int chv_mem_freq(struct intel_display *display)
{
u32 val;
- vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_CCK));
- val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
- vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_CCK));
+ vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_CCK));
+ val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
+ vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_CCK));
switch ((val >> 2) & 0x7) {
case 3:
@@ -117,13 +121,13 @@ static unsigned int chv_mem_freq(struct drm_i915_private *i915)
}
}
-static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
+static unsigned int vlv_mem_freq(struct intel_display *display)
{
u32 val;
- vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
- val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
- vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
+ vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_PUNIT));
+ val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
+ vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_PUNIT));
switch ((val >> 6) & 3) {
case 0:
@@ -138,22 +142,23 @@ static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
return 0;
}
-unsigned int intel_mem_freq(struct drm_i915_private *i915)
+unsigned int intel_mem_freq(struct intel_display *display)
{
- if (IS_PINEVIEW(i915))
- return pnv_mem_freq(i915);
- else if (GRAPHICS_VER(i915) == 5)
- return ilk_mem_freq(i915);
- else if (IS_CHERRYVIEW(i915))
- return chv_mem_freq(i915);
- else if (IS_VALLEYVIEW(i915))
- return vlv_mem_freq(i915);
+ if (display->platform.pineview)
+ return pnv_mem_freq(display);
+ else if (DISPLAY_VER(display) == 5)
+ return ilk_mem_freq(display);
+ else if (display->platform.cherryview)
+ return chv_mem_freq(display);
+ else if (display->platform.valleyview)
+ return vlv_mem_freq(display);
else
return 0;
}
-static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
+static unsigned int i9xx_fsb_freq(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 fsb;
/*
@@ -166,7 +171,7 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
*/
fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
- if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
+ if (display->platform.pineview || display->platform.mobile) {
switch (fsb) {
case CLKCFG_FSB_400:
return 400000;
@@ -207,8 +212,9 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
}
}
-static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
+static unsigned int ilk_fsb_freq(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u16 fsb;
fsb = intel_uncore_read16(&dev_priv->uncore, CSIPLL0) & 0x3ff;
@@ -229,33 +235,33 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
case 0x018:
return 6400000;
default:
- drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", fsb);
+ drm_dbg_kms(display->drm, "unknown fsb frequency 0x%04x\n", fsb);
return 0;
}
}
-unsigned int intel_fsb_freq(struct drm_i915_private *i915)
+unsigned int intel_fsb_freq(struct intel_display *display)
{
- if (GRAPHICS_VER(i915) == 5)
- return ilk_fsb_freq(i915);
- else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
- return i9xx_fsb_freq(i915);
+ if (DISPLAY_VER(display) == 5)
+ return ilk_fsb_freq(display);
+ else if (IS_DISPLAY_VER(display, 3, 4))
+ return i9xx_fsb_freq(display);
else
return 0;
}
-static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- dram_info->fsb_freq = intel_fsb_freq(i915);
+ dram_info->fsb_freq = intel_fsb_freq(display);
if (dram_info->fsb_freq)
- drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
+ drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
- dram_info->mem_freq = intel_mem_freq(i915);
+ dram_info->mem_freq = intel_mem_freq(display);
if (dram_info->mem_freq)
- drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
+ drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
- if (IS_PINEVIEW(i915))
- dram_info->type = pnv_dram_type(i915);
+ if (display->platform.pineview)
+ dram_info->type = pnv_dram_type(display);
return 0;
}
@@ -391,22 +397,22 @@ skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
}
static void
-skl_dram_print_dimm_info(struct drm_i915_private *i915,
+skl_dram_print_dimm_info(struct intel_display *display,
struct dram_dimm_info *dimm,
int channel, char dimm_name)
{
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
str_yes_no(skl_is_16gb_dimm(dimm)));
}
static void
-skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
+skl_dram_get_dimm_l_info(struct intel_display *display,
struct dram_dimm_info *dimm,
int channel, u32 val)
{
- if (GRAPHICS_VER(i915) >= 11) {
+ if (DISPLAY_VER(display) >= 11) {
dimm->size = icl_get_dimm_l_size(val);
dimm->width = icl_get_dimm_l_width(val);
dimm->ranks = icl_get_dimm_l_ranks(val);
@@ -416,15 +422,15 @@ skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
dimm->ranks = skl_get_dimm_l_ranks(val);
}
- skl_dram_print_dimm_info(i915, dimm, channel, 'L');
+ skl_dram_print_dimm_info(display, dimm, channel, 'L');
}
static void
-skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
+skl_dram_get_dimm_s_info(struct intel_display *display,
struct dram_dimm_info *dimm,
int channel, u32 val)
{
- if (GRAPHICS_VER(i915) >= 11) {
+ if (DISPLAY_VER(display) >= 11) {
dimm->size = icl_get_dimm_s_size(val);
dimm->width = icl_get_dimm_s_width(val);
dimm->ranks = icl_get_dimm_s_ranks(val);
@@ -434,19 +440,19 @@ skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
dimm->ranks = skl_get_dimm_s_ranks(val);
}
- skl_dram_print_dimm_info(i915, dimm, channel, 'S');
+ skl_dram_print_dimm_info(display, dimm, channel, 'S');
}
static int
-skl_dram_get_channel_info(struct drm_i915_private *i915,
+skl_dram_get_channel_info(struct intel_display *display,
struct dram_channel_info *ch,
int channel, u32 val)
{
- skl_dram_get_dimm_l_info(i915, &ch->dimm_l, channel, val);
- skl_dram_get_dimm_s_info(i915, &ch->dimm_s, channel, val);
+ skl_dram_get_dimm_l_info(display, &ch->dimm_l, channel, val);
+ skl_dram_get_dimm_s_info(display, &ch->dimm_s, channel, val);
if (ch->dimm_l.size == 0 && ch->dimm_s.size == 0) {
- drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);
+ drm_dbg_kms(display->drm, "CH%u not populated\n", channel);
return -EINVAL;
}
@@ -460,7 +466,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
skl_is_16gb_dimm(&ch->dimm_s);
- drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
+ drm_dbg_kms(display->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
return 0;
@@ -476,8 +482,9 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
}
static int
-skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
struct dram_channel_info ch0 = {}, ch1 = {};
u32 val;
int ret;
@@ -487,23 +494,23 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
val = intel_uncore_read(&i915->uncore,
SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
- ret = skl_dram_get_channel_info(i915, &ch0, 0, val);
+ ret = skl_dram_get_channel_info(display, &ch0, 0, val);
if (ret == 0)
dram_info->num_channels++;
val = intel_uncore_read(&i915->uncore,
SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
- ret = skl_dram_get_channel_info(i915, &ch1, 1, val);
+ ret = skl_dram_get_channel_info(display, &ch1, 1, val);
if (ret == 0)
dram_info->num_channels++;
if (dram_info->num_channels == 0) {
- drm_info(&i915->drm, "Number of memory channels is zero\n");
+ drm_info(display->drm, "Number of memory channels is zero\n");
return -EINVAL;
}
if (ch0.ranks == 0 && ch1.ranks == 0) {
- drm_info(&i915->drm, "couldn't get memory rank information\n");
+ drm_info(display->drm, "couldn't get memory rank information\n");
return -EINVAL;
}
@@ -511,18 +518,19 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);
- drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
+ drm_dbg_kms(display->drm, "Memory configuration is symmetric? %s\n",
str_yes_no(dram_info->symmetric_memory));
- drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
+ drm_dbg_kms(display->drm, "16Gb+ DIMMs: %s\n",
str_yes_no(dram_info->has_16gb_dimms));
return 0;
}
static enum intel_dram_type
-skl_get_dram_type(struct drm_i915_private *i915)
+skl_get_dram_type(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 val;
val = intel_uncore_read(&i915->uncore,
@@ -544,13 +552,13 @@ skl_get_dram_type(struct drm_i915_private *i915)
}
static int
-skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
int ret;
- dram_info->type = skl_get_dram_type(i915);
+ dram_info->type = skl_get_dram_type(display);
- ret = skl_dram_get_channels_info(i915, dram_info);
+ ret = skl_dram_get_channels_info(display, dram_info);
if (ret)
return ret;
@@ -635,8 +643,9 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm);
}
-static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 val;
u8 valid_ranks = 0;
int i;
@@ -657,11 +666,11 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
bxt_get_dimm_info(&dimm, val);
type = bxt_get_dimm_type(val);
- drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&
+ drm_WARN_ON(display->drm, type != INTEL_DRAM_UNKNOWN &&
dram_info->type != INTEL_DRAM_UNKNOWN &&
dram_info->type != type);
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"CH%u DIMM size: %u Gb, width: X%u, ranks: %u\n",
i - BXT_D_CR_DRP0_DUNIT_START,
dimm.size, dimm.width, dimm.ranks);
@@ -674,25 +683,25 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
}
if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {
- drm_info(&i915->drm, "couldn't get memory information\n");
+ drm_info(display->drm, "couldn't get memory information\n");
return -EINVAL;
}
return 0;
}
-static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
+static int icl_pcode_read_mem_global_info(struct intel_display *display,
struct dram_info *dram_info)
{
u32 val = 0;
int ret;
- ret = intel_pcode_read(&dev_priv->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
+ ret = intel_pcode_read(display->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
ICL_PCODE_MEM_SS_READ_GLOBAL_INFO, &val, NULL);
if (ret)
return ret;
- if (GRAPHICS_VER(dev_priv) == 12) {
+ if (DISPLAY_VER(display) == 12) {
switch (val & 0xf) {
case 0:
dram_info->type = INTEL_DRAM_DDR4;
@@ -743,25 +752,25 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
return 0;
}
-static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
int ret;
- ret = skl_dram_get_channels_info(i915, dram_info);
+ ret = skl_dram_get_channels_info(display, dram_info);
if (ret)
return ret;
- return icl_pcode_read_mem_global_info(i915, dram_info);
+ return icl_pcode_read_mem_global_info(display, dram_info);
}
-static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- return icl_pcode_read_mem_global_info(i915, dram_info);
+ return icl_pcode_read_mem_global_info(display, dram_info);
}
-static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- struct intel_display *display = i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL);
switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
@@ -784,11 +793,11 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
dram_info->type = INTEL_DRAM_LPDDR3;
break;
case 8:
- drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
+ drm_WARN_ON(display->drm, !display->platform.dgfx);
dram_info->type = INTEL_DRAM_GDDR;
break;
case 9:
- drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
+ drm_WARN_ON(display->drm, !display->platform.dgfx);
dram_info->type = INTEL_DRAM_GDDR_ECC;
break;
default:
@@ -806,41 +815,41 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
return 0;
}
-int intel_dram_detect(struct drm_i915_private *i915)
+int intel_dram_detect(struct intel_display *display)
{
- struct intel_display *display = i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
struct dram_info *dram_info;
int ret;
- if (IS_DG2(i915) || !intel_display_device_present(display))
+ if (display->platform.dg2 || !HAS_DISPLAY(display))
return 0;
- dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
+ dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);
if (!dram_info)
return -ENOMEM;
i915->dram_info = dram_info;
if (DISPLAY_VER(display) >= 14)
- ret = xelpdp_get_dram_info(i915, dram_info);
- else if (GRAPHICS_VER(i915) >= 12)
- ret = gen12_get_dram_info(i915, dram_info);
- else if (GRAPHICS_VER(i915) >= 11)
- ret = gen11_get_dram_info(i915, dram_info);
- else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
- ret = bxt_get_dram_info(i915, dram_info);
- else if (GRAPHICS_VER(i915) >= 9)
- ret = skl_get_dram_info(i915, dram_info);
+ ret = xelpdp_get_dram_info(display, dram_info);
+ else if (DISPLAY_VER(display) >= 12)
+ ret = gen12_get_dram_info(display, dram_info);
+ else if (DISPLAY_VER(display) >= 11)
+ ret = gen11_get_dram_info(display, dram_info);
+ else if (display->platform.broxton || display->platform.geminilake)
+ ret = bxt_get_dram_info(display, dram_info);
+ else if (DISPLAY_VER(display) >= 9)
+ ret = skl_get_dram_info(display, dram_info);
else
- ret = i915_get_dram_info(i915, dram_info);
+ ret = i915_get_dram_info(display, dram_info);
- drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
+ drm_dbg_kms(display->drm, "DRAM type: %s\n",
intel_dram_type_str(dram_info->type));
- drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
+ drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);
- drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
- drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
+ drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
+ drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
/* TODO: Do we want to abort probe on dram detection failures? */
if (ret)
@@ -854,9 +863,9 @@ int intel_dram_detect(struct drm_i915_private *i915)
* checks, and prefer not dereferencing on platforms that shouldn't look at dram
* info, to catch accidental and incorrect dram info checks.
*/
-const struct dram_info *intel_dram_info(struct drm_device *drm)
+const struct dram_info *intel_dram_info(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(drm);
+ struct drm_i915_private *i915 = to_i915(display->drm);
return i915->dram_info;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
index 58aaf2f91afe..5800b7b4e614 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.h
+++ b/drivers/gpu/drm/i915/display/intel_dram.h
@@ -8,8 +8,7 @@
#include <linux/types.h>
-struct drm_i915_private;
-struct drm_device;
+struct intel_display;
struct dram_info {
enum intel_dram_type {
@@ -35,10 +34,10 @@ struct dram_info {
bool has_16gb_dimms;
};
-int intel_dram_detect(struct drm_i915_private *i915);
-unsigned int intel_fsb_freq(struct drm_i915_private *i915);
-unsigned int intel_mem_freq(struct drm_i915_private *i915);
-const struct dram_info *intel_dram_info(struct drm_device *drm);
+int intel_dram_detect(struct intel_display *display);
+unsigned int intel_fsb_freq(struct intel_display *display);
+unsigned int intel_mem_freq(struct intel_display *display);
+const struct dram_info *intel_dram_info(struct intel_display *display);
const char *intel_dram_type_str(enum intel_dram_type type);
#endif /* __INTEL_DRAM_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index a33e0cec8cba..7964cfffdaae 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3125,7 +3125,7 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display)
if (display->platform.kabylake ||
display->platform.coffeelake ||
display->platform.cometlake) {
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
return dram_info->symmetric_memory;
}
@@ -3169,7 +3169,7 @@ static void increase_wm_latency(struct intel_display *display, int inc)
static bool need_16gb_dimm_wa(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
return (display->platform.skylake || display->platform.kabylake ||
display->platform.coffeelake || display->platform.cometlake ||
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index d1f573f1b6cc..2369e2b55096 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -574,7 +574,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
* Fill the dram structure to get the system dram info. This will be
* used for memory latency calculation.
*/
- ret = intel_dram_detect(dev_priv);
+ ret = intel_dram_detect(display);
if (ret)
goto err_opregion;
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 9b1d21e03df0..793115077615 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -122,7 +122,7 @@ int xe_display_init_early(struct xe_device *xe)
* Fill the dram structure to get the system dram info. This will be
* used for memory latency calculation.
*/
- err = intel_dram_detect(xe);
+ err = intel_dram_detect(display);
if (err)
goto err_opregion;
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v2 05/13] drm/i915/dram: convert to struct intel_display
2025-11-19 18:52 ` [PATCH v2 05/13] drm/i915/dram: convert to struct intel_display Jani Nikula
@ 2025-11-20 8:31 ` Jani Nikula
2025-11-20 13:59 ` Ville Syrjälä
2025-11-20 16:18 ` [PATCH v3] " Jani Nikula
1 sibling, 1 reply; 30+ messages in thread
From: Jani Nikula @ 2025-11-20 8:31 UTC (permalink / raw)
To: intel-gfx, intel-xe, ville.syrjala
On Wed, 19 Nov 2025, Jani Nikula <jani.nikula@intel.com> wrote:
> Convert everything except uncore access to struct intel_display.
>
> While at it, convert logging to drm_dbg_kms().
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
> drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
> drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +-
> .../drm/i915/display/intel_display_power.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dram.c | 205 +++++++++---------
> drivers/gpu/drm/i915/display/intel_dram.h | 11 +-
> drivers/gpu/drm/i915/display/skl_watermark.c | 4 +-
> drivers/gpu/drm/i915/i915_driver.c | 2 +-
> drivers/gpu/drm/xe/display/xe_display.c | 2 +-
> 9 files changed, 120 insertions(+), 114 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 27e2d73bc505..167277cd8877 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -90,7 +90,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
>
> static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
> {
> - const struct dram_info *dram_info = intel_dram_info(display->drm);
> + const struct dram_info *dram_info = intel_dram_info(display);
> bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
> int i;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 957c90e62569..d27835ed49c2 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -799,7 +799,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
>
> void intel_bw_init_hw(struct intel_display *display)
> {
> - const struct dram_info *dram_info = intel_dram_info(display->drm);
> + const struct dram_info *dram_info = intel_dram_info(display);
>
> if (!HAS_DISPLAY(display))
> return;
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 531819391c8c..5c90e53b4e46 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -3737,10 +3737,8 @@ static int pch_rawclk(struct intel_display *display)
>
> static int i9xx_hrawclk(struct intel_display *display)
> {
> - struct drm_i915_private *i915 = to_i915(display->drm);
> -
> /* hrawclock is 1/4 the FSB frequency */
> - return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
> + return DIV_ROUND_CLOSEST(intel_fsb_freq(display), 4);
> }
>
> /**
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 9c5f0277d8c2..08db9bbbfcb1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1616,7 +1616,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
>
> static void tgl_bw_buddy_init(struct intel_display *display)
> {
> - const struct dram_info *dram_info = intel_dram_info(display->drm);
> + const struct dram_info *dram_info = intel_dram_info(display);
> const struct buddy_page_mask *table;
> unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask;
> int config, i;
> diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
> index 7142772f2a6e..3dfcc7938740 100644
> --- a/drivers/gpu/drm/i915/display/intel_dram.c
> +++ b/drivers/gpu/drm/i915/display/intel_dram.c
> @@ -56,14 +56,17 @@ const char *intel_dram_type_str(enum intel_dram_type type)
>
> #undef DRAM_TYPE_STR
>
> -static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
> +static enum intel_dram_type pnv_dram_type(struct intel_display *display)
> {
> + struct drm_i915_private *i915 = to_i915(display->drm);
> +
> return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
> INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
> }
>
> -static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
> +static unsigned int pnv_mem_freq(struct intel_display *display)
> {
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> u32 tmp;
>
> tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG);
> @@ -80,8 +83,9 @@ static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
> return 0;
> }
>
> -static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
> +static unsigned int ilk_mem_freq(struct intel_display *display)
> {
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> u16 ddrpll;
>
> ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1);
> @@ -95,19 +99,19 @@ static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
> case 0x18:
> return 1600000;
> default:
> - drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n",
> - ddrpll & 0xff);
> + drm_dbg_kms(display->drm, "unknown memory frequency 0x%02x\n",
> + ddrpll & 0xff);
> return 0;
> }
> }
>
> -static unsigned int chv_mem_freq(struct drm_i915_private *i915)
> +static unsigned int chv_mem_freq(struct intel_display *display)
> {
> u32 val;
>
> - vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_CCK));
> - val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
> - vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_CCK));
> + vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_CCK));
> + val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
> + vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_CCK));
>
> switch ((val >> 2) & 0x7) {
> case 3:
> @@ -117,13 +121,13 @@ static unsigned int chv_mem_freq(struct drm_i915_private *i915)
> }
> }
>
> -static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
> +static unsigned int vlv_mem_freq(struct intel_display *display)
> {
> u32 val;
>
> - vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
> - val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
> - vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
> + vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_PUNIT));
> + val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
> + vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_PUNIT));
>
> switch ((val >> 6) & 3) {
> case 0:
> @@ -138,22 +142,23 @@ static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
> return 0;
> }
>
> -unsigned int intel_mem_freq(struct drm_i915_private *i915)
> +unsigned int intel_mem_freq(struct intel_display *display)
> {
> - if (IS_PINEVIEW(i915))
> - return pnv_mem_freq(i915);
> - else if (GRAPHICS_VER(i915) == 5)
> - return ilk_mem_freq(i915);
> - else if (IS_CHERRYVIEW(i915))
> - return chv_mem_freq(i915);
> - else if (IS_VALLEYVIEW(i915))
> - return vlv_mem_freq(i915);
> + if (display->platform.pineview)
> + return pnv_mem_freq(display);
> + else if (DISPLAY_VER(display) == 5)
> + return ilk_mem_freq(display);
> + else if (display->platform.cherryview)
> + return chv_mem_freq(display);
> + else if (display->platform.valleyview)
> + return vlv_mem_freq(display);
> else
> return 0;
> }
>
> -static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> +static unsigned int i9xx_fsb_freq(struct intel_display *display)
> {
> + struct drm_i915_private *i915 = to_i915(display->drm);
> u32 fsb;
>
> /*
> @@ -166,7 +171,7 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> */
> fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
>
> - if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
> + if (display->platform.pineview || display->platform.mobile) {
> switch (fsb) {
> case CLKCFG_FSB_400:
> return 400000;
> @@ -207,8 +212,9 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> }
> }
>
> -static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
> +static unsigned int ilk_fsb_freq(struct intel_display *display)
> {
> + struct drm_i915_private *dev_priv = to_i915(display->drm);
> u16 fsb;
>
> fsb = intel_uncore_read16(&dev_priv->uncore, CSIPLL0) & 0x3ff;
> @@ -229,33 +235,33 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
> case 0x018:
> return 6400000;
> default:
> - drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", fsb);
> + drm_dbg_kms(display->drm, "unknown fsb frequency 0x%04x\n", fsb);
> return 0;
> }
> }
>
> -unsigned int intel_fsb_freq(struct drm_i915_private *i915)
> +unsigned int intel_fsb_freq(struct intel_display *display)
> {
> - if (GRAPHICS_VER(i915) == 5)
> - return ilk_fsb_freq(i915);
> - else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
> - return i9xx_fsb_freq(i915);
> + if (DISPLAY_VER(display) == 5)
> + return ilk_fsb_freq(display);
> + else if (IS_DISPLAY_VER(display, 3, 4))
> + return i9xx_fsb_freq(display);
> else
> return 0;
> }
>
> -static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> - dram_info->fsb_freq = intel_fsb_freq(i915);
> + dram_info->fsb_freq = intel_fsb_freq(display);
> if (dram_info->fsb_freq)
> - drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
> + drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
>
> - dram_info->mem_freq = intel_mem_freq(i915);
> + dram_info->mem_freq = intel_mem_freq(display);
> if (dram_info->mem_freq)
> - drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
> + drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
>
> - if (IS_PINEVIEW(i915))
> - dram_info->type = pnv_dram_type(i915);
> + if (display->platform.pineview)
> + dram_info->type = pnv_dram_type(display);
>
> return 0;
> }
> @@ -391,22 +397,22 @@ skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
> }
>
> static void
> -skl_dram_print_dimm_info(struct drm_i915_private *i915,
> +skl_dram_print_dimm_info(struct intel_display *display,
> struct dram_dimm_info *dimm,
> int channel, char dimm_name)
> {
> - drm_dbg_kms(&i915->drm,
> + drm_dbg_kms(display->drm,
> "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
> channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
> str_yes_no(skl_is_16gb_dimm(dimm)));
> }
>
> static void
> -skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
> +skl_dram_get_dimm_l_info(struct intel_display *display,
> struct dram_dimm_info *dimm,
> int channel, u32 val)
> {
> - if (GRAPHICS_VER(i915) >= 11) {
> + if (DISPLAY_VER(display) >= 11) {
> dimm->size = icl_get_dimm_l_size(val);
> dimm->width = icl_get_dimm_l_width(val);
> dimm->ranks = icl_get_dimm_l_ranks(val);
> @@ -416,15 +422,15 @@ skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
> dimm->ranks = skl_get_dimm_l_ranks(val);
> }
>
> - skl_dram_print_dimm_info(i915, dimm, channel, 'L');
> + skl_dram_print_dimm_info(display, dimm, channel, 'L');
> }
>
> static void
> -skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
> +skl_dram_get_dimm_s_info(struct intel_display *display,
> struct dram_dimm_info *dimm,
> int channel, u32 val)
> {
> - if (GRAPHICS_VER(i915) >= 11) {
> + if (DISPLAY_VER(display) >= 11) {
> dimm->size = icl_get_dimm_s_size(val);
> dimm->width = icl_get_dimm_s_width(val);
> dimm->ranks = icl_get_dimm_s_ranks(val);
> @@ -434,19 +440,19 @@ skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
> dimm->ranks = skl_get_dimm_s_ranks(val);
> }
>
> - skl_dram_print_dimm_info(i915, dimm, channel, 'S');
> + skl_dram_print_dimm_info(display, dimm, channel, 'S');
> }
>
> static int
> -skl_dram_get_channel_info(struct drm_i915_private *i915,
> +skl_dram_get_channel_info(struct intel_display *display,
> struct dram_channel_info *ch,
> int channel, u32 val)
> {
> - skl_dram_get_dimm_l_info(i915, &ch->dimm_l, channel, val);
> - skl_dram_get_dimm_s_info(i915, &ch->dimm_s, channel, val);
> + skl_dram_get_dimm_l_info(display, &ch->dimm_l, channel, val);
> + skl_dram_get_dimm_s_info(display, &ch->dimm_s, channel, val);
>
> if (ch->dimm_l.size == 0 && ch->dimm_s.size == 0) {
> - drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);
> + drm_dbg_kms(display->drm, "CH%u not populated\n", channel);
> return -EINVAL;
> }
>
> @@ -460,7 +466,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
> ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
> skl_is_16gb_dimm(&ch->dimm_s);
>
> - drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
> + drm_dbg_kms(display->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
> channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
>
> return 0;
> @@ -476,8 +482,9 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
> }
>
> static int
> -skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
> {
> + struct drm_i915_private *i915 = to_i915(display->drm);
> struct dram_channel_info ch0 = {}, ch1 = {};
> u32 val;
> int ret;
> @@ -487,23 +494,23 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
>
> val = intel_uncore_read(&i915->uncore,
> SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
> - ret = skl_dram_get_channel_info(i915, &ch0, 0, val);
> + ret = skl_dram_get_channel_info(display, &ch0, 0, val);
> if (ret == 0)
> dram_info->num_channels++;
>
> val = intel_uncore_read(&i915->uncore,
> SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
> - ret = skl_dram_get_channel_info(i915, &ch1, 1, val);
> + ret = skl_dram_get_channel_info(display, &ch1, 1, val);
> if (ret == 0)
> dram_info->num_channels++;
>
> if (dram_info->num_channels == 0) {
> - drm_info(&i915->drm, "Number of memory channels is zero\n");
> + drm_info(display->drm, "Number of memory channels is zero\n");
> return -EINVAL;
> }
>
> if (ch0.ranks == 0 && ch1.ranks == 0) {
> - drm_info(&i915->drm, "couldn't get memory rank information\n");
> + drm_info(display->drm, "couldn't get memory rank information\n");
> return -EINVAL;
> }
>
> @@ -511,18 +518,19 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
>
> dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);
>
> - drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
> + drm_dbg_kms(display->drm, "Memory configuration is symmetric? %s\n",
> str_yes_no(dram_info->symmetric_memory));
>
> - drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
> + drm_dbg_kms(display->drm, "16Gb+ DIMMs: %s\n",
> str_yes_no(dram_info->has_16gb_dimms));
>
> return 0;
> }
>
> static enum intel_dram_type
> -skl_get_dram_type(struct drm_i915_private *i915)
> +skl_get_dram_type(struct intel_display *display)
> {
> + struct drm_i915_private *i915 = to_i915(display->drm);
> u32 val;
>
> val = intel_uncore_read(&i915->uncore,
> @@ -544,13 +552,13 @@ skl_get_dram_type(struct drm_i915_private *i915)
> }
>
> static int
> -skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> int ret;
>
> - dram_info->type = skl_get_dram_type(i915);
> + dram_info->type = skl_get_dram_type(display);
>
> - ret = skl_dram_get_channels_info(i915, dram_info);
> + ret = skl_dram_get_channels_info(display, dram_info);
> if (ret)
> return ret;
>
> @@ -635,8 +643,9 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
> dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm);
> }
>
> -static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> + struct drm_i915_private *i915 = to_i915(display->drm);
> u32 val;
> u8 valid_ranks = 0;
> int i;
> @@ -657,11 +666,11 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
> bxt_get_dimm_info(&dimm, val);
> type = bxt_get_dimm_type(val);
>
> - drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&
> + drm_WARN_ON(display->drm, type != INTEL_DRAM_UNKNOWN &&
> dram_info->type != INTEL_DRAM_UNKNOWN &&
> dram_info->type != type);
>
> - drm_dbg_kms(&i915->drm,
> + drm_dbg_kms(display->drm,
> "CH%u DIMM size: %u Gb, width: X%u, ranks: %u\n",
> i - BXT_D_CR_DRP0_DUNIT_START,
> dimm.size, dimm.width, dimm.ranks);
> @@ -674,25 +683,25 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
> }
>
> if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {
> - drm_info(&i915->drm, "couldn't get memory information\n");
> + drm_info(display->drm, "couldn't get memory information\n");
> return -EINVAL;
> }
>
> return 0;
> }
>
> -static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
> +static int icl_pcode_read_mem_global_info(struct intel_display *display,
> struct dram_info *dram_info)
> {
> u32 val = 0;
> int ret;
>
> - ret = intel_pcode_read(&dev_priv->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> + ret = intel_pcode_read(display->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> ICL_PCODE_MEM_SS_READ_GLOBAL_INFO, &val, NULL);
> if (ret)
> return ret;
>
> - if (GRAPHICS_VER(dev_priv) == 12) {
> + if (DISPLAY_VER(display) == 12) {
CI tells me this goes south on e.g. ADL-P (or TWL) which has graphics
version 12 but display version 13.
What to do.
BR,
Jani.
> switch (val & 0xf) {
> case 0:
> dram_info->type = INTEL_DRAM_DDR4;
> @@ -743,25 +752,25 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
> return 0;
> }
>
> -static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> int ret;
>
> - ret = skl_dram_get_channels_info(i915, dram_info);
> + ret = skl_dram_get_channels_info(display, dram_info);
> if (ret)
> return ret;
>
> - return icl_pcode_read_mem_global_info(i915, dram_info);
> + return icl_pcode_read_mem_global_info(display, dram_info);
> }
>
> -static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> - return icl_pcode_read_mem_global_info(i915, dram_info);
> + return icl_pcode_read_mem_global_info(display, dram_info);
> }
>
> -static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> +static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> {
> - struct intel_display *display = i915->display;
> + struct drm_i915_private *i915 = to_i915(display->drm);
> u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL);
>
> switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
> @@ -784,11 +793,11 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
> dram_info->type = INTEL_DRAM_LPDDR3;
> break;
> case 8:
> - drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> + drm_WARN_ON(display->drm, !display->platform.dgfx);
> dram_info->type = INTEL_DRAM_GDDR;
> break;
> case 9:
> - drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> + drm_WARN_ON(display->drm, !display->platform.dgfx);
> dram_info->type = INTEL_DRAM_GDDR_ECC;
> break;
> default:
> @@ -806,41 +815,41 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
> return 0;
> }
>
> -int intel_dram_detect(struct drm_i915_private *i915)
> +int intel_dram_detect(struct intel_display *display)
> {
> - struct intel_display *display = i915->display;
> + struct drm_i915_private *i915 = to_i915(display->drm);
> struct dram_info *dram_info;
> int ret;
>
> - if (IS_DG2(i915) || !intel_display_device_present(display))
> + if (display->platform.dg2 || !HAS_DISPLAY(display))
> return 0;
>
> - dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
> + dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);
> if (!dram_info)
> return -ENOMEM;
>
> i915->dram_info = dram_info;
>
> if (DISPLAY_VER(display) >= 14)
> - ret = xelpdp_get_dram_info(i915, dram_info);
> - else if (GRAPHICS_VER(i915) >= 12)
> - ret = gen12_get_dram_info(i915, dram_info);
> - else if (GRAPHICS_VER(i915) >= 11)
> - ret = gen11_get_dram_info(i915, dram_info);
> - else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
> - ret = bxt_get_dram_info(i915, dram_info);
> - else if (GRAPHICS_VER(i915) >= 9)
> - ret = skl_get_dram_info(i915, dram_info);
> + ret = xelpdp_get_dram_info(display, dram_info);
> + else if (DISPLAY_VER(display) >= 12)
> + ret = gen12_get_dram_info(display, dram_info);
> + else if (DISPLAY_VER(display) >= 11)
> + ret = gen11_get_dram_info(display, dram_info);
> + else if (display->platform.broxton || display->platform.geminilake)
> + ret = bxt_get_dram_info(display, dram_info);
> + else if (DISPLAY_VER(display) >= 9)
> + ret = skl_get_dram_info(display, dram_info);
> else
> - ret = i915_get_dram_info(i915, dram_info);
> + ret = i915_get_dram_info(display, dram_info);
>
> - drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
> + drm_dbg_kms(display->drm, "DRAM type: %s\n",
> intel_dram_type_str(dram_info->type));
>
> - drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
> + drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);
>
> - drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
> - drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
> + drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
> + drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
>
> /* TODO: Do we want to abort probe on dram detection failures? */
> if (ret)
> @@ -854,9 +863,9 @@ int intel_dram_detect(struct drm_i915_private *i915)
> * checks, and prefer not dereferencing on platforms that shouldn't look at dram
> * info, to catch accidental and incorrect dram info checks.
> */
> -const struct dram_info *intel_dram_info(struct drm_device *drm)
> +const struct dram_info *intel_dram_info(struct intel_display *display)
> {
> - struct drm_i915_private *i915 = to_i915(drm);
> + struct drm_i915_private *i915 = to_i915(display->drm);
>
> return i915->dram_info;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
> index 58aaf2f91afe..5800b7b4e614 100644
> --- a/drivers/gpu/drm/i915/display/intel_dram.h
> +++ b/drivers/gpu/drm/i915/display/intel_dram.h
> @@ -8,8 +8,7 @@
>
> #include <linux/types.h>
>
> -struct drm_i915_private;
> -struct drm_device;
> +struct intel_display;
>
> struct dram_info {
> enum intel_dram_type {
> @@ -35,10 +34,10 @@ struct dram_info {
> bool has_16gb_dimms;
> };
>
> -int intel_dram_detect(struct drm_i915_private *i915);
> -unsigned int intel_fsb_freq(struct drm_i915_private *i915);
> -unsigned int intel_mem_freq(struct drm_i915_private *i915);
> -const struct dram_info *intel_dram_info(struct drm_device *drm);
> +int intel_dram_detect(struct intel_display *display);
> +unsigned int intel_fsb_freq(struct intel_display *display);
> +unsigned int intel_mem_freq(struct intel_display *display);
> +const struct dram_info *intel_dram_info(struct intel_display *display);
> const char *intel_dram_type_str(enum intel_dram_type type);
>
> #endif /* __INTEL_DRAM_H__ */
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index a33e0cec8cba..7964cfffdaae 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3125,7 +3125,7 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display)
> if (display->platform.kabylake ||
> display->platform.coffeelake ||
> display->platform.cometlake) {
> - const struct dram_info *dram_info = intel_dram_info(display->drm);
> + const struct dram_info *dram_info = intel_dram_info(display);
>
> return dram_info->symmetric_memory;
> }
> @@ -3169,7 +3169,7 @@ static void increase_wm_latency(struct intel_display *display, int inc)
>
> static bool need_16gb_dimm_wa(struct intel_display *display)
> {
> - const struct dram_info *dram_info = intel_dram_info(display->drm);
> + const struct dram_info *dram_info = intel_dram_info(display);
>
> return (display->platform.skylake || display->platform.kabylake ||
> display->platform.coffeelake || display->platform.cometlake ||
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index d1f573f1b6cc..2369e2b55096 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -574,7 +574,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
> * Fill the dram structure to get the system dram info. This will be
> * used for memory latency calculation.
> */
> - ret = intel_dram_detect(dev_priv);
> + ret = intel_dram_detect(display);
> if (ret)
> goto err_opregion;
>
> diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> index 9b1d21e03df0..793115077615 100644
> --- a/drivers/gpu/drm/xe/display/xe_display.c
> +++ b/drivers/gpu/drm/xe/display/xe_display.c
> @@ -122,7 +122,7 @@ int xe_display_init_early(struct xe_device *xe)
> * Fill the dram structure to get the system dram info. This will be
> * used for memory latency calculation.
> */
> - err = intel_dram_detect(xe);
> + err = intel_dram_detect(display);
> if (err)
> goto err_opregion;
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH v2 05/13] drm/i915/dram: convert to struct intel_display
2025-11-20 8:31 ` Jani Nikula
@ 2025-11-20 13:59 ` Ville Syrjälä
0 siblings, 0 replies; 30+ messages in thread
From: Ville Syrjälä @ 2025-11-20 13:59 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Thu, Nov 20, 2025 at 10:31:06AM +0200, Jani Nikula wrote:
> On Wed, 19 Nov 2025, Jani Nikula <jani.nikula@intel.com> wrote:
> > Convert everything except uncore access to struct intel_display.
> >
> > While at it, convert logging to drm_dbg_kms().
> >
> > Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +-
> > .../drm/i915/display/intel_display_power.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_dram.c | 205 +++++++++---------
> > drivers/gpu/drm/i915/display/intel_dram.h | 11 +-
> > drivers/gpu/drm/i915/display/skl_watermark.c | 4 +-
> > drivers/gpu/drm/i915/i915_driver.c | 2 +-
> > drivers/gpu/drm/xe/display/xe_display.c | 2 +-
> > 9 files changed, 120 insertions(+), 114 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> > index 27e2d73bc505..167277cd8877 100644
> > --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> > +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> > @@ -90,7 +90,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
> >
> > static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
> > {
> > - const struct dram_info *dram_info = intel_dram_info(display->drm);
> > + const struct dram_info *dram_info = intel_dram_info(display);
> > bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
> > int i;
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> > index 957c90e62569..d27835ed49c2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_bw.c
> > +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> > @@ -799,7 +799,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
> >
> > void intel_bw_init_hw(struct intel_display *display)
> > {
> > - const struct dram_info *dram_info = intel_dram_info(display->drm);
> > + const struct dram_info *dram_info = intel_dram_info(display);
> >
> > if (!HAS_DISPLAY(display))
> > return;
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index 531819391c8c..5c90e53b4e46 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -3737,10 +3737,8 @@ static int pch_rawclk(struct intel_display *display)
> >
> > static int i9xx_hrawclk(struct intel_display *display)
> > {
> > - struct drm_i915_private *i915 = to_i915(display->drm);
> > -
> > /* hrawclock is 1/4 the FSB frequency */
> > - return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
> > + return DIV_ROUND_CLOSEST(intel_fsb_freq(display), 4);
> > }
> >
> > /**
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> > index 9c5f0277d8c2..08db9bbbfcb1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> > @@ -1616,7 +1616,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
> >
> > static void tgl_bw_buddy_init(struct intel_display *display)
> > {
> > - const struct dram_info *dram_info = intel_dram_info(display->drm);
> > + const struct dram_info *dram_info = intel_dram_info(display);
> > const struct buddy_page_mask *table;
> > unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask;
> > int config, i;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
> > index 7142772f2a6e..3dfcc7938740 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dram.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dram.c
> > @@ -56,14 +56,17 @@ const char *intel_dram_type_str(enum intel_dram_type type)
> >
> > #undef DRAM_TYPE_STR
> >
> > -static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
> > +static enum intel_dram_type pnv_dram_type(struct intel_display *display)
> > {
> > + struct drm_i915_private *i915 = to_i915(display->drm);
> > +
> > return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
> > INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
> > }
> >
> > -static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
> > +static unsigned int pnv_mem_freq(struct intel_display *display)
> > {
> > + struct drm_i915_private *dev_priv = to_i915(display->drm);
> > u32 tmp;
> >
> > tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG);
> > @@ -80,8 +83,9 @@ static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
> > return 0;
> > }
> >
> > -static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
> > +static unsigned int ilk_mem_freq(struct intel_display *display)
> > {
> > + struct drm_i915_private *dev_priv = to_i915(display->drm);
> > u16 ddrpll;
> >
> > ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1);
> > @@ -95,19 +99,19 @@ static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
> > case 0x18:
> > return 1600000;
> > default:
> > - drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n",
> > - ddrpll & 0xff);
> > + drm_dbg_kms(display->drm, "unknown memory frequency 0x%02x\n",
> > + ddrpll & 0xff);
> > return 0;
> > }
> > }
> >
> > -static unsigned int chv_mem_freq(struct drm_i915_private *i915)
> > +static unsigned int chv_mem_freq(struct intel_display *display)
> > {
> > u32 val;
> >
> > - vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_CCK));
> > - val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
> > - vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_CCK));
> > + vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_CCK));
> > + val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
> > + vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_CCK));
> >
> > switch ((val >> 2) & 0x7) {
> > case 3:
> > @@ -117,13 +121,13 @@ static unsigned int chv_mem_freq(struct drm_i915_private *i915)
> > }
> > }
> >
> > -static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
> > +static unsigned int vlv_mem_freq(struct intel_display *display)
> > {
> > u32 val;
> >
> > - vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
> > - val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
> > - vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
> > + vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_PUNIT));
> > + val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
> > + vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_PUNIT));
> >
> > switch ((val >> 6) & 3) {
> > case 0:
> > @@ -138,22 +142,23 @@ static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
> > return 0;
> > }
> >
> > -unsigned int intel_mem_freq(struct drm_i915_private *i915)
> > +unsigned int intel_mem_freq(struct intel_display *display)
> > {
> > - if (IS_PINEVIEW(i915))
> > - return pnv_mem_freq(i915);
> > - else if (GRAPHICS_VER(i915) == 5)
> > - return ilk_mem_freq(i915);
> > - else if (IS_CHERRYVIEW(i915))
> > - return chv_mem_freq(i915);
> > - else if (IS_VALLEYVIEW(i915))
> > - return vlv_mem_freq(i915);
> > + if (display->platform.pineview)
> > + return pnv_mem_freq(display);
> > + else if (DISPLAY_VER(display) == 5)
> > + return ilk_mem_freq(display);
> > + else if (display->platform.cherryview)
> > + return chv_mem_freq(display);
> > + else if (display->platform.valleyview)
> > + return vlv_mem_freq(display);
> > else
> > return 0;
> > }
> >
> > -static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> > +static unsigned int i9xx_fsb_freq(struct intel_display *display)
> > {
> > + struct drm_i915_private *i915 = to_i915(display->drm);
> > u32 fsb;
> >
> > /*
> > @@ -166,7 +171,7 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> > */
> > fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
> >
> > - if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
> > + if (display->platform.pineview || display->platform.mobile) {
> > switch (fsb) {
> > case CLKCFG_FSB_400:
> > return 400000;
> > @@ -207,8 +212,9 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
> > }
> > }
> >
> > -static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
> > +static unsigned int ilk_fsb_freq(struct intel_display *display)
> > {
> > + struct drm_i915_private *dev_priv = to_i915(display->drm);
> > u16 fsb;
> >
> > fsb = intel_uncore_read16(&dev_priv->uncore, CSIPLL0) & 0x3ff;
> > @@ -229,33 +235,33 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
> > case 0x018:
> > return 6400000;
> > default:
> > - drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", fsb);
> > + drm_dbg_kms(display->drm, "unknown fsb frequency 0x%04x\n", fsb);
> > return 0;
> > }
> > }
> >
> > -unsigned int intel_fsb_freq(struct drm_i915_private *i915)
> > +unsigned int intel_fsb_freq(struct intel_display *display)
> > {
> > - if (GRAPHICS_VER(i915) == 5)
> > - return ilk_fsb_freq(i915);
> > - else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
> > - return i9xx_fsb_freq(i915);
> > + if (DISPLAY_VER(display) == 5)
> > + return ilk_fsb_freq(display);
> > + else if (IS_DISPLAY_VER(display, 3, 4))
> > + return i9xx_fsb_freq(display);
> > else
> > return 0;
> > }
> >
> > -static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> > {
> > - dram_info->fsb_freq = intel_fsb_freq(i915);
> > + dram_info->fsb_freq = intel_fsb_freq(display);
> > if (dram_info->fsb_freq)
> > - drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
> > + drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
> >
> > - dram_info->mem_freq = intel_mem_freq(i915);
> > + dram_info->mem_freq = intel_mem_freq(display);
> > if (dram_info->mem_freq)
> > - drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
> > + drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
> >
> > - if (IS_PINEVIEW(i915))
> > - dram_info->type = pnv_dram_type(i915);
> > + if (display->platform.pineview)
> > + dram_info->type = pnv_dram_type(display);
> >
> > return 0;
> > }
> > @@ -391,22 +397,22 @@ skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
> > }
> >
> > static void
> > -skl_dram_print_dimm_info(struct drm_i915_private *i915,
> > +skl_dram_print_dimm_info(struct intel_display *display,
> > struct dram_dimm_info *dimm,
> > int channel, char dimm_name)
> > {
> > - drm_dbg_kms(&i915->drm,
> > + drm_dbg_kms(display->drm,
> > "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
> > channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
> > str_yes_no(skl_is_16gb_dimm(dimm)));
> > }
> >
> > static void
> > -skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
> > +skl_dram_get_dimm_l_info(struct intel_display *display,
> > struct dram_dimm_info *dimm,
> > int channel, u32 val)
> > {
> > - if (GRAPHICS_VER(i915) >= 11) {
> > + if (DISPLAY_VER(display) >= 11) {
> > dimm->size = icl_get_dimm_l_size(val);
> > dimm->width = icl_get_dimm_l_width(val);
> > dimm->ranks = icl_get_dimm_l_ranks(val);
> > @@ -416,15 +422,15 @@ skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
> > dimm->ranks = skl_get_dimm_l_ranks(val);
> > }
> >
> > - skl_dram_print_dimm_info(i915, dimm, channel, 'L');
> > + skl_dram_print_dimm_info(display, dimm, channel, 'L');
> > }
> >
> > static void
> > -skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
> > +skl_dram_get_dimm_s_info(struct intel_display *display,
> > struct dram_dimm_info *dimm,
> > int channel, u32 val)
> > {
> > - if (GRAPHICS_VER(i915) >= 11) {
> > + if (DISPLAY_VER(display) >= 11) {
> > dimm->size = icl_get_dimm_s_size(val);
> > dimm->width = icl_get_dimm_s_width(val);
> > dimm->ranks = icl_get_dimm_s_ranks(val);
> > @@ -434,19 +440,19 @@ skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
> > dimm->ranks = skl_get_dimm_s_ranks(val);
> > }
> >
> > - skl_dram_print_dimm_info(i915, dimm, channel, 'S');
> > + skl_dram_print_dimm_info(display, dimm, channel, 'S');
> > }
> >
> > static int
> > -skl_dram_get_channel_info(struct drm_i915_private *i915,
> > +skl_dram_get_channel_info(struct intel_display *display,
> > struct dram_channel_info *ch,
> > int channel, u32 val)
> > {
> > - skl_dram_get_dimm_l_info(i915, &ch->dimm_l, channel, val);
> > - skl_dram_get_dimm_s_info(i915, &ch->dimm_s, channel, val);
> > + skl_dram_get_dimm_l_info(display, &ch->dimm_l, channel, val);
> > + skl_dram_get_dimm_s_info(display, &ch->dimm_s, channel, val);
> >
> > if (ch->dimm_l.size == 0 && ch->dimm_s.size == 0) {
> > - drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);
> > + drm_dbg_kms(display->drm, "CH%u not populated\n", channel);
> > return -EINVAL;
> > }
> >
> > @@ -460,7 +466,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
> > ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
> > skl_is_16gb_dimm(&ch->dimm_s);
> >
> > - drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
> > + drm_dbg_kms(display->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
> > channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
> >
> > return 0;
> > @@ -476,8 +482,9 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
> > }
> >
> > static int
> > -skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
> > {
> > + struct drm_i915_private *i915 = to_i915(display->drm);
> > struct dram_channel_info ch0 = {}, ch1 = {};
> > u32 val;
> > int ret;
> > @@ -487,23 +494,23 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
> >
> > val = intel_uncore_read(&i915->uncore,
> > SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
> > - ret = skl_dram_get_channel_info(i915, &ch0, 0, val);
> > + ret = skl_dram_get_channel_info(display, &ch0, 0, val);
> > if (ret == 0)
> > dram_info->num_channels++;
> >
> > val = intel_uncore_read(&i915->uncore,
> > SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
> > - ret = skl_dram_get_channel_info(i915, &ch1, 1, val);
> > + ret = skl_dram_get_channel_info(display, &ch1, 1, val);
> > if (ret == 0)
> > dram_info->num_channels++;
> >
> > if (dram_info->num_channels == 0) {
> > - drm_info(&i915->drm, "Number of memory channels is zero\n");
> > + drm_info(display->drm, "Number of memory channels is zero\n");
> > return -EINVAL;
> > }
> >
> > if (ch0.ranks == 0 && ch1.ranks == 0) {
> > - drm_info(&i915->drm, "couldn't get memory rank information\n");
> > + drm_info(display->drm, "couldn't get memory rank information\n");
> > return -EINVAL;
> > }
> >
> > @@ -511,18 +518,19 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
> >
> > dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);
> >
> > - drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
> > + drm_dbg_kms(display->drm, "Memory configuration is symmetric? %s\n",
> > str_yes_no(dram_info->symmetric_memory));
> >
> > - drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
> > + drm_dbg_kms(display->drm, "16Gb+ DIMMs: %s\n",
> > str_yes_no(dram_info->has_16gb_dimms));
> >
> > return 0;
> > }
> >
> > static enum intel_dram_type
> > -skl_get_dram_type(struct drm_i915_private *i915)
> > +skl_get_dram_type(struct intel_display *display)
> > {
> > + struct drm_i915_private *i915 = to_i915(display->drm);
> > u32 val;
> >
> > val = intel_uncore_read(&i915->uncore,
> > @@ -544,13 +552,13 @@ skl_get_dram_type(struct drm_i915_private *i915)
> > }
> >
> > static int
> > -skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> > {
> > int ret;
> >
> > - dram_info->type = skl_get_dram_type(i915);
> > + dram_info->type = skl_get_dram_type(display);
> >
> > - ret = skl_dram_get_channels_info(i915, dram_info);
> > + ret = skl_dram_get_channels_info(display, dram_info);
> > if (ret)
> > return ret;
> >
> > @@ -635,8 +643,9 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
> > dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm);
> > }
> >
> > -static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> > {
> > + struct drm_i915_private *i915 = to_i915(display->drm);
> > u32 val;
> > u8 valid_ranks = 0;
> > int i;
> > @@ -657,11 +666,11 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
> > bxt_get_dimm_info(&dimm, val);
> > type = bxt_get_dimm_type(val);
> >
> > - drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&
> > + drm_WARN_ON(display->drm, type != INTEL_DRAM_UNKNOWN &&
> > dram_info->type != INTEL_DRAM_UNKNOWN &&
> > dram_info->type != type);
> >
> > - drm_dbg_kms(&i915->drm,
> > + drm_dbg_kms(display->drm,
> > "CH%u DIMM size: %u Gb, width: X%u, ranks: %u\n",
> > i - BXT_D_CR_DRP0_DUNIT_START,
> > dimm.size, dimm.width, dimm.ranks);
> > @@ -674,25 +683,25 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
> > }
> >
> > if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {
> > - drm_info(&i915->drm, "couldn't get memory information\n");
> > + drm_info(display->drm, "couldn't get memory information\n");
> > return -EINVAL;
> > }
> >
> > return 0;
> > }
> >
> > -static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
> > +static int icl_pcode_read_mem_global_info(struct intel_display *display,
> > struct dram_info *dram_info)
> > {
> > u32 val = 0;
> > int ret;
> >
> > - ret = intel_pcode_read(&dev_priv->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> > + ret = intel_pcode_read(display->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
> > ICL_PCODE_MEM_SS_READ_GLOBAL_INFO, &val, NULL);
> > if (ret)
> > return ret;
> >
> > - if (GRAPHICS_VER(dev_priv) == 12) {
> > + if (DISPLAY_VER(display) == 12) {
>
> CI tells me this goes south on e.g. ADL-P (or TWL) which has graphics
> version 12 but display version 13.
>
> What to do.
You can just check for >=12 here.
>
>
> BR,
> Jani.
>
> > switch (val & 0xf) {
> > case 0:
> > dram_info->type = INTEL_DRAM_DDR4;
> > @@ -743,25 +752,25 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
> > return 0;
> > }
> >
> > -static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> > {
> > int ret;
> >
> > - ret = skl_dram_get_channels_info(i915, dram_info);
> > + ret = skl_dram_get_channels_info(display, dram_info);
> > if (ret)
> > return ret;
> >
> > - return icl_pcode_read_mem_global_info(i915, dram_info);
> > + return icl_pcode_read_mem_global_info(display, dram_info);
> > }
> >
> > -static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> > {
> > - return icl_pcode_read_mem_global_info(i915, dram_info);
> > + return icl_pcode_read_mem_global_info(display, dram_info);
> > }
> >
> > -static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
> > +static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
> > {
> > - struct intel_display *display = i915->display;
> > + struct drm_i915_private *i915 = to_i915(display->drm);
> > u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL);
> >
> > switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
> > @@ -784,11 +793,11 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
> > dram_info->type = INTEL_DRAM_LPDDR3;
> > break;
> > case 8:
> > - drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> > + drm_WARN_ON(display->drm, !display->platform.dgfx);
> > dram_info->type = INTEL_DRAM_GDDR;
> > break;
> > case 9:
> > - drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> > + drm_WARN_ON(display->drm, !display->platform.dgfx);
> > dram_info->type = INTEL_DRAM_GDDR_ECC;
> > break;
> > default:
> > @@ -806,41 +815,41 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
> > return 0;
> > }
> >
> > -int intel_dram_detect(struct drm_i915_private *i915)
> > +int intel_dram_detect(struct intel_display *display)
> > {
> > - struct intel_display *display = i915->display;
> > + struct drm_i915_private *i915 = to_i915(display->drm);
> > struct dram_info *dram_info;
> > int ret;
> >
> > - if (IS_DG2(i915) || !intel_display_device_present(display))
> > + if (display->platform.dg2 || !HAS_DISPLAY(display))
> > return 0;
> >
> > - dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
> > + dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);
> > if (!dram_info)
> > return -ENOMEM;
> >
> > i915->dram_info = dram_info;
> >
> > if (DISPLAY_VER(display) >= 14)
> > - ret = xelpdp_get_dram_info(i915, dram_info);
> > - else if (GRAPHICS_VER(i915) >= 12)
> > - ret = gen12_get_dram_info(i915, dram_info);
> > - else if (GRAPHICS_VER(i915) >= 11)
> > - ret = gen11_get_dram_info(i915, dram_info);
> > - else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
> > - ret = bxt_get_dram_info(i915, dram_info);
> > - else if (GRAPHICS_VER(i915) >= 9)
> > - ret = skl_get_dram_info(i915, dram_info);
> > + ret = xelpdp_get_dram_info(display, dram_info);
> > + else if (DISPLAY_VER(display) >= 12)
> > + ret = gen12_get_dram_info(display, dram_info);
> > + else if (DISPLAY_VER(display) >= 11)
> > + ret = gen11_get_dram_info(display, dram_info);
> > + else if (display->platform.broxton || display->platform.geminilake)
> > + ret = bxt_get_dram_info(display, dram_info);
> > + else if (DISPLAY_VER(display) >= 9)
> > + ret = skl_get_dram_info(display, dram_info);
> > else
> > - ret = i915_get_dram_info(i915, dram_info);
> > + ret = i915_get_dram_info(display, dram_info);
> >
> > - drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
> > + drm_dbg_kms(display->drm, "DRAM type: %s\n",
> > intel_dram_type_str(dram_info->type));
> >
> > - drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
> > + drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);
> >
> > - drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
> > - drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
> > + drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
> > + drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
> >
> > /* TODO: Do we want to abort probe on dram detection failures? */
> > if (ret)
> > @@ -854,9 +863,9 @@ int intel_dram_detect(struct drm_i915_private *i915)
> > * checks, and prefer not dereferencing on platforms that shouldn't look at dram
> > * info, to catch accidental and incorrect dram info checks.
> > */
> > -const struct dram_info *intel_dram_info(struct drm_device *drm)
> > +const struct dram_info *intel_dram_info(struct intel_display *display)
> > {
> > - struct drm_i915_private *i915 = to_i915(drm);
> > + struct drm_i915_private *i915 = to_i915(display->drm);
> >
> > return i915->dram_info;
> > }
> > diff --git a/drivers/gpu/drm/i915/display/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
> > index 58aaf2f91afe..5800b7b4e614 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dram.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dram.h
> > @@ -8,8 +8,7 @@
> >
> > #include <linux/types.h>
> >
> > -struct drm_i915_private;
> > -struct drm_device;
> > +struct intel_display;
> >
> > struct dram_info {
> > enum intel_dram_type {
> > @@ -35,10 +34,10 @@ struct dram_info {
> > bool has_16gb_dimms;
> > };
> >
> > -int intel_dram_detect(struct drm_i915_private *i915);
> > -unsigned int intel_fsb_freq(struct drm_i915_private *i915);
> > -unsigned int intel_mem_freq(struct drm_i915_private *i915);
> > -const struct dram_info *intel_dram_info(struct drm_device *drm);
> > +int intel_dram_detect(struct intel_display *display);
> > +unsigned int intel_fsb_freq(struct intel_display *display);
> > +unsigned int intel_mem_freq(struct intel_display *display);
> > +const struct dram_info *intel_dram_info(struct intel_display *display);
> > const char *intel_dram_type_str(enum intel_dram_type type);
> >
> > #endif /* __INTEL_DRAM_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> > index a33e0cec8cba..7964cfffdaae 100644
> > --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> > @@ -3125,7 +3125,7 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display)
> > if (display->platform.kabylake ||
> > display->platform.coffeelake ||
> > display->platform.cometlake) {
> > - const struct dram_info *dram_info = intel_dram_info(display->drm);
> > + const struct dram_info *dram_info = intel_dram_info(display);
> >
> > return dram_info->symmetric_memory;
> > }
> > @@ -3169,7 +3169,7 @@ static void increase_wm_latency(struct intel_display *display, int inc)
> >
> > static bool need_16gb_dimm_wa(struct intel_display *display)
> > {
> > - const struct dram_info *dram_info = intel_dram_info(display->drm);
> > + const struct dram_info *dram_info = intel_dram_info(display);
> >
> > return (display->platform.skylake || display->platform.kabylake ||
> > display->platform.coffeelake || display->platform.cometlake ||
> > diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> > index d1f573f1b6cc..2369e2b55096 100644
> > --- a/drivers/gpu/drm/i915/i915_driver.c
> > +++ b/drivers/gpu/drm/i915/i915_driver.c
> > @@ -574,7 +574,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
> > * Fill the dram structure to get the system dram info. This will be
> > * used for memory latency calculation.
> > */
> > - ret = intel_dram_detect(dev_priv);
> > + ret = intel_dram_detect(display);
> > if (ret)
> > goto err_opregion;
> >
> > diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
> > index 9b1d21e03df0..793115077615 100644
> > --- a/drivers/gpu/drm/xe/display/xe_display.c
> > +++ b/drivers/gpu/drm/xe/display/xe_display.c
> > @@ -122,7 +122,7 @@ int xe_display_init_early(struct xe_device *xe)
> > * Fill the dram structure to get the system dram info. This will be
> > * used for memory latency calculation.
> > */
> > - err = intel_dram_detect(xe);
> > + err = intel_dram_detect(display);
> > if (err)
> > goto err_opregion;
>
> --
> Jani Nikula, Intel
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 30+ messages in thread
* [PATCH v3] drm/i915/dram: convert to struct intel_display
2025-11-19 18:52 ` [PATCH v2 05/13] drm/i915/dram: convert to struct intel_display Jani Nikula
2025-11-20 8:31 ` Jani Nikula
@ 2025-11-20 16:18 ` Jani Nikula
1 sibling, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-20 16:18 UTC (permalink / raw)
To: Jani Nikula, intel-gfx, intel-xe
Convert everything except uncore access to struct
intel_display. Converting the graphics version checks to display version
checks needs a tweak for display version 13, which have graphics version
12.
While at it, convert logging to drm_dbg_kms().
v2: Handle display version 13
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
drivers/gpu/drm/i915/display/intel_bw.c | 2 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +-
.../drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/display/intel_dram.c | 205 +++++++++---------
drivers/gpu/drm/i915/display/intel_dram.h | 11 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 4 +-
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/xe/display/xe_display.c | 2 +-
9 files changed, 120 insertions(+), 114 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 27e2d73bc505..167277cd8877 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -90,7 +90,7 @@ static const struct cxsr_latency cxsr_latency_table[] = {
static const struct cxsr_latency *pnv_get_cxsr_latency(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
bool is_ddr3 = dram_info->type == INTEL_DRAM_DDR3;
int i;
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 957c90e62569..d27835ed49c2 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -799,7 +799,7 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
void intel_bw_init_hw(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
if (!HAS_DISPLAY(display))
return;
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 531819391c8c..5c90e53b4e46 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3737,10 +3737,8 @@ static int pch_rawclk(struct intel_display *display)
static int i9xx_hrawclk(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
/* hrawclock is 1/4 the FSB frequency */
- return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
+ return DIV_ROUND_CLOSEST(intel_fsb_freq(display), 4);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 9c5f0277d8c2..08db9bbbfcb1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1616,7 +1616,7 @@ static const struct buddy_page_mask wa_1409767108_buddy_page_masks[] = {
static void tgl_bw_buddy_init(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
const struct buddy_page_mask *table;
unsigned long abox_mask = DISPLAY_INFO(display)->abox_mask;
int config, i;
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index 7142772f2a6e..b4fa1fe8709c 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -56,14 +56,17 @@ const char *intel_dram_type_str(enum intel_dram_type type)
#undef DRAM_TYPE_STR
-static enum intel_dram_type pnv_dram_type(struct drm_i915_private *i915)
+static enum intel_dram_type pnv_dram_type(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
+
return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
}
-static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
+static unsigned int pnv_mem_freq(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u32 tmp;
tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG);
@@ -80,8 +83,9 @@ static unsigned int pnv_mem_freq(struct drm_i915_private *dev_priv)
return 0;
}
-static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
+static unsigned int ilk_mem_freq(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u16 ddrpll;
ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1);
@@ -95,19 +99,19 @@ static unsigned int ilk_mem_freq(struct drm_i915_private *dev_priv)
case 0x18:
return 1600000;
default:
- drm_dbg(&dev_priv->drm, "unknown memory frequency 0x%02x\n",
- ddrpll & 0xff);
+ drm_dbg_kms(display->drm, "unknown memory frequency 0x%02x\n",
+ ddrpll & 0xff);
return 0;
}
}
-static unsigned int chv_mem_freq(struct drm_i915_private *i915)
+static unsigned int chv_mem_freq(struct intel_display *display)
{
u32 val;
- vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_CCK));
- val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
- vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_CCK));
+ vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_CCK));
+ val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_CCK, CCK_FUSE_REG);
+ vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_CCK));
switch ((val >> 2) & 0x7) {
case 3:
@@ -117,13 +121,13 @@ static unsigned int chv_mem_freq(struct drm_i915_private *i915)
}
}
-static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
+static unsigned int vlv_mem_freq(struct intel_display *display)
{
u32 val;
- vlv_iosf_sb_get(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
- val = vlv_iosf_sb_read(&i915->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
- vlv_iosf_sb_put(&i915->drm, BIT(VLV_IOSF_SB_PUNIT));
+ vlv_iosf_sb_get(display->drm, BIT(VLV_IOSF_SB_PUNIT));
+ val = vlv_iosf_sb_read(display->drm, VLV_IOSF_SB_PUNIT, PUNIT_REG_GPU_FREQ_STS);
+ vlv_iosf_sb_put(display->drm, BIT(VLV_IOSF_SB_PUNIT));
switch ((val >> 6) & 3) {
case 0:
@@ -138,22 +142,23 @@ static unsigned int vlv_mem_freq(struct drm_i915_private *i915)
return 0;
}
-unsigned int intel_mem_freq(struct drm_i915_private *i915)
+unsigned int intel_mem_freq(struct intel_display *display)
{
- if (IS_PINEVIEW(i915))
- return pnv_mem_freq(i915);
- else if (GRAPHICS_VER(i915) == 5)
- return ilk_mem_freq(i915);
- else if (IS_CHERRYVIEW(i915))
- return chv_mem_freq(i915);
- else if (IS_VALLEYVIEW(i915))
- return vlv_mem_freq(i915);
+ if (display->platform.pineview)
+ return pnv_mem_freq(display);
+ else if (DISPLAY_VER(display) == 5)
+ return ilk_mem_freq(display);
+ else if (display->platform.cherryview)
+ return chv_mem_freq(display);
+ else if (display->platform.valleyview)
+ return vlv_mem_freq(display);
else
return 0;
}
-static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
+static unsigned int i9xx_fsb_freq(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 fsb;
/*
@@ -166,7 +171,7 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
*/
fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK;
- if (IS_PINEVIEW(i915) || IS_MOBILE(i915)) {
+ if (display->platform.pineview || display->platform.mobile) {
switch (fsb) {
case CLKCFG_FSB_400:
return 400000;
@@ -207,8 +212,9 @@ static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
}
}
-static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
+static unsigned int ilk_fsb_freq(struct intel_display *display)
{
+ struct drm_i915_private *dev_priv = to_i915(display->drm);
u16 fsb;
fsb = intel_uncore_read16(&dev_priv->uncore, CSIPLL0) & 0x3ff;
@@ -229,33 +235,33 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
case 0x018:
return 6400000;
default:
- drm_dbg(&dev_priv->drm, "unknown fsb frequency 0x%04x\n", fsb);
+ drm_dbg_kms(display->drm, "unknown fsb frequency 0x%04x\n", fsb);
return 0;
}
}
-unsigned int intel_fsb_freq(struct drm_i915_private *i915)
+unsigned int intel_fsb_freq(struct intel_display *display)
{
- if (GRAPHICS_VER(i915) == 5)
- return ilk_fsb_freq(i915);
- else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
- return i9xx_fsb_freq(i915);
+ if (DISPLAY_VER(display) == 5)
+ return ilk_fsb_freq(display);
+ else if (IS_DISPLAY_VER(display, 3, 4))
+ return i9xx_fsb_freq(display);
else
return 0;
}
-static int i915_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int i915_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- dram_info->fsb_freq = intel_fsb_freq(i915);
+ dram_info->fsb_freq = intel_fsb_freq(display);
if (dram_info->fsb_freq)
- drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
+ drm_dbg_kms(display->drm, "FSB frequency: %d kHz\n", dram_info->fsb_freq);
- dram_info->mem_freq = intel_mem_freq(i915);
+ dram_info->mem_freq = intel_mem_freq(display);
if (dram_info->mem_freq)
- drm_dbg(&i915->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
+ drm_dbg_kms(display->drm, "DDR speed: %d kHz\n", dram_info->mem_freq);
- if (IS_PINEVIEW(i915))
- dram_info->type = pnv_dram_type(i915);
+ if (display->platform.pineview)
+ dram_info->type = pnv_dram_type(display);
return 0;
}
@@ -391,22 +397,22 @@ skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
}
static void
-skl_dram_print_dimm_info(struct drm_i915_private *i915,
+skl_dram_print_dimm_info(struct intel_display *display,
struct dram_dimm_info *dimm,
int channel, char dimm_name)
{
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
str_yes_no(skl_is_16gb_dimm(dimm)));
}
static void
-skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
+skl_dram_get_dimm_l_info(struct intel_display *display,
struct dram_dimm_info *dimm,
int channel, u32 val)
{
- if (GRAPHICS_VER(i915) >= 11) {
+ if (DISPLAY_VER(display) >= 11) {
dimm->size = icl_get_dimm_l_size(val);
dimm->width = icl_get_dimm_l_width(val);
dimm->ranks = icl_get_dimm_l_ranks(val);
@@ -416,15 +422,15 @@ skl_dram_get_dimm_l_info(struct drm_i915_private *i915,
dimm->ranks = skl_get_dimm_l_ranks(val);
}
- skl_dram_print_dimm_info(i915, dimm, channel, 'L');
+ skl_dram_print_dimm_info(display, dimm, channel, 'L');
}
static void
-skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
+skl_dram_get_dimm_s_info(struct intel_display *display,
struct dram_dimm_info *dimm,
int channel, u32 val)
{
- if (GRAPHICS_VER(i915) >= 11) {
+ if (DISPLAY_VER(display) >= 11) {
dimm->size = icl_get_dimm_s_size(val);
dimm->width = icl_get_dimm_s_width(val);
dimm->ranks = icl_get_dimm_s_ranks(val);
@@ -434,19 +440,19 @@ skl_dram_get_dimm_s_info(struct drm_i915_private *i915,
dimm->ranks = skl_get_dimm_s_ranks(val);
}
- skl_dram_print_dimm_info(i915, dimm, channel, 'S');
+ skl_dram_print_dimm_info(display, dimm, channel, 'S');
}
static int
-skl_dram_get_channel_info(struct drm_i915_private *i915,
+skl_dram_get_channel_info(struct intel_display *display,
struct dram_channel_info *ch,
int channel, u32 val)
{
- skl_dram_get_dimm_l_info(i915, &ch->dimm_l, channel, val);
- skl_dram_get_dimm_s_info(i915, &ch->dimm_s, channel, val);
+ skl_dram_get_dimm_l_info(display, &ch->dimm_l, channel, val);
+ skl_dram_get_dimm_s_info(display, &ch->dimm_s, channel, val);
if (ch->dimm_l.size == 0 && ch->dimm_s.size == 0) {
- drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel);
+ drm_dbg_kms(display->drm, "CH%u not populated\n", channel);
return -EINVAL;
}
@@ -460,7 +466,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
skl_is_16gb_dimm(&ch->dimm_s);
- drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
+ drm_dbg_kms(display->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
return 0;
@@ -476,8 +482,9 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
}
static int
-skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
struct dram_channel_info ch0 = {}, ch1 = {};
u32 val;
int ret;
@@ -487,23 +494,23 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
val = intel_uncore_read(&i915->uncore,
SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
- ret = skl_dram_get_channel_info(i915, &ch0, 0, val);
+ ret = skl_dram_get_channel_info(display, &ch0, 0, val);
if (ret == 0)
dram_info->num_channels++;
val = intel_uncore_read(&i915->uncore,
SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
- ret = skl_dram_get_channel_info(i915, &ch1, 1, val);
+ ret = skl_dram_get_channel_info(display, &ch1, 1, val);
if (ret == 0)
dram_info->num_channels++;
if (dram_info->num_channels == 0) {
- drm_info(&i915->drm, "Number of memory channels is zero\n");
+ drm_info(display->drm, "Number of memory channels is zero\n");
return -EINVAL;
}
if (ch0.ranks == 0 && ch1.ranks == 0) {
- drm_info(&i915->drm, "couldn't get memory rank information\n");
+ drm_info(display->drm, "couldn't get memory rank information\n");
return -EINVAL;
}
@@ -511,18 +518,19 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1);
- drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
+ drm_dbg_kms(display->drm, "Memory configuration is symmetric? %s\n",
str_yes_no(dram_info->symmetric_memory));
- drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
+ drm_dbg_kms(display->drm, "16Gb+ DIMMs: %s\n",
str_yes_no(dram_info->has_16gb_dimms));
return 0;
}
static enum intel_dram_type
-skl_get_dram_type(struct drm_i915_private *i915)
+skl_get_dram_type(struct intel_display *display)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 val;
val = intel_uncore_read(&i915->uncore,
@@ -544,13 +552,13 @@ skl_get_dram_type(struct drm_i915_private *i915)
}
static int
-skl_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+skl_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
int ret;
- dram_info->type = skl_get_dram_type(i915);
+ dram_info->type = skl_get_dram_type(display);
- ret = skl_dram_get_channels_info(i915, dram_info);
+ ret = skl_dram_get_channels_info(display, dram_info);
if (ret)
return ret;
@@ -635,8 +643,9 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm);
}
-static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 val;
u8 valid_ranks = 0;
int i;
@@ -657,11 +666,11 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
bxt_get_dimm_info(&dimm, val);
type = bxt_get_dimm_type(val);
- drm_WARN_ON(&i915->drm, type != INTEL_DRAM_UNKNOWN &&
+ drm_WARN_ON(display->drm, type != INTEL_DRAM_UNKNOWN &&
dram_info->type != INTEL_DRAM_UNKNOWN &&
dram_info->type != type);
- drm_dbg_kms(&i915->drm,
+ drm_dbg_kms(display->drm,
"CH%u DIMM size: %u Gb, width: X%u, ranks: %u\n",
i - BXT_D_CR_DRP0_DUNIT_START,
dimm.size, dimm.width, dimm.ranks);
@@ -674,25 +683,25 @@ static int bxt_get_dram_info(struct drm_i915_private *i915, struct dram_info *dr
}
if (dram_info->type == INTEL_DRAM_UNKNOWN || valid_ranks == 0) {
- drm_info(&i915->drm, "couldn't get memory information\n");
+ drm_info(display->drm, "couldn't get memory information\n");
return -EINVAL;
}
return 0;
}
-static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
+static int icl_pcode_read_mem_global_info(struct intel_display *display,
struct dram_info *dram_info)
{
u32 val = 0;
int ret;
- ret = intel_pcode_read(&dev_priv->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
+ ret = intel_pcode_read(display->drm, ICL_PCODE_MEM_SUBSYSYSTEM_INFO |
ICL_PCODE_MEM_SS_READ_GLOBAL_INFO, &val, NULL);
if (ret)
return ret;
- if (GRAPHICS_VER(dev_priv) == 12) {
+ if (DISPLAY_VER(display) >= 12) {
switch (val & 0xf) {
case 0:
dram_info->type = INTEL_DRAM_DDR4;
@@ -743,25 +752,25 @@ static int icl_pcode_read_mem_global_info(struct drm_i915_private *dev_priv,
return 0;
}
-static int gen11_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int gen11_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
int ret;
- ret = skl_dram_get_channels_info(i915, dram_info);
+ ret = skl_dram_get_channels_info(display, dram_info);
if (ret)
return ret;
- return icl_pcode_read_mem_global_info(i915, dram_info);
+ return icl_pcode_read_mem_global_info(display, dram_info);
}
-static int gen12_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int gen12_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- return icl_pcode_read_mem_global_info(i915, dram_info);
+ return icl_pcode_read_mem_global_info(display, dram_info);
}
-static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info *dram_info)
+static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
{
- struct intel_display *display = i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL);
switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
@@ -784,11 +793,11 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
dram_info->type = INTEL_DRAM_LPDDR3;
break;
case 8:
- drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
+ drm_WARN_ON(display->drm, !display->platform.dgfx);
dram_info->type = INTEL_DRAM_GDDR;
break;
case 9:
- drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
+ drm_WARN_ON(display->drm, !display->platform.dgfx);
dram_info->type = INTEL_DRAM_GDDR_ECC;
break;
default:
@@ -806,41 +815,41 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915, struct dram_info
return 0;
}
-int intel_dram_detect(struct drm_i915_private *i915)
+int intel_dram_detect(struct intel_display *display)
{
- struct intel_display *display = i915->display;
+ struct drm_i915_private *i915 = to_i915(display->drm);
struct dram_info *dram_info;
int ret;
- if (IS_DG2(i915) || !intel_display_device_present(display))
+ if (display->platform.dg2 || !HAS_DISPLAY(display))
return 0;
- dram_info = drmm_kzalloc(&i915->drm, sizeof(*dram_info), GFP_KERNEL);
+ dram_info = drmm_kzalloc(display->drm, sizeof(*dram_info), GFP_KERNEL);
if (!dram_info)
return -ENOMEM;
i915->dram_info = dram_info;
if (DISPLAY_VER(display) >= 14)
- ret = xelpdp_get_dram_info(i915, dram_info);
- else if (GRAPHICS_VER(i915) >= 12)
- ret = gen12_get_dram_info(i915, dram_info);
- else if (GRAPHICS_VER(i915) >= 11)
- ret = gen11_get_dram_info(i915, dram_info);
- else if (IS_BROXTON(i915) || IS_GEMINILAKE(i915))
- ret = bxt_get_dram_info(i915, dram_info);
- else if (GRAPHICS_VER(i915) >= 9)
- ret = skl_get_dram_info(i915, dram_info);
+ ret = xelpdp_get_dram_info(display, dram_info);
+ else if (DISPLAY_VER(display) >= 12)
+ ret = gen12_get_dram_info(display, dram_info);
+ else if (DISPLAY_VER(display) >= 11)
+ ret = gen11_get_dram_info(display, dram_info);
+ else if (display->platform.broxton || display->platform.geminilake)
+ ret = bxt_get_dram_info(display, dram_info);
+ else if (DISPLAY_VER(display) >= 9)
+ ret = skl_get_dram_info(display, dram_info);
else
- ret = i915_get_dram_info(i915, dram_info);
+ ret = i915_get_dram_info(display, dram_info);
- drm_dbg_kms(&i915->drm, "DRAM type: %s\n",
+ drm_dbg_kms(display->drm, "DRAM type: %s\n",
intel_dram_type_str(dram_info->type));
- drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels);
+ drm_dbg_kms(display->drm, "DRAM channels: %u\n", dram_info->num_channels);
- drm_dbg_kms(&i915->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
- drm_dbg_kms(&i915->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
+ drm_dbg_kms(display->drm, "Num QGV points %u\n", dram_info->num_qgv_points);
+ drm_dbg_kms(display->drm, "Num PSF GV points %u\n", dram_info->num_psf_gv_points);
/* TODO: Do we want to abort probe on dram detection failures? */
if (ret)
@@ -854,9 +863,9 @@ int intel_dram_detect(struct drm_i915_private *i915)
* checks, and prefer not dereferencing on platforms that shouldn't look at dram
* info, to catch accidental and incorrect dram info checks.
*/
-const struct dram_info *intel_dram_info(struct drm_device *drm)
+const struct dram_info *intel_dram_info(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(drm);
+ struct drm_i915_private *i915 = to_i915(display->drm);
return i915->dram_info;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dram.h b/drivers/gpu/drm/i915/display/intel_dram.h
index 58aaf2f91afe..5800b7b4e614 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.h
+++ b/drivers/gpu/drm/i915/display/intel_dram.h
@@ -8,8 +8,7 @@
#include <linux/types.h>
-struct drm_i915_private;
-struct drm_device;
+struct intel_display;
struct dram_info {
enum intel_dram_type {
@@ -35,10 +34,10 @@ struct dram_info {
bool has_16gb_dimms;
};
-int intel_dram_detect(struct drm_i915_private *i915);
-unsigned int intel_fsb_freq(struct drm_i915_private *i915);
-unsigned int intel_mem_freq(struct drm_i915_private *i915);
-const struct dram_info *intel_dram_info(struct drm_device *drm);
+int intel_dram_detect(struct intel_display *display);
+unsigned int intel_fsb_freq(struct intel_display *display);
+unsigned int intel_mem_freq(struct intel_display *display);
+const struct dram_info *intel_dram_info(struct intel_display *display);
const char *intel_dram_type_str(enum intel_dram_type type);
#endif /* __INTEL_DRAM_H__ */
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index a33e0cec8cba..7964cfffdaae 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3125,7 +3125,7 @@ static bool skl_watermark_ipc_can_enable(struct intel_display *display)
if (display->platform.kabylake ||
display->platform.coffeelake ||
display->platform.cometlake) {
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
return dram_info->symmetric_memory;
}
@@ -3169,7 +3169,7 @@ static void increase_wm_latency(struct intel_display *display, int inc)
static bool need_16gb_dimm_wa(struct intel_display *display)
{
- const struct dram_info *dram_info = intel_dram_info(display->drm);
+ const struct dram_info *dram_info = intel_dram_info(display);
return (display->platform.skylake || display->platform.kabylake ||
display->platform.coffeelake || display->platform.cometlake ||
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index d1f573f1b6cc..2369e2b55096 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -574,7 +574,7 @@ static int i915_driver_hw_probe(struct drm_i915_private *dev_priv)
* Fill the dram structure to get the system dram info. This will be
* used for memory latency calculation.
*/
- ret = intel_dram_detect(dev_priv);
+ ret = intel_dram_detect(display);
if (ret)
goto err_opregion;
diff --git a/drivers/gpu/drm/xe/display/xe_display.c b/drivers/gpu/drm/xe/display/xe_display.c
index 9b1d21e03df0..793115077615 100644
--- a/drivers/gpu/drm/xe/display/xe_display.c
+++ b/drivers/gpu/drm/xe/display/xe_display.c
@@ -122,7 +122,7 @@ int xe_display_init_early(struct xe_device *xe)
* Fill the dram structure to get the system dram info. This will be
* used for memory latency calculation.
*/
- err = intel_dram_detect(xe);
+ err = intel_dram_detect(display);
if (err)
goto err_opregion;
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread
* [PATCH v2 06/13] drm/i915: move dram_info to struct intel_display
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (4 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 05/13] drm/i915/dram: convert to struct intel_display Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 07/13] drm/i915: move intel_rom.[ch] from soc/ to display/ Jani Nikula
` (17 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
With all of dram code under display, also move dram_info to struct
intel_display.
This further cleans up struct xe_device from display related members.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_core.h | 4 ++++
drivers/gpu/drm/i915/display/intel_dram.c | 7 ++-----
drivers/gpu/drm/i915/i915_drv.h | 3 ---
drivers/gpu/drm/xe/xe_device_types.h | 2 --
4 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 9b8414b77c15..9b36654b593d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -394,6 +394,10 @@ struct intel_display {
u32 mmio_base;
} dsi;
+ struct {
+ const struct dram_info *info;
+ } dram;
+
struct {
/* list of fbdev register on this device */
struct intel_fbdev *fbdev;
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index 3dfcc7938740..b078fd9fe3c0 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -817,7 +817,6 @@ static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info
int intel_dram_detect(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
struct dram_info *dram_info;
int ret;
@@ -828,7 +827,7 @@ int intel_dram_detect(struct intel_display *display)
if (!dram_info)
return -ENOMEM;
- i915->dram_info = dram_info;
+ display->dram.info = dram_info;
if (DISPLAY_VER(display) >= 14)
ret = xelpdp_get_dram_info(display, dram_info);
@@ -865,7 +864,5 @@ int intel_dram_detect(struct intel_display *display)
*/
const struct dram_info *intel_dram_info(struct intel_display *display)
{
- struct drm_i915_private *i915 = to_i915(display->drm);
-
- return i915->dram_info;
+ return display->dram.info;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5381a934a671..96af7776bee5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -60,7 +60,6 @@
#include "intel_step.h"
#include "intel_uncore.h"
-struct dram_info;
struct drm_i915_clock_gating_funcs;
struct intel_display;
struct intel_pxp;
@@ -279,8 +278,6 @@ struct drm_i915_private {
u32 suspend_count;
struct vlv_s0ix_state *vlv_s0ix_state;
- const struct dram_info *dram_info;
-
struct intel_runtime_pm runtime_pm;
struct i915_perf perf;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index a072c020b84b..6ce3247d1bd8 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -35,7 +35,6 @@
#define TEST_VM_OPS_ERROR
#endif
-struct dram_info;
struct intel_display;
struct intel_dg_nvm_dev;
struct xe_ggtt;
@@ -648,7 +647,6 @@ struct xe_device {
* drm_i915_private during build. After cleanup these should go away,
* migrating to the right sub-structs
*/
- const struct dram_info *dram_info;
struct intel_uncore {
spinlock_t lock;
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 07/13] drm/i915: move intel_rom.[ch] from soc/ to display/
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (5 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 06/13] drm/i915: move dram_info " Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 08/13] drm/xe: remove remaining platform checks from compat i915_drv.h Jani Nikula
` (16 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
The sole user of intel_rom.[ch] has always been in display. Move them
under display.
This allows us to remove the compat soc/intel_rom.h from xe, as well as
the Makefile rules to build anything from soc/.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 4 ++--
drivers/gpu/drm/i915/display/intel_bios.c | 3 +--
drivers/gpu/drm/i915/{soc => display}/intel_rom.c | 0
drivers/gpu/drm/i915/{soc => display}/intel_rom.h | 0
drivers/gpu/drm/xe/Makefile | 10 +---------
| 6 ------
6 files changed, 4 insertions(+), 19 deletions(-)
rename drivers/gpu/drm/i915/{soc => display}/intel_rom.c (100%)
rename drivers/gpu/drm/i915/{soc => display}/intel_rom.h (100%)
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 838c8e58e4a2..12f948f0062c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -58,8 +58,7 @@ i915-y += \
# core peripheral code
i915-y += \
- soc/intel_gmch.o \
- soc/intel_rom.o
+ soc/intel_gmch.o
# core library code
i915-y += \
@@ -303,6 +302,7 @@ i915-y += \
display/intel_pmdemand.o \
display/intel_psr.o \
display/intel_quirks.o \
+ display/intel_rom.o \
display/intel_sbi.o \
display/intel_sprite.o \
display/intel_sprite_uapi.o \
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 4b41068e9e35..a639c5eb3245 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -34,14 +34,13 @@
#include <drm/drm_fixed.h>
#include <drm/drm_print.h>
-#include "soc/intel_rom.h"
-
#include "intel_display.h"
#include "intel_display_core.h"
#include "intel_display_rpm.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
#include "intel_gmbus.h"
+#include "intel_rom.h"
#define _INTEL_BIOS_PRIVATE
#include "intel_vbt_defs.h"
diff --git a/drivers/gpu/drm/i915/soc/intel_rom.c b/drivers/gpu/drm/i915/display/intel_rom.c
similarity index 100%
rename from drivers/gpu/drm/i915/soc/intel_rom.c
rename to drivers/gpu/drm/i915/display/intel_rom.c
diff --git a/drivers/gpu/drm/i915/soc/intel_rom.h b/drivers/gpu/drm/i915/display/intel_rom.h
similarity index 100%
rename from drivers/gpu/drm/i915/soc/intel_rom.h
rename to drivers/gpu/drm/i915/display/intel_rom.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 85642340a8fa..9331212117a1 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -195,11 +195,6 @@ subdir-ccflags-$(CONFIG_DRM_XE_DISPLAY) += \
-I$(srctree)/drivers/gpu/drm/i915/display/ \
-Ddrm_i915_private=xe_device
-# Rule to build SOC code shared with i915
-$(obj)/i915-soc/%.o: $(srctree)/drivers/gpu/drm/i915/soc/%.c FORCE
- $(call cmd,force_checksrc)
- $(call if_changed_rule,cc_o_c)
-
# Rule to build display code shared with i915
$(obj)/i915-display/%.o: $(srctree)/drivers/gpu/drm/i915/display/%.c FORCE
$(call cmd,force_checksrc)
@@ -222,10 +217,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
display/xe_stolen.o \
display/xe_tdf.o
-# SOC code shared with i915
-xe-$(CONFIG_DRM_XE_DISPLAY) += \
- i915-soc/intel_rom.o
-
# Display code shared with i915
xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/icl_dsi.o \
@@ -312,6 +303,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_psr.o \
i915-display/intel_qp_tables.o \
i915-display/intel_quirks.o \
+ i915-display/intel_rom.o \
i915-display/intel_snps_hdmi_pll.o \
i915-display/intel_snps_phy.o \
i915-display/intel_tc.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h b/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
deleted file mode 100644
index 05cbfb697b2b..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2024 Intel Corporation
- */
-
-#include "../../../i915/soc/intel_rom.h"
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 08/13] drm/xe: remove remaining platform checks from compat i915_drv.h
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (6 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 07/13] drm/i915: move intel_rom.[ch] from soc/ to display/ Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 09/13] drm/i915/gmch: split out i915_gmch.[ch] from soc Jani Nikula
` (15 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
With xe no longer building anything from soc/, we can remove the compat
platform checks from i915_drv.h, reducing the file to just the to_i915()
pointer conversion helper.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
| 15 ---------------
1 file changed, 15 deletions(-)
--git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index 3e79a74ff7de..04d1925f9a19 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -19,19 +19,4 @@ static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
return container_of(dev, struct drm_i915_private, drm);
}
-/* compat platform checks only for soc/ usage */
-#define IS_PLATFORM(xe, x) ((xe)->info.platform == x)
-#define IS_I915G(dev_priv) (dev_priv && 0)
-#define IS_I915GM(dev_priv) (dev_priv && 0)
-#define IS_PINEVIEW(dev_priv) (dev_priv && 0)
-#define IS_VALLEYVIEW(dev_priv) (dev_priv && 0)
-#define IS_CHERRYVIEW(dev_priv) (dev_priv && 0)
-#define IS_HASWELL(dev_priv) (dev_priv && 0)
-#define IS_BROADWELL(dev_priv) (dev_priv && 0)
-#define IS_BROXTON(dev_priv) (dev_priv && 0)
-#define IS_GEMINILAKE(dev_priv) (dev_priv && 0)
-#define IS_DG2(dev_priv) IS_PLATFORM(dev_priv, XE_DG2)
-
-#define IS_MOBILE(xe) (xe && 0)
-
#endif
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 09/13] drm/i915/gmch: split out i915_gmch.[ch] from soc
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (7 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 08/13] drm/xe: remove remaining platform checks from compat i915_drv.h Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 10/13] drm/i915/gmch: switch to use pci_bus_{read, write}_config_word() Jani Nikula
` (14 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Most of the soc/intel_gmch.[ch] code is i915 core specific. Split it out
to i915_gmch.[ch].
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_driver.c | 11 +-
drivers/gpu/drm/i915/i915_gmch.c | 141 ++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_gmch.h | 13 +++
drivers/gpu/drm/i915/soc/intel_gmch.c | 132 ------------------------
drivers/gpu/drm/i915/soc/intel_gmch.h | 3 -
6 files changed, 160 insertions(+), 141 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_gmch.c
create mode 100644 drivers/gpu/drm/i915/i915_gmch.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 12f948f0062c..c591e5ba47f9 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -30,6 +30,7 @@ i915-y += \
i915_edram.o \
i915_freq.o \
i915_getparam.o \
+ i915_gmch.o \
i915_ioctl.o \
i915_irq.o \
i915_mitigations.o \
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 2369e2b55096..2e837865f829 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -88,8 +88,6 @@
#include "pxp/intel_pxp_debugfs.h"
#include "pxp/intel_pxp_pm.h"
-#include "soc/intel_gmch.h"
-
#include "i915_debugfs.h"
#include "i915_driver.h"
#include "i915_drm_client.h"
@@ -97,6 +95,7 @@
#include "i915_edram.h"
#include "i915_file_private.h"
#include "i915_getparam.h"
+#include "i915_gmch.h"
#include "i915_hwmon.h"
#include "i915_ioc32.h"
#include "i915_ioctl.h"
@@ -323,7 +322,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
if (i915_inject_probe_failure(dev_priv))
return -ENODEV;
- ret = intel_gmch_bridge_setup(dev_priv);
+ ret = i915_gmch_bridge_setup(dev_priv);
if (ret < 0)
return ret;
@@ -340,7 +339,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
}
/* Try to make sure MCHBAR is enabled before poking at it */
- intel_gmch_bar_setup(dev_priv);
+ i915_gmch_bar_setup(dev_priv);
intel_device_info_runtime_init(dev_priv);
intel_display_device_info_runtime_init(display);
@@ -356,7 +355,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
return 0;
err_uncore:
- intel_gmch_bar_teardown(dev_priv);
+ i915_gmch_bar_teardown(dev_priv);
return ret;
}
@@ -367,7 +366,7 @@ static int i915_driver_mmio_probe(struct drm_i915_private *dev_priv)
*/
static void i915_driver_mmio_release(struct drm_i915_private *dev_priv)
{
- intel_gmch_bar_teardown(dev_priv);
+ i915_gmch_bar_teardown(dev_priv);
}
/**
diff --git a/drivers/gpu/drm/i915/i915_gmch.c b/drivers/gpu/drm/i915/i915_gmch.c
new file mode 100644
index 000000000000..2d55831b3c58
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gmch.c
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: MIT
+/* Copyright © 2025 Intel Corporation */
+
+#include <linux/pnp.h>
+
+#include <drm/drm_managed.h>
+#include <drm/drm_print.h>
+
+#include "i915_drv.h"
+#include "i915_gmch.h"
+#include "intel_pci_config.h"
+
+static void i915_gmch_bridge_release(struct drm_device *dev, void *bridge)
+{
+ pci_dev_put(bridge);
+}
+
+int i915_gmch_bridge_setup(struct drm_i915_private *i915)
+{
+ int domain = pci_domain_nr(to_pci_dev(i915->drm.dev)->bus);
+
+ i915->gmch.pdev = pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0));
+ if (!i915->gmch.pdev) {
+ drm_err(&i915->drm, "bridge device not found\n");
+ return -EIO;
+ }
+
+ return drmm_add_action_or_reset(&i915->drm, i915_gmch_bridge_release,
+ i915->gmch.pdev);
+}
+
+static int mchbar_reg(struct drm_i915_private *i915)
+{
+ return GRAPHICS_VER(i915) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
+}
+
+/* Allocate space for the MCH regs if needed, return nonzero on error */
+static int
+intel_alloc_mchbar_resource(struct drm_i915_private *i915)
+{
+ u32 temp_lo, temp_hi = 0;
+ u64 mchbar_addr;
+ int ret;
+
+ if (GRAPHICS_VER(i915) >= 4)
+ pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4, &temp_hi);
+ pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp_lo);
+ mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
+
+ /* If ACPI doesn't have it, assume we need to allocate it ourselves */
+ if (IS_ENABLED(CONFIG_PNP) && mchbar_addr &&
+ pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE))
+ return 0;
+
+ /* Get some space for it */
+ i915->gmch.mch_res.name = "i915 MCHBAR";
+ i915->gmch.mch_res.flags = IORESOURCE_MEM;
+ ret = pci_bus_alloc_resource(i915->gmch.pdev->bus,
+ &i915->gmch.mch_res,
+ MCHBAR_SIZE, MCHBAR_SIZE,
+ PCIBIOS_MIN_MEM,
+ 0, pcibios_align_resource,
+ i915->gmch.pdev);
+ if (ret) {
+ drm_dbg(&i915->drm, "failed bus alloc: %d\n", ret);
+ i915->gmch.mch_res.start = 0;
+ return ret;
+ }
+
+ if (GRAPHICS_VER(i915) >= 4)
+ pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4,
+ upper_32_bits(i915->gmch.mch_res.start));
+
+ pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
+ lower_32_bits(i915->gmch.mch_res.start));
+ return 0;
+}
+
+/* Setup MCHBAR if possible, return true if we should disable it again */
+void i915_gmch_bar_setup(struct drm_i915_private *i915)
+{
+ u32 temp;
+ bool enabled;
+
+ if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+ return;
+
+ i915->gmch.mchbar_need_disable = false;
+
+ if (IS_I915G(i915) || IS_I915GM(i915)) {
+ pci_read_config_dword(i915->gmch.pdev, DEVEN, &temp);
+ enabled = !!(temp & DEVEN_MCHBAR_EN);
+ } else {
+ pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
+ enabled = temp & 1;
+ }
+
+ /* If it's already enabled, don't have to do anything */
+ if (enabled)
+ return;
+
+ if (intel_alloc_mchbar_resource(i915))
+ return;
+
+ i915->gmch.mchbar_need_disable = true;
+
+ /* Space is allocated or reserved, so enable it. */
+ if (IS_I915G(i915) || IS_I915GM(i915)) {
+ pci_write_config_dword(i915->gmch.pdev, DEVEN,
+ temp | DEVEN_MCHBAR_EN);
+ } else {
+ pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
+ pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915), temp | 1);
+ }
+}
+
+void i915_gmch_bar_teardown(struct drm_i915_private *i915)
+{
+ if (i915->gmch.mchbar_need_disable) {
+ if (IS_I915G(i915) || IS_I915GM(i915)) {
+ u32 deven_val;
+
+ pci_read_config_dword(i915->gmch.pdev, DEVEN,
+ &deven_val);
+ deven_val &= ~DEVEN_MCHBAR_EN;
+ pci_write_config_dword(i915->gmch.pdev, DEVEN,
+ deven_val);
+ } else {
+ u32 mchbar_val;
+
+ pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915),
+ &mchbar_val);
+ mchbar_val &= ~1;
+ pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
+ mchbar_val);
+ }
+ }
+
+ if (i915->gmch.mch_res.start)
+ release_resource(&i915->gmch.mch_res);
+}
diff --git a/drivers/gpu/drm/i915/i915_gmch.h b/drivers/gpu/drm/i915/i915_gmch.h
new file mode 100644
index 000000000000..3ae50bef04ea
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gmch.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright © 2025 Intel Corporation */
+
+#ifndef __I915_GMCH_H__
+#define __I915_GMCH_H__
+
+struct drm_i915_private;
+
+int i915_gmch_bridge_setup(struct drm_i915_private *i915);
+void i915_gmch_bar_setup(struct drm_i915_private *i915);
+void i915_gmch_bar_teardown(struct drm_i915_private *i915);
+
+#endif /* __I915_GMCH_H__ */
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c
index 271da30c8290..30f489417064 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.c
@@ -4,10 +4,8 @@
*/
#include <linux/pci.h>
-#include <linux/pnp.h>
#include <linux/vgaarb.h>
-#include <drm/drm_managed.h>
#include <drm/drm_print.h>
#include <drm/intel/i915_drm.h>
@@ -17,136 +15,6 @@
#include "intel_gmch.h"
#include "intel_pci_config.h"
-static void intel_gmch_bridge_release(struct drm_device *dev, void *bridge)
-{
- pci_dev_put(bridge);
-}
-
-int intel_gmch_bridge_setup(struct drm_i915_private *i915)
-{
- int domain = pci_domain_nr(to_pci_dev(i915->drm.dev)->bus);
-
- i915->gmch.pdev = pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0));
- if (!i915->gmch.pdev) {
- drm_err(&i915->drm, "bridge device not found\n");
- return -EIO;
- }
-
- return drmm_add_action_or_reset(&i915->drm, intel_gmch_bridge_release,
- i915->gmch.pdev);
-}
-
-static int mchbar_reg(struct drm_i915_private *i915)
-{
- return GRAPHICS_VER(i915) >= 4 ? MCHBAR_I965 : MCHBAR_I915;
-}
-
-/* Allocate space for the MCH regs if needed, return nonzero on error */
-static int
-intel_alloc_mchbar_resource(struct drm_i915_private *i915)
-{
- u32 temp_lo, temp_hi = 0;
- u64 mchbar_addr;
- int ret;
-
- if (GRAPHICS_VER(i915) >= 4)
- pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4, &temp_hi);
- pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp_lo);
- mchbar_addr = ((u64)temp_hi << 32) | temp_lo;
-
- /* If ACPI doesn't have it, assume we need to allocate it ourselves */
- if (IS_ENABLED(CONFIG_PNP) && mchbar_addr &&
- pnp_range_reserved(mchbar_addr, mchbar_addr + MCHBAR_SIZE))
- return 0;
-
- /* Get some space for it */
- i915->gmch.mch_res.name = "i915 MCHBAR";
- i915->gmch.mch_res.flags = IORESOURCE_MEM;
- ret = pci_bus_alloc_resource(i915->gmch.pdev->bus,
- &i915->gmch.mch_res,
- MCHBAR_SIZE, MCHBAR_SIZE,
- PCIBIOS_MIN_MEM,
- 0, pcibios_align_resource,
- i915->gmch.pdev);
- if (ret) {
- drm_dbg(&i915->drm, "failed bus alloc: %d\n", ret);
- i915->gmch.mch_res.start = 0;
- return ret;
- }
-
- if (GRAPHICS_VER(i915) >= 4)
- pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915) + 4,
- upper_32_bits(i915->gmch.mch_res.start));
-
- pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
- lower_32_bits(i915->gmch.mch_res.start));
- return 0;
-}
-
-/* Setup MCHBAR if possible, return true if we should disable it again */
-void intel_gmch_bar_setup(struct drm_i915_private *i915)
-{
- u32 temp;
- bool enabled;
-
- if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
- return;
-
- i915->gmch.mchbar_need_disable = false;
-
- if (IS_I915G(i915) || IS_I915GM(i915)) {
- pci_read_config_dword(i915->gmch.pdev, DEVEN, &temp);
- enabled = !!(temp & DEVEN_MCHBAR_EN);
- } else {
- pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
- enabled = temp & 1;
- }
-
- /* If it's already enabled, don't have to do anything */
- if (enabled)
- return;
-
- if (intel_alloc_mchbar_resource(i915))
- return;
-
- i915->gmch.mchbar_need_disable = true;
-
- /* Space is allocated or reserved, so enable it. */
- if (IS_I915G(i915) || IS_I915GM(i915)) {
- pci_write_config_dword(i915->gmch.pdev, DEVEN,
- temp | DEVEN_MCHBAR_EN);
- } else {
- pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915), &temp);
- pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915), temp | 1);
- }
-}
-
-void intel_gmch_bar_teardown(struct drm_i915_private *i915)
-{
- if (i915->gmch.mchbar_need_disable) {
- if (IS_I915G(i915) || IS_I915GM(i915)) {
- u32 deven_val;
-
- pci_read_config_dword(i915->gmch.pdev, DEVEN,
- &deven_val);
- deven_val &= ~DEVEN_MCHBAR_EN;
- pci_write_config_dword(i915->gmch.pdev, DEVEN,
- deven_val);
- } else {
- u32 mchbar_val;
-
- pci_read_config_dword(i915->gmch.pdev, mchbar_reg(i915),
- &mchbar_val);
- mchbar_val &= ~1;
- pci_write_config_dword(i915->gmch.pdev, mchbar_reg(i915),
- mchbar_val);
- }
- }
-
- if (i915->gmch.mch_res.start)
- release_resource(&i915->gmch.mch_res);
-}
-
int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
{
struct intel_display *display = i915->display;
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/soc/intel_gmch.h
index 23be2d113afd..907e1ae921e0 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.h
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.h
@@ -11,9 +11,6 @@
struct pci_dev;
struct drm_i915_private;
-int intel_gmch_bridge_setup(struct drm_i915_private *i915);
-void intel_gmch_bar_setup(struct drm_i915_private *i915);
-void intel_gmch_bar_teardown(struct drm_i915_private *i915);
int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode);
unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 10/13] drm/i915/gmch: switch to use pci_bus_{read, write}_config_word()
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (8 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 09/13] drm/i915/gmch: split out i915_gmch.[ch] from soc Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 11/13] drm/i915/gmch: convert intel_gmch.c to struct intel_display Jani Nikula
` (13 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula, Ville Syrjälä
Switch to use pci_bus_{read,write}_config_word(), and stop using
i915->gmch.pdev reference for the bridge.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/soc/intel_gmch.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c
index 30f489417064..d43b5d89cae7 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.c
@@ -18,10 +18,11 @@
int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
{
struct intel_display *display = i915->display;
+ struct pci_dev *pdev = to_pci_dev(display->drm->dev);
unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
u16 gmch_ctrl;
- if (pci_read_config_word(i915->gmch.pdev, reg, &gmch_ctrl)) {
+ if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) {
drm_err(&i915->drm, "failed to read control word\n");
return -EIO;
}
@@ -34,7 +35,7 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
else
gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
- if (pci_write_config_word(i915->gmch.pdev, reg, gmch_ctrl)) {
+ if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) {
drm_err(&i915->drm, "failed to write control word\n");
return -EIO;
}
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 11/13] drm/i915/gmch: convert intel_gmch.c to struct intel_display
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (9 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 10/13] drm/i915/gmch: switch to use pci_bus_{read, write}_config_word() Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 12/13] drm/i915: merge soc/intel_gmch.[ch] to display/intel_vga.c Jani Nikula
` (12 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Convert intel_gmch.[ch] to struct intel_display. Remove the final
dependency on struct drm_i915_private and i915_drv.h. This is in
preparation of moving the code under display/.
intel_gmch_vga_set_state() is only used internally, make it static while
at it.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/soc/intel_gmch.c | 13 ++++++-------
drivers/gpu/drm/i915/soc/intel_gmch.h | 2 --
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c
index d43b5d89cae7..4e7abe056551 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.c
@@ -10,20 +10,19 @@
#include <drm/intel/i915_drm.h>
#include "../display/intel_display_core.h" /* FIXME */
+#include "../display/intel_display_types.h" /* FIXME */
-#include "i915_drv.h"
#include "intel_gmch.h"
#include "intel_pci_config.h"
-int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
+static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
{
- struct intel_display *display = i915->display;
struct pci_dev *pdev = to_pci_dev(display->drm->dev);
unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
u16 gmch_ctrl;
if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) {
- drm_err(&i915->drm, "failed to read control word\n");
+ drm_err(display->drm, "failed to read control word\n");
return -EIO;
}
@@ -36,7 +35,7 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) {
- drm_err(&i915->drm, "failed to write control word\n");
+ drm_err(display->drm, "failed to write control word\n");
return -EIO;
}
@@ -45,9 +44,9 @@ int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode)
unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
{
- struct drm_i915_private *i915 = pdev_to_i915(pdev);
+ struct intel_display *display = to_intel_display(pdev);
- intel_gmch_vga_set_state(i915, enable_decode);
+ intel_gmch_vga_set_state(display, enable_decode);
if (enable_decode)
return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/soc/intel_gmch.h
index 907e1ae921e0..bc3421ab5ba6 100644
--- a/drivers/gpu/drm/i915/soc/intel_gmch.h
+++ b/drivers/gpu/drm/i915/soc/intel_gmch.h
@@ -9,9 +9,7 @@
#include <linux/types.h>
struct pci_dev;
-struct drm_i915_private;
-int intel_gmch_vga_set_state(struct drm_i915_private *i915, bool enable_decode);
unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
#endif /* __INTEL_GMCH_H__ */
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 12/13] drm/i915: merge soc/intel_gmch.[ch] to display/intel_vga.c
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (10 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 11/13] drm/i915/gmch: convert intel_gmch.c to struct intel_display Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-19 18:52 ` [PATCH v2 13/13] drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915 Jani Nikula
` (11 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
The sole user of the remaining functions in intel_gmch.[ch] is in
intel_vga.c. Move everything there.
Since intel_gmch.c hasn't been part of xe, use a dummy function
relocated from xe_display_misc.c, with #ifdef. This is purely to keep
this change non-functional.
This allows us to remove soc/intel_gmch.[ch] from i915, compat
soc/intel_gmch.h from xe, and xe_display_misc.c from xe.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/Makefile | 4 --
drivers/gpu/drm/i915/display/intel_vga.c | 52 ++++++++++++++++-
drivers/gpu/drm/i915/soc/intel_gmch.c | 56 -------------------
drivers/gpu/drm/i915/soc/intel_gmch.h | 15 -----
drivers/gpu/drm/xe/Makefile | 1 -
| 6 --
drivers/gpu/drm/xe/display/xe_display_misc.c | 16 ------
7 files changed, 50 insertions(+), 100 deletions(-)
delete mode 100644 drivers/gpu/drm/i915/soc/intel_gmch.c
delete mode 100644 drivers/gpu/drm/i915/soc/intel_gmch.h
delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
delete mode 100644 drivers/gpu/drm/xe/display/xe_display_misc.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index c591e5ba47f9..2ff8938b3a7c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -57,10 +57,6 @@ i915-y += \
vlv_iosf_sb.o \
vlv_suspend.o
-# core peripheral code
-i915-y += \
- soc/intel_gmch.o
-
# core library code
i915-y += \
i915_memcpy.o \
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
index 6e125564db34..5e516c79e2f7 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -9,12 +9,12 @@
#include <drm/drm_device.h>
#include <drm/drm_print.h>
+#include <drm/intel/i915_drm.h>
#include <video/vga.h>
-#include "soc/intel_gmch.h"
-
#include "intel_de.h"
#include "intel_display.h"
+#include "intel_display_types.h"
#include "intel_vga.h"
#include "intel_vga_regs.h"
@@ -95,6 +95,54 @@ void intel_vga_reset_io_mem(struct intel_display *display)
vga_put(pdev, VGA_RSRC_LEGACY_IO);
}
+#ifdef I915
+static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
+{
+ struct pci_dev *pdev = to_pci_dev(display->drm->dev);
+ unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
+ u16 gmch_ctrl;
+
+ if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) {
+ drm_err(display->drm, "failed to read control word\n");
+ return -EIO;
+ }
+
+ if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
+ return 0;
+
+ if (enable_decode)
+ gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
+ else
+ gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
+
+ if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) {
+ drm_err(display->drm, "failed to write control word\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
+{
+ struct intel_display *display = to_intel_display(pdev);
+
+ intel_gmch_vga_set_state(display, enable_decode);
+
+ if (enable_decode)
+ return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
+ VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+ else
+ return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
+}
+#else
+static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
+{
+ /* ToDo: Implement the actual handling of vga decode */
+ return 0;
+}
+#endif
+
int intel_vga_register(struct intel_display *display)
{
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.c b/drivers/gpu/drm/i915/soc/intel_gmch.c
deleted file mode 100644
index 4e7abe056551..000000000000
--- a/drivers/gpu/drm/i915/soc/intel_gmch.c
+++ /dev/null
@@ -1,56 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include <linux/pci.h>
-#include <linux/vgaarb.h>
-
-#include <drm/drm_print.h>
-#include <drm/intel/i915_drm.h>
-
-#include "../display/intel_display_core.h" /* FIXME */
-#include "../display/intel_display_types.h" /* FIXME */
-
-#include "intel_gmch.h"
-#include "intel_pci_config.h"
-
-static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
-{
- struct pci_dev *pdev = to_pci_dev(display->drm->dev);
- unsigned int reg = DISPLAY_VER(display) >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL;
- u16 gmch_ctrl;
-
- if (pci_bus_read_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, &gmch_ctrl)) {
- drm_err(display->drm, "failed to read control word\n");
- return -EIO;
- }
-
- if (!!(gmch_ctrl & INTEL_GMCH_VGA_DISABLE) == !enable_decode)
- return 0;
-
- if (enable_decode)
- gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE;
- else
- gmch_ctrl |= INTEL_GMCH_VGA_DISABLE;
-
- if (pci_bus_write_config_word(pdev->bus, PCI_DEVFN(0, 0), reg, gmch_ctrl)) {
- drm_err(display->drm, "failed to write control word\n");
- return -EIO;
- }
-
- return 0;
-}
-
-unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
-{
- struct intel_display *display = to_intel_display(pdev);
-
- intel_gmch_vga_set_state(display, enable_decode);
-
- if (enable_decode)
- return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
- VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
- else
- return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
-}
diff --git a/drivers/gpu/drm/i915/soc/intel_gmch.h b/drivers/gpu/drm/i915/soc/intel_gmch.h
deleted file mode 100644
index bc3421ab5ba6..000000000000
--- a/drivers/gpu/drm/i915/soc/intel_gmch.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#ifndef __INTEL_GMCH_H__
-#define __INTEL_GMCH_H__
-
-#include <linux/types.h>
-
-struct pci_dev;
-
-unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
-
-#endif /* __INTEL_GMCH_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 9331212117a1..b848da79a4e1 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -206,7 +206,6 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
display/intel_fb_bo.o \
display/intel_fbdev_fb.o \
display/xe_display.o \
- display/xe_display_misc.o \
display/xe_display_rpm.o \
display/xe_display_wa.o \
display/xe_dsb_buffer.o \
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h b/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
deleted file mode 100644
index 33c5257b3a71..000000000000
--- a/drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
+++ /dev/null
@@ -1,6 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "../../../i915/soc/intel_gmch.h"
diff --git a/drivers/gpu/drm/xe/display/xe_display_misc.c b/drivers/gpu/drm/xe/display/xe_display_misc.c
deleted file mode 100644
index 242c2ef4ca93..000000000000
--- a/drivers/gpu/drm/xe/display/xe_display_misc.c
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
- * Copyright © 2023 Intel Corporation
- */
-
-#include "intel_display_types.h"
-
-struct pci_dev;
-
-unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode);
-
-unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
-{
- /* ToDo: Implement the actual handling of vga decode */
- return 0;
-}
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* [PATCH v2 13/13] drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (11 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 12/13] drm/i915: merge soc/intel_gmch.[ch] to display/intel_vga.c Jani Nikula
@ 2025-11-19 18:52 ` Jani Nikula
2025-11-20 22:11 ` Lucas De Marchi
2025-11-19 21:45 ` ✗ CI.checkpatch: warning for drm/i915: dissolve soc/ Patchwork
` (10 subsequent siblings)
23 siblings, 1 reply; 30+ messages in thread
From: Jani Nikula @ 2025-11-19 18:52 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jani.nikula
Drop the #ifdef I915, and use the same intel_gmch_vga_set_decode() for
both i915 and xe.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_vga.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
index 5e516c79e2f7..c45c4bbc3f95 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -95,7 +95,6 @@ void intel_vga_reset_io_mem(struct intel_display *display)
vga_put(pdev, VGA_RSRC_LEGACY_IO);
}
-#ifdef I915
static int intel_gmch_vga_set_state(struct intel_display *display, bool enable_decode)
{
struct pci_dev *pdev = to_pci_dev(display->drm->dev);
@@ -135,13 +134,6 @@ static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_
else
return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
}
-#else
-static unsigned int intel_gmch_vga_set_decode(struct pci_dev *pdev, bool enable_decode)
-{
- /* ToDo: Implement the actual handling of vga decode */
- return 0;
-}
-#endif
int intel_vga_register(struct intel_display *display)
{
--
2.47.3
^ permalink raw reply related [flat|nested] 30+ messages in thread* Re: [PATCH v2 13/13] drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915
2025-11-19 18:52 ` [PATCH v2 13/13] drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915 Jani Nikula
@ 2025-11-20 22:11 ` Lucas De Marchi
2025-11-21 10:30 ` Jani Nikula
0 siblings, 1 reply; 30+ messages in thread
From: Lucas De Marchi @ 2025-11-20 22:11 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Wed, Nov 19, 2025 at 08:52:52PM +0200, Jani Nikula wrote:
>Drop the #ifdef I915, and use the same intel_gmch_vga_set_decode() for
>both i915 and xe.
I hope this doesn't regress our display side on other archs. We are very
close to having display working, but this messing with VGA is likely to
break it.
See "drm/i915/display: Stop touching vga on post enable", which is
needed for xe to use a DG2/BMG with a raspberry pi (+pci/resources
branch + a few other patches).
Lucas De Marchi
^ permalink raw reply [flat|nested] 30+ messages in thread
* Re: [PATCH v2 13/13] drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915
2025-11-20 22:11 ` Lucas De Marchi
@ 2025-11-21 10:30 ` Jani Nikula
0 siblings, 0 replies; 30+ messages in thread
From: Jani Nikula @ 2025-11-21 10:30 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx, intel-xe
On Thu, 20 Nov 2025, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> On Wed, Nov 19, 2025 at 08:52:52PM +0200, Jani Nikula wrote:
>>Drop the #ifdef I915, and use the same intel_gmch_vga_set_decode() for
>>both i915 and xe.
>
> I hope this doesn't regress our display side on other archs. We are very
> close to having display working, but this messing with VGA is likely to
> break it.
>
> See "drm/i915/display: Stop touching vga on post enable", which is
> needed for xe to use a DG2/BMG with a raspberry pi (+pci/resources
> branch + a few other patches).
I'm feeling confident [1] that the patch at hand does not have similar
issues. This is about VGA arbitration on the PCI bridge, not about
actually poking at VGA registers.
I went ahead and merged the series. If there are any ill effects with
the last patch, we can revert with a low bar.
BR,
Jani.
[1] https://en.wikipedia.org/wiki/Dunning%E2%80%93Kruger_effect
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 30+ messages in thread
* ✗ CI.checkpatch: warning for drm/i915: dissolve soc/
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (12 preceding siblings ...)
2025-11-19 18:52 ` [PATCH v2 13/13] drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915 Jani Nikula
@ 2025-11-19 21:45 ` Patchwork
2025-11-19 21:46 ` ✓ CI.KUnit: success " Patchwork
` (9 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2025-11-19 21:45 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: dissolve soc/
URL : https://patchwork.freedesktop.org/series/157792/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
2de9a3901bc28757c7906b454717b64e2a214021
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit ec5a418312d714c5e066b9d1e57794591f1e1c39
Author: Jani Nikula <jani.nikula@intel.com>
Date: Wed Nov 19 20:52:52 2025 +0200
drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915
Drop the #ifdef I915, and use the same intel_gmch_vga_set_decode() for
both i915 and xe.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch a95032b2166b5ae428c065917b843a1caf1e82b8 drm-intel
0589ff61875a drm/i915/edram: extract i915_edram.[ch] for edram detection
-:48: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#48:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 99 lines checked
6d6508fd0d71 drm/i915: split out i915_freq.[ch]
-:82: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#82:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 172 lines checked
7111c206575e drm/i915: move intel_dram.[ch] from soc/ to display/
-:119: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#119:
rename from drivers/gpu/drm/i915/soc/intel_dram.c
total: 0 errors, 1 warnings, 0 checks, 143 lines checked
5444e7477983 drm/xe: remove MISSING_CASE() from compat i915_utils.h
b010d0f88826 drm/i915/dram: convert to struct intel_display
3386f99e55a2 drm/i915: move dram_info to struct intel_display
b8e54c61cb4a drm/i915: move intel_rom.[ch] from soc/ to display/
-:58: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#58:
rename from drivers/gpu/drm/i915/soc/intel_rom.c
total: 0 errors, 1 warnings, 0 checks, 59 lines checked
baace5a2f53d drm/xe: remove remaining platform checks from compat i915_drv.h
c2ce1b8b5903 drm/i915/gmch: split out i915_gmch.[ch] from soc
-:81: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#81:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 363 lines checked
4f9260c15234 drm/i915/gmch: switch to use pci_bus_{read, write}_config_word()
994ae8eb2b6f drm/i915/gmch: convert intel_gmch.c to struct intel_display
0ad0aea2c886 drm/i915: merge soc/intel_gmch.[ch] to display/intel_vga.c
-:108: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#108:
deleted file mode 100644
total: 0 errors, 1 warnings, 0 checks, 85 lines checked
ec5a418312d7 drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915
^ permalink raw reply [flat|nested] 30+ messages in thread* ✓ CI.KUnit: success for drm/i915: dissolve soc/
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (13 preceding siblings ...)
2025-11-19 21:45 ` ✗ CI.checkpatch: warning for drm/i915: dissolve soc/ Patchwork
@ 2025-11-19 21:46 ` Patchwork
2025-11-19 22:02 ` ✗ CI.checksparse: warning " Patchwork
` (8 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2025-11-19 21:46 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: dissolve soc/
URL : https://patchwork.freedesktop.org/series/157792/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[21:45:31] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:45:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:46:06] Starting KUnit Kernel (1/1)...
[21:46:06] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:46:06] ================== guc_buf (11 subtests) ===================
[21:46:06] [PASSED] test_smallest
[21:46:06] [PASSED] test_largest
[21:46:06] [PASSED] test_granular
[21:46:06] [PASSED] test_unique
[21:46:06] [PASSED] test_overlap
[21:46:06] [PASSED] test_reusable
[21:46:06] [PASSED] test_too_big
[21:46:06] [PASSED] test_flush
[21:46:06] [PASSED] test_lookup
[21:46:06] [PASSED] test_data
[21:46:06] [PASSED] test_class
[21:46:06] ===================== [PASSED] guc_buf =====================
[21:46:06] =================== guc_dbm (7 subtests) ===================
[21:46:06] [PASSED] test_empty
[21:46:06] [PASSED] test_default
[21:46:06] ======================== test_size ========================
[21:46:06] [PASSED] 4
[21:46:06] [PASSED] 8
[21:46:06] [PASSED] 32
[21:46:06] [PASSED] 256
[21:46:06] ==================== [PASSED] test_size ====================
[21:46:06] ======================= test_reuse ========================
[21:46:06] [PASSED] 4
[21:46:06] [PASSED] 8
[21:46:06] [PASSED] 32
[21:46:06] [PASSED] 256
[21:46:06] =================== [PASSED] test_reuse ====================
[21:46:06] =================== test_range_overlap ====================
[21:46:06] [PASSED] 4
[21:46:06] [PASSED] 8
[21:46:06] [PASSED] 32
[21:46:06] [PASSED] 256
[21:46:06] =============== [PASSED] test_range_overlap ================
[21:46:06] =================== test_range_compact ====================
[21:46:06] [PASSED] 4
[21:46:06] [PASSED] 8
[21:46:06] [PASSED] 32
[21:46:06] [PASSED] 256
[21:46:06] =============== [PASSED] test_range_compact ================
[21:46:06] ==================== test_range_spare =====================
[21:46:06] [PASSED] 4
[21:46:06] [PASSED] 8
[21:46:06] [PASSED] 32
[21:46:06] [PASSED] 256
[21:46:06] ================ [PASSED] test_range_spare =================
[21:46:06] ===================== [PASSED] guc_dbm =====================
[21:46:06] =================== guc_idm (6 subtests) ===================
[21:46:06] [PASSED] bad_init
[21:46:06] [PASSED] no_init
[21:46:06] [PASSED] init_fini
[21:46:06] [PASSED] check_used
[21:46:06] [PASSED] check_quota
[21:46:06] [PASSED] check_all
[21:46:06] ===================== [PASSED] guc_idm =====================
[21:46:06] ================== no_relay (3 subtests) ===================
[21:46:06] [PASSED] xe_drops_guc2pf_if_not_ready
[21:46:06] [PASSED] xe_drops_guc2vf_if_not_ready
[21:46:06] [PASSED] xe_rejects_send_if_not_ready
[21:46:06] ==================== [PASSED] no_relay =====================
[21:46:06] ================== pf_relay (14 subtests) ==================
[21:46:06] [PASSED] pf_rejects_guc2pf_too_short
[21:46:06] [PASSED] pf_rejects_guc2pf_too_long
[21:46:06] [PASSED] pf_rejects_guc2pf_no_payload
[21:46:06] [PASSED] pf_fails_no_payload
[21:46:06] [PASSED] pf_fails_bad_origin
[21:46:06] [PASSED] pf_fails_bad_type
[21:46:06] [PASSED] pf_txn_reports_error
[21:46:06] [PASSED] pf_txn_sends_pf2guc
[21:46:06] [PASSED] pf_sends_pf2guc
[21:46:06] [SKIPPED] pf_loopback_nop
[21:46:06] [SKIPPED] pf_loopback_echo
[21:46:06] [SKIPPED] pf_loopback_fail
[21:46:06] [SKIPPED] pf_loopback_busy
[21:46:06] [SKIPPED] pf_loopback_retry
[21:46:06] ==================== [PASSED] pf_relay =====================
[21:46:06] ================== vf_relay (3 subtests) ===================
[21:46:06] [PASSED] vf_rejects_guc2vf_too_short
[21:46:06] [PASSED] vf_rejects_guc2vf_too_long
[21:46:06] [PASSED] vf_rejects_guc2vf_no_payload
[21:46:06] ==================== [PASSED] vf_relay =====================
[21:46:06] ================ pf_gt_config (6 subtests) =================
[21:46:06] [PASSED] fair_contexts_1vf
[21:46:06] [PASSED] fair_doorbells_1vf
[21:46:06] [PASSED] fair_ggtt_1vf
[21:46:06] ====================== fair_contexts ======================
[21:46:06] [PASSED] 1 VF
[21:46:06] [PASSED] 2 VFs
[21:46:06] [PASSED] 3 VFs
[21:46:06] [PASSED] 4 VFs
[21:46:06] [PASSED] 5 VFs
[21:46:06] [PASSED] 6 VFs
[21:46:06] [PASSED] 7 VFs
[21:46:06] [PASSED] 8 VFs
[21:46:06] [PASSED] 9 VFs
[21:46:06] [PASSED] 10 VFs
[21:46:06] [PASSED] 11 VFs
[21:46:06] [PASSED] 12 VFs
[21:46:06] [PASSED] 13 VFs
[21:46:06] [PASSED] 14 VFs
[21:46:06] [PASSED] 15 VFs
[21:46:06] [PASSED] 16 VFs
[21:46:06] [PASSED] 17 VFs
[21:46:06] [PASSED] 18 VFs
[21:46:06] [PASSED] 19 VFs
[21:46:06] [PASSED] 20 VFs
[21:46:06] [PASSED] 21 VFs
[21:46:06] [PASSED] 22 VFs
[21:46:06] [PASSED] 23 VFs
[21:46:06] [PASSED] 24 VFs
[21:46:06] [PASSED] 25 VFs
[21:46:06] [PASSED] 26 VFs
[21:46:06] [PASSED] 27 VFs
[21:46:06] [PASSED] 28 VFs
[21:46:06] [PASSED] 29 VFs
[21:46:06] [PASSED] 30 VFs
[21:46:06] [PASSED] 31 VFs
[21:46:06] [PASSED] 32 VFs
[21:46:06] [PASSED] 33 VFs
[21:46:06] [PASSED] 34 VFs
[21:46:06] [PASSED] 35 VFs
[21:46:06] [PASSED] 36 VFs
[21:46:06] [PASSED] 37 VFs
[21:46:06] [PASSED] 38 VFs
[21:46:06] [PASSED] 39 VFs
[21:46:06] [PASSED] 40 VFs
[21:46:06] [PASSED] 41 VFs
[21:46:06] [PASSED] 42 VFs
[21:46:06] [PASSED] 43 VFs
[21:46:06] [PASSED] 44 VFs
[21:46:06] [PASSED] 45 VFs
[21:46:06] [PASSED] 46 VFs
[21:46:06] [PASSED] 47 VFs
[21:46:06] [PASSED] 48 VFs
[21:46:06] [PASSED] 49 VFs
[21:46:06] [PASSED] 50 VFs
[21:46:06] [PASSED] 51 VFs
[21:46:06] [PASSED] 52 VFs
[21:46:06] [PASSED] 53 VFs
[21:46:06] [PASSED] 54 VFs
[21:46:06] [PASSED] 55 VFs
[21:46:06] [PASSED] 56 VFs
[21:46:06] [PASSED] 57 VFs
[21:46:06] [PASSED] 58 VFs
[21:46:06] [PASSED] 59 VFs
[21:46:06] [PASSED] 60 VFs
[21:46:06] [PASSED] 61 VFs
[21:46:06] [PASSED] 62 VFs
[21:46:06] [PASSED] 63 VFs
[21:46:06] ================== [PASSED] fair_contexts ==================
[21:46:06] ===================== fair_doorbells ======================
[21:46:06] [PASSED] 1 VF
[21:46:06] [PASSED] 2 VFs
[21:46:06] [PASSED] 3 VFs
[21:46:06] [PASSED] 4 VFs
[21:46:06] [PASSED] 5 VFs
[21:46:06] [PASSED] 6 VFs
[21:46:06] [PASSED] 7 VFs
[21:46:06] [PASSED] 8 VFs
[21:46:06] [PASSED] 9 VFs
[21:46:06] [PASSED] 10 VFs
[21:46:06] [PASSED] 11 VFs
[21:46:06] [PASSED] 12 VFs
[21:46:06] [PASSED] 13 VFs
[21:46:06] [PASSED] 14 VFs
[21:46:06] [PASSED] 15 VFs
[21:46:06] [PASSED] 16 VFs
[21:46:06] [PASSED] 17 VFs
[21:46:06] [PASSED] 18 VFs
[21:46:06] [PASSED] 19 VFs
[21:46:06] [PASSED] 20 VFs
[21:46:06] [PASSED] 21 VFs
[21:46:06] [PASSED] 22 VFs
[21:46:06] [PASSED] 23 VFs
[21:46:06] [PASSED] 24 VFs
[21:46:06] [PASSED] 25 VFs
[21:46:06] [PASSED] 26 VFs
[21:46:06] [PASSED] 27 VFs
[21:46:06] [PASSED] 28 VFs
[21:46:06] [PASSED] 29 VFs
[21:46:06] [PASSED] 30 VFs
[21:46:06] [PASSED] 31 VFs
[21:46:06] [PASSED] 32 VFs
[21:46:06] [PASSED] 33 VFs
[21:46:06] [PASSED] 34 VFs
[21:46:06] [PASSED] 35 VFs
[21:46:06] [PASSED] 36 VFs
[21:46:06] [PASSED] 37 VFs
[21:46:06] [PASSED] 38 VFs
[21:46:06] [PASSED] 39 VFs
[21:46:06] [PASSED] 40 VFs
[21:46:06] [PASSED] 41 VFs
[21:46:06] [PASSED] 42 VFs
[21:46:06] [PASSED] 43 VFs
[21:46:06] [PASSED] 44 VFs
[21:46:06] [PASSED] 45 VFs
[21:46:06] [PASSED] 46 VFs
[21:46:06] [PASSED] 47 VFs
[21:46:06] [PASSED] 48 VFs
[21:46:06] [PASSED] 49 VFs
[21:46:06] [PASSED] 50 VFs
[21:46:06] [PASSED] 51 VFs
[21:46:06] [PASSED] 52 VFs
[21:46:06] [PASSED] 53 VFs
[21:46:06] [PASSED] 54 VFs
[21:46:06] [PASSED] 55 VFs
[21:46:06] [PASSED] 56 VFs
[21:46:06] [PASSED] 57 VFs
[21:46:06] [PASSED] 58 VFs
[21:46:06] [PASSED] 59 VFs
[21:46:06] [PASSED] 60 VFs
[21:46:06] [PASSED] 61 VFs
[21:46:06] [PASSED] 62 VFs
[21:46:06] [PASSED] 63 VFs
[21:46:06] ================= [PASSED] fair_doorbells ==================
[21:46:06] ======================== fair_ggtt ========================
[21:46:06] [PASSED] 1 VF
[21:46:06] [PASSED] 2 VFs
[21:46:06] [PASSED] 3 VFs
[21:46:06] [PASSED] 4 VFs
[21:46:06] [PASSED] 5 VFs
[21:46:06] [PASSED] 6 VFs
[21:46:06] [PASSED] 7 VFs
[21:46:06] [PASSED] 8 VFs
[21:46:06] [PASSED] 9 VFs
[21:46:06] [PASSED] 10 VFs
[21:46:06] [PASSED] 11 VFs
[21:46:06] [PASSED] 12 VFs
[21:46:06] [PASSED] 13 VFs
[21:46:06] [PASSED] 14 VFs
[21:46:06] [PASSED] 15 VFs
[21:46:06] [PASSED] 16 VFs
[21:46:06] [PASSED] 17 VFs
[21:46:06] [PASSED] 18 VFs
[21:46:06] [PASSED] 19 VFs
[21:46:06] [PASSED] 20 VFs
[21:46:06] [PASSED] 21 VFs
[21:46:06] [PASSED] 22 VFs
[21:46:06] [PASSED] 23 VFs
[21:46:06] [PASSED] 24 VFs
[21:46:06] [PASSED] 25 VFs
[21:46:06] [PASSED] 26 VFs
[21:46:06] [PASSED] 27 VFs
[21:46:06] [PASSED] 28 VFs
[21:46:06] [PASSED] 29 VFs
[21:46:06] [PASSED] 30 VFs
[21:46:06] [PASSED] 31 VFs
[21:46:06] [PASSED] 32 VFs
[21:46:06] [PASSED] 33 VFs
[21:46:06] [PASSED] 34 VFs
[21:46:06] [PASSED] 35 VFs
[21:46:06] [PASSED] 36 VFs
[21:46:06] [PASSED] 37 VFs
[21:46:06] [PASSED] 38 VFs
[21:46:06] [PASSED] 39 VFs
[21:46:06] [PASSED] 40 VFs
[21:46:06] [PASSED] 41 VFs
[21:46:06] [PASSED] 42 VFs
[21:46:06] [PASSED] 43 VFs
[21:46:06] [PASSED] 44 VFs
[21:46:06] [PASSED] 45 VFs
[21:46:06] [PASSED] 46 VFs
[21:46:06] [PASSED] 47 VFs
[21:46:06] [PASSED] 48 VFs
[21:46:06] [PASSED] 49 VFs
[21:46:06] [PASSED] 50 VFs
[21:46:06] [PASSED] 51 VFs
[21:46:06] [PASSED] 52 VFs
[21:46:06] [PASSED] 53 VFs
[21:46:06] [PASSED] 54 VFs
[21:46:06] [PASSED] 55 VFs
[21:46:06] [PASSED] 56 VFs
[21:46:06] [PASSED] 57 VFs
[21:46:06] [PASSED] 58 VFs
[21:46:06] [PASSED] 59 VFs
[21:46:06] [PASSED] 60 VFs
[21:46:06] [PASSED] 61 VFs
[21:46:06] [PASSED] 62 VFs
[21:46:06] [PASSED] 63 VFs
[21:46:06] ==================== [PASSED] fair_ggtt ====================
[21:46:06] ================== [PASSED] pf_gt_config ===================
[21:46:06] ===================== lmtt (1 subtest) =====================
[21:46:06] ======================== test_ops =========================
[21:46:06] [PASSED] 2-level
[21:46:06] [PASSED] multi-level
[21:46:06] ==================== [PASSED] test_ops =====================
[21:46:06] ====================== [PASSED] lmtt =======================
[21:46:06] ================= pf_service (11 subtests) =================
[21:46:06] [PASSED] pf_negotiate_any
[21:46:06] [PASSED] pf_negotiate_base_match
[21:46:06] [PASSED] pf_negotiate_base_newer
[21:46:06] [PASSED] pf_negotiate_base_next
[21:46:06] [SKIPPED] pf_negotiate_base_older
[21:46:06] [PASSED] pf_negotiate_base_prev
[21:46:06] [PASSED] pf_negotiate_latest_match
[21:46:06] [PASSED] pf_negotiate_latest_newer
[21:46:06] [PASSED] pf_negotiate_latest_next
[21:46:06] [SKIPPED] pf_negotiate_latest_older
[21:46:06] [SKIPPED] pf_negotiate_latest_prev
[21:46:06] =================== [PASSED] pf_service ====================
[21:46:06] ================= xe_guc_g2g (2 subtests) ==================
[21:46:06] ============== xe_live_guc_g2g_kunit_default ==============
[21:46:06] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[21:46:06] ============== xe_live_guc_g2g_kunit_allmem ===============
[21:46:06] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[21:46:06] =================== [SKIPPED] xe_guc_g2g ===================
[21:46:06] =================== xe_mocs (2 subtests) ===================
[21:46:06] ================ xe_live_mocs_kernel_kunit ================
[21:46:06] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[21:46:06] ================ xe_live_mocs_reset_kunit =================
[21:46:06] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[21:46:06] ==================== [SKIPPED] xe_mocs =====================
[21:46:06] ================= xe_migrate (2 subtests) ==================
[21:46:06] ================= xe_migrate_sanity_kunit =================
[21:46:06] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[21:46:06] ================== xe_validate_ccs_kunit ==================
[21:46:06] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[21:46:06] =================== [SKIPPED] xe_migrate ===================
[21:46:06] ================== xe_dma_buf (1 subtest) ==================
[21:46:06] ==================== xe_dma_buf_kunit =====================
[21:46:06] ================ [SKIPPED] xe_dma_buf_kunit ================
[21:46:06] =================== [SKIPPED] xe_dma_buf ===================
[21:46:06] ================= xe_bo_shrink (1 subtest) =================
[21:46:06] =================== xe_bo_shrink_kunit ====================
[21:46:06] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[21:46:06] ================== [SKIPPED] xe_bo_shrink ==================
[21:46:06] ==================== xe_bo (2 subtests) ====================
[21:46:06] ================== xe_ccs_migrate_kunit ===================
[21:46:06] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[21:46:06] ==================== xe_bo_evict_kunit ====================
[21:46:06] =============== [SKIPPED] xe_bo_evict_kunit ================
[21:46:06] ===================== [SKIPPED] xe_bo ======================
[21:46:06] ==================== args (11 subtests) ====================
[21:46:06] [PASSED] count_args_test
[21:46:06] [PASSED] call_args_example
[21:46:06] [PASSED] call_args_test
[21:46:06] [PASSED] drop_first_arg_example
[21:46:06] [PASSED] drop_first_arg_test
[21:46:06] [PASSED] first_arg_example
[21:46:06] [PASSED] first_arg_test
[21:46:06] [PASSED] last_arg_example
[21:46:06] [PASSED] last_arg_test
[21:46:06] [PASSED] pick_arg_example
[21:46:06] [PASSED] sep_comma_example
[21:46:06] ====================== [PASSED] args =======================
[21:46:06] =================== xe_pci (3 subtests) ====================
[21:46:06] ==================== check_graphics_ip ====================
[21:46:06] [PASSED] 12.00 Xe_LP
[21:46:06] [PASSED] 12.10 Xe_LP+
[21:46:06] [PASSED] 12.55 Xe_HPG
[21:46:06] [PASSED] 12.60 Xe_HPC
[21:46:06] [PASSED] 12.70 Xe_LPG
[21:46:06] [PASSED] 12.71 Xe_LPG
[21:46:06] [PASSED] 12.74 Xe_LPG+
[21:46:06] [PASSED] 20.01 Xe2_HPG
[21:46:06] [PASSED] 20.02 Xe2_HPG
[21:46:06] [PASSED] 20.04 Xe2_LPG
[21:46:06] [PASSED] 30.00 Xe3_LPG
[21:46:06] [PASSED] 30.01 Xe3_LPG
[21:46:06] [PASSED] 30.03 Xe3_LPG
[21:46:06] [PASSED] 30.04 Xe3_LPG
[21:46:06] [PASSED] 30.05 Xe3_LPG
[21:46:06] [PASSED] 35.11 Xe3p_XPC
[21:46:06] ================ [PASSED] check_graphics_ip ================
[21:46:06] ===================== check_media_ip ======================
[21:46:06] [PASSED] 12.00 Xe_M
[21:46:06] [PASSED] 12.55 Xe_HPM
[21:46:06] [PASSED] 13.00 Xe_LPM+
[21:46:06] [PASSED] 13.01 Xe2_HPM
[21:46:06] [PASSED] 20.00 Xe2_LPM
[21:46:06] [PASSED] 30.00 Xe3_LPM
[21:46:06] [PASSED] 30.02 Xe3_LPM
[21:46:06] [PASSED] 35.00 Xe3p_LPM
[21:46:06] [PASSED] 35.03 Xe3p_HPM
[21:46:06] ================= [PASSED] check_media_ip ==================
[21:46:06] =================== check_platform_desc ===================
[21:46:06] [PASSED] 0x9A60 (TIGERLAKE)
[21:46:06] [PASSED] 0x9A68 (TIGERLAKE)
[21:46:06] [PASSED] 0x9A70 (TIGERLAKE)
[21:46:06] [PASSED] 0x9A40 (TIGERLAKE)
[21:46:06] [PASSED] 0x9A49 (TIGERLAKE)
[21:46:06] [PASSED] 0x9A59 (TIGERLAKE)
[21:46:06] [PASSED] 0x9A78 (TIGERLAKE)
[21:46:06] [PASSED] 0x9AC0 (TIGERLAKE)
[21:46:06] [PASSED] 0x9AC9 (TIGERLAKE)
[21:46:06] [PASSED] 0x9AD9 (TIGERLAKE)
[21:46:06] [PASSED] 0x9AF8 (TIGERLAKE)
[21:46:06] [PASSED] 0x4C80 (ROCKETLAKE)
[21:46:06] [PASSED] 0x4C8A (ROCKETLAKE)
[21:46:06] [PASSED] 0x4C8B (ROCKETLAKE)
[21:46:06] [PASSED] 0x4C8C (ROCKETLAKE)
[21:46:06] [PASSED] 0x4C90 (ROCKETLAKE)
[21:46:06] [PASSED] 0x4C9A (ROCKETLAKE)
[21:46:06] [PASSED] 0x4680 (ALDERLAKE_S)
[21:46:06] [PASSED] 0x4682 (ALDERLAKE_S)
[21:46:06] [PASSED] 0x4688 (ALDERLAKE_S)
[21:46:06] [PASSED] 0x468A (ALDERLAKE_S)
[21:46:06] [PASSED] 0x468B (ALDERLAKE_S)
[21:46:06] [PASSED] 0x4690 (ALDERLAKE_S)
[21:46:06] [PASSED] 0x4692 (ALDERLAKE_S)
[21:46:06] [PASSED] 0x4693 (ALDERLAKE_S)
[21:46:06] [PASSED] 0x46A0 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46A1 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46A2 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46A3 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46A6 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46A8 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46AA (ALDERLAKE_P)
[21:46:06] [PASSED] 0x462A (ALDERLAKE_P)
[21:46:06] [PASSED] 0x4626 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x4628 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[21:46:06] [PASSED] 0x46B1 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46B2 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46B3 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46C0 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46C1 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46C2 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46C3 (ALDERLAKE_P)
[21:46:06] [PASSED] 0x46D0 (ALDERLAKE_N)
[21:46:06] [PASSED] 0x46D1 (ALDERLAKE_N)
[21:46:06] [PASSED] 0x46D2 (ALDERLAKE_N)
[21:46:06] [PASSED] 0x46D3 (ALDERLAKE_N)
[21:46:06] [PASSED] 0x46D4 (ALDERLAKE_N)
[21:46:06] [PASSED] 0xA721 (ALDERLAKE_P)
[21:46:06] [PASSED] 0xA7A1 (ALDERLAKE_P)
[21:46:06] [PASSED] 0xA7A9 (ALDERLAKE_P)
[21:46:06] [PASSED] 0xA7AC (ALDERLAKE_P)
[21:46:06] [PASSED] 0xA7AD (ALDERLAKE_P)
[21:46:06] [PASSED] 0xA720 (ALDERLAKE_P)
[21:46:06] [PASSED] 0xA7A0 (ALDERLAKE_P)
[21:46:06] [PASSED] 0xA7A8 (ALDERLAKE_P)
[21:46:06] [PASSED] 0xA7AA (ALDERLAKE_P)
[21:46:06] [PASSED] 0xA7AB (ALDERLAKE_P)
[21:46:06] [PASSED] 0xA780 (ALDERLAKE_S)
[21:46:06] [PASSED] 0xA781 (ALDERLAKE_S)
[21:46:06] [PASSED] 0xA782 (ALDERLAKE_S)
[21:46:06] [PASSED] 0xA783 (ALDERLAKE_S)
[21:46:06] [PASSED] 0xA788 (ALDERLAKE_S)
[21:46:06] [PASSED] 0xA789 (ALDERLAKE_S)
[21:46:06] [PASSED] 0xA78A (ALDERLAKE_S)
[21:46:06] [PASSED] 0xA78B (ALDERLAKE_S)
[21:46:06] [PASSED] 0x4905 (DG1)
[21:46:06] [PASSED] 0x4906 (DG1)
[21:46:06] [PASSED] 0x4907 (DG1)
[21:46:06] [PASSED] 0x4908 (DG1)
[21:46:06] [PASSED] 0x4909 (DG1)
[21:46:06] [PASSED] 0x56C0 (DG2)
[21:46:06] [PASSED] 0x56C2 (DG2)
[21:46:06] [PASSED] 0x56C1 (DG2)
[21:46:06] [PASSED] 0x7D51 (METEORLAKE)
[21:46:06] [PASSED] 0x7DD1 (METEORLAKE)
[21:46:06] [PASSED] 0x7D41 (METEORLAKE)
[21:46:06] [PASSED] 0x7D67 (METEORLAKE)
[21:46:06] [PASSED] 0xB640 (METEORLAKE)
[21:46:06] [PASSED] 0x56A0 (DG2)
[21:46:06] [PASSED] 0x56A1 (DG2)
[21:46:06] [PASSED] 0x56A2 (DG2)
[21:46:06] [PASSED] 0x56BE (DG2)
[21:46:06] [PASSED] 0x56BF (DG2)
[21:46:06] [PASSED] 0x5690 (DG2)
[21:46:06] [PASSED] 0x5691 (DG2)
[21:46:06] [PASSED] 0x5692 (DG2)
[21:46:06] [PASSED] 0x56A5 (DG2)
[21:46:06] [PASSED] 0x56A6 (DG2)
[21:46:06] [PASSED] 0x56B0 (DG2)
[21:46:06] [PASSED] 0x56B1 (DG2)
[21:46:06] [PASSED] 0x56BA (DG2)
[21:46:06] [PASSED] 0x56BB (DG2)
[21:46:06] [PASSED] 0x56BC (DG2)
[21:46:06] [PASSED] 0x56BD (DG2)
[21:46:06] [PASSED] 0x5693 (DG2)
[21:46:06] [PASSED] 0x5694 (DG2)
[21:46:06] [PASSED] 0x5695 (DG2)
[21:46:06] [PASSED] 0x56A3 (DG2)
[21:46:06] [PASSED] 0x56A4 (DG2)
[21:46:06] [PASSED] 0x56B2 (DG2)
[21:46:06] [PASSED] 0x56B3 (DG2)
[21:46:06] [PASSED] 0x5696 (DG2)
[21:46:06] [PASSED] 0x5697 (DG2)
[21:46:06] [PASSED] 0xB69 (PVC)
[21:46:06] [PASSED] 0xB6E (PVC)
[21:46:06] [PASSED] 0xBD4 (PVC)
[21:46:06] [PASSED] 0xBD5 (PVC)
[21:46:06] [PASSED] 0xBD6 (PVC)
[21:46:06] [PASSED] 0xBD7 (PVC)
[21:46:06] [PASSED] 0xBD8 (PVC)
[21:46:06] [PASSED] 0xBD9 (PVC)
[21:46:06] [PASSED] 0xBDA (PVC)
[21:46:06] [PASSED] 0xBDB (PVC)
[21:46:06] [PASSED] 0xBE0 (PVC)
[21:46:06] [PASSED] 0xBE1 (PVC)
[21:46:06] [PASSED] 0xBE5 (PVC)
[21:46:06] [PASSED] 0x7D40 (METEORLAKE)
[21:46:06] [PASSED] 0x7D45 (METEORLAKE)
[21:46:06] [PASSED] 0x7D55 (METEORLAKE)
[21:46:06] [PASSED] 0x7D60 (METEORLAKE)
[21:46:06] [PASSED] 0x7DD5 (METEORLAKE)
[21:46:06] [PASSED] 0x6420 (LUNARLAKE)
[21:46:06] [PASSED] 0x64A0 (LUNARLAKE)
[21:46:06] [PASSED] 0x64B0 (LUNARLAKE)
[21:46:06] [PASSED] 0xE202 (BATTLEMAGE)
[21:46:06] [PASSED] 0xE209 (BATTLEMAGE)
[21:46:06] [PASSED] 0xE20B (BATTLEMAGE)
[21:46:06] [PASSED] 0xE20C (BATTLEMAGE)
[21:46:06] [PASSED] 0xE20D (BATTLEMAGE)
[21:46:06] [PASSED] 0xE210 (BATTLEMAGE)
[21:46:06] [PASSED] 0xE211 (BATTLEMAGE)
[21:46:06] [PASSED] 0xE212 (BATTLEMAGE)
[21:46:06] [PASSED] 0xE216 (BATTLEMAGE)
[21:46:06] [PASSED] 0xE220 (BATTLEMAGE)
[21:46:06] [PASSED] 0xE221 (BATTLEMAGE)
[21:46:06] [PASSED] 0xE222 (BATTLEMAGE)
[21:46:06] [PASSED] 0xE223 (BATTLEMAGE)
[21:46:06] [PASSED] 0xB080 (PANTHERLAKE)
[21:46:06] [PASSED] 0xB081 (PANTHERLAKE)
[21:46:06] [PASSED] 0xB082 (PANTHERLAKE)
[21:46:06] [PASSED] 0xB083 (PANTHERLAKE)
[21:46:06] [PASSED] 0xB084 (PANTHERLAKE)
[21:46:06] [PASSED] 0xB085 (PANTHERLAKE)
[21:46:06] [PASSED] 0xB086 (PANTHERLAKE)
[21:46:06] [PASSED] 0xB087 (PANTHERLAKE)
[21:46:06] [PASSED] 0xB08F (PANTHERLAKE)
[21:46:06] [PASSED] 0xB090 (PANTHERLAKE)
[21:46:06] [PASSED] 0xB0A0 (PANTHERLAKE)
[21:46:06] [PASSED] 0xB0B0 (PANTHERLAKE)
[21:46:06] [PASSED] 0xD740 (NOVALAKE_S)
[21:46:06] [PASSED] 0xD741 (NOVALAKE_S)
[21:46:06] [PASSED] 0xD742 (NOVALAKE_S)
[21:46:06] [PASSED] 0xD743 (NOVALAKE_S)
[21:46:06] [PASSED] 0xD744 (NOVALAKE_S)
[21:46:06] [PASSED] 0xD745 (NOVALAKE_S)
[21:46:06] [PASSED] 0x674C (CRESCENTISLAND)
[21:46:06] [PASSED] 0xFD80 (PANTHERLAKE)
[21:46:06] [PASSED] 0xFD81 (PANTHERLAKE)
[21:46:06] =============== [PASSED] check_platform_desc ===============
[21:46:06] ===================== [PASSED] xe_pci ======================
[21:46:06] =================== xe_rtp (2 subtests) ====================
[21:46:06] =============== xe_rtp_process_to_sr_tests ================
[21:46:06] [PASSED] coalesce-same-reg
[21:46:06] [PASSED] no-match-no-add
[21:46:06] [PASSED] match-or
[21:46:06] [PASSED] match-or-xfail
[21:46:06] [PASSED] no-match-no-add-multiple-rules
[21:46:06] [PASSED] two-regs-two-entries
[21:46:06] [PASSED] clr-one-set-other
[21:46:06] [PASSED] set-field
[21:46:06] [PASSED] conflict-duplicate
[21:46:06] [PASSED] conflict-not-disjoint
[21:46:06] [PASSED] conflict-reg-type
[21:46:06] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[21:46:06] ================== xe_rtp_process_tests ===================
[21:46:06] [PASSED] active1
[21:46:06] [PASSED] active2
[21:46:06] [PASSED] active-inactive
[21:46:06] [PASSED] inactive-active
[21:46:06] [PASSED] inactive-1st_or_active-inactive
[21:46:06] [PASSED] inactive-2nd_or_active-inactive
[21:46:06] [PASSED] inactive-last_or_active-inactive
[21:46:06] [PASSED] inactive-no_or_active-inactive
[21:46:06] ============== [PASSED] xe_rtp_process_tests ===============
[21:46:06] ===================== [PASSED] xe_rtp ======================
[21:46:06] ==================== xe_wa (1 subtest) =====================
[21:46:06] ======================== xe_wa_gt =========================
[21:46:06] [PASSED] TIGERLAKE B0
[21:46:06] [PASSED] DG1 A0
[21:46:06] [PASSED] DG1 B0
[21:46:06] [PASSED] ALDERLAKE_S A0
[21:46:06] [PASSED] ALDERLAKE_S B0
[21:46:06] [PASSED] ALDERLAKE_S C0
[21:46:06] [PASSED] ALDERLAKE_S D0
[21:46:06] [PASSED] ALDERLAKE_P A0
[21:46:06] [PASSED] ALDERLAKE_P B0
[21:46:06] [PASSED] ALDERLAKE_P C0
[21:46:06] [PASSED] ALDERLAKE_S RPLS D0
[21:46:06] [PASSED] ALDERLAKE_P RPLU E0
[21:46:06] [PASSED] DG2 G10 C0
[21:46:06] [PASSED] DG2 G11 B1
[21:46:06] [PASSED] DG2 G12 A1
[21:46:06] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:46:06] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[21:46:06] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[21:46:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[21:46:06] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[21:46:06] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[21:46:06] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[21:46:06] ==================== [PASSED] xe_wa_gt =====================
[21:46:06] ====================== [PASSED] xe_wa ======================
[21:46:06] ============================================================
[21:46:06] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[21:46:06] Elapsed time: 35.218s total, 4.238s configuring, 30.507s building, 0.454s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[21:46:07] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:46:08] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:46:33] Starting KUnit Kernel (1/1)...
[21:46:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:46:33] ============ drm_test_pick_cmdline (2 subtests) ============
[21:46:33] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[21:46:33] =============== drm_test_pick_cmdline_named ===============
[21:46:33] [PASSED] NTSC
[21:46:33] [PASSED] NTSC-J
[21:46:33] [PASSED] PAL
[21:46:33] [PASSED] PAL-M
[21:46:33] =========== [PASSED] drm_test_pick_cmdline_named ===========
[21:46:33] ============== [PASSED] drm_test_pick_cmdline ==============
[21:46:33] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[21:46:33] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[21:46:33] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[21:46:33] =========== drm_validate_clone_mode (2 subtests) ===========
[21:46:33] ============== drm_test_check_in_clone_mode ===============
[21:46:33] [PASSED] in_clone_mode
[21:46:33] [PASSED] not_in_clone_mode
[21:46:33] ========== [PASSED] drm_test_check_in_clone_mode ===========
[21:46:33] =============== drm_test_check_valid_clones ===============
[21:46:33] [PASSED] not_in_clone_mode
[21:46:33] [PASSED] valid_clone
[21:46:33] [PASSED] invalid_clone
[21:46:33] =========== [PASSED] drm_test_check_valid_clones ===========
[21:46:33] ============= [PASSED] drm_validate_clone_mode =============
[21:46:33] ============= drm_validate_modeset (1 subtest) =============
[21:46:33] [PASSED] drm_test_check_connector_changed_modeset
[21:46:33] ============== [PASSED] drm_validate_modeset ===============
[21:46:33] ====== drm_test_bridge_get_current_state (2 subtests) ======
[21:46:33] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[21:46:33] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[21:46:33] ======== [PASSED] drm_test_bridge_get_current_state ========
[21:46:33] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[21:46:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[21:46:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[21:46:33] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[21:46:33] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[21:46:33] ============== drm_bridge_alloc (2 subtests) ===============
[21:46:33] [PASSED] drm_test_drm_bridge_alloc_basic
[21:46:33] [PASSED] drm_test_drm_bridge_alloc_get_put
[21:46:33] ================ [PASSED] drm_bridge_alloc =================
[21:46:33] ================== drm_buddy (8 subtests) ==================
[21:46:33] [PASSED] drm_test_buddy_alloc_limit
[21:46:33] [PASSED] drm_test_buddy_alloc_optimistic
[21:46:33] [PASSED] drm_test_buddy_alloc_pessimistic
[21:46:33] [PASSED] drm_test_buddy_alloc_pathological
[21:46:33] [PASSED] drm_test_buddy_alloc_contiguous
[21:46:33] [PASSED] drm_test_buddy_alloc_clear
[21:46:33] [PASSED] drm_test_buddy_alloc_range_bias
[21:46:34] [PASSED] drm_test_buddy_fragmentation_performance
[21:46:34] ==================== [PASSED] drm_buddy ====================
[21:46:34] ============= drm_cmdline_parser (40 subtests) =============
[21:46:34] [PASSED] drm_test_cmdline_force_d_only
[21:46:34] [PASSED] drm_test_cmdline_force_D_only_dvi
[21:46:34] [PASSED] drm_test_cmdline_force_D_only_hdmi
[21:46:34] [PASSED] drm_test_cmdline_force_D_only_not_digital
[21:46:34] [PASSED] drm_test_cmdline_force_e_only
[21:46:34] [PASSED] drm_test_cmdline_res
[21:46:34] [PASSED] drm_test_cmdline_res_vesa
[21:46:34] [PASSED] drm_test_cmdline_res_vesa_rblank
[21:46:34] [PASSED] drm_test_cmdline_res_rblank
[21:46:34] [PASSED] drm_test_cmdline_res_bpp
[21:46:34] [PASSED] drm_test_cmdline_res_refresh
[21:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh
[21:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[21:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[21:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[21:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[21:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[21:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[21:46:34] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[21:46:34] [PASSED] drm_test_cmdline_res_margins_force_on
[21:46:34] [PASSED] drm_test_cmdline_res_vesa_margins
[21:46:34] [PASSED] drm_test_cmdline_name
[21:46:34] [PASSED] drm_test_cmdline_name_bpp
[21:46:34] [PASSED] drm_test_cmdline_name_option
[21:46:34] [PASSED] drm_test_cmdline_name_bpp_option
[21:46:34] [PASSED] drm_test_cmdline_rotate_0
[21:46:34] [PASSED] drm_test_cmdline_rotate_90
[21:46:34] [PASSED] drm_test_cmdline_rotate_180
[21:46:34] [PASSED] drm_test_cmdline_rotate_270
[21:46:34] [PASSED] drm_test_cmdline_hmirror
[21:46:34] [PASSED] drm_test_cmdline_vmirror
[21:46:34] [PASSED] drm_test_cmdline_margin_options
[21:46:34] [PASSED] drm_test_cmdline_multiple_options
[21:46:34] [PASSED] drm_test_cmdline_bpp_extra_and_option
[21:46:34] [PASSED] drm_test_cmdline_extra_and_option
[21:46:34] [PASSED] drm_test_cmdline_freestanding_options
[21:46:34] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[21:46:34] [PASSED] drm_test_cmdline_panel_orientation
[21:46:34] ================ drm_test_cmdline_invalid =================
[21:46:34] [PASSED] margin_only
[21:46:34] [PASSED] interlace_only
[21:46:34] [PASSED] res_missing_x
[21:46:34] [PASSED] res_missing_y
[21:46:34] [PASSED] res_bad_y
[21:46:34] [PASSED] res_missing_y_bpp
[21:46:34] [PASSED] res_bad_bpp
[21:46:34] [PASSED] res_bad_refresh
[21:46:34] [PASSED] res_bpp_refresh_force_on_off
[21:46:34] [PASSED] res_invalid_mode
[21:46:34] [PASSED] res_bpp_wrong_place_mode
[21:46:34] [PASSED] name_bpp_refresh
[21:46:34] [PASSED] name_refresh
[21:46:34] [PASSED] name_refresh_wrong_mode
[21:46:34] [PASSED] name_refresh_invalid_mode
[21:46:34] [PASSED] rotate_multiple
[21:46:34] [PASSED] rotate_invalid_val
[21:46:34] [PASSED] rotate_truncated
[21:46:34] [PASSED] invalid_option
[21:46:34] [PASSED] invalid_tv_option
[21:46:34] [PASSED] truncated_tv_option
[21:46:34] ============ [PASSED] drm_test_cmdline_invalid =============
[21:46:34] =============== drm_test_cmdline_tv_options ===============
[21:46:34] [PASSED] NTSC
[21:46:34] [PASSED] NTSC_443
[21:46:34] [PASSED] NTSC_J
[21:46:34] [PASSED] PAL
[21:46:34] [PASSED] PAL_M
[21:46:34] [PASSED] PAL_N
[21:46:34] [PASSED] SECAM
[21:46:34] [PASSED] MONO_525
[21:46:34] [PASSED] MONO_625
[21:46:34] =========== [PASSED] drm_test_cmdline_tv_options ===========
[21:46:34] =============== [PASSED] drm_cmdline_parser ================
[21:46:34] ========== drmm_connector_hdmi_init (20 subtests) ==========
[21:46:34] [PASSED] drm_test_connector_hdmi_init_valid
[21:46:34] [PASSED] drm_test_connector_hdmi_init_bpc_8
[21:46:34] [PASSED] drm_test_connector_hdmi_init_bpc_10
[21:46:34] [PASSED] drm_test_connector_hdmi_init_bpc_12
[21:46:34] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[21:46:34] [PASSED] drm_test_connector_hdmi_init_bpc_null
[21:46:34] [PASSED] drm_test_connector_hdmi_init_formats_empty
[21:46:34] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[21:46:34] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:46:34] [PASSED] supported_formats=0x9 yuv420_allowed=1
[21:46:34] [PASSED] supported_formats=0x9 yuv420_allowed=0
[21:46:34] [PASSED] supported_formats=0x3 yuv420_allowed=1
[21:46:34] [PASSED] supported_formats=0x3 yuv420_allowed=0
[21:46:34] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[21:46:34] [PASSED] drm_test_connector_hdmi_init_null_ddc
[21:46:34] [PASSED] drm_test_connector_hdmi_init_null_product
[21:46:34] [PASSED] drm_test_connector_hdmi_init_null_vendor
[21:46:34] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[21:46:34] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[21:46:34] [PASSED] drm_test_connector_hdmi_init_product_valid
[21:46:34] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[21:46:34] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[21:46:34] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[21:46:34] ========= drm_test_connector_hdmi_init_type_valid =========
[21:46:34] [PASSED] HDMI-A
[21:46:34] [PASSED] HDMI-B
[21:46:34] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[21:46:34] ======== drm_test_connector_hdmi_init_type_invalid ========
[21:46:34] [PASSED] Unknown
[21:46:34] [PASSED] VGA
[21:46:34] [PASSED] DVI-I
[21:46:34] [PASSED] DVI-D
[21:46:34] [PASSED] DVI-A
[21:46:34] [PASSED] Composite
[21:46:34] [PASSED] SVIDEO
[21:46:34] [PASSED] LVDS
[21:46:34] [PASSED] Component
[21:46:34] [PASSED] DIN
[21:46:34] [PASSED] DP
[21:46:34] [PASSED] TV
[21:46:34] [PASSED] eDP
[21:46:34] [PASSED] Virtual
[21:46:34] [PASSED] DSI
[21:46:34] [PASSED] DPI
[21:46:34] [PASSED] Writeback
[21:46:34] [PASSED] SPI
[21:46:34] [PASSED] USB
[21:46:34] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[21:46:34] ============ [PASSED] drmm_connector_hdmi_init =============
[21:46:34] ============= drmm_connector_init (3 subtests) =============
[21:46:34] [PASSED] drm_test_drmm_connector_init
[21:46:34] [PASSED] drm_test_drmm_connector_init_null_ddc
[21:46:34] ========= drm_test_drmm_connector_init_type_valid =========
[21:46:34] [PASSED] Unknown
[21:46:34] [PASSED] VGA
[21:46:34] [PASSED] DVI-I
[21:46:34] [PASSED] DVI-D
[21:46:34] [PASSED] DVI-A
[21:46:34] [PASSED] Composite
[21:46:34] [PASSED] SVIDEO
[21:46:34] [PASSED] LVDS
[21:46:34] [PASSED] Component
[21:46:34] [PASSED] DIN
[21:46:34] [PASSED] DP
[21:46:34] [PASSED] HDMI-A
[21:46:34] [PASSED] HDMI-B
[21:46:34] [PASSED] TV
[21:46:34] [PASSED] eDP
[21:46:34] [PASSED] Virtual
[21:46:34] [PASSED] DSI
[21:46:34] [PASSED] DPI
[21:46:34] [PASSED] Writeback
[21:46:34] [PASSED] SPI
[21:46:34] [PASSED] USB
[21:46:34] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[21:46:34] =============== [PASSED] drmm_connector_init ===============
[21:46:34] ========= drm_connector_dynamic_init (6 subtests) ==========
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_init
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_init_properties
[21:46:34] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[21:46:34] [PASSED] Unknown
[21:46:34] [PASSED] VGA
[21:46:34] [PASSED] DVI-I
[21:46:34] [PASSED] DVI-D
[21:46:34] [PASSED] DVI-A
[21:46:34] [PASSED] Composite
[21:46:34] [PASSED] SVIDEO
[21:46:34] [PASSED] LVDS
[21:46:34] [PASSED] Component
[21:46:34] [PASSED] DIN
[21:46:34] [PASSED] DP
[21:46:34] [PASSED] HDMI-A
[21:46:34] [PASSED] HDMI-B
[21:46:34] [PASSED] TV
[21:46:34] [PASSED] eDP
[21:46:34] [PASSED] Virtual
[21:46:34] [PASSED] DSI
[21:46:34] [PASSED] DPI
[21:46:34] [PASSED] Writeback
[21:46:34] [PASSED] SPI
[21:46:34] [PASSED] USB
[21:46:34] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[21:46:34] ======== drm_test_drm_connector_dynamic_init_name =========
[21:46:34] [PASSED] Unknown
[21:46:34] [PASSED] VGA
[21:46:34] [PASSED] DVI-I
[21:46:34] [PASSED] DVI-D
[21:46:34] [PASSED] DVI-A
[21:46:34] [PASSED] Composite
[21:46:34] [PASSED] SVIDEO
[21:46:34] [PASSED] LVDS
[21:46:34] [PASSED] Component
[21:46:34] [PASSED] DIN
[21:46:34] [PASSED] DP
[21:46:34] [PASSED] HDMI-A
[21:46:34] [PASSED] HDMI-B
[21:46:34] [PASSED] TV
[21:46:34] [PASSED] eDP
[21:46:34] [PASSED] Virtual
[21:46:34] [PASSED] DSI
[21:46:34] [PASSED] DPI
[21:46:34] [PASSED] Writeback
[21:46:34] [PASSED] SPI
[21:46:34] [PASSED] USB
[21:46:34] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[21:46:34] =========== [PASSED] drm_connector_dynamic_init ============
[21:46:34] ==== drm_connector_dynamic_register_early (4 subtests) =====
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[21:46:34] ====== [PASSED] drm_connector_dynamic_register_early =======
[21:46:34] ======= drm_connector_dynamic_register (7 subtests) ========
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[21:46:34] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[21:46:34] ========= [PASSED] drm_connector_dynamic_register ==========
[21:46:34] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[21:46:34] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[21:46:34] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[21:46:34] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[21:46:34] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[21:46:34] ========== drm_test_get_tv_mode_from_name_valid ===========
[21:46:34] [PASSED] NTSC
[21:46:34] [PASSED] NTSC-443
[21:46:34] [PASSED] NTSC-J
[21:46:34] [PASSED] PAL
[21:46:34] [PASSED] PAL-M
[21:46:34] [PASSED] PAL-N
[21:46:34] [PASSED] SECAM
[21:46:34] [PASSED] Mono
[21:46:34] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[21:46:34] [PASSED] drm_test_get_tv_mode_from_name_truncated
[21:46:34] ============ [PASSED] drm_get_tv_mode_from_name ============
[21:46:34] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[21:46:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[21:46:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[21:46:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[21:46:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[21:46:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[21:46:34] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[21:46:34] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[21:46:34] [PASSED] VIC 96
[21:46:34] [PASSED] VIC 97
[21:46:34] [PASSED] VIC 101
[21:46:34] [PASSED] VIC 102
[21:46:34] [PASSED] VIC 106
[21:46:34] [PASSED] VIC 107
[21:46:34] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[21:46:34] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[21:46:34] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[21:46:34] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[21:46:34] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[21:46:34] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[21:46:34] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[21:46:34] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[21:46:34] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[21:46:34] [PASSED] Automatic
[21:46:34] [PASSED] Full
[21:46:34] [PASSED] Limited 16:235
[21:46:34] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[21:46:34] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[21:46:34] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[21:46:34] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[21:46:34] === drm_test_drm_hdmi_connector_get_output_format_name ====
[21:46:34] [PASSED] RGB
[21:46:34] [PASSED] YUV 4:2:0
[21:46:34] [PASSED] YUV 4:2:2
[21:46:34] [PASSED] YUV 4:4:4
[21:46:34] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[21:46:34] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[21:46:34] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[21:46:34] ============= drm_damage_helper (21 subtests) ==============
[21:46:34] [PASSED] drm_test_damage_iter_no_damage
[21:46:34] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[21:46:34] [PASSED] drm_test_damage_iter_no_damage_src_moved
[21:46:34] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[21:46:34] [PASSED] drm_test_damage_iter_no_damage_not_visible
[21:46:34] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[21:46:34] [PASSED] drm_test_damage_iter_no_damage_no_fb
[21:46:34] [PASSED] drm_test_damage_iter_simple_damage
[21:46:34] [PASSED] drm_test_damage_iter_single_damage
[21:46:34] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[21:46:34] [PASSED] drm_test_damage_iter_single_damage_outside_src
[21:46:34] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[21:46:34] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[21:46:34] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[21:46:34] [PASSED] drm_test_damage_iter_single_damage_src_moved
[21:46:34] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[21:46:34] [PASSED] drm_test_damage_iter_damage
[21:46:34] [PASSED] drm_test_damage_iter_damage_one_intersect
[21:46:34] [PASSED] drm_test_damage_iter_damage_one_outside
[21:46:34] [PASSED] drm_test_damage_iter_damage_src_moved
[21:46:34] [PASSED] drm_test_damage_iter_damage_not_visible
[21:46:34] ================ [PASSED] drm_damage_helper ================
[21:46:34] ============== drm_dp_mst_helper (3 subtests) ==============
[21:46:34] ============== drm_test_dp_mst_calc_pbn_mode ==============
[21:46:34] [PASSED] Clock 154000 BPP 30 DSC disabled
[21:46:34] [PASSED] Clock 234000 BPP 30 DSC disabled
[21:46:34] [PASSED] Clock 297000 BPP 24 DSC disabled
[21:46:34] [PASSED] Clock 332880 BPP 24 DSC enabled
[21:46:34] [PASSED] Clock 324540 BPP 24 DSC enabled
[21:46:34] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[21:46:34] ============== drm_test_dp_mst_calc_pbn_div ===============
[21:46:34] [PASSED] Link rate 2000000 lane count 4
[21:46:34] [PASSED] Link rate 2000000 lane count 2
[21:46:34] [PASSED] Link rate 2000000 lane count 1
[21:46:34] [PASSED] Link rate 1350000 lane count 4
[21:46:34] [PASSED] Link rate 1350000 lane count 2
[21:46:34] [PASSED] Link rate 1350000 lane count 1
[21:46:34] [PASSED] Link rate 1000000 lane count 4
[21:46:34] [PASSED] Link rate 1000000 lane count 2
[21:46:34] [PASSED] Link rate 1000000 lane count 1
[21:46:34] [PASSED] Link rate 810000 lane count 4
[21:46:34] [PASSED] Link rate 810000 lane count 2
[21:46:34] [PASSED] Link rate 810000 lane count 1
[21:46:34] [PASSED] Link rate 540000 lane count 4
[21:46:34] [PASSED] Link rate 540000 lane count 2
[21:46:34] [PASSED] Link rate 540000 lane count 1
[21:46:34] [PASSED] Link rate 270000 lane count 4
[21:46:34] [PASSED] Link rate 270000 lane count 2
[21:46:34] [PASSED] Link rate 270000 lane count 1
[21:46:34] [PASSED] Link rate 162000 lane count 4
[21:46:34] [PASSED] Link rate 162000 lane count 2
[21:46:34] [PASSED] Link rate 162000 lane count 1
[21:46:34] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[21:46:34] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[21:46:34] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[21:46:34] [PASSED] DP_POWER_UP_PHY with port number
[21:46:34] [PASSED] DP_POWER_DOWN_PHY with port number
[21:46:34] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[21:46:34] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[21:46:34] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[21:46:34] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[21:46:34] [PASSED] DP_QUERY_PAYLOAD with port number
[21:46:34] [PASSED] DP_QUERY_PAYLOAD with VCPI
[21:46:34] [PASSED] DP_REMOTE_DPCD_READ with port number
[21:46:34] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[21:46:34] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[21:46:34] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[21:46:34] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[21:46:34] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[21:46:34] [PASSED] DP_REMOTE_I2C_READ with port number
[21:46:34] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[21:46:34] [PASSED] DP_REMOTE_I2C_READ with transactions array
[21:46:34] [PASSED] DP_REMOTE_I2C_WRITE with port number
[21:46:34] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[21:46:34] [PASSED] DP_REMOTE_I2C_WRITE with data array
[21:46:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[21:46:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[21:46:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[21:46:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[21:46:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[21:46:34] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[21:46:34] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[21:46:34] ================ [PASSED] drm_dp_mst_helper ================
[21:46:34] ================== drm_exec (7 subtests) ===================
[21:46:34] [PASSED] sanitycheck
[21:46:34] [PASSED] test_lock
[21:46:34] [PASSED] test_lock_unlock
[21:46:34] [PASSED] test_duplicates
[21:46:34] [PASSED] test_prepare
[21:46:34] [PASSED] test_prepare_array
[21:46:34] [PASSED] test_multiple_loops
[21:46:34] ==================== [PASSED] drm_exec =====================
[21:46:34] =========== drm_format_helper_test (17 subtests) ===========
[21:46:34] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[21:46:34] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[21:46:34] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[21:46:34] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[21:46:34] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[21:46:34] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[21:46:34] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[21:46:34] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[21:46:34] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[21:46:34] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[21:46:34] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[21:46:34] ============== drm_test_fb_xrgb8888_to_mono ===============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[21:46:34] ==================== drm_test_fb_swab =====================
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ================ [PASSED] drm_test_fb_swab =================
[21:46:34] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[21:46:34] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[21:46:34] [PASSED] single_pixel_source_buffer
[21:46:34] [PASSED] single_pixel_clip_rectangle
[21:46:34] [PASSED] well_known_colors
[21:46:34] [PASSED] destination_pitch
[21:46:34] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[21:46:34] ================= drm_test_fb_clip_offset =================
[21:46:34] [PASSED] pass through
[21:46:34] [PASSED] horizontal offset
[21:46:34] [PASSED] vertical offset
[21:46:34] [PASSED] horizontal and vertical offset
[21:46:34] [PASSED] horizontal offset (custom pitch)
[21:46:34] [PASSED] vertical offset (custom pitch)
[21:46:34] [PASSED] horizontal and vertical offset (custom pitch)
[21:46:34] ============= [PASSED] drm_test_fb_clip_offset =============
[21:46:34] =================== drm_test_fb_memcpy ====================
[21:46:34] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[21:46:34] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[21:46:34] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[21:46:34] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[21:46:34] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[21:46:34] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[21:46:34] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[21:46:34] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[21:46:34] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[21:46:34] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[21:46:34] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[21:46:34] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[21:46:34] =============== [PASSED] drm_test_fb_memcpy ================
[21:46:34] ============= [PASSED] drm_format_helper_test ==============
[21:46:34] ================= drm_format (18 subtests) =================
[21:46:34] [PASSED] drm_test_format_block_width_invalid
[21:46:34] [PASSED] drm_test_format_block_width_one_plane
[21:46:34] [PASSED] drm_test_format_block_width_two_plane
[21:46:34] [PASSED] drm_test_format_block_width_three_plane
[21:46:34] [PASSED] drm_test_format_block_width_tiled
[21:46:34] [PASSED] drm_test_format_block_height_invalid
[21:46:34] [PASSED] drm_test_format_block_height_one_plane
[21:46:34] [PASSED] drm_test_format_block_height_two_plane
[21:46:34] [PASSED] drm_test_format_block_height_three_plane
[21:46:34] [PASSED] drm_test_format_block_height_tiled
[21:46:34] [PASSED] drm_test_format_min_pitch_invalid
[21:46:34] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[21:46:34] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[21:46:34] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[21:46:34] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[21:46:34] [PASSED] drm_test_format_min_pitch_two_plane
[21:46:34] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[21:46:34] [PASSED] drm_test_format_min_pitch_tiled
[21:46:34] =================== [PASSED] drm_format ====================
[21:46:34] ============== drm_framebuffer (10 subtests) ===============
[21:46:34] ========== drm_test_framebuffer_check_src_coords ==========
[21:46:34] [PASSED] Success: source fits into fb
[21:46:34] [PASSED] Fail: overflowing fb with x-axis coordinate
[21:46:34] [PASSED] Fail: overflowing fb with y-axis coordinate
[21:46:34] [PASSED] Fail: overflowing fb with source width
[21:46:34] [PASSED] Fail: overflowing fb with source height
[21:46:34] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[21:46:34] [PASSED] drm_test_framebuffer_cleanup
[21:46:34] =============== drm_test_framebuffer_create ===============
[21:46:34] [PASSED] ABGR8888 normal sizes
[21:46:34] [PASSED] ABGR8888 max sizes
[21:46:34] [PASSED] ABGR8888 pitch greater than min required
[21:46:34] [PASSED] ABGR8888 pitch less than min required
[21:46:34] [PASSED] ABGR8888 Invalid width
[21:46:34] [PASSED] ABGR8888 Invalid buffer handle
[21:46:34] [PASSED] No pixel format
[21:46:34] [PASSED] ABGR8888 Width 0
[21:46:34] [PASSED] ABGR8888 Height 0
[21:46:34] [PASSED] ABGR8888 Out of bound height * pitch combination
[21:46:34] [PASSED] ABGR8888 Large buffer offset
[21:46:34] [PASSED] ABGR8888 Buffer offset for inexistent plane
[21:46:34] [PASSED] ABGR8888 Invalid flag
[21:46:34] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[21:46:34] [PASSED] ABGR8888 Valid buffer modifier
[21:46:34] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[21:46:34] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[21:46:34] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[21:46:34] [PASSED] NV12 Normal sizes
[21:46:34] [PASSED] NV12 Max sizes
[21:46:34] [PASSED] NV12 Invalid pitch
[21:46:34] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[21:46:34] [PASSED] NV12 different modifier per-plane
[21:46:34] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[21:46:34] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[21:46:34] [PASSED] NV12 Modifier for inexistent plane
[21:46:34] [PASSED] NV12 Handle for inexistent plane
[21:46:34] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[21:46:34] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[21:46:34] [PASSED] YVU420 Normal sizes
[21:46:34] [PASSED] YVU420 Max sizes
[21:46:34] [PASSED] YVU420 Invalid pitch
[21:46:34] [PASSED] YVU420 Different pitches
[21:46:34] [PASSED] YVU420 Different buffer offsets/pitches
[21:46:34] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[21:46:34] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[21:46:34] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[21:46:34] [PASSED] YVU420 Valid modifier
[21:46:34] [PASSED] YVU420 Different modifiers per plane
[21:46:34] [PASSED] YVU420 Modifier for inexistent plane
[21:46:34] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[21:46:34] [PASSED] X0L2 Normal sizes
[21:46:34] [PASSED] X0L2 Max sizes
[21:46:34] [PASSED] X0L2 Invalid pitch
[21:46:34] [PASSED] X0L2 Pitch greater than minimum required
[21:46:34] [PASSED] X0L2 Handle for inexistent plane
[21:46:34] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[21:46:34] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[21:46:34] [PASSED] X0L2 Valid modifier
[21:46:34] [PASSED] X0L2 Modifier for inexistent plane
[21:46:34] =========== [PASSED] drm_test_framebuffer_create ===========
[21:46:34] [PASSED] drm_test_framebuffer_free
[21:46:34] [PASSED] drm_test_framebuffer_init
[21:46:34] [PASSED] drm_test_framebuffer_init_bad_format
[21:46:34] [PASSED] drm_test_framebuffer_init_dev_mismatch
[21:46:34] [PASSED] drm_test_framebuffer_lookup
[21:46:34] [PASSED] drm_test_framebuffer_lookup_inexistent
[21:46:34] [PASSED] drm_test_framebuffer_modifiers_not_supported
[21:46:34] ================= [PASSED] drm_framebuffer =================
[21:46:34] ================ drm_gem_shmem (8 subtests) ================
[21:46:34] [PASSED] drm_gem_shmem_test_obj_create
[21:46:34] [PASSED] drm_gem_shmem_test_obj_create_private
[21:46:34] [PASSED] drm_gem_shmem_test_pin_pages
[21:46:34] [PASSED] drm_gem_shmem_test_vmap
[21:46:34] [PASSED] drm_gem_shmem_test_get_pages_sgt
[21:46:34] [PASSED] drm_gem_shmem_test_get_sg_table
[21:46:34] [PASSED] drm_gem_shmem_test_madvise
[21:46:34] [PASSED] drm_gem_shmem_test_purge
[21:46:34] ================== [PASSED] drm_gem_shmem ==================
[21:46:34] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[21:46:34] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[21:46:34] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[21:46:34] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[21:46:34] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[21:46:34] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[21:46:34] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[21:46:34] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[21:46:34] [PASSED] Automatic
[21:46:34] [PASSED] Full
[21:46:34] [PASSED] Limited 16:235
[21:46:34] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[21:46:34] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[21:46:34] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[21:46:34] [PASSED] drm_test_check_disable_connector
[21:46:34] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[21:46:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[21:46:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[21:46:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[21:46:34] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[21:46:34] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[21:46:34] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[21:46:34] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[21:46:34] [PASSED] drm_test_check_output_bpc_dvi
[21:46:34] [PASSED] drm_test_check_output_bpc_format_vic_1
[21:46:34] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[21:46:34] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[21:46:34] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[21:46:34] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[21:46:34] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[21:46:34] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[21:46:34] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[21:46:34] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[21:46:34] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[21:46:34] [PASSED] drm_test_check_broadcast_rgb_value
[21:46:34] [PASSED] drm_test_check_bpc_8_value
[21:46:34] [PASSED] drm_test_check_bpc_10_value
[21:46:34] [PASSED] drm_test_check_bpc_12_value
[21:46:34] [PASSED] drm_test_check_format_value
[21:46:34] [PASSED] drm_test_check_tmds_char_value
[21:46:34] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[21:46:34] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[21:46:34] [PASSED] drm_test_check_mode_valid
[21:46:34] [PASSED] drm_test_check_mode_valid_reject
[21:46:34] [PASSED] drm_test_check_mode_valid_reject_rate
[21:46:34] [PASSED] drm_test_check_mode_valid_reject_max_clock
[21:46:34] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[21:46:34] ================= drm_managed (2 subtests) =================
[21:46:34] [PASSED] drm_test_managed_release_action
[21:46:34] [PASSED] drm_test_managed_run_action
[21:46:34] =================== [PASSED] drm_managed ===================
[21:46:34] =================== drm_mm (6 subtests) ====================
[21:46:34] [PASSED] drm_test_mm_init
[21:46:34] [PASSED] drm_test_mm_debug
[21:46:34] [PASSED] drm_test_mm_align32
[21:46:34] [PASSED] drm_test_mm_align64
[21:46:34] [PASSED] drm_test_mm_lowest
[21:46:34] [PASSED] drm_test_mm_highest
[21:46:34] ===================== [PASSED] drm_mm ======================
[21:46:34] ============= drm_modes_analog_tv (5 subtests) =============
[21:46:34] [PASSED] drm_test_modes_analog_tv_mono_576i
[21:46:34] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[21:46:34] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[21:46:34] [PASSED] drm_test_modes_analog_tv_pal_576i
[21:46:34] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[21:46:34] =============== [PASSED] drm_modes_analog_tv ===============
[21:46:34] ============== drm_plane_helper (2 subtests) ===============
[21:46:34] =============== drm_test_check_plane_state ================
[21:46:34] [PASSED] clipping_simple
[21:46:34] [PASSED] clipping_rotate_reflect
[21:46:34] [PASSED] positioning_simple
[21:46:34] [PASSED] upscaling
[21:46:34] [PASSED] downscaling
[21:46:34] [PASSED] rounding1
[21:46:34] [PASSED] rounding2
[21:46:34] [PASSED] rounding3
[21:46:34] [PASSED] rounding4
[21:46:34] =========== [PASSED] drm_test_check_plane_state ============
[21:46:34] =========== drm_test_check_invalid_plane_state ============
[21:46:34] [PASSED] positioning_invalid
[21:46:34] [PASSED] upscaling_invalid
[21:46:34] [PASSED] downscaling_invalid
[21:46:34] ======= [PASSED] drm_test_check_invalid_plane_state ========
[21:46:34] ================ [PASSED] drm_plane_helper =================
[21:46:34] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[21:46:34] ====== drm_test_connector_helper_tv_get_modes_check =======
[21:46:34] [PASSED] None
[21:46:34] [PASSED] PAL
[21:46:34] [PASSED] NTSC
[21:46:34] [PASSED] Both, NTSC Default
[21:46:34] [PASSED] Both, PAL Default
[21:46:34] [PASSED] Both, NTSC Default, with PAL on command-line
[21:46:34] [PASSED] Both, PAL Default, with NTSC on command-line
[21:46:34] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[21:46:34] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[21:46:34] ================== drm_rect (9 subtests) ===================
[21:46:34] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[21:46:34] [PASSED] drm_test_rect_clip_scaled_not_clipped
[21:46:34] [PASSED] drm_test_rect_clip_scaled_clipped
[21:46:34] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[21:46:34] ================= drm_test_rect_intersect =================
[21:46:34] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[21:46:34] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[21:46:34] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[21:46:34] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[21:46:34] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[21:46:34] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[21:46:34] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[21:46:34] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[21:46:34] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[21:46:34] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[21:46:34] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[21:46:34] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[21:46:34] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[21:46:34] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[21:46:34] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[21:46:34] ============= [PASSED] drm_test_rect_intersect =============
[21:46:34] ================ drm_test_rect_calc_hscale ================
[21:46:34] [PASSED] normal use
[21:46:34] [PASSED] out of max range
[21:46:34] [PASSED] out of min range
[21:46:34] [PASSED] zero dst
[21:46:34] [PASSED] negative src
[21:46:34] [PASSED] negative dst
[21:46:34] ============ [PASSED] drm_test_rect_calc_hscale ============
[21:46:34] ================ drm_test_rect_calc_vscale ================
[21:46:34] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[21:46:34] [PASSED] out of max range
[21:46:34] [PASSED] out of min range
[21:46:34] [PASSED] zero dst
[21:46:34] [PASSED] negative src
[21:46:34] [PASSED] negative dst
[21:46:34] ============ [PASSED] drm_test_rect_calc_vscale ============
[21:46:34] ================== drm_test_rect_rotate ===================
[21:46:34] [PASSED] reflect-x
[21:46:34] [PASSED] reflect-y
[21:46:34] [PASSED] rotate-0
[21:46:34] [PASSED] rotate-90
[21:46:34] [PASSED] rotate-180
[21:46:34] [PASSED] rotate-270
[21:46:34] ============== [PASSED] drm_test_rect_rotate ===============
[21:46:34] ================ drm_test_rect_rotate_inv =================
[21:46:34] [PASSED] reflect-x
[21:46:34] [PASSED] reflect-y
[21:46:34] [PASSED] rotate-0
[21:46:34] [PASSED] rotate-90
[21:46:34] [PASSED] rotate-180
[21:46:34] [PASSED] rotate-270
[21:46:34] ============ [PASSED] drm_test_rect_rotate_inv =============
[21:46:34] ==================== [PASSED] drm_rect =====================
[21:46:34] ============ drm_sysfb_modeset_test (1 subtest) ============
[21:46:34] ============ drm_test_sysfb_build_fourcc_list =============
[21:46:34] [PASSED] no native formats
[21:46:34] [PASSED] XRGB8888 as native format
[21:46:34] [PASSED] remove duplicates
[21:46:34] [PASSED] convert alpha formats
[21:46:34] [PASSED] random formats
[21:46:34] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[21:46:34] ============= [PASSED] drm_sysfb_modeset_test ==============
[21:46:34] ============================================================
[21:46:34] Testing complete. Ran 622 tests: passed: 622
[21:46:34] Elapsed time: 27.070s total, 1.761s configuring, 24.889s building, 0.403s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[21:46:34] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:46:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[21:46:45] Starting KUnit Kernel (1/1)...
[21:46:45] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:46:45] ================= ttm_device (5 subtests) ==================
[21:46:45] [PASSED] ttm_device_init_basic
[21:46:45] [PASSED] ttm_device_init_multiple
[21:46:45] [PASSED] ttm_device_fini_basic
[21:46:45] [PASSED] ttm_device_init_no_vma_man
[21:46:45] ================== ttm_device_init_pools ==================
[21:46:45] [PASSED] No DMA allocations, no DMA32 required
[21:46:45] [PASSED] DMA allocations, DMA32 required
[21:46:45] [PASSED] No DMA allocations, DMA32 required
[21:46:45] [PASSED] DMA allocations, no DMA32 required
[21:46:45] ============== [PASSED] ttm_device_init_pools ==============
[21:46:45] =================== [PASSED] ttm_device ====================
[21:46:45] ================== ttm_pool (8 subtests) ===================
[21:46:45] ================== ttm_pool_alloc_basic ===================
[21:46:45] [PASSED] One page
[21:46:45] [PASSED] More than one page
[21:46:45] [PASSED] Above the allocation limit
[21:46:45] [PASSED] One page, with coherent DMA mappings enabled
[21:46:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:46:45] ============== [PASSED] ttm_pool_alloc_basic ===============
[21:46:45] ============== ttm_pool_alloc_basic_dma_addr ==============
[21:46:45] [PASSED] One page
[21:46:45] [PASSED] More than one page
[21:46:45] [PASSED] Above the allocation limit
[21:46:45] [PASSED] One page, with coherent DMA mappings enabled
[21:46:45] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:46:45] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[21:46:45] [PASSED] ttm_pool_alloc_order_caching_match
[21:46:45] [PASSED] ttm_pool_alloc_caching_mismatch
[21:46:45] [PASSED] ttm_pool_alloc_order_mismatch
[21:46:45] [PASSED] ttm_pool_free_dma_alloc
[21:46:45] [PASSED] ttm_pool_free_no_dma_alloc
[21:46:45] [PASSED] ttm_pool_fini_basic
[21:46:45] ==================== [PASSED] ttm_pool =====================
[21:46:45] ================ ttm_resource (8 subtests) =================
[21:46:45] ================= ttm_resource_init_basic =================
[21:46:45] [PASSED] Init resource in TTM_PL_SYSTEM
[21:46:45] [PASSED] Init resource in TTM_PL_VRAM
[21:46:45] [PASSED] Init resource in a private placement
[21:46:45] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[21:46:45] ============= [PASSED] ttm_resource_init_basic =============
[21:46:45] [PASSED] ttm_resource_init_pinned
[21:46:45] [PASSED] ttm_resource_fini_basic
[21:46:45] [PASSED] ttm_resource_manager_init_basic
[21:46:45] [PASSED] ttm_resource_manager_usage_basic
[21:46:45] [PASSED] ttm_resource_manager_set_used_basic
[21:46:45] [PASSED] ttm_sys_man_alloc_basic
[21:46:45] [PASSED] ttm_sys_man_free_basic
[21:46:45] ================== [PASSED] ttm_resource ===================
[21:46:45] =================== ttm_tt (15 subtests) ===================
[21:46:45] ==================== ttm_tt_init_basic ====================
[21:46:45] [PASSED] Page-aligned size
[21:46:45] [PASSED] Extra pages requested
[21:46:45] ================ [PASSED] ttm_tt_init_basic ================
[21:46:45] [PASSED] ttm_tt_init_misaligned
[21:46:45] [PASSED] ttm_tt_fini_basic
[21:46:45] [PASSED] ttm_tt_fini_sg
[21:46:45] [PASSED] ttm_tt_fini_shmem
[21:46:45] [PASSED] ttm_tt_create_basic
[21:46:45] [PASSED] ttm_tt_create_invalid_bo_type
[21:46:45] [PASSED] ttm_tt_create_ttm_exists
[21:46:45] [PASSED] ttm_tt_create_failed
[21:46:45] [PASSED] ttm_tt_destroy_basic
[21:46:45] [PASSED] ttm_tt_populate_null_ttm
[21:46:45] [PASSED] ttm_tt_populate_populated_ttm
[21:46:45] [PASSED] ttm_tt_unpopulate_basic
[21:46:45] [PASSED] ttm_tt_unpopulate_empty_ttm
[21:46:45] [PASSED] ttm_tt_swapin_basic
[21:46:45] ===================== [PASSED] ttm_tt ======================
[21:46:45] =================== ttm_bo (14 subtests) ===================
[21:46:45] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[21:46:45] [PASSED] Cannot be interrupted and sleeps
[21:46:45] [PASSED] Cannot be interrupted, locks straight away
[21:46:45] [PASSED] Can be interrupted, sleeps
[21:46:45] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[21:46:45] [PASSED] ttm_bo_reserve_locked_no_sleep
[21:46:45] [PASSED] ttm_bo_reserve_no_wait_ticket
[21:46:45] [PASSED] ttm_bo_reserve_double_resv
[21:46:45] [PASSED] ttm_bo_reserve_interrupted
[21:46:45] [PASSED] ttm_bo_reserve_deadlock
[21:46:45] [PASSED] ttm_bo_unreserve_basic
[21:46:45] [PASSED] ttm_bo_unreserve_pinned
[21:46:45] [PASSED] ttm_bo_unreserve_bulk
[21:46:45] [PASSED] ttm_bo_fini_basic
[21:46:45] [PASSED] ttm_bo_fini_shared_resv
[21:46:45] [PASSED] ttm_bo_pin_basic
[21:46:45] [PASSED] ttm_bo_pin_unpin_resource
[21:46:45] [PASSED] ttm_bo_multiple_pin_one_unpin
[21:46:45] ===================== [PASSED] ttm_bo ======================
[21:46:45] ============== ttm_bo_validate (21 subtests) ===============
[21:46:45] ============== ttm_bo_init_reserved_sys_man ===============
[21:46:45] [PASSED] Buffer object for userspace
[21:46:45] [PASSED] Kernel buffer object
[21:46:45] [PASSED] Shared buffer object
[21:46:45] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[21:46:45] ============== ttm_bo_init_reserved_mock_man ==============
[21:46:45] [PASSED] Buffer object for userspace
[21:46:45] [PASSED] Kernel buffer object
[21:46:45] [PASSED] Shared buffer object
[21:46:45] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[21:46:45] [PASSED] ttm_bo_init_reserved_resv
[21:46:45] ================== ttm_bo_validate_basic ==================
[21:46:45] [PASSED] Buffer object for userspace
[21:46:45] [PASSED] Kernel buffer object
[21:46:45] [PASSED] Shared buffer object
[21:46:45] ============== [PASSED] ttm_bo_validate_basic ==============
[21:46:45] [PASSED] ttm_bo_validate_invalid_placement
[21:46:45] ============= ttm_bo_validate_same_placement ==============
[21:46:45] [PASSED] System manager
[21:46:45] [PASSED] VRAM manager
[21:46:45] ========= [PASSED] ttm_bo_validate_same_placement ==========
[21:46:45] [PASSED] ttm_bo_validate_failed_alloc
[21:46:45] [PASSED] ttm_bo_validate_pinned
[21:46:45] [PASSED] ttm_bo_validate_busy_placement
[21:46:45] ================ ttm_bo_validate_multihop =================
[21:46:45] [PASSED] Buffer object for userspace
[21:46:45] [PASSED] Kernel buffer object
[21:46:45] [PASSED] Shared buffer object
[21:46:45] ============ [PASSED] ttm_bo_validate_multihop =============
[21:46:45] ========== ttm_bo_validate_no_placement_signaled ==========
[21:46:45] [PASSED] Buffer object in system domain, no page vector
[21:46:45] [PASSED] Buffer object in system domain with an existing page vector
[21:46:45] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[21:46:45] ======== ttm_bo_validate_no_placement_not_signaled ========
[21:46:45] [PASSED] Buffer object for userspace
[21:46:45] [PASSED] Kernel buffer object
[21:46:45] [PASSED] Shared buffer object
[21:46:45] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[21:46:45] [PASSED] ttm_bo_validate_move_fence_signaled
[21:46:45] ========= ttm_bo_validate_move_fence_not_signaled =========
[21:46:45] [PASSED] Waits for GPU
[21:46:45] [PASSED] Tries to lock straight away
[21:46:45] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[21:46:45] [PASSED] ttm_bo_validate_happy_evict
[21:46:45] [PASSED] ttm_bo_validate_all_pinned_evict
[21:46:45] [PASSED] ttm_bo_validate_allowed_only_evict
[21:46:45] [PASSED] ttm_bo_validate_deleted_evict
[21:46:45] [PASSED] ttm_bo_validate_busy_domain_evict
[21:46:45] [PASSED] ttm_bo_validate_evict_gutting
[21:46:45] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[21:46:45] ================= [PASSED] ttm_bo_validate =================
[21:46:45] ============================================================
[21:46:45] Testing complete. Ran 101 tests: passed: 101
[21:46:45] Elapsed time: 11.330s total, 1.703s configuring, 9.361s building, 0.226s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 30+ messages in thread* ✗ CI.checksparse: warning for drm/i915: dissolve soc/
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (14 preceding siblings ...)
2025-11-19 21:46 ` ✓ CI.KUnit: success " Patchwork
@ 2025-11-19 22:02 ` Patchwork
2025-11-19 22:29 ` ✓ Xe.CI.BAT: success " Patchwork
` (7 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2025-11-19 22:02 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: dissolve soc/
URL : https://patchwork.freedesktop.org/series/157792/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast a95032b2166b5ae428c065917b843a1caf1e82b8
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_casf.c:147:21: error: too long token expansion
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_lt_phy.c:1935:35: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file:
+drivers/gpu/drm/i915/gt/intel_reset.c:1569:12: warning: context imbalance in '_intel_gt_reset_lock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/intel_sseu.c:600:17: error: too long token expansion
+drivers/gpu/drm/i915/i915_active.c:1062:16: warning: context imbalance in '__i915_active_fence_set' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: expected struct list_head const *list
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: got struct list_head [noderef] __rcu *pos
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/i915_gpu_error.c:692:3: warning: symbol 'guc_hw_reg_state' was not declared. Should it be static?
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/intel_uncore.c:1930:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1931:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1932:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1933:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1998:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1999:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2000:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2020:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2021:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2022:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_wakeref.c:148:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 30+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915: dissolve soc/
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (15 preceding siblings ...)
2025-11-19 22:02 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-11-19 22:29 ` Patchwork
2025-11-20 3:17 ` ✗ Xe.CI.Full: failure " Patchwork
` (6 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2025-11-19 22:29 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2402 bytes --]
== Series Details ==
Series: drm/i915: dissolve soc/
URL : https://patchwork.freedesktop.org/series/157792/
State : success
== Summary ==
CI Bug Log - changes from xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8_BAT -> xe-pw-157792v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-157792v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_force_connector_basic@force-connector-state:
- bat-bmg-2: [PASS][1] -> [ABORT][2] ([Intel XE#1727] / [Intel XE#4760])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/bat-bmg-2/igt@kms_force_connector_basic@force-connector-state.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/bat-bmg-2/igt@kms_force_connector_basic@force-connector-state.html
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [PASS][3] -> [FAIL][4] ([Intel XE#6519])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/bat-dg2-oem2/igt@xe_waitfence@engine.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/bat-dg2-oem2/igt@xe_waitfence@engine.html
* igt@xe_waitfence@reltime:
- bat-dg2-oem2: [PASS][5] -> [FAIL][6] ([Intel XE#6520])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
[Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
Build changes
-------------
* Linux: xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8 -> xe-pw-157792v1
IGT_8633: 8633
xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8: a95032b2166b5ae428c065917b843a1caf1e82b8
xe-pw-157792v1: 157792v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/index.html
[-- Attachment #2: Type: text/html, Size: 3019 bytes --]
^ permalink raw reply [flat|nested] 30+ messages in thread* ✗ Xe.CI.Full: failure for drm/i915: dissolve soc/
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (16 preceding siblings ...)
2025-11-19 22:29 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-11-20 3:17 ` Patchwork
2025-11-20 16:52 ` [PATCH v2 00/13] " Ville Syrjälä
` (5 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2025-11-20 3:17 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 26857 bytes --]
== Series Details ==
Series: drm/i915: dissolve soc/
URL : https://patchwork.freedesktop.org/series/157792/
State : failure
== Summary ==
CI Bug Log - changes from xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8_FULL -> xe-pw-157792v1_FULL
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with xe-pw-157792v1_FULL need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-157792v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-157792v1_FULL:
### IGT changes ###
#### Warnings ####
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind:
- shard-dg2-set2: [INCOMPLETE][1] ([Intel XE#4842]) -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-dg2-436/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-464/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind.html
* igt@xe_module_load@load:
- shard-adlp: ([PASS][3], [PASS][4], [PASS][5], [SKIP][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27]) ([Intel XE#378] / [Intel XE#5612]) -> ([DMESG-WARN][28], [DMESG-WARN][29], [DMESG-WARN][30], [DMESG-WARN][31], [DMESG-WARN][32], [DMESG-WARN][33], [DMESG-WARN][34], [DMESG-WARN][35], [DMESG-WARN][36], [DMESG-WARN][37], [DMESG-WARN][38], [DMESG-WARN][39], [DMESG-WARN][40], [DMESG-WARN][41], [DMESG-WARN][42], [DMESG-WARN][43], [DMESG-WARN][44], [DMESG-WARN][45], [DMESG-WARN][46], [DMESG-WARN][47], [DMESG-WARN][48], [DMESG-WARN][49], [DMESG-WARN][50], [DMESG-WARN][51], [DMESG-WARN][52])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-6/igt@xe_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-4/igt@xe_module_load@load.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-2/igt@xe_module_load@load.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-6/igt@xe_module_load@load.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-4/igt@xe_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-4/igt@xe_module_load@load.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-3/igt@xe_module_load@load.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-9/igt@xe_module_load@load.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-9/igt@xe_module_load@load.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-9/igt@xe_module_load@load.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-9/igt@xe_module_load@load.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-4/igt@xe_module_load@load.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-8/igt@xe_module_load@load.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-8/igt@xe_module_load@load.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-2/igt@xe_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-2/igt@xe_module_load@load.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-8/igt@xe_module_load@load.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-8/igt@xe_module_load@load.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-6/igt@xe_module_load@load.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-6/igt@xe_module_load@load.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-6/igt@xe_module_load@load.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-2/igt@xe_module_load@load.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-3/igt@xe_module_load@load.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-3/igt@xe_module_load@load.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-adlp-3/igt@xe_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-2/igt@xe_module_load@load.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-4/igt@xe_module_load@load.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-1/igt@xe_module_load@load.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-1/igt@xe_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-1/igt@xe_module_load@load.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-1/igt@xe_module_load@load.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-4/igt@xe_module_load@load.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-4/igt@xe_module_load@load.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-4/igt@xe_module_load@load.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-6/igt@xe_module_load@load.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-6/igt@xe_module_load@load.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-6/igt@xe_module_load@load.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-6/igt@xe_module_load@load.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-8/igt@xe_module_load@load.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-8/igt@xe_module_load@load.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-8/igt@xe_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-9/igt@xe_module_load@load.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-9/igt@xe_module_load@load.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-2/igt@xe_module_load@load.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-2/igt@xe_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-3/igt@xe_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-3/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-3/igt@xe_module_load@load.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-3/igt@xe_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-adlp-3/igt@xe_module_load@load.html
New tests
---------
New tests have been introduced between xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8_FULL and xe-pw-157792v1_FULL:
### New IGT tests (2) ###
* igt@kms_async_flips@crc@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [2.24] s
* igt@kms_async_flips@crc@pipe-b-dp-4:
- Statuses : 1 pass(s)
- Exec time: [2.26] s
Known issues
------------
Here are the changes found in xe-pw-157792v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-dg2-set2: NOTRUN -> [SKIP][53] ([Intel XE#1124]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][54] ([Intel XE#455] / [Intel XE#787]) +5 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: [PASS][55] -> [INCOMPLETE][56] ([Intel XE#3862]) +1 other test incomplete
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][57] ([Intel XE#787]) +20 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-b-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][58] ([Intel XE#2907])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-dp-4:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][59] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-dp-4.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [PASS][60] -> [INCOMPLETE][61] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-6:
- shard-dg2-set2: [PASS][62] -> [INCOMPLETE][63] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-6.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-d-hdmi-a-6.html
* igt@kms_chamelium_hpd@vga-hpd-for-each-pipe:
- shard-dg2-set2: NOTRUN -> [SKIP][64] ([Intel XE#373]) +2 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html
* igt@kms_cursor_crc@cursor-random-32x32:
- shard-dg2-set2: NOTRUN -> [SKIP][65] ([Intel XE#455]) +4 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_cursor_crc@cursor-random-32x32.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-lnl: [PASS][66] -> [FAIL][67] ([Intel XE#301])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-lnl: [PASS][68] -> [FAIL][69] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-dg2-set2: [PASS][70] -> [INCOMPLETE][71] ([Intel XE#2049] / [Intel XE#2597]) +3 other tests incomplete
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-dg2-435/igt@kms_flip@flip-vs-suspend-interruptible.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2-set2: NOTRUN -> [SKIP][72] ([Intel XE#651]) +4 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][73] ([Intel XE#6312])
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-move:
- shard-dg2-set2: NOTRUN -> [SKIP][74] ([Intel XE#653]) +2 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-move.html
* igt@kms_joiner@basic-big-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][75] ([Intel XE#2925] / [Intel XE#346])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_joiner@basic-big-joiner.html
* igt@kms_plane_multiple@tiling-yf:
- shard-dg2-set2: NOTRUN -> [SKIP][76] ([Intel XE#5020])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area:
- shard-dg2-set2: NOTRUN -> [SKIP][77] ([Intel XE#1406] / [Intel XE#1489])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr@fbc-psr-cursor-plane-onoff:
- shard-dg2-set2: NOTRUN -> [SKIP][78] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_psr@fbc-psr-cursor-plane-onoff.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-dg2-set2: NOTRUN -> [SKIP][79] ([Intel XE#3414])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_vrr@cmrr@pipe-a-edp-1:
- shard-lnl: [PASS][80] -> [FAIL][81] ([Intel XE#4459]) +1 other test fail
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-lnl-3/igt@kms_vrr@cmrr@pipe-a-edp-1.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-lnl-7/igt@kms_vrr@cmrr@pipe-a-edp-1.html
* igt@kms_vrr@lobf:
- shard-dg2-set2: NOTRUN -> [SKIP][82] ([Intel XE#2168])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-463/igt@kms_vrr@lobf.html
* igt@xe_copy_basic@mem-set-linear-0x369:
- shard-dg2-set2: NOTRUN -> [SKIP][83] ([Intel XE#1126])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-463/igt@xe_copy_basic@mem-set-linear-0x369.html
* igt@xe_copy_basic@mem-set-linear-0x8fffe:
- shard-dg2-set2: NOTRUN -> [SKIP][84] ([Intel XE#5503])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@xe_copy_basic@mem-set-linear-0x8fffe.html
* igt@xe_eudebug@discovery-empty:
- shard-dg2-set2: NOTRUN -> [SKIP][85] ([Intel XE#4837])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@xe_eudebug@discovery-empty.html
* igt@xe_exec_fault_mode@many-bindexecqueue-userptr-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][86] ([Intel XE#288]) +5 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@xe_exec_fault_mode@many-bindexecqueue-userptr-rebind-imm.html
* igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence:
- shard-dg2-set2: NOTRUN -> [SKIP][87] ([Intel XE#2360])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-463/igt@xe_exec_mix_modes@exec-spinner-interrupted-dma-fence.html
* igt@xe_exec_system_allocator@many-execqueues-mmap-new-huge:
- shard-dg2-set2: NOTRUN -> [SKIP][88] ([Intel XE#4915]) +59 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@xe_exec_system_allocator@many-execqueues-mmap-new-huge.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma:
- shard-lnl: [PASS][89] -> [FAIL][90] ([Intel XE#5625])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-lnl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-single-vma.html
* igt@xe_oa@oa-regs-whitelisted:
- shard-dg2-set2: NOTRUN -> [SKIP][91] ([Intel XE#3573]) +1 other test skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@xe_oa@oa-regs-whitelisted.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-dg2-set2: NOTRUN -> [SKIP][92] ([Intel XE#579])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0:
- shard-lnl: [PASS][93] -> [FAIL][94] ([Intel XE#6251])
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0.html
* igt@xe_pxp@pxp-optout:
- shard-dg2-set2: NOTRUN -> [SKIP][95] ([Intel XE#4733])
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@xe_pxp@pxp-optout.html
* igt@xe_survivability@runtime-survivability:
- shard-dg2-set2: NOTRUN -> [SKIP][96] ([Intel XE#6529])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-432/igt@xe_survivability@runtime-survivability.html
#### Possible fixes ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][97] ([Intel XE#1727] / [Intel XE#3113]) -> [PASS][98]
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [INCOMPLETE][99] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345]) -> [PASS][100]
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][101] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-c-hdmi-a-6.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-dg2-set2: [FAIL][103] ([Intel XE#301]) -> [PASS][104] +1 other test pass
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-dg2-433/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0:
- shard-lnl: [FAIL][105] ([Intel XE#6251]) -> [PASS][106] +1 other test pass
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-lnl-8/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0.html
#### Warnings ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][107] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345]) -> [INCOMPLETE][108] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4842]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4842
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5503
[Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
[Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6529]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6529
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
Build changes
-------------
* Linux: xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8 -> xe-pw-157792v1
IGT_8633: 8633
xe-4131-a95032b2166b5ae428c065917b843a1caf1e82b8: a95032b2166b5ae428c065917b843a1caf1e82b8
xe-pw-157792v1: 157792v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v1/index.html
[-- Attachment #2: Type: text/html, Size: 30998 bytes --]
^ permalink raw reply [flat|nested] 30+ messages in thread* Re: [PATCH v2 00/13] drm/i915: dissolve soc/
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (17 preceding siblings ...)
2025-11-20 3:17 ` ✗ Xe.CI.Full: failure " Patchwork
@ 2025-11-20 16:52 ` Ville Syrjälä
2025-11-20 19:19 ` ✗ CI.checkpatch: warning for drm/i915: dissolve soc/ (rev2) Patchwork
` (4 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Ville Syrjälä @ 2025-11-20 16:52 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx, intel-xe
On Wed, Nov 19, 2025 at 08:52:39PM +0200, Jani Nikula wrote:
> Split soc/ to i915 and display specific parts, and relocate code
> accordingly.
>
> In v2, cover all of soc/.
>
> BR,
> Jani.
>
> Jani Nikula (13):
> drm/i915/edram: extract i915_edram.[ch] for edram detection
> drm/i915: split out i915_freq.[ch]
> drm/i915: move intel_dram.[ch] from soc/ to display/
> drm/xe: remove MISSING_CASE() from compat i915_utils.h
> drm/i915/dram: convert to struct intel_display
> drm/i915: move dram_info to struct intel_display
> drm/i915: move intel_rom.[ch] from soc/ to display/
> drm/xe: remove remaining platform checks from compat i915_drv.h
> drm/i915/gmch: split out i915_gmch.[ch] from soc
> drm/i915/gmch: switch to use pci_bus_{read,write}_config_word()
> drm/i915/gmch: convert intel_gmch.c to struct intel_display
> drm/i915: merge soc/intel_gmch.[ch] to display/intel_vga.c
> drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915
Looks all right to me. Series is
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> drivers/gpu/drm/i915/Makefile | 11 +-
> drivers/gpu/drm/i915/display/i9xx_wm.c | 5 +-
> drivers/gpu/drm/i915/display/intel_bios.c | 3 +-
> drivers/gpu/drm/i915/display/intel_bw.c | 5 +-
> drivers/gpu/drm/i915/display/intel_cdclk.c | 7 +-
> .../gpu/drm/i915/display/intel_display_core.h | 4 +
> .../drm/i915/display/intel_display_power.c | 5 +-
> .../drm/i915/{soc => display}/intel_dram.c | 249 ++++++++----------
> .../drm/i915/{soc => display}/intel_dram.h | 12 +-
> .../gpu/drm/i915/{soc => display}/intel_rom.c | 0
> .../gpu/drm/i915/{soc => display}/intel_rom.h | 0
> drivers/gpu/drm/i915/display/intel_vga.c | 44 +++-
> drivers/gpu/drm/i915/display/skl_watermark.c | 6 +-
> .../gpu/drm/i915/gt/intel_gt_clock_utils.c | 4 +-
> drivers/gpu/drm/i915/gt/intel_rps.c | 6 +-
> drivers/gpu/drm/i915/i915_driver.c | 18 +-
> drivers/gpu/drm/i915/i915_drv.h | 3 -
> drivers/gpu/drm/i915/i915_edram.c | 44 ++++
> drivers/gpu/drm/i915/i915_edram.h | 11 +
> drivers/gpu/drm/i915/i915_freq.c | 111 ++++++++
> drivers/gpu/drm/i915/i915_freq.h | 13 +
> .../i915/{soc/intel_gmch.c => i915_gmch.c} | 61 +----
> drivers/gpu/drm/i915/i915_gmch.h | 13 +
> drivers/gpu/drm/i915/soc/intel_gmch.h | 20 --
> drivers/gpu/drm/xe/Makefile | 13 +-
> .../gpu/drm/xe/compat-i915-headers/i915_drv.h | 15 --
> .../drm/xe/compat-i915-headers/i915_utils.h | 6 -
> .../xe/compat-i915-headers/soc/intel_dram.h | 6 -
> .../xe/compat-i915-headers/soc/intel_gmch.h | 6 -
> .../xe/compat-i915-headers/soc/intel_rom.h | 6 -
> drivers/gpu/drm/xe/display/xe_display.c | 4 +-
> drivers/gpu/drm/xe/display/xe_display_misc.c | 16 --
> drivers/gpu/drm/xe/xe_device_types.h | 8 -
> 33 files changed, 394 insertions(+), 341 deletions(-)
> rename drivers/gpu/drm/i915/{soc => display}/intel_dram.c (70%)
> rename drivers/gpu/drm/i915/{soc => display}/intel_dram.h (68%)
> rename drivers/gpu/drm/i915/{soc => display}/intel_rom.c (100%)
> rename drivers/gpu/drm/i915/{soc => display}/intel_rom.h (100%)
> create mode 100644 drivers/gpu/drm/i915/i915_edram.c
> create mode 100644 drivers/gpu/drm/i915/i915_edram.h
> create mode 100644 drivers/gpu/drm/i915/i915_freq.c
> create mode 100644 drivers/gpu/drm/i915/i915_freq.h
> rename drivers/gpu/drm/i915/{soc/intel_gmch.c => i915_gmch.c} (68%)
> create mode 100644 drivers/gpu/drm/i915/i915_gmch.h
> delete mode 100644 drivers/gpu/drm/i915/soc/intel_gmch.h
> delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_dram.h
> delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_gmch.h
> delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h
> delete mode 100644 drivers/gpu/drm/xe/display/xe_display_misc.c
>
> --
> 2.47.3
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 30+ messages in thread* ✗ CI.checkpatch: warning for drm/i915: dissolve soc/ (rev2)
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (18 preceding siblings ...)
2025-11-20 16:52 ` [PATCH v2 00/13] " Ville Syrjälä
@ 2025-11-20 19:19 ` Patchwork
2025-11-20 19:21 ` ✓ CI.KUnit: success " Patchwork
` (3 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2025-11-20 19:19 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: dissolve soc/ (rev2)
URL : https://patchwork.freedesktop.org/series/157792/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
2de9a3901bc28757c7906b454717b64e2a214021
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 0d943d9ca07e3e52e1f32b216d0115982d387c83
Author: Jani Nikula <jani.nikula@intel.com>
Date: Wed Nov 19 20:52:52 2025 +0200
drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915
Drop the #ifdef I915, and use the same intel_gmch_vga_set_decode() for
both i915 and xe.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch 3d718db04a365cc44a3bc81ffa4db7bbd2e645d7 drm-intel
c1877a71173b drm/i915/edram: extract i915_edram.[ch] for edram detection
-:48: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#48:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 99 lines checked
b70838457b07 drm/i915: split out i915_freq.[ch]
-:82: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#82:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 172 lines checked
57eef214ba18 drm/i915: move intel_dram.[ch] from soc/ to display/
-:119: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#119:
rename from drivers/gpu/drm/i915/soc/intel_dram.c
total: 0 errors, 1 warnings, 0 checks, 143 lines checked
24d0e6688075 drm/xe: remove MISSING_CASE() from compat i915_utils.h
f41a8ec2326d drm/i915/dram: convert to struct intel_display
2f61ba005236 drm/i915: move dram_info to struct intel_display
e805c4f80dba drm/i915: move intel_rom.[ch] from soc/ to display/
-:58: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#58:
rename from drivers/gpu/drm/i915/soc/intel_rom.c
total: 0 errors, 1 warnings, 0 checks, 59 lines checked
4f993700b177 drm/xe: remove remaining platform checks from compat i915_drv.h
831c39f82388 drm/i915/gmch: split out i915_gmch.[ch] from soc
-:81: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#81:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 363 lines checked
744f78f9028f drm/i915/gmch: switch to use pci_bus_{read, write}_config_word()
a3dba9b7fe9a drm/i915/gmch: convert intel_gmch.c to struct intel_display
ac2970096674 drm/i915: merge soc/intel_gmch.[ch] to display/intel_vga.c
-:108: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#108:
deleted file mode 100644
total: 0 errors, 1 warnings, 0 checks, 85 lines checked
0d943d9ca07e drm/xe/vga: use the same intel_gmch_vga_set_decode() as i915
^ permalink raw reply [flat|nested] 30+ messages in thread* ✓ CI.KUnit: success for drm/i915: dissolve soc/ (rev2)
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (19 preceding siblings ...)
2025-11-20 19:19 ` ✗ CI.checkpatch: warning for drm/i915: dissolve soc/ (rev2) Patchwork
@ 2025-11-20 19:21 ` Patchwork
2025-11-20 19:36 ` ✗ CI.checksparse: warning " Patchwork
` (2 subsequent siblings)
23 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2025-11-20 19:21 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: dissolve soc/ (rev2)
URL : https://patchwork.freedesktop.org/series/157792/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[19:19:50] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:19:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:20:24] Starting KUnit Kernel (1/1)...
[19:20:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:20:24] ================== guc_buf (11 subtests) ===================
[19:20:24] [PASSED] test_smallest
[19:20:24] [PASSED] test_largest
[19:20:24] [PASSED] test_granular
[19:20:24] [PASSED] test_unique
[19:20:24] [PASSED] test_overlap
[19:20:24] [PASSED] test_reusable
[19:20:24] [PASSED] test_too_big
[19:20:24] [PASSED] test_flush
[19:20:24] [PASSED] test_lookup
[19:20:24] [PASSED] test_data
[19:20:24] [PASSED] test_class
[19:20:24] ===================== [PASSED] guc_buf =====================
[19:20:24] =================== guc_dbm (7 subtests) ===================
[19:20:24] [PASSED] test_empty
[19:20:24] [PASSED] test_default
[19:20:24] ======================== test_size ========================
[19:20:24] [PASSED] 4
[19:20:24] [PASSED] 8
[19:20:24] [PASSED] 32
[19:20:24] [PASSED] 256
[19:20:24] ==================== [PASSED] test_size ====================
[19:20:24] ======================= test_reuse ========================
[19:20:24] [PASSED] 4
[19:20:24] [PASSED] 8
[19:20:24] [PASSED] 32
[19:20:24] [PASSED] 256
[19:20:24] =================== [PASSED] test_reuse ====================
[19:20:24] =================== test_range_overlap ====================
[19:20:24] [PASSED] 4
[19:20:24] [PASSED] 8
[19:20:24] [PASSED] 32
[19:20:24] [PASSED] 256
[19:20:24] =============== [PASSED] test_range_overlap ================
[19:20:24] =================== test_range_compact ====================
[19:20:24] [PASSED] 4
[19:20:24] [PASSED] 8
[19:20:24] [PASSED] 32
[19:20:24] [PASSED] 256
[19:20:24] =============== [PASSED] test_range_compact ================
[19:20:24] ==================== test_range_spare =====================
[19:20:24] [PASSED] 4
[19:20:24] [PASSED] 8
[19:20:24] [PASSED] 32
[19:20:24] [PASSED] 256
[19:20:24] ================ [PASSED] test_range_spare =================
[19:20:24] ===================== [PASSED] guc_dbm =====================
[19:20:24] =================== guc_idm (6 subtests) ===================
[19:20:24] [PASSED] bad_init
[19:20:24] [PASSED] no_init
[19:20:24] [PASSED] init_fini
[19:20:24] [PASSED] check_used
[19:20:25] [PASSED] check_quota
[19:20:25] [PASSED] check_all
[19:20:25] ===================== [PASSED] guc_idm =====================
[19:20:25] ================== no_relay (3 subtests) ===================
[19:20:25] [PASSED] xe_drops_guc2pf_if_not_ready
[19:20:25] [PASSED] xe_drops_guc2vf_if_not_ready
[19:20:25] [PASSED] xe_rejects_send_if_not_ready
[19:20:25] ==================== [PASSED] no_relay =====================
[19:20:25] ================== pf_relay (14 subtests) ==================
[19:20:25] [PASSED] pf_rejects_guc2pf_too_short
[19:20:25] [PASSED] pf_rejects_guc2pf_too_long
[19:20:25] [PASSED] pf_rejects_guc2pf_no_payload
[19:20:25] [PASSED] pf_fails_no_payload
[19:20:25] [PASSED] pf_fails_bad_origin
[19:20:25] [PASSED] pf_fails_bad_type
[19:20:25] [PASSED] pf_txn_reports_error
[19:20:25] [PASSED] pf_txn_sends_pf2guc
[19:20:25] [PASSED] pf_sends_pf2guc
[19:20:25] [SKIPPED] pf_loopback_nop
[19:20:25] [SKIPPED] pf_loopback_echo
[19:20:25] [SKIPPED] pf_loopback_fail
[19:20:25] [SKIPPED] pf_loopback_busy
[19:20:25] [SKIPPED] pf_loopback_retry
[19:20:25] ==================== [PASSED] pf_relay =====================
[19:20:25] ================== vf_relay (3 subtests) ===================
[19:20:25] [PASSED] vf_rejects_guc2vf_too_short
[19:20:25] [PASSED] vf_rejects_guc2vf_too_long
[19:20:25] [PASSED] vf_rejects_guc2vf_no_payload
[19:20:25] ==================== [PASSED] vf_relay =====================
[19:20:25] ================ pf_gt_config (6 subtests) =================
[19:20:25] [PASSED] fair_contexts_1vf
[19:20:25] [PASSED] fair_doorbells_1vf
[19:20:25] [PASSED] fair_ggtt_1vf
[19:20:25] ====================== fair_contexts ======================
[19:20:25] [PASSED] 1 VF
[19:20:25] [PASSED] 2 VFs
[19:20:25] [PASSED] 3 VFs
[19:20:25] [PASSED] 4 VFs
[19:20:25] [PASSED] 5 VFs
[19:20:25] [PASSED] 6 VFs
[19:20:25] [PASSED] 7 VFs
[19:20:25] [PASSED] 8 VFs
[19:20:25] [PASSED] 9 VFs
[19:20:25] [PASSED] 10 VFs
[19:20:25] [PASSED] 11 VFs
[19:20:25] [PASSED] 12 VFs
[19:20:25] [PASSED] 13 VFs
[19:20:25] [PASSED] 14 VFs
[19:20:25] [PASSED] 15 VFs
[19:20:25] [PASSED] 16 VFs
[19:20:25] [PASSED] 17 VFs
[19:20:25] [PASSED] 18 VFs
[19:20:25] [PASSED] 19 VFs
[19:20:25] [PASSED] 20 VFs
[19:20:25] [PASSED] 21 VFs
[19:20:25] [PASSED] 22 VFs
[19:20:25] [PASSED] 23 VFs
[19:20:25] [PASSED] 24 VFs
[19:20:25] [PASSED] 25 VFs
[19:20:25] [PASSED] 26 VFs
[19:20:25] [PASSED] 27 VFs
[19:20:25] [PASSED] 28 VFs
[19:20:25] [PASSED] 29 VFs
[19:20:25] [PASSED] 30 VFs
[19:20:25] [PASSED] 31 VFs
[19:20:25] [PASSED] 32 VFs
[19:20:25] [PASSED] 33 VFs
[19:20:25] [PASSED] 34 VFs
[19:20:25] [PASSED] 35 VFs
[19:20:25] [PASSED] 36 VFs
[19:20:25] [PASSED] 37 VFs
[19:20:25] [PASSED] 38 VFs
[19:20:25] [PASSED] 39 VFs
[19:20:25] [PASSED] 40 VFs
[19:20:25] [PASSED] 41 VFs
[19:20:25] [PASSED] 42 VFs
[19:20:25] [PASSED] 43 VFs
[19:20:25] [PASSED] 44 VFs
[19:20:25] [PASSED] 45 VFs
[19:20:25] [PASSED] 46 VFs
[19:20:25] [PASSED] 47 VFs
[19:20:25] [PASSED] 48 VFs
[19:20:25] [PASSED] 49 VFs
[19:20:25] [PASSED] 50 VFs
[19:20:25] [PASSED] 51 VFs
[19:20:25] [PASSED] 52 VFs
[19:20:25] [PASSED] 53 VFs
[19:20:25] [PASSED] 54 VFs
[19:20:25] [PASSED] 55 VFs
[19:20:25] [PASSED] 56 VFs
[19:20:25] [PASSED] 57 VFs
[19:20:25] [PASSED] 58 VFs
[19:20:25] [PASSED] 59 VFs
[19:20:25] [PASSED] 60 VFs
[19:20:25] [PASSED] 61 VFs
[19:20:25] [PASSED] 62 VFs
[19:20:25] [PASSED] 63 VFs
[19:20:25] ================== [PASSED] fair_contexts ==================
[19:20:25] ===================== fair_doorbells ======================
[19:20:25] [PASSED] 1 VF
[19:20:25] [PASSED] 2 VFs
[19:20:25] [PASSED] 3 VFs
[19:20:25] [PASSED] 4 VFs
[19:20:25] [PASSED] 5 VFs
[19:20:25] [PASSED] 6 VFs
[19:20:25] [PASSED] 7 VFs
[19:20:25] [PASSED] 8 VFs
[19:20:25] [PASSED] 9 VFs
[19:20:25] [PASSED] 10 VFs
[19:20:25] [PASSED] 11 VFs
[19:20:25] [PASSED] 12 VFs
[19:20:25] [PASSED] 13 VFs
[19:20:25] [PASSED] 14 VFs
[19:20:25] [PASSED] 15 VFs
[19:20:25] [PASSED] 16 VFs
[19:20:25] [PASSED] 17 VFs
[19:20:25] [PASSED] 18 VFs
[19:20:25] [PASSED] 19 VFs
[19:20:25] [PASSED] 20 VFs
[19:20:25] [PASSED] 21 VFs
[19:20:25] [PASSED] 22 VFs
[19:20:25] [PASSED] 23 VFs
[19:20:25] [PASSED] 24 VFs
[19:20:25] [PASSED] 25 VFs
[19:20:25] [PASSED] 26 VFs
[19:20:25] [PASSED] 27 VFs
[19:20:25] [PASSED] 28 VFs
[19:20:25] [PASSED] 29 VFs
[19:20:25] [PASSED] 30 VFs
[19:20:25] [PASSED] 31 VFs
[19:20:25] [PASSED] 32 VFs
[19:20:25] [PASSED] 33 VFs
[19:20:25] [PASSED] 34 VFs
[19:20:25] [PASSED] 35 VFs
[19:20:25] [PASSED] 36 VFs
[19:20:25] [PASSED] 37 VFs
[19:20:25] [PASSED] 38 VFs
[19:20:25] [PASSED] 39 VFs
[19:20:25] [PASSED] 40 VFs
[19:20:25] [PASSED] 41 VFs
[19:20:25] [PASSED] 42 VFs
[19:20:25] [PASSED] 43 VFs
[19:20:25] [PASSED] 44 VFs
[19:20:25] [PASSED] 45 VFs
[19:20:25] [PASSED] 46 VFs
[19:20:25] [PASSED] 47 VFs
[19:20:25] [PASSED] 48 VFs
[19:20:25] [PASSED] 49 VFs
[19:20:25] [PASSED] 50 VFs
[19:20:25] [PASSED] 51 VFs
[19:20:25] [PASSED] 52 VFs
[19:20:25] [PASSED] 53 VFs
[19:20:25] [PASSED] 54 VFs
[19:20:25] [PASSED] 55 VFs
[19:20:25] [PASSED] 56 VFs
[19:20:25] [PASSED] 57 VFs
[19:20:25] [PASSED] 58 VFs
[19:20:25] [PASSED] 59 VFs
[19:20:25] [PASSED] 60 VFs
[19:20:25] [PASSED] 61 VFs
[19:20:25] [PASSED] 62 VFs
[19:20:25] [PASSED] 63 VFs
[19:20:25] ================= [PASSED] fair_doorbells ==================
[19:20:25] ======================== fair_ggtt ========================
[19:20:25] [PASSED] 1 VF
[19:20:25] [PASSED] 2 VFs
[19:20:25] [PASSED] 3 VFs
[19:20:25] [PASSED] 4 VFs
[19:20:25] [PASSED] 5 VFs
[19:20:25] [PASSED] 6 VFs
[19:20:25] [PASSED] 7 VFs
[19:20:25] [PASSED] 8 VFs
[19:20:25] [PASSED] 9 VFs
[19:20:25] [PASSED] 10 VFs
[19:20:25] [PASSED] 11 VFs
[19:20:25] [PASSED] 12 VFs
[19:20:25] [PASSED] 13 VFs
[19:20:25] [PASSED] 14 VFs
[19:20:25] [PASSED] 15 VFs
[19:20:25] [PASSED] 16 VFs
[19:20:25] [PASSED] 17 VFs
[19:20:25] [PASSED] 18 VFs
[19:20:25] [PASSED] 19 VFs
[19:20:25] [PASSED] 20 VFs
[19:20:25] [PASSED] 21 VFs
[19:20:25] [PASSED] 22 VFs
[19:20:25] [PASSED] 23 VFs
[19:20:25] [PASSED] 24 VFs
[19:20:25] [PASSED] 25 VFs
[19:20:25] [PASSED] 26 VFs
[19:20:25] [PASSED] 27 VFs
[19:20:25] [PASSED] 28 VFs
[19:20:25] [PASSED] 29 VFs
[19:20:25] [PASSED] 30 VFs
[19:20:25] [PASSED] 31 VFs
[19:20:25] [PASSED] 32 VFs
[19:20:25] [PASSED] 33 VFs
[19:20:25] [PASSED] 34 VFs
[19:20:25] [PASSED] 35 VFs
[19:20:25] [PASSED] 36 VFs
[19:20:25] [PASSED] 37 VFs
[19:20:25] [PASSED] 38 VFs
[19:20:25] [PASSED] 39 VFs
[19:20:25] [PASSED] 40 VFs
[19:20:25] [PASSED] 41 VFs
[19:20:25] [PASSED] 42 VFs
[19:20:25] [PASSED] 43 VFs
[19:20:25] [PASSED] 44 VFs
[19:20:25] [PASSED] 45 VFs
[19:20:25] [PASSED] 46 VFs
[19:20:25] [PASSED] 47 VFs
[19:20:25] [PASSED] 48 VFs
[19:20:25] [PASSED] 49 VFs
[19:20:25] [PASSED] 50 VFs
[19:20:25] [PASSED] 51 VFs
[19:20:25] [PASSED] 52 VFs
[19:20:25] [PASSED] 53 VFs
[19:20:25] [PASSED] 54 VFs
[19:20:25] [PASSED] 55 VFs
[19:20:25] [PASSED] 56 VFs
[19:20:25] [PASSED] 57 VFs
[19:20:25] [PASSED] 58 VFs
[19:20:25] [PASSED] 59 VFs
[19:20:25] [PASSED] 60 VFs
[19:20:25] [PASSED] 61 VFs
[19:20:25] [PASSED] 62 VFs
[19:20:25] [PASSED] 63 VFs
[19:20:25] ==================== [PASSED] fair_ggtt ====================
[19:20:25] ================== [PASSED] pf_gt_config ===================
[19:20:25] ===================== lmtt (1 subtest) =====================
[19:20:25] ======================== test_ops =========================
[19:20:25] [PASSED] 2-level
[19:20:25] [PASSED] multi-level
[19:20:25] ==================== [PASSED] test_ops =====================
[19:20:25] ====================== [PASSED] lmtt =======================
[19:20:25] ================= pf_service (11 subtests) =================
[19:20:25] [PASSED] pf_negotiate_any
[19:20:25] [PASSED] pf_negotiate_base_match
[19:20:25] [PASSED] pf_negotiate_base_newer
[19:20:25] [PASSED] pf_negotiate_base_next
[19:20:25] [SKIPPED] pf_negotiate_base_older
[19:20:25] [PASSED] pf_negotiate_base_prev
[19:20:25] [PASSED] pf_negotiate_latest_match
[19:20:25] [PASSED] pf_negotiate_latest_newer
[19:20:25] [PASSED] pf_negotiate_latest_next
[19:20:25] [SKIPPED] pf_negotiate_latest_older
[19:20:25] [SKIPPED] pf_negotiate_latest_prev
[19:20:25] =================== [PASSED] pf_service ====================
[19:20:25] ================= xe_guc_g2g (2 subtests) ==================
[19:20:25] ============== xe_live_guc_g2g_kunit_default ==============
[19:20:25] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[19:20:25] ============== xe_live_guc_g2g_kunit_allmem ===============
[19:20:25] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[19:20:25] =================== [SKIPPED] xe_guc_g2g ===================
[19:20:25] =================== xe_mocs (2 subtests) ===================
[19:20:25] ================ xe_live_mocs_kernel_kunit ================
[19:20:25] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[19:20:25] ================ xe_live_mocs_reset_kunit =================
[19:20:25] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[19:20:25] ==================== [SKIPPED] xe_mocs =====================
[19:20:25] ================= xe_migrate (2 subtests) ==================
[19:20:25] ================= xe_migrate_sanity_kunit =================
[19:20:25] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[19:20:25] ================== xe_validate_ccs_kunit ==================
[19:20:25] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[19:20:25] =================== [SKIPPED] xe_migrate ===================
[19:20:25] ================== xe_dma_buf (1 subtest) ==================
[19:20:25] ==================== xe_dma_buf_kunit =====================
[19:20:25] ================ [SKIPPED] xe_dma_buf_kunit ================
[19:20:25] =================== [SKIPPED] xe_dma_buf ===================
[19:20:25] ================= xe_bo_shrink (1 subtest) =================
[19:20:25] =================== xe_bo_shrink_kunit ====================
[19:20:25] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[19:20:25] ================== [SKIPPED] xe_bo_shrink ==================
[19:20:25] ==================== xe_bo (2 subtests) ====================
[19:20:25] ================== xe_ccs_migrate_kunit ===================
[19:20:25] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[19:20:25] ==================== xe_bo_evict_kunit ====================
[19:20:25] =============== [SKIPPED] xe_bo_evict_kunit ================
[19:20:25] ===================== [SKIPPED] xe_bo ======================
[19:20:25] ==================== args (11 subtests) ====================
[19:20:25] [PASSED] count_args_test
[19:20:25] [PASSED] call_args_example
[19:20:25] [PASSED] call_args_test
[19:20:25] [PASSED] drop_first_arg_example
[19:20:25] [PASSED] drop_first_arg_test
[19:20:25] [PASSED] first_arg_example
[19:20:25] [PASSED] first_arg_test
[19:20:25] [PASSED] last_arg_example
[19:20:25] [PASSED] last_arg_test
[19:20:25] [PASSED] pick_arg_example
[19:20:25] [PASSED] sep_comma_example
[19:20:25] ====================== [PASSED] args =======================
[19:20:25] =================== xe_pci (3 subtests) ====================
[19:20:25] ==================== check_graphics_ip ====================
[19:20:25] [PASSED] 12.00 Xe_LP
[19:20:25] [PASSED] 12.10 Xe_LP+
[19:20:25] [PASSED] 12.55 Xe_HPG
[19:20:25] [PASSED] 12.60 Xe_HPC
[19:20:25] [PASSED] 12.70 Xe_LPG
[19:20:25] [PASSED] 12.71 Xe_LPG
[19:20:25] [PASSED] 12.74 Xe_LPG+
[19:20:25] [PASSED] 20.01 Xe2_HPG
[19:20:25] [PASSED] 20.02 Xe2_HPG
[19:20:25] [PASSED] 20.04 Xe2_LPG
[19:20:25] [PASSED] 30.00 Xe3_LPG
[19:20:25] [PASSED] 30.01 Xe3_LPG
[19:20:25] [PASSED] 30.03 Xe3_LPG
[19:20:25] [PASSED] 30.04 Xe3_LPG
[19:20:25] [PASSED] 30.05 Xe3_LPG
[19:20:25] [PASSED] 35.11 Xe3p_XPC
[19:20:25] ================ [PASSED] check_graphics_ip ================
[19:20:25] ===================== check_media_ip ======================
[19:20:25] [PASSED] 12.00 Xe_M
[19:20:25] [PASSED] 12.55 Xe_HPM
[19:20:25] [PASSED] 13.00 Xe_LPM+
[19:20:25] [PASSED] 13.01 Xe2_HPM
[19:20:25] [PASSED] 20.00 Xe2_LPM
[19:20:25] [PASSED] 30.00 Xe3_LPM
[19:20:25] [PASSED] 30.02 Xe3_LPM
[19:20:25] [PASSED] 35.00 Xe3p_LPM
[19:20:25] [PASSED] 35.03 Xe3p_HPM
[19:20:25] ================= [PASSED] check_media_ip ==================
[19:20:25] =================== check_platform_desc ===================
[19:20:25] [PASSED] 0x9A60 (TIGERLAKE)
[19:20:25] [PASSED] 0x9A68 (TIGERLAKE)
[19:20:25] [PASSED] 0x9A70 (TIGERLAKE)
[19:20:25] [PASSED] 0x9A40 (TIGERLAKE)
[19:20:25] [PASSED] 0x9A49 (TIGERLAKE)
[19:20:25] [PASSED] 0x9A59 (TIGERLAKE)
[19:20:25] [PASSED] 0x9A78 (TIGERLAKE)
[19:20:25] [PASSED] 0x9AC0 (TIGERLAKE)
[19:20:25] [PASSED] 0x9AC9 (TIGERLAKE)
[19:20:25] [PASSED] 0x9AD9 (TIGERLAKE)
[19:20:25] [PASSED] 0x9AF8 (TIGERLAKE)
[19:20:25] [PASSED] 0x4C80 (ROCKETLAKE)
[19:20:25] [PASSED] 0x4C8A (ROCKETLAKE)
[19:20:25] [PASSED] 0x4C8B (ROCKETLAKE)
[19:20:25] [PASSED] 0x4C8C (ROCKETLAKE)
[19:20:25] [PASSED] 0x4C90 (ROCKETLAKE)
[19:20:25] [PASSED] 0x4C9A (ROCKETLAKE)
[19:20:25] [PASSED] 0x4680 (ALDERLAKE_S)
[19:20:25] [PASSED] 0x4682 (ALDERLAKE_S)
[19:20:25] [PASSED] 0x4688 (ALDERLAKE_S)
[19:20:25] [PASSED] 0x468A (ALDERLAKE_S)
[19:20:25] [PASSED] 0x468B (ALDERLAKE_S)
[19:20:25] [PASSED] 0x4690 (ALDERLAKE_S)
[19:20:25] [PASSED] 0x4692 (ALDERLAKE_S)
[19:20:25] [PASSED] 0x4693 (ALDERLAKE_S)
[19:20:25] [PASSED] 0x46A0 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46A1 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46A2 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46A3 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46A6 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46A8 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46AA (ALDERLAKE_P)
[19:20:25] [PASSED] 0x462A (ALDERLAKE_P)
[19:20:25] [PASSED] 0x4626 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x4628 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[19:20:25] [PASSED] 0x46B1 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46B2 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46B3 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46C0 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46C1 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46C2 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46C3 (ALDERLAKE_P)
[19:20:25] [PASSED] 0x46D0 (ALDERLAKE_N)
[19:20:25] [PASSED] 0x46D1 (ALDERLAKE_N)
[19:20:25] [PASSED] 0x46D2 (ALDERLAKE_N)
[19:20:25] [PASSED] 0x46D3 (ALDERLAKE_N)
[19:20:25] [PASSED] 0x46D4 (ALDERLAKE_N)
[19:20:25] [PASSED] 0xA721 (ALDERLAKE_P)
[19:20:25] [PASSED] 0xA7A1 (ALDERLAKE_P)
[19:20:25] [PASSED] 0xA7A9 (ALDERLAKE_P)
[19:20:25] [PASSED] 0xA7AC (ALDERLAKE_P)
[19:20:25] [PASSED] 0xA7AD (ALDERLAKE_P)
[19:20:25] [PASSED] 0xA720 (ALDERLAKE_P)
[19:20:25] [PASSED] 0xA7A0 (ALDERLAKE_P)
[19:20:25] [PASSED] 0xA7A8 (ALDERLAKE_P)
[19:20:25] [PASSED] 0xA7AA (ALDERLAKE_P)
[19:20:25] [PASSED] 0xA7AB (ALDERLAKE_P)
[19:20:25] [PASSED] 0xA780 (ALDERLAKE_S)
[19:20:25] [PASSED] 0xA781 (ALDERLAKE_S)
[19:20:25] [PASSED] 0xA782 (ALDERLAKE_S)
[19:20:25] [PASSED] 0xA783 (ALDERLAKE_S)
[19:20:25] [PASSED] 0xA788 (ALDERLAKE_S)
[19:20:25] [PASSED] 0xA789 (ALDERLAKE_S)
[19:20:25] [PASSED] 0xA78A (ALDERLAKE_S)
[19:20:25] [PASSED] 0xA78B (ALDERLAKE_S)
[19:20:25] [PASSED] 0x4905 (DG1)
[19:20:25] [PASSED] 0x4906 (DG1)
[19:20:25] [PASSED] 0x4907 (DG1)
[19:20:25] [PASSED] 0x4908 (DG1)
[19:20:25] [PASSED] 0x4909 (DG1)
[19:20:25] [PASSED] 0x56C0 (DG2)
[19:20:25] [PASSED] 0x56C2 (DG2)
[19:20:25] [PASSED] 0x56C1 (DG2)
[19:20:25] [PASSED] 0x7D51 (METEORLAKE)
[19:20:25] [PASSED] 0x7DD1 (METEORLAKE)
[19:20:25] [PASSED] 0x7D41 (METEORLAKE)
[19:20:25] [PASSED] 0x7D67 (METEORLAKE)
[19:20:25] [PASSED] 0xB640 (METEORLAKE)
[19:20:25] [PASSED] 0x56A0 (DG2)
[19:20:25] [PASSED] 0x56A1 (DG2)
[19:20:25] [PASSED] 0x56A2 (DG2)
[19:20:25] [PASSED] 0x56BE (DG2)
[19:20:25] [PASSED] 0x56BF (DG2)
[19:20:25] [PASSED] 0x5690 (DG2)
[19:20:25] [PASSED] 0x5691 (DG2)
[19:20:25] [PASSED] 0x5692 (DG2)
[19:20:25] [PASSED] 0x56A5 (DG2)
[19:20:25] [PASSED] 0x56A6 (DG2)
[19:20:25] [PASSED] 0x56B0 (DG2)
[19:20:25] [PASSED] 0x56B1 (DG2)
[19:20:25] [PASSED] 0x56BA (DG2)
[19:20:25] [PASSED] 0x56BB (DG2)
[19:20:25] [PASSED] 0x56BC (DG2)
[19:20:25] [PASSED] 0x56BD (DG2)
[19:20:25] [PASSED] 0x5693 (DG2)
[19:20:25] [PASSED] 0x5694 (DG2)
[19:20:25] [PASSED] 0x5695 (DG2)
[19:20:25] [PASSED] 0x56A3 (DG2)
[19:20:25] [PASSED] 0x56A4 (DG2)
[19:20:25] [PASSED] 0x56B2 (DG2)
[19:20:25] [PASSED] 0x56B3 (DG2)
[19:20:25] [PASSED] 0x5696 (DG2)
[19:20:25] [PASSED] 0x5697 (DG2)
[19:20:25] [PASSED] 0xB69 (PVC)
[19:20:25] [PASSED] 0xB6E (PVC)
[19:20:25] [PASSED] 0xBD4 (PVC)
[19:20:25] [PASSED] 0xBD5 (PVC)
[19:20:25] [PASSED] 0xBD6 (PVC)
[19:20:25] [PASSED] 0xBD7 (PVC)
[19:20:25] [PASSED] 0xBD8 (PVC)
[19:20:25] [PASSED] 0xBD9 (PVC)
[19:20:25] [PASSED] 0xBDA (PVC)
[19:20:25] [PASSED] 0xBDB (PVC)
[19:20:25] [PASSED] 0xBE0 (PVC)
[19:20:25] [PASSED] 0xBE1 (PVC)
[19:20:25] [PASSED] 0xBE5 (PVC)
[19:20:25] [PASSED] 0x7D40 (METEORLAKE)
[19:20:25] [PASSED] 0x7D45 (METEORLAKE)
[19:20:25] [PASSED] 0x7D55 (METEORLAKE)
[19:20:25] [PASSED] 0x7D60 (METEORLAKE)
[19:20:25] [PASSED] 0x7DD5 (METEORLAKE)
[19:20:25] [PASSED] 0x6420 (LUNARLAKE)
[19:20:25] [PASSED] 0x64A0 (LUNARLAKE)
[19:20:25] [PASSED] 0x64B0 (LUNARLAKE)
[19:20:25] [PASSED] 0xE202 (BATTLEMAGE)
[19:20:25] [PASSED] 0xE209 (BATTLEMAGE)
[19:20:25] [PASSED] 0xE20B (BATTLEMAGE)
[19:20:25] [PASSED] 0xE20C (BATTLEMAGE)
[19:20:25] [PASSED] 0xE20D (BATTLEMAGE)
[19:20:25] [PASSED] 0xE210 (BATTLEMAGE)
[19:20:25] [PASSED] 0xE211 (BATTLEMAGE)
[19:20:25] [PASSED] 0xE212 (BATTLEMAGE)
[19:20:25] [PASSED] 0xE216 (BATTLEMAGE)
[19:20:25] [PASSED] 0xE220 (BATTLEMAGE)
[19:20:25] [PASSED] 0xE221 (BATTLEMAGE)
[19:20:25] [PASSED] 0xE222 (BATTLEMAGE)
[19:20:25] [PASSED] 0xE223 (BATTLEMAGE)
[19:20:25] [PASSED] 0xB080 (PANTHERLAKE)
[19:20:25] [PASSED] 0xB081 (PANTHERLAKE)
[19:20:25] [PASSED] 0xB082 (PANTHERLAKE)
[19:20:25] [PASSED] 0xB083 (PANTHERLAKE)
[19:20:25] [PASSED] 0xB084 (PANTHERLAKE)
[19:20:25] [PASSED] 0xB085 (PANTHERLAKE)
[19:20:25] [PASSED] 0xB086 (PANTHERLAKE)
[19:20:25] [PASSED] 0xB087 (PANTHERLAKE)
[19:20:25] [PASSED] 0xB08F (PANTHERLAKE)
[19:20:25] [PASSED] 0xB090 (PANTHERLAKE)
[19:20:25] [PASSED] 0xB0A0 (PANTHERLAKE)
[19:20:25] [PASSED] 0xB0B0 (PANTHERLAKE)
[19:20:25] [PASSED] 0xD740 (NOVALAKE_S)
[19:20:25] [PASSED] 0xD741 (NOVALAKE_S)
[19:20:25] [PASSED] 0xD742 (NOVALAKE_S)
[19:20:25] [PASSED] 0xD743 (NOVALAKE_S)
[19:20:25] [PASSED] 0xD744 (NOVALAKE_S)
[19:20:25] [PASSED] 0xD745 (NOVALAKE_S)
[19:20:25] [PASSED] 0x674C (CRESCENTISLAND)
[19:20:25] [PASSED] 0xFD80 (PANTHERLAKE)
[19:20:25] [PASSED] 0xFD81 (PANTHERLAKE)
[19:20:25] =============== [PASSED] check_platform_desc ===============
[19:20:25] ===================== [PASSED] xe_pci ======================
[19:20:25] =================== xe_rtp (2 subtests) ====================
[19:20:25] =============== xe_rtp_process_to_sr_tests ================
[19:20:25] [PASSED] coalesce-same-reg
[19:20:25] [PASSED] no-match-no-add
[19:20:25] [PASSED] match-or
[19:20:25] [PASSED] match-or-xfail
[19:20:25] [PASSED] no-match-no-add-multiple-rules
[19:20:25] [PASSED] two-regs-two-entries
[19:20:25] [PASSED] clr-one-set-other
[19:20:25] [PASSED] set-field
[19:20:25] [PASSED] conflict-duplicate
[19:20:25] [PASSED] conflict-not-disjoint
[19:20:25] [PASSED] conflict-reg-type
[19:20:25] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[19:20:25] ================== xe_rtp_process_tests ===================
[19:20:25] [PASSED] active1
[19:20:25] [PASSED] active2
[19:20:25] [PASSED] active-inactive
[19:20:25] [PASSED] inactive-active
[19:20:25] [PASSED] inactive-1st_or_active-inactive
[19:20:25] [PASSED] inactive-2nd_or_active-inactive
[19:20:25] [PASSED] inactive-last_or_active-inactive
[19:20:25] [PASSED] inactive-no_or_active-inactive
[19:20:25] ============== [PASSED] xe_rtp_process_tests ===============
[19:20:25] ===================== [PASSED] xe_rtp ======================
[19:20:25] ==================== xe_wa (1 subtest) =====================
[19:20:25] ======================== xe_wa_gt =========================
[19:20:25] [PASSED] TIGERLAKE B0
[19:20:25] [PASSED] DG1 A0
[19:20:25] [PASSED] DG1 B0
[19:20:25] [PASSED] ALDERLAKE_S A0
[19:20:25] [PASSED] ALDERLAKE_S B0
[19:20:25] [PASSED] ALDERLAKE_S C0
[19:20:25] [PASSED] ALDERLAKE_S D0
[19:20:25] [PASSED] ALDERLAKE_P A0
[19:20:25] [PASSED] ALDERLAKE_P B0
[19:20:25] [PASSED] ALDERLAKE_P C0
[19:20:25] [PASSED] ALDERLAKE_S RPLS D0
[19:20:25] [PASSED] ALDERLAKE_P RPLU E0
[19:20:25] [PASSED] DG2 G10 C0
[19:20:25] [PASSED] DG2 G11 B1
[19:20:25] [PASSED] DG2 G12 A1
[19:20:25] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:20:25] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:20:25] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[19:20:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[19:20:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[19:20:25] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[19:20:25] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[19:20:25] ==================== [PASSED] xe_wa_gt =====================
[19:20:25] ====================== [PASSED] xe_wa ======================
[19:20:25] ============================================================
[19:20:25] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[19:20:25] Elapsed time: 34.772s total, 4.256s configuring, 30.047s building, 0.460s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[19:20:25] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:20:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:20:51] Starting KUnit Kernel (1/1)...
[19:20:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:20:51] ============ drm_test_pick_cmdline (2 subtests) ============
[19:20:51] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[19:20:51] =============== drm_test_pick_cmdline_named ===============
[19:20:51] [PASSED] NTSC
[19:20:51] [PASSED] NTSC-J
[19:20:51] [PASSED] PAL
[19:20:51] [PASSED] PAL-M
[19:20:51] =========== [PASSED] drm_test_pick_cmdline_named ===========
[19:20:51] ============== [PASSED] drm_test_pick_cmdline ==============
[19:20:51] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[19:20:51] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[19:20:51] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[19:20:51] =========== drm_validate_clone_mode (2 subtests) ===========
[19:20:51] ============== drm_test_check_in_clone_mode ===============
[19:20:51] [PASSED] in_clone_mode
[19:20:51] [PASSED] not_in_clone_mode
[19:20:51] ========== [PASSED] drm_test_check_in_clone_mode ===========
[19:20:51] =============== drm_test_check_valid_clones ===============
[19:20:51] [PASSED] not_in_clone_mode
[19:20:51] [PASSED] valid_clone
[19:20:51] [PASSED] invalid_clone
[19:20:51] =========== [PASSED] drm_test_check_valid_clones ===========
[19:20:51] ============= [PASSED] drm_validate_clone_mode =============
[19:20:51] ============= drm_validate_modeset (1 subtest) =============
[19:20:51] [PASSED] drm_test_check_connector_changed_modeset
[19:20:51] ============== [PASSED] drm_validate_modeset ===============
[19:20:51] ====== drm_test_bridge_get_current_state (2 subtests) ======
[19:20:51] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[19:20:51] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[19:20:51] ======== [PASSED] drm_test_bridge_get_current_state ========
[19:20:51] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[19:20:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[19:20:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[19:20:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[19:20:51] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[19:20:51] ============== drm_bridge_alloc (2 subtests) ===============
[19:20:51] [PASSED] drm_test_drm_bridge_alloc_basic
[19:20:51] [PASSED] drm_test_drm_bridge_alloc_get_put
[19:20:51] ================ [PASSED] drm_bridge_alloc =================
[19:20:51] ================== drm_buddy (8 subtests) ==================
[19:20:51] [PASSED] drm_test_buddy_alloc_limit
[19:20:51] [PASSED] drm_test_buddy_alloc_optimistic
[19:20:51] [PASSED] drm_test_buddy_alloc_pessimistic
[19:20:51] [PASSED] drm_test_buddy_alloc_pathological
[19:20:51] [PASSED] drm_test_buddy_alloc_contiguous
[19:20:51] [PASSED] drm_test_buddy_alloc_clear
[19:20:51] [PASSED] drm_test_buddy_alloc_range_bias
[19:20:51] [PASSED] drm_test_buddy_fragmentation_performance
[19:20:51] ==================== [PASSED] drm_buddy ====================
[19:20:51] ============= drm_cmdline_parser (40 subtests) =============
[19:20:51] [PASSED] drm_test_cmdline_force_d_only
[19:20:51] [PASSED] drm_test_cmdline_force_D_only_dvi
[19:20:51] [PASSED] drm_test_cmdline_force_D_only_hdmi
[19:20:51] [PASSED] drm_test_cmdline_force_D_only_not_digital
[19:20:51] [PASSED] drm_test_cmdline_force_e_only
[19:20:51] [PASSED] drm_test_cmdline_res
[19:20:51] [PASSED] drm_test_cmdline_res_vesa
[19:20:51] [PASSED] drm_test_cmdline_res_vesa_rblank
[19:20:51] [PASSED] drm_test_cmdline_res_rblank
[19:20:51] [PASSED] drm_test_cmdline_res_bpp
[19:20:51] [PASSED] drm_test_cmdline_res_refresh
[19:20:51] [PASSED] drm_test_cmdline_res_bpp_refresh
[19:20:51] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[19:20:51] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[19:20:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[19:20:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[19:20:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[19:20:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[19:20:51] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[19:20:51] [PASSED] drm_test_cmdline_res_margins_force_on
[19:20:51] [PASSED] drm_test_cmdline_res_vesa_margins
[19:20:51] [PASSED] drm_test_cmdline_name
[19:20:51] [PASSED] drm_test_cmdline_name_bpp
[19:20:51] [PASSED] drm_test_cmdline_name_option
[19:20:51] [PASSED] drm_test_cmdline_name_bpp_option
[19:20:51] [PASSED] drm_test_cmdline_rotate_0
[19:20:51] [PASSED] drm_test_cmdline_rotate_90
[19:20:51] [PASSED] drm_test_cmdline_rotate_180
[19:20:51] [PASSED] drm_test_cmdline_rotate_270
[19:20:51] [PASSED] drm_test_cmdline_hmirror
[19:20:51] [PASSED] drm_test_cmdline_vmirror
[19:20:51] [PASSED] drm_test_cmdline_margin_options
[19:20:51] [PASSED] drm_test_cmdline_multiple_options
[19:20:51] [PASSED] drm_test_cmdline_bpp_extra_and_option
[19:20:51] [PASSED] drm_test_cmdline_extra_and_option
[19:20:51] [PASSED] drm_test_cmdline_freestanding_options
[19:20:51] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[19:20:51] [PASSED] drm_test_cmdline_panel_orientation
[19:20:51] ================ drm_test_cmdline_invalid =================
[19:20:51] [PASSED] margin_only
[19:20:51] [PASSED] interlace_only
[19:20:51] [PASSED] res_missing_x
[19:20:51] [PASSED] res_missing_y
[19:20:51] [PASSED] res_bad_y
[19:20:51] [PASSED] res_missing_y_bpp
[19:20:51] [PASSED] res_bad_bpp
[19:20:51] [PASSED] res_bad_refresh
[19:20:51] [PASSED] res_bpp_refresh_force_on_off
[19:20:51] [PASSED] res_invalid_mode
[19:20:51] [PASSED] res_bpp_wrong_place_mode
[19:20:51] [PASSED] name_bpp_refresh
[19:20:51] [PASSED] name_refresh
[19:20:51] [PASSED] name_refresh_wrong_mode
[19:20:51] [PASSED] name_refresh_invalid_mode
[19:20:51] [PASSED] rotate_multiple
[19:20:51] [PASSED] rotate_invalid_val
[19:20:51] [PASSED] rotate_truncated
[19:20:51] [PASSED] invalid_option
[19:20:51] [PASSED] invalid_tv_option
[19:20:51] [PASSED] truncated_tv_option
[19:20:51] ============ [PASSED] drm_test_cmdline_invalid =============
[19:20:51] =============== drm_test_cmdline_tv_options ===============
[19:20:51] [PASSED] NTSC
[19:20:51] [PASSED] NTSC_443
[19:20:51] [PASSED] NTSC_J
[19:20:51] [PASSED] PAL
[19:20:51] [PASSED] PAL_M
[19:20:51] [PASSED] PAL_N
[19:20:51] [PASSED] SECAM
[19:20:51] [PASSED] MONO_525
[19:20:51] [PASSED] MONO_625
[19:20:51] =========== [PASSED] drm_test_cmdline_tv_options ===========
[19:20:51] =============== [PASSED] drm_cmdline_parser ================
[19:20:51] ========== drmm_connector_hdmi_init (20 subtests) ==========
[19:20:51] [PASSED] drm_test_connector_hdmi_init_valid
[19:20:51] [PASSED] drm_test_connector_hdmi_init_bpc_8
[19:20:51] [PASSED] drm_test_connector_hdmi_init_bpc_10
[19:20:51] [PASSED] drm_test_connector_hdmi_init_bpc_12
[19:20:51] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[19:20:51] [PASSED] drm_test_connector_hdmi_init_bpc_null
[19:20:51] [PASSED] drm_test_connector_hdmi_init_formats_empty
[19:20:51] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[19:20:51] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:20:51] [PASSED] supported_formats=0x9 yuv420_allowed=1
[19:20:51] [PASSED] supported_formats=0x9 yuv420_allowed=0
[19:20:51] [PASSED] supported_formats=0x3 yuv420_allowed=1
[19:20:51] [PASSED] supported_formats=0x3 yuv420_allowed=0
[19:20:51] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:20:51] [PASSED] drm_test_connector_hdmi_init_null_ddc
[19:20:51] [PASSED] drm_test_connector_hdmi_init_null_product
[19:20:51] [PASSED] drm_test_connector_hdmi_init_null_vendor
[19:20:51] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[19:20:51] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[19:20:51] [PASSED] drm_test_connector_hdmi_init_product_valid
[19:20:51] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[19:20:51] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[19:20:51] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[19:20:51] ========= drm_test_connector_hdmi_init_type_valid =========
[19:20:51] [PASSED] HDMI-A
[19:20:51] [PASSED] HDMI-B
[19:20:51] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[19:20:51] ======== drm_test_connector_hdmi_init_type_invalid ========
[19:20:51] [PASSED] Unknown
[19:20:51] [PASSED] VGA
[19:20:51] [PASSED] DVI-I
[19:20:51] [PASSED] DVI-D
[19:20:51] [PASSED] DVI-A
[19:20:51] [PASSED] Composite
[19:20:51] [PASSED] SVIDEO
[19:20:51] [PASSED] LVDS
[19:20:51] [PASSED] Component
[19:20:51] [PASSED] DIN
[19:20:51] [PASSED] DP
[19:20:51] [PASSED] TV
[19:20:51] [PASSED] eDP
[19:20:51] [PASSED] Virtual
[19:20:51] [PASSED] DSI
[19:20:51] [PASSED] DPI
[19:20:51] [PASSED] Writeback
[19:20:51] [PASSED] SPI
[19:20:51] [PASSED] USB
[19:20:51] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[19:20:51] ============ [PASSED] drmm_connector_hdmi_init =============
[19:20:51] ============= drmm_connector_init (3 subtests) =============
[19:20:51] [PASSED] drm_test_drmm_connector_init
[19:20:51] [PASSED] drm_test_drmm_connector_init_null_ddc
[19:20:51] ========= drm_test_drmm_connector_init_type_valid =========
[19:20:51] [PASSED] Unknown
[19:20:51] [PASSED] VGA
[19:20:51] [PASSED] DVI-I
[19:20:51] [PASSED] DVI-D
[19:20:51] [PASSED] DVI-A
[19:20:51] [PASSED] Composite
[19:20:51] [PASSED] SVIDEO
[19:20:51] [PASSED] LVDS
[19:20:51] [PASSED] Component
[19:20:51] [PASSED] DIN
[19:20:51] [PASSED] DP
[19:20:51] [PASSED] HDMI-A
[19:20:51] [PASSED] HDMI-B
[19:20:51] [PASSED] TV
[19:20:51] [PASSED] eDP
[19:20:51] [PASSED] Virtual
[19:20:51] [PASSED] DSI
[19:20:51] [PASSED] DPI
[19:20:51] [PASSED] Writeback
[19:20:51] [PASSED] SPI
[19:20:51] [PASSED] USB
[19:20:51] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[19:20:51] =============== [PASSED] drmm_connector_init ===============
[19:20:51] ========= drm_connector_dynamic_init (6 subtests) ==========
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_init
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_init_properties
[19:20:51] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[19:20:51] [PASSED] Unknown
[19:20:51] [PASSED] VGA
[19:20:51] [PASSED] DVI-I
[19:20:51] [PASSED] DVI-D
[19:20:51] [PASSED] DVI-A
[19:20:51] [PASSED] Composite
[19:20:51] [PASSED] SVIDEO
[19:20:51] [PASSED] LVDS
[19:20:51] [PASSED] Component
[19:20:51] [PASSED] DIN
[19:20:51] [PASSED] DP
[19:20:51] [PASSED] HDMI-A
[19:20:51] [PASSED] HDMI-B
[19:20:51] [PASSED] TV
[19:20:51] [PASSED] eDP
[19:20:51] [PASSED] Virtual
[19:20:51] [PASSED] DSI
[19:20:51] [PASSED] DPI
[19:20:51] [PASSED] Writeback
[19:20:51] [PASSED] SPI
[19:20:51] [PASSED] USB
[19:20:51] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[19:20:51] ======== drm_test_drm_connector_dynamic_init_name =========
[19:20:51] [PASSED] Unknown
[19:20:51] [PASSED] VGA
[19:20:51] [PASSED] DVI-I
[19:20:51] [PASSED] DVI-D
[19:20:51] [PASSED] DVI-A
[19:20:51] [PASSED] Composite
[19:20:51] [PASSED] SVIDEO
[19:20:51] [PASSED] LVDS
[19:20:51] [PASSED] Component
[19:20:51] [PASSED] DIN
[19:20:51] [PASSED] DP
[19:20:51] [PASSED] HDMI-A
[19:20:51] [PASSED] HDMI-B
[19:20:51] [PASSED] TV
[19:20:51] [PASSED] eDP
[19:20:51] [PASSED] Virtual
[19:20:51] [PASSED] DSI
[19:20:51] [PASSED] DPI
[19:20:51] [PASSED] Writeback
[19:20:51] [PASSED] SPI
[19:20:51] [PASSED] USB
[19:20:51] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[19:20:51] =========== [PASSED] drm_connector_dynamic_init ============
[19:20:51] ==== drm_connector_dynamic_register_early (4 subtests) =====
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[19:20:51] ====== [PASSED] drm_connector_dynamic_register_early =======
[19:20:51] ======= drm_connector_dynamic_register (7 subtests) ========
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[19:20:51] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[19:20:51] ========= [PASSED] drm_connector_dynamic_register ==========
[19:20:51] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[19:20:51] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[19:20:51] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[19:20:51] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[19:20:51] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[19:20:51] ========== drm_test_get_tv_mode_from_name_valid ===========
[19:20:51] [PASSED] NTSC
[19:20:51] [PASSED] NTSC-443
[19:20:51] [PASSED] NTSC-J
[19:20:51] [PASSED] PAL
[19:20:51] [PASSED] PAL-M
[19:20:51] [PASSED] PAL-N
[19:20:51] [PASSED] SECAM
[19:20:51] [PASSED] Mono
[19:20:51] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[19:20:51] [PASSED] drm_test_get_tv_mode_from_name_truncated
[19:20:51] ============ [PASSED] drm_get_tv_mode_from_name ============
[19:20:51] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[19:20:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[19:20:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[19:20:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[19:20:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[19:20:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[19:20:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[19:20:51] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[19:20:51] [PASSED] VIC 96
[19:20:51] [PASSED] VIC 97
[19:20:51] [PASSED] VIC 101
[19:20:51] [PASSED] VIC 102
[19:20:51] [PASSED] VIC 106
[19:20:51] [PASSED] VIC 107
[19:20:51] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[19:20:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[19:20:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[19:20:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[19:20:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[19:20:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[19:20:51] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[19:20:51] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[19:20:51] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[19:20:51] [PASSED] Automatic
[19:20:51] [PASSED] Full
[19:20:51] [PASSED] Limited 16:235
[19:20:51] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[19:20:51] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[19:20:51] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[19:20:51] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[19:20:51] === drm_test_drm_hdmi_connector_get_output_format_name ====
[19:20:51] [PASSED] RGB
[19:20:51] [PASSED] YUV 4:2:0
[19:20:51] [PASSED] YUV 4:2:2
[19:20:51] [PASSED] YUV 4:4:4
[19:20:51] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[19:20:51] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[19:20:51] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[19:20:51] ============= drm_damage_helper (21 subtests) ==============
[19:20:51] [PASSED] drm_test_damage_iter_no_damage
[19:20:51] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[19:20:51] [PASSED] drm_test_damage_iter_no_damage_src_moved
[19:20:51] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[19:20:51] [PASSED] drm_test_damage_iter_no_damage_not_visible
[19:20:51] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[19:20:51] [PASSED] drm_test_damage_iter_no_damage_no_fb
[19:20:51] [PASSED] drm_test_damage_iter_simple_damage
[19:20:51] [PASSED] drm_test_damage_iter_single_damage
[19:20:51] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[19:20:51] [PASSED] drm_test_damage_iter_single_damage_outside_src
[19:20:51] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[19:20:51] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[19:20:51] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[19:20:51] [PASSED] drm_test_damage_iter_single_damage_src_moved
[19:20:51] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[19:20:51] [PASSED] drm_test_damage_iter_damage
[19:20:51] [PASSED] drm_test_damage_iter_damage_one_intersect
[19:20:51] [PASSED] drm_test_damage_iter_damage_one_outside
[19:20:51] [PASSED] drm_test_damage_iter_damage_src_moved
[19:20:51] [PASSED] drm_test_damage_iter_damage_not_visible
[19:20:51] ================ [PASSED] drm_damage_helper ================
[19:20:51] ============== drm_dp_mst_helper (3 subtests) ==============
[19:20:51] ============== drm_test_dp_mst_calc_pbn_mode ==============
[19:20:51] [PASSED] Clock 154000 BPP 30 DSC disabled
[19:20:51] [PASSED] Clock 234000 BPP 30 DSC disabled
[19:20:51] [PASSED] Clock 297000 BPP 24 DSC disabled
[19:20:51] [PASSED] Clock 332880 BPP 24 DSC enabled
[19:20:51] [PASSED] Clock 324540 BPP 24 DSC enabled
[19:20:51] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[19:20:51] ============== drm_test_dp_mst_calc_pbn_div ===============
[19:20:51] [PASSED] Link rate 2000000 lane count 4
[19:20:51] [PASSED] Link rate 2000000 lane count 2
[19:20:51] [PASSED] Link rate 2000000 lane count 1
[19:20:51] [PASSED] Link rate 1350000 lane count 4
[19:20:51] [PASSED] Link rate 1350000 lane count 2
[19:20:51] [PASSED] Link rate 1350000 lane count 1
[19:20:51] [PASSED] Link rate 1000000 lane count 4
[19:20:51] [PASSED] Link rate 1000000 lane count 2
[19:20:51] [PASSED] Link rate 1000000 lane count 1
[19:20:51] [PASSED] Link rate 810000 lane count 4
[19:20:51] [PASSED] Link rate 810000 lane count 2
[19:20:51] [PASSED] Link rate 810000 lane count 1
[19:20:51] [PASSED] Link rate 540000 lane count 4
[19:20:51] [PASSED] Link rate 540000 lane count 2
[19:20:51] [PASSED] Link rate 540000 lane count 1
[19:20:51] [PASSED] Link rate 270000 lane count 4
[19:20:51] [PASSED] Link rate 270000 lane count 2
[19:20:51] [PASSED] Link rate 270000 lane count 1
[19:20:51] [PASSED] Link rate 162000 lane count 4
[19:20:51] [PASSED] Link rate 162000 lane count 2
[19:20:51] [PASSED] Link rate 162000 lane count 1
[19:20:51] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[19:20:51] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[19:20:51] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[19:20:51] [PASSED] DP_POWER_UP_PHY with port number
[19:20:51] [PASSED] DP_POWER_DOWN_PHY with port number
[19:20:51] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[19:20:51] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[19:20:51] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[19:20:51] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[19:20:51] [PASSED] DP_QUERY_PAYLOAD with port number
[19:20:51] [PASSED] DP_QUERY_PAYLOAD with VCPI
[19:20:51] [PASSED] DP_REMOTE_DPCD_READ with port number
[19:20:51] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[19:20:51] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[19:20:51] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[19:20:51] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[19:20:51] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[19:20:51] [PASSED] DP_REMOTE_I2C_READ with port number
[19:20:51] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[19:20:51] [PASSED] DP_REMOTE_I2C_READ with transactions array
[19:20:51] [PASSED] DP_REMOTE_I2C_WRITE with port number
[19:20:51] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[19:20:51] [PASSED] DP_REMOTE_I2C_WRITE with data array
[19:20:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[19:20:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[19:20:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[19:20:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[19:20:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[19:20:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[19:20:51] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[19:20:51] ================ [PASSED] drm_dp_mst_helper ================
[19:20:51] ================== drm_exec (7 subtests) ===================
[19:20:51] [PASSED] sanitycheck
[19:20:51] [PASSED] test_lock
[19:20:51] [PASSED] test_lock_unlock
[19:20:51] [PASSED] test_duplicates
[19:20:51] [PASSED] test_prepare
[19:20:51] [PASSED] test_prepare_array
[19:20:51] [PASSED] test_multiple_loops
[19:20:51] ==================== [PASSED] drm_exec =====================
[19:20:51] =========== drm_format_helper_test (17 subtests) ===========
[19:20:51] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[19:20:51] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[19:20:51] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[19:20:51] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[19:20:51] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[19:20:51] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[19:20:51] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[19:20:51] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[19:20:51] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[19:20:51] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[19:20:51] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[19:20:51] ============== drm_test_fb_xrgb8888_to_mono ===============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[19:20:51] ==================== drm_test_fb_swab =====================
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ================ [PASSED] drm_test_fb_swab =================
[19:20:51] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[19:20:51] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[19:20:51] [PASSED] single_pixel_source_buffer
[19:20:51] [PASSED] single_pixel_clip_rectangle
[19:20:51] [PASSED] well_known_colors
[19:20:51] [PASSED] destination_pitch
[19:20:51] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[19:20:51] ================= drm_test_fb_clip_offset =================
[19:20:51] [PASSED] pass through
[19:20:51] [PASSED] horizontal offset
[19:20:51] [PASSED] vertical offset
[19:20:51] [PASSED] horizontal and vertical offset
[19:20:51] [PASSED] horizontal offset (custom pitch)
[19:20:51] [PASSED] vertical offset (custom pitch)
[19:20:51] [PASSED] horizontal and vertical offset (custom pitch)
[19:20:51] ============= [PASSED] drm_test_fb_clip_offset =============
[19:20:51] =================== drm_test_fb_memcpy ====================
[19:20:51] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[19:20:51] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[19:20:51] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[19:20:51] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[19:20:51] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[19:20:51] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[19:20:51] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[19:20:51] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[19:20:51] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[19:20:51] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[19:20:51] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[19:20:51] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[19:20:51] =============== [PASSED] drm_test_fb_memcpy ================
[19:20:51] ============= [PASSED] drm_format_helper_test ==============
[19:20:51] ================= drm_format (18 subtests) =================
[19:20:51] [PASSED] drm_test_format_block_width_invalid
[19:20:51] [PASSED] drm_test_format_block_width_one_plane
[19:20:51] [PASSED] drm_test_format_block_width_two_plane
[19:20:51] [PASSED] drm_test_format_block_width_three_plane
[19:20:51] [PASSED] drm_test_format_block_width_tiled
[19:20:51] [PASSED] drm_test_format_block_height_invalid
[19:20:51] [PASSED] drm_test_format_block_height_one_plane
[19:20:51] [PASSED] drm_test_format_block_height_two_plane
[19:20:51] [PASSED] drm_test_format_block_height_three_plane
[19:20:51] [PASSED] drm_test_format_block_height_tiled
[19:20:51] [PASSED] drm_test_format_min_pitch_invalid
[19:20:51] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[19:20:51] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[19:20:51] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[19:20:51] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[19:20:51] [PASSED] drm_test_format_min_pitch_two_plane
[19:20:51] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[19:20:51] [PASSED] drm_test_format_min_pitch_tiled
[19:20:51] =================== [PASSED] drm_format ====================
[19:20:51] ============== drm_framebuffer (10 subtests) ===============
[19:20:51] ========== drm_test_framebuffer_check_src_coords ==========
[19:20:51] [PASSED] Success: source fits into fb
[19:20:51] [PASSED] Fail: overflowing fb with x-axis coordinate
[19:20:51] [PASSED] Fail: overflowing fb with y-axis coordinate
[19:20:51] [PASSED] Fail: overflowing fb with source width
[19:20:51] [PASSED] Fail: overflowing fb with source height
[19:20:51] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[19:20:51] [PASSED] drm_test_framebuffer_cleanup
[19:20:51] =============== drm_test_framebuffer_create ===============
[19:20:51] [PASSED] ABGR8888 normal sizes
[19:20:51] [PASSED] ABGR8888 max sizes
[19:20:51] [PASSED] ABGR8888 pitch greater than min required
[19:20:51] [PASSED] ABGR8888 pitch less than min required
[19:20:51] [PASSED] ABGR8888 Invalid width
[19:20:51] [PASSED] ABGR8888 Invalid buffer handle
[19:20:51] [PASSED] No pixel format
[19:20:51] [PASSED] ABGR8888 Width 0
[19:20:51] [PASSED] ABGR8888 Height 0
[19:20:51] [PASSED] ABGR8888 Out of bound height * pitch combination
[19:20:51] [PASSED] ABGR8888 Large buffer offset
[19:20:51] [PASSED] ABGR8888 Buffer offset for inexistent plane
[19:20:51] [PASSED] ABGR8888 Invalid flag
[19:20:51] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[19:20:51] [PASSED] ABGR8888 Valid buffer modifier
[19:20:51] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[19:20:51] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[19:20:51] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[19:20:51] [PASSED] NV12 Normal sizes
[19:20:51] [PASSED] NV12 Max sizes
[19:20:51] [PASSED] NV12 Invalid pitch
[19:20:51] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[19:20:51] [PASSED] NV12 different modifier per-plane
[19:20:51] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[19:20:51] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[19:20:51] [PASSED] NV12 Modifier for inexistent plane
[19:20:51] [PASSED] NV12 Handle for inexistent plane
[19:20:51] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[19:20:51] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[19:20:51] [PASSED] YVU420 Normal sizes
[19:20:51] [PASSED] YVU420 Max sizes
[19:20:51] [PASSED] YVU420 Invalid pitch
[19:20:51] [PASSED] YVU420 Different pitches
[19:20:51] [PASSED] YVU420 Different buffer offsets/pitches
[19:20:51] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[19:20:51] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[19:20:51] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[19:20:51] [PASSED] YVU420 Valid modifier
[19:20:51] [PASSED] YVU420 Different modifiers per plane
[19:20:51] [PASSED] YVU420 Modifier for inexistent plane
[19:20:51] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[19:20:51] [PASSED] X0L2 Normal sizes
[19:20:51] [PASSED] X0L2 Max sizes
[19:20:51] [PASSED] X0L2 Invalid pitch
[19:20:51] [PASSED] X0L2 Pitch greater than minimum required
[19:20:51] [PASSED] X0L2 Handle for inexistent plane
[19:20:51] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[19:20:51] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[19:20:51] [PASSED] X0L2 Valid modifier
[19:20:51] [PASSED] X0L2 Modifier for inexistent plane
[19:20:51] =========== [PASSED] drm_test_framebuffer_create ===========
[19:20:51] [PASSED] drm_test_framebuffer_free
[19:20:51] [PASSED] drm_test_framebuffer_init
[19:20:51] [PASSED] drm_test_framebuffer_init_bad_format
[19:20:51] [PASSED] drm_test_framebuffer_init_dev_mismatch
[19:20:51] [PASSED] drm_test_framebuffer_lookup
[19:20:51] [PASSED] drm_test_framebuffer_lookup_inexistent
[19:20:51] [PASSED] drm_test_framebuffer_modifiers_not_supported
[19:20:51] ================= [PASSED] drm_framebuffer =================
[19:20:51] ================ drm_gem_shmem (8 subtests) ================
[19:20:51] [PASSED] drm_gem_shmem_test_obj_create
[19:20:51] [PASSED] drm_gem_shmem_test_obj_create_private
[19:20:51] [PASSED] drm_gem_shmem_test_pin_pages
[19:20:51] [PASSED] drm_gem_shmem_test_vmap
[19:20:51] [PASSED] drm_gem_shmem_test_get_pages_sgt
[19:20:51] [PASSED] drm_gem_shmem_test_get_sg_table
[19:20:51] [PASSED] drm_gem_shmem_test_madvise
[19:20:51] [PASSED] drm_gem_shmem_test_purge
[19:20:51] ================== [PASSED] drm_gem_shmem ==================
[19:20:51] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[19:20:51] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[19:20:51] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[19:20:51] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[19:20:51] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[19:20:51] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[19:20:51] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[19:20:51] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[19:20:51] [PASSED] Automatic
[19:20:51] [PASSED] Full
[19:20:51] [PASSED] Limited 16:235
[19:20:51] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[19:20:51] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[19:20:51] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[19:20:51] [PASSED] drm_test_check_disable_connector
[19:20:51] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[19:20:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[19:20:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[19:20:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[19:20:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[19:20:51] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[19:20:51] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[19:20:51] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[19:20:51] [PASSED] drm_test_check_output_bpc_dvi
[19:20:51] [PASSED] drm_test_check_output_bpc_format_vic_1
[19:20:51] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[19:20:51] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[19:20:51] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[19:20:51] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[19:20:51] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[19:20:51] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[19:20:51] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[19:20:51] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[19:20:51] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[19:20:51] [PASSED] drm_test_check_broadcast_rgb_value
[19:20:51] [PASSED] drm_test_check_bpc_8_value
[19:20:51] [PASSED] drm_test_check_bpc_10_value
[19:20:51] [PASSED] drm_test_check_bpc_12_value
[19:20:51] [PASSED] drm_test_check_format_value
[19:20:51] [PASSED] drm_test_check_tmds_char_value
[19:20:51] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[19:20:51] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[19:20:51] [PASSED] drm_test_check_mode_valid
[19:20:51] [PASSED] drm_test_check_mode_valid_reject
[19:20:51] [PASSED] drm_test_check_mode_valid_reject_rate
[19:20:51] [PASSED] drm_test_check_mode_valid_reject_max_clock
[19:20:51] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[19:20:51] ================= drm_managed (2 subtests) =================
[19:20:51] [PASSED] drm_test_managed_release_action
[19:20:51] [PASSED] drm_test_managed_run_action
[19:20:51] =================== [PASSED] drm_managed ===================
[19:20:51] =================== drm_mm (6 subtests) ====================
[19:20:51] [PASSED] drm_test_mm_init
[19:20:51] [PASSED] drm_test_mm_debug
[19:20:51] [PASSED] drm_test_mm_align32
[19:20:51] [PASSED] drm_test_mm_align64
[19:20:51] [PASSED] drm_test_mm_lowest
[19:20:51] [PASSED] drm_test_mm_highest
[19:20:51] ===================== [PASSED] drm_mm ======================
[19:20:51] ============= drm_modes_analog_tv (5 subtests) =============
[19:20:51] [PASSED] drm_test_modes_analog_tv_mono_576i
[19:20:51] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[19:20:51] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[19:20:51] [PASSED] drm_test_modes_analog_tv_pal_576i
[19:20:51] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[19:20:51] =============== [PASSED] drm_modes_analog_tv ===============
[19:20:51] ============== drm_plane_helper (2 subtests) ===============
[19:20:51] =============== drm_test_check_plane_state ================
[19:20:51] [PASSED] clipping_simple
[19:20:51] [PASSED] clipping_rotate_reflect
[19:20:51] [PASSED] positioning_simple
[19:20:51] [PASSED] upscaling
[19:20:51] [PASSED] downscaling
[19:20:51] [PASSED] rounding1
[19:20:51] [PASSED] rounding2
[19:20:51] [PASSED] rounding3
[19:20:51] [PASSED] rounding4
[19:20:51] =========== [PASSED] drm_test_check_plane_state ============
[19:20:51] =========== drm_test_check_invalid_plane_state ============
[19:20:51] [PASSED] positioning_invalid
[19:20:51] [PASSED] upscaling_invalid
[19:20:51] [PASSED] downscaling_invalid
[19:20:51] ======= [PASSED] drm_test_check_invalid_plane_state ========
[19:20:51] ================ [PASSED] drm_plane_helper =================
[19:20:51] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[19:20:51] ====== drm_test_connector_helper_tv_get_modes_check =======
[19:20:51] [PASSED] None
[19:20:51] [PASSED] PAL
[19:20:51] [PASSED] NTSC
[19:20:51] [PASSED] Both, NTSC Default
[19:20:51] [PASSED] Both, PAL Default
[19:20:51] [PASSED] Both, NTSC Default, with PAL on command-line
[19:20:51] [PASSED] Both, PAL Default, with NTSC on command-line
[19:20:51] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[19:20:51] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[19:20:51] ================== drm_rect (9 subtests) ===================
[19:20:51] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[19:20:51] [PASSED] drm_test_rect_clip_scaled_not_clipped
[19:20:51] [PASSED] drm_test_rect_clip_scaled_clipped
[19:20:51] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[19:20:51] ================= drm_test_rect_intersect =================
[19:20:51] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[19:20:51] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[19:20:51] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[19:20:51] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[19:20:51] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[19:20:51] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[19:20:51] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[19:20:51] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[19:20:51] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[19:20:51] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[19:20:51] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[19:20:51] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[19:20:51] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[19:20:51] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[19:20:51] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[19:20:51] ============= [PASSED] drm_test_rect_intersect =============
[19:20:51] ================ drm_test_rect_calc_hscale ================
[19:20:51] [PASSED] normal use
[19:20:51] [PASSED] out of max range
[19:20:51] [PASSED] out of min range
[19:20:51] [PASSED] zero dst
[19:20:51] [PASSED] negative src
[19:20:51] [PASSED] negative dst
[19:20:51] ============ [PASSED] drm_test_rect_calc_hscale ============
[19:20:51] ================ drm_test_rect_calc_vscale ================
[19:20:51] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[19:20:51] [PASSED] out of max range
[19:20:51] [PASSED] out of min range
[19:20:51] [PASSED] zero dst
[19:20:51] [PASSED] negative src
[19:20:51] [PASSED] negative dst
[19:20:51] ============ [PASSED] drm_test_rect_calc_vscale ============
[19:20:51] ================== drm_test_rect_rotate ===================
[19:20:51] [PASSED] reflect-x
[19:20:51] [PASSED] reflect-y
[19:20:51] [PASSED] rotate-0
[19:20:51] [PASSED] rotate-90
[19:20:51] [PASSED] rotate-180
[19:20:51] [PASSED] rotate-270
[19:20:51] ============== [PASSED] drm_test_rect_rotate ===============
[19:20:51] ================ drm_test_rect_rotate_inv =================
[19:20:51] [PASSED] reflect-x
[19:20:51] [PASSED] reflect-y
[19:20:51] [PASSED] rotate-0
[19:20:51] [PASSED] rotate-90
[19:20:51] [PASSED] rotate-180
[19:20:51] [PASSED] rotate-270
[19:20:51] ============ [PASSED] drm_test_rect_rotate_inv =============
[19:20:51] ==================== [PASSED] drm_rect =====================
[19:20:51] ============ drm_sysfb_modeset_test (1 subtest) ============
[19:20:51] ============ drm_test_sysfb_build_fourcc_list =============
[19:20:51] [PASSED] no native formats
[19:20:51] [PASSED] XRGB8888 as native format
[19:20:51] [PASSED] remove duplicates
[19:20:51] [PASSED] convert alpha formats
[19:20:51] [PASSED] random formats
[19:20:51] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[19:20:51] ============= [PASSED] drm_sysfb_modeset_test ==============
[19:20:51] ============================================================
[19:20:51] Testing complete. Ran 622 tests: passed: 622
[19:20:51] Elapsed time: 26.576s total, 1.681s configuring, 24.426s building, 0.435s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[19:20:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:20:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:21:03] Starting KUnit Kernel (1/1)...
[19:21:03] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:21:03] ================= ttm_device (5 subtests) ==================
[19:21:03] [PASSED] ttm_device_init_basic
[19:21:03] [PASSED] ttm_device_init_multiple
[19:21:03] [PASSED] ttm_device_fini_basic
[19:21:03] [PASSED] ttm_device_init_no_vma_man
[19:21:03] ================== ttm_device_init_pools ==================
[19:21:03] [PASSED] No DMA allocations, no DMA32 required
[19:21:03] [PASSED] DMA allocations, DMA32 required
[19:21:03] [PASSED] No DMA allocations, DMA32 required
[19:21:03] [PASSED] DMA allocations, no DMA32 required
[19:21:03] ============== [PASSED] ttm_device_init_pools ==============
[19:21:03] =================== [PASSED] ttm_device ====================
[19:21:03] ================== ttm_pool (8 subtests) ===================
[19:21:03] ================== ttm_pool_alloc_basic ===================
[19:21:03] [PASSED] One page
[19:21:03] [PASSED] More than one page
[19:21:03] [PASSED] Above the allocation limit
[19:21:03] [PASSED] One page, with coherent DMA mappings enabled
[19:21:03] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:21:03] ============== [PASSED] ttm_pool_alloc_basic ===============
[19:21:03] ============== ttm_pool_alloc_basic_dma_addr ==============
[19:21:03] [PASSED] One page
[19:21:03] [PASSED] More than one page
[19:21:03] [PASSED] Above the allocation limit
[19:21:03] [PASSED] One page, with coherent DMA mappings enabled
[19:21:03] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:21:03] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[19:21:03] [PASSED] ttm_pool_alloc_order_caching_match
[19:21:03] [PASSED] ttm_pool_alloc_caching_mismatch
[19:21:03] [PASSED] ttm_pool_alloc_order_mismatch
[19:21:03] [PASSED] ttm_pool_free_dma_alloc
[19:21:03] [PASSED] ttm_pool_free_no_dma_alloc
[19:21:03] [PASSED] ttm_pool_fini_basic
[19:21:03] ==================== [PASSED] ttm_pool =====================
[19:21:03] ================ ttm_resource (8 subtests) =================
[19:21:03] ================= ttm_resource_init_basic =================
[19:21:03] [PASSED] Init resource in TTM_PL_SYSTEM
[19:21:03] [PASSED] Init resource in TTM_PL_VRAM
[19:21:03] [PASSED] Init resource in a private placement
[19:21:03] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[19:21:03] ============= [PASSED] ttm_resource_init_basic =============
[19:21:03] [PASSED] ttm_resource_init_pinned
[19:21:03] [PASSED] ttm_resource_fini_basic
[19:21:03] [PASSED] ttm_resource_manager_init_basic
[19:21:03] [PASSED] ttm_resource_manager_usage_basic
[19:21:03] [PASSED] ttm_resource_manager_set_used_basic
[19:21:03] [PASSED] ttm_sys_man_alloc_basic
[19:21:03] [PASSED] ttm_sys_man_free_basic
[19:21:03] ================== [PASSED] ttm_resource ===================
[19:21:03] =================== ttm_tt (15 subtests) ===================
[19:21:03] ==================== ttm_tt_init_basic ====================
[19:21:03] [PASSED] Page-aligned size
[19:21:03] [PASSED] Extra pages requested
[19:21:03] ================ [PASSED] ttm_tt_init_basic ================
[19:21:03] [PASSED] ttm_tt_init_misaligned
[19:21:03] [PASSED] ttm_tt_fini_basic
[19:21:03] [PASSED] ttm_tt_fini_sg
[19:21:03] [PASSED] ttm_tt_fini_shmem
[19:21:03] [PASSED] ttm_tt_create_basic
[19:21:03] [PASSED] ttm_tt_create_invalid_bo_type
[19:21:03] [PASSED] ttm_tt_create_ttm_exists
[19:21:03] [PASSED] ttm_tt_create_failed
[19:21:03] [PASSED] ttm_tt_destroy_basic
[19:21:03] [PASSED] ttm_tt_populate_null_ttm
[19:21:03] [PASSED] ttm_tt_populate_populated_ttm
[19:21:03] [PASSED] ttm_tt_unpopulate_basic
[19:21:03] [PASSED] ttm_tt_unpopulate_empty_ttm
[19:21:03] [PASSED] ttm_tt_swapin_basic
[19:21:03] ===================== [PASSED] ttm_tt ======================
[19:21:03] =================== ttm_bo (14 subtests) ===================
[19:21:03] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[19:21:03] [PASSED] Cannot be interrupted and sleeps
[19:21:03] [PASSED] Cannot be interrupted, locks straight away
[19:21:03] [PASSED] Can be interrupted, sleeps
[19:21:03] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[19:21:03] [PASSED] ttm_bo_reserve_locked_no_sleep
[19:21:03] [PASSED] ttm_bo_reserve_no_wait_ticket
[19:21:03] [PASSED] ttm_bo_reserve_double_resv
[19:21:03] [PASSED] ttm_bo_reserve_interrupted
[19:21:03] [PASSED] ttm_bo_reserve_deadlock
[19:21:03] [PASSED] ttm_bo_unreserve_basic
[19:21:03] [PASSED] ttm_bo_unreserve_pinned
[19:21:03] [PASSED] ttm_bo_unreserve_bulk
[19:21:03] [PASSED] ttm_bo_fini_basic
[19:21:03] [PASSED] ttm_bo_fini_shared_resv
[19:21:03] [PASSED] ttm_bo_pin_basic
[19:21:03] [PASSED] ttm_bo_pin_unpin_resource
[19:21:03] [PASSED] ttm_bo_multiple_pin_one_unpin
[19:21:03] ===================== [PASSED] ttm_bo ======================
[19:21:03] ============== ttm_bo_validate (21 subtests) ===============
[19:21:03] ============== ttm_bo_init_reserved_sys_man ===============
[19:21:03] [PASSED] Buffer object for userspace
[19:21:03] [PASSED] Kernel buffer object
[19:21:03] [PASSED] Shared buffer object
[19:21:03] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[19:21:03] ============== ttm_bo_init_reserved_mock_man ==============
[19:21:03] [PASSED] Buffer object for userspace
[19:21:03] [PASSED] Kernel buffer object
[19:21:03] [PASSED] Shared buffer object
[19:21:03] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[19:21:03] [PASSED] ttm_bo_init_reserved_resv
[19:21:03] ================== ttm_bo_validate_basic ==================
[19:21:03] [PASSED] Buffer object for userspace
[19:21:03] [PASSED] Kernel buffer object
[19:21:03] [PASSED] Shared buffer object
[19:21:03] ============== [PASSED] ttm_bo_validate_basic ==============
[19:21:03] [PASSED] ttm_bo_validate_invalid_placement
[19:21:03] ============= ttm_bo_validate_same_placement ==============
[19:21:03] [PASSED] System manager
[19:21:03] [PASSED] VRAM manager
[19:21:03] ========= [PASSED] ttm_bo_validate_same_placement ==========
[19:21:03] [PASSED] ttm_bo_validate_failed_alloc
[19:21:03] [PASSED] ttm_bo_validate_pinned
[19:21:03] [PASSED] ttm_bo_validate_busy_placement
[19:21:03] ================ ttm_bo_validate_multihop =================
[19:21:03] [PASSED] Buffer object for userspace
[19:21:03] [PASSED] Kernel buffer object
[19:21:03] [PASSED] Shared buffer object
[19:21:03] ============ [PASSED] ttm_bo_validate_multihop =============
[19:21:03] ========== ttm_bo_validate_no_placement_signaled ==========
[19:21:03] [PASSED] Buffer object in system domain, no page vector
[19:21:03] [PASSED] Buffer object in system domain with an existing page vector
[19:21:03] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[19:21:03] ======== ttm_bo_validate_no_placement_not_signaled ========
[19:21:03] [PASSED] Buffer object for userspace
[19:21:03] [PASSED] Kernel buffer object
[19:21:03] [PASSED] Shared buffer object
[19:21:03] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[19:21:03] [PASSED] ttm_bo_validate_move_fence_signaled
[19:21:03] ========= ttm_bo_validate_move_fence_not_signaled =========
[19:21:03] [PASSED] Waits for GPU
[19:21:03] [PASSED] Tries to lock straight away
[19:21:03] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[19:21:03] [PASSED] ttm_bo_validate_happy_evict
[19:21:03] [PASSED] ttm_bo_validate_all_pinned_evict
[19:21:03] [PASSED] ttm_bo_validate_allowed_only_evict
[19:21:03] [PASSED] ttm_bo_validate_deleted_evict
[19:21:03] [PASSED] ttm_bo_validate_busy_domain_evict
[19:21:03] [PASSED] ttm_bo_validate_evict_gutting
[19:21:03] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[19:21:03] ================= [PASSED] ttm_bo_validate =================
[19:21:03] ============================================================
[19:21:03] Testing complete. Ran 101 tests: passed: 101
[19:21:03] Elapsed time: 11.278s total, 1.685s configuring, 9.375s building, 0.182s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 30+ messages in thread* ✗ CI.checksparse: warning for drm/i915: dissolve soc/ (rev2)
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (20 preceding siblings ...)
2025-11-20 19:21 ` ✓ CI.KUnit: success " Patchwork
@ 2025-11-20 19:36 ` Patchwork
2025-11-20 20:25 ` ✓ Xe.CI.BAT: success " Patchwork
2025-11-21 1:27 ` ✗ Xe.CI.Full: failure " Patchwork
23 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2025-11-20 19:36 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
== Series Details ==
Series: drm/i915: dissolve soc/ (rev2)
URL : https://patchwork.freedesktop.org/series/157792/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 3d718db04a365cc44a3bc81ffa4db7bbd2e645d7
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_casf.c:147:21: error: too long token expansion
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2072:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2085:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_lt_phy.c:1935:35: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file:
+drivers/gpu/drm/i915/gt/intel_reset.c:1569:12: warning: context imbalance in '_intel_gt_reset_lock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/intel_sseu.c:600:17: error: too long token expansion
+drivers/gpu/drm/i915/i915_active.c:1062:16: warning: context imbalance in '__i915_active_fence_set' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: expected struct list_head const *list
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: got struct list_head [noderef] __rcu *pos
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/i915_gpu_error.c:692:3: warning: symbol 'guc_hw_reg_state' was not declared. Should it be static?
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:467:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:475:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:480:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:518:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:526:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:531:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:575:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:578:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:582:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:589:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/intel_uncore.c:1930:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1931:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1932:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1933:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1998:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1999:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2000:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2020:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2021:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2022:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_wakeref.c:148:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 30+ messages in thread* ✓ Xe.CI.BAT: success for drm/i915: dissolve soc/ (rev2)
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (21 preceding siblings ...)
2025-11-20 19:36 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-11-20 20:25 ` Patchwork
2025-11-21 1:27 ` ✗ Xe.CI.Full: failure " Patchwork
23 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2025-11-20 20:25 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 1910 bytes --]
== Series Details ==
Series: drm/i915: dissolve soc/ (rev2)
URL : https://patchwork.freedesktop.org/series/157792/
State : success
== Summary ==
CI Bug Log - changes from xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7_BAT -> xe-pw-157792v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-157792v2_BAT that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [FAIL][1] ([Intel XE#6519]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/bat-dg2-oem2/igt@xe_waitfence@engine.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/bat-dg2-oem2/igt@xe_waitfence@engine.html
* igt@xe_waitfence@reltime:
- bat-dg2-oem2: [FAIL][3] ([Intel XE#6520]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
[Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
Build changes
-------------
* Linux: xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7 -> xe-pw-157792v2
IGT_8636: 254cd102396ff95d61f2ebe49fc09128878bf483 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7: 3d718db04a365cc44a3bc81ffa4db7bbd2e645d7
xe-pw-157792v2: 157792v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/index.html
[-- Attachment #2: Type: text/html, Size: 2509 bytes --]
^ permalink raw reply [flat|nested] 30+ messages in thread* ✗ Xe.CI.Full: failure for drm/i915: dissolve soc/ (rev2)
2025-11-19 18:52 [PATCH v2 00/13] drm/i915: dissolve soc/ Jani Nikula
` (22 preceding siblings ...)
2025-11-20 20:25 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-11-21 1:27 ` Patchwork
23 siblings, 0 replies; 30+ messages in thread
From: Patchwork @ 2025-11-21 1:27 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 21046 bytes --]
== Series Details ==
Series: drm/i915: dissolve soc/ (rev2)
URL : https://patchwork.freedesktop.org/series/157792/
State : failure
== Summary ==
CI Bug Log - changes from xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7_FULL -> xe-pw-157792v2_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-157792v2_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-157792v2_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-157792v2_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_eudebug_online@pagefault-write-stress:
- shard-dg2-set2: NOTRUN -> [SKIP][1]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@xe_eudebug_online@pagefault-write-stress.html
Known issues
------------
Here are the changes found in xe-pw-157792v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_atomic_transition@plane-toggle-modeset-transition:
- shard-adlp: [PASS][2] -> [FAIL][3] ([Intel XE#3908]) +1 other test fail
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-adlp-2/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-3/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-0:
- shard-dg2-set2: NOTRUN -> [SKIP][4] ([Intel XE#1124])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-adlp: [PASS][5] -> [DMESG-FAIL][6] ([Intel XE#4543])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-adlp-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
- shard-adlp: NOTRUN -> [SKIP][7] ([Intel XE#1124])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][8] ([Intel XE#2191])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-3840x2160p:
- shard-dg2-set2: NOTRUN -> [SKIP][9] ([Intel XE#367])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-4-displays-3840x2160p:
- shard-adlp: NOTRUN -> [SKIP][10] ([Intel XE#367])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_bw@linear-tiling-4-displays-3840x2160p.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs:
- shard-adlp: NOTRUN -> [SKIP][11] ([Intel XE#455] / [Intel XE#787]) +1 other test skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][12] ([Intel XE#787]) +2 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#3442])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][14] ([Intel XE#787]) +13 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-b-dp-4.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][15] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-adlp: NOTRUN -> [SKIP][16] ([Intel XE#2907])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [PASS][17] -> [INCOMPLETE][18] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#6168])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][19] ([Intel XE#373])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode.html
* igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
- shard-adlp: NOTRUN -> [SKIP][20] ([Intel XE#309])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-dg2-set2: NOTRUN -> [SKIP][21] ([Intel XE#4354])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_flip@basic-plain-flip@c-hdmi-a1:
- shard-adlp: [PASS][22] -> [DMESG-WARN][23] ([Intel XE#4543]) +1 other test dmesg-warn
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-adlp-9/igt@kms_flip@basic-plain-flip@c-hdmi-a1.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_flip@basic-plain-flip@c-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [PASS][24] -> [FAIL][25] ([Intel XE#301]) +1 other test fail
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-adlp: [PASS][26] -> [DMESG-WARN][27] ([Intel XE#2953] / [Intel XE#4173]) +3 other tests dmesg-warn
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-adlp-1/igt@kms_flip@flip-vs-suspend-interruptible.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#455]) +2 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-move:
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#651]) +4 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt:
- shard-adlp: NOTRUN -> [SKIP][30] ([Intel XE#656])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][31] ([Intel XE#653]) +6 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][32] ([Intel XE#2925])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-dg2-set2: NOTRUN -> [SKIP][33] ([Intel XE#5021])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_pm_rpm@dpms-non-lpsp:
- shard-adlp: NOTRUN -> [SKIP][34] ([Intel XE#836])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_pm_rpm@dpms-non-lpsp.html
* igt@kms_psr@fbc-psr2-sprite-plane-move:
- shard-dg2-set2: NOTRUN -> [SKIP][35] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@kms_psr@fbc-psr2-sprite-plane-move.html
* igt@xe_compute@eu-busy-10s:
- shard-dg2-set2: NOTRUN -> [SKIP][36] ([Intel XE#6598])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@xe_compute@eu-busy-10s.html
* igt@xe_eudebug@basic-exec-queues-enable:
- shard-dg2-set2: NOTRUN -> [SKIP][37] ([Intel XE#4837]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@xe_eudebug@basic-exec-queues-enable.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-rebind:
- shard-adlp: NOTRUN -> [SKIP][38] ([Intel XE#1392] / [Intel XE#5575])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-rebind.html
* igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][39] ([Intel XE#288]) +3 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-rebind-imm.html
* igt@xe_exec_fault_mode@once-userptr-prefetch:
- shard-adlp: NOTRUN -> [SKIP][40] ([Intel XE#288] / [Intel XE#5561]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@xe_exec_fault_mode@once-userptr-prefetch.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
- shard-lnl: [PASS][41] -> [FAIL][42] ([Intel XE#6353])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-lnl-2/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
* igt@xe_exec_system_allocator@process-many-large-new-bo-map-nomemset:
- shard-adlp: NOTRUN -> [SKIP][43] ([Intel XE#4915]) +10 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@xe_exec_system_allocator@process-many-large-new-bo-map-nomemset.html
* igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#4915]) +67 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@xe_exec_system_allocator@threads-many-large-execqueues-malloc-mlock-nomemset.html
* igt@xe_huc_copy@huc_copy:
- shard-dg2-set2: NOTRUN -> [SKIP][45] ([Intel XE#255])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@xe_huc_copy@huc_copy.html
* igt@xe_oa@syncs-syncobj-wait-cfg:
- shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#3573])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@xe_oa@syncs-syncobj-wait-cfg.html
* igt@xe_pm@s2idle-basic-exec:
- shard-adlp: [PASS][47] -> [DMESG-WARN][48] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4504]) +1 other test dmesg-warn
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-adlp-1/igt@xe_pm@s2idle-basic-exec.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-3/igt@xe_pm@s2idle-basic-exec.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0:
- shard-lnl: [PASS][49] -> [FAIL][50] ([Intel XE#6251])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-lnl-5/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0.html
#### Possible fixes ####
* igt@kms_async_flips@async-flip-dpms@pipe-c-hdmi-a-1:
- shard-adlp: [DMESG-WARN][51] ([Intel XE#4543]) -> [PASS][52] +1 other test pass
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-adlp-1/igt@kms_async_flips@async-flip-dpms@pipe-c-hdmi-a-1.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-8/igt@kms_async_flips@async-flip-dpms@pipe-c-hdmi-a-1.html
* igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1:
- shard-lnl: [FAIL][53] ([Intel XE#6054]) -> [PASS][54] +3 other tests pass
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-lnl-4/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-lnl-7/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
* igt@kms_cursor_edge_walk@256x256-top-bottom:
- shard-adlp: [DMESG-WARN][55] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][56] +7 other tests pass
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-adlp-3/igt@kms_cursor_edge_walk@256x256-top-bottom.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-adlp-6/igt@kms_cursor_edge_walk@256x256-top-bottom.html
* igt@xe_exec_basic@multigpu-once-null-defer-bind:
- shard-dg2-set2: [INCOMPLETE][57] -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-dg2-463/igt@xe_exec_basic@multigpu-once-null-defer-bind.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-464/igt@xe_exec_basic@multigpu-once-null-defer-bind.html
* igt@xe_oa@non-zero-reason-all:
- shard-lnl: [FAIL][59] ([Intel XE#6332]) -> [PASS][60] +1 other test pass
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-lnl-3/igt@xe_oa@non-zero-reason-all.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-lnl-5/igt@xe_oa@non-zero-reason-all.html
* igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0:
- shard-lnl: [FAIL][61] ([Intel XE#6251]) -> [PASS][62] +2 other tests pass
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-lnl-5/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
#### Warnings ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][63] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345]) -> [INCOMPLETE][64] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#6054]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6054
[Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
[Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
[Intel XE#6332]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6332
[Intel XE#6353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6353
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6598]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6598
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
Build changes
-------------
* Linux: xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7 -> xe-pw-157792v2
IGT_8636: 254cd102396ff95d61f2ebe49fc09128878bf483 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-4135-3d718db04a365cc44a3bc81ffa4db7bbd2e645d7: 3d718db04a365cc44a3bc81ffa4db7bbd2e645d7
xe-pw-157792v2: 157792v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157792v2/index.html
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