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d="scan'208";a="260228725" Received: from slindbla-desk.ger.corp.intel.com (HELO localhost) ([10.245.246.182]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Apr 2026 06:44:37 -0700 From: Jani Nikula To: Kory Maincent Cc: Rodrigo Vivi , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , Dave Airlie , Jesse Barnes , Eric Anholt , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Chun-Kuang Hu , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Chris Wilson , Thomas Petazzoni , Mark Yacoub , Sean Paul , Louis Chauvet , intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Simona Vetter Subject: Re: [PATCH RFC 10/12] drm/i915/display/dp: Adopt dp_connector helpers to expose link training state In-Reply-To: <20260413153436.2a08be28@kmaincent-XPS-13-7390> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland References: <20260409-feat_link_cap-v1-0-7069e8199ce2@bootlin.com> <20260409-feat_link_cap-v1-10-7069e8199ce2@bootlin.com> <20260413143402.76f5c3c9@kmaincent-XPS-13-7390> <9f4bb4501c4885f432cbe9b6a10b7d27e40b0876@intel.com> <20260413153436.2a08be28@kmaincent-XPS-13-7390> Date: Mon, 13 Apr 2026 16:44:34 +0300 Message-ID: MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Mon, 13 Apr 2026, Kory Maincent wrote: > On Mon, 13 Apr 2026 16:05:53 +0300 > Jani Nikula wrote: > >> On Mon, 13 Apr 2026, Kory Maincent wrote: >> > On Fri, 10 Apr 2026 19:26:53 +0300 >> > Jani Nikula wrote: >> > >> >> On Thu, 09 Apr 2026, Kory Maincent wrote: >> >> > Switch the i915 DP connector initialization from drmm_connector_init() >> >> > to drmm_connector_dp_init(), providing the source link capabilities >> >> > (supported lane counts, link rates, DSC support, voltage swing and >> >> > pre-emphasis levels). >> >> > >> >> > Add intel_dp_report_link_train() to collect the negotiated link >> >> > parameters (rate, lane count, DSC enable, per-lane voltage swing and >> >> > pre-emphasis) and report them via >> >> > drm_connector_dp_set_link_train_properties() once link training completes >> >> > successfully. >> >> > >> >> > Reset the link training properties via >> >> > drm_connector_dp_reset_link_train_properties() when the connector is >> >> > reported as disconnected or when the display device is disabled, so >> >> > the exposed state always reflects the current link status. >> >> > >> >> > Signed-off-by: Kory Maincent >> >> > --- >> >> > drivers/gpu/drm/i915/display/intel_dp.c | 31 >> >> > +++++++++++++++++++--- .../gpu/drm/i915/display/intel_dp_link_training.c >> >> > | 25 +++++++++++++++++ 2 files changed, 52 insertions(+), 4 deletions(-) >> >> > >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c >> >> > b/drivers/gpu/drm/i915/display/intel_dp.c index >> >> > 2af64de9c81de..641406bdc0cc9 100644 --- >> >> > a/drivers/gpu/drm/i915/display/intel_dp.c +++ >> >> > b/drivers/gpu/drm/i915/display/intel_dp.c @@ -45,6 +45,7 @@ >> >> > #include >> >> > #include >> >> > #include >> >> > +#include >> >> > #include >> >> > #include >> >> > #include >> >> > @@ -6337,8 +6338,10 @@ intel_dp_detect(struct drm_connector *_connector, >> >> > drm_WARN_ON(display->drm, >> >> > !drm_modeset_is_locked(&display->drm->mode_config.connection_mutex)); >> >> > >> >> > - if (!intel_display_device_enabled(display)) >> >> > + if (!intel_display_device_enabled(display)) { >> >> > + >> >> > drm_connector_dp_reset_link_train_properties(_connector); return >> >> > connector_status_disconnected; >> >> > + } >> >> > >> >> > if (!intel_display_driver_check_access(display)) >> >> > return connector->base.status; >> >> > @@ -6388,6 +6391,8 @@ intel_dp_detect(struct drm_connector *_connector, >> >> > >> >> > intel_dp_tunnel_disconnect(intel_dp); >> >> > >> >> > + >> >> > drm_connector_dp_reset_link_train_properties(_connector); + >> >> > goto out_unset_edid; >> >> > } >> >> > >> >> > @@ -7162,10 +7167,12 @@ intel_dp_init_connector(struct intel_digital_port >> >> > *dig_port, struct intel_connector *connector) >> >> > { >> >> > struct intel_display *display = to_intel_display(dig_port); >> >> > + struct drm_connector_dp_link_train_caps link_caps; >> >> > struct intel_dp *intel_dp = &dig_port->dp; >> >> > struct intel_encoder *encoder = &dig_port->base; >> >> > struct drm_device *dev = encoder->base.dev; >> >> > enum port port = encoder->port; >> >> > + u32 *rates; >> >> > int type; >> >> > >> >> > if (drm_WARN(dev, dig_port->max_lanes < 1, >> >> > @@ -7213,8 +7220,25 @@ intel_dp_init_connector(struct intel_digital_port >> >> > *dig_port, type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP", >> >> > encoder->base.base.id, encoder->base.name); >> >> > >> >> > - drmm_connector_init(dev, &connector->base, >> >> > &intel_dp_connector_funcs, >> >> > - type, &intel_dp->aux.ddc); >> >> > + intel_dp_set_source_rates(intel_dp); >> >> > + link_caps.nlanes = DRM_DP_1LANE | DRM_DP_2LANE | DRM_DP_4LANE; >> >> > + link_caps.nrates = intel_dp->num_source_rates; >> >> > + rates = kzalloc_objs(*rates, intel_dp->num_source_rates); >> >> > + if (!rates) >> >> > + goto fail; >> >> > + >> >> > + for (int i = 0; i < intel_dp->num_source_rates; i++) >> >> > + rates[i] = intel_dp->source_rates[i]; >> >> > + >> >> > + link_caps.rates = rates; >> >> > + link_caps.dsc = true; >> >> >> >> You have a source, you have a sink, and you have a link between the two. >> >> >> >> Source rates do not reflect the link rates common between source and >> >> sink. >> >> >> >> DSC depends on source and sink, and it's not statically "true" for >> >> either, and depends on a bunch of things. >> > >> > At init, we are reporting the capabilities of the source. So we list every >> > link rates that the source can achieve and we report that the source is DSC >> > capable which it is IIUC the code. Or maybe I am missing something? >> >> IMO link caps is the intersection of the source and sink caps. If the >> sink is unknown, i.e. its caps are the empty set, then the link caps >> should also be the empty set. > > Ok thanks, I am rather new to the DiplayPort world so thank you for sharing > your knowledge. > > IIUC currently the drivers are not testing all the capabilities of the link, > they try the more "powerful" link and decrease the link parameters until it > works right? So there is currently no way to now the full capabilities between a > sink and a source. It's at the discretion of the driver, and e.g. for i915 it depends on whether it's eDP or regular DP, and whether you plug in an SST sink or an MST branch device. At least that's how it was the last I checked, there's been changes. ;) >> If you need to know the source caps, then they need to be presented >> separately. > > With DRM properties we can see possible values and the value set. > My though was that the possible value are matching the source capabilities and > value set was the one negotiated between the source and the sink. > This was straightforward to me but it indeed can confuse between source > capabilities and link capabilities. Have you a better idea? Ah, in that sense the property might work, indicating the possible values for the source. But do see my other reply elsewhere in the thread. The chosen values might not be as helpful as you may think. BR, Jani. > >> Moreover, the source does not unconditionally support DSC. See >> intel_dp_has_dsc(). > > Indeed thanks, I need to investigate that function. > > Regards, -- Jani Nikula, Intel