[PATCH 00/12] drm/i915: More uncore nukage from display code

[PATCH 00/12] drm/i915: More uncore nukage from display code

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Ggt rid of more intel_uncore stuff from the display code:
- new intel_mchbar_read*() abstraction for MCHBAR registers
- some direct replacement of intel_uncore_{read,write}()
  with intel_de_{read,write}()

Ville Syrjälä (12):
  drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads
  drm/i915/mchbar: Provide intel_mchbar_read*() abstraction
  drm/i915/mchbar: Define the end of the MCHBAR mirror
  drm/i915/mchbar: WARN when accessing non-MCHBAR registers via
    intel_mchbar_read*()
  drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read()
  drm/i915/mchbar: Use intel_mchbar_read*() instead of
    intel_uncore_read*()
  drm/i915/de: Add intel_de_read16()
  drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/
  drm/i915/de: Add a simple intel_de_read64_2x32()
  drm/i915/vrr: Use intel_de_read64_2x32()
  drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses
  drm/i915/rom: Use intel_de for SPI ROM register access

 drivers/gpu/drm/i915/Makefile                 |  1 +
 drivers/gpu/drm/i915/display/i9xx_wm.c        | 10 +--
 drivers/gpu/drm/i915/display/intel_bw.c       | 17 ++---
 drivers/gpu/drm/i915/display/intel_cdclk.c    |  5 +-
 drivers/gpu/drm/i915/display/intel_de.c       |  8 ++
 drivers/gpu/drm/i915/display/intel_de.h       | 18 ++++-
 .../drm/i915/display/intel_display_power.c    |  3 +-
 drivers/gpu/drm/i915/display/intel_dram.c     | 33 +++-----
 drivers/gpu/drm/i915/display/intel_mchbar.c   | 75 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_mchbar.h   | 22 ++++++
 drivers/gpu/drm/i915/display/intel_rom.c      | 19 ++---
 drivers/gpu/drm/i915/display/intel_vblank.c   |  4 +-
 drivers/gpu/drm/i915/display/intel_vrr.c      |  6 +-
 drivers/gpu/drm/i915/intel_mchbar_regs.h      |  7 +-
 drivers/gpu/drm/xe/Makefile                   |  1 +
 15 files changed, 172 insertions(+), 57 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_mchbar.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_mchbar.h

-- 
2.52.0

[PATCH 01/12] drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The MTL_MEM_SS_INFO* are just regular display registers. Use
intel_de_read() to access them.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c   | 6 +++---
 drivers/gpu/drm/i915/display/intel_dram.c | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 07b4531a4376..18b80147ddc7 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -9,6 +9,7 @@
 
 #include "intel_bw.h"
 #include "intel_crtc.h"
+#include "intel_de.h"
 #include "intel_display_core.h"
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
@@ -211,12 +212,11 @@ static int icl_pcode_restrict_qgv_points(struct intel_display *display,
 static int mtl_read_qgv_point_info(struct intel_display *display,
 				   struct intel_qgv_point *sp, int point)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u32 val, val2;
 	u16 dclk;
 
-	val = intel_uncore_read(uncore, MTL_MEM_SS_INFO_QGV_POINT_LOW(point));
-	val2 = intel_uncore_read(uncore, MTL_MEM_SS_INFO_QGV_POINT_HIGH(point));
+	val = intel_de_read(display, MTL_MEM_SS_INFO_QGV_POINT_LOW(point));
+	val2 = intel_de_read(display, MTL_MEM_SS_INFO_QGV_POINT_HIGH(point));
 	dclk = REG_FIELD_GET(MTL_DCLK_MASK, val);
 	sp->dclk = DIV_ROUND_CLOSEST(16667 * dclk, 1000);
 	sp->t_rp = REG_FIELD_GET(MTL_TRP_MASK, val);
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index bd281d4b4c05..f05796417485 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -9,6 +9,7 @@
 #include <drm/drm_print.h>
 #include <drm/intel/intel_pcode_regs.h>
 
+#include "intel_de.h"
 #include "intel_display_core.h"
 #include "intel_display_utils.h"
 #include "intel_display_regs.h"
@@ -767,8 +768,7 @@ static int gen12_get_dram_info(struct intel_display *display, struct dram_info *
 
 static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
-	u32 val = intel_uncore_read(uncore, MTL_MEM_SS_INFO_GLOBAL);
+	u32 val = intel_de_read(display, MTL_MEM_SS_INFO_GLOBAL);
 
 	switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
 	case 0:
-- 
2.52.0

Re: [PATCH 01/12] drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The MTL_MEM_SS_INFO* are just regular display registers. Use
> intel_de_read() to access them.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_bw.c   | 6 +++---
>  drivers/gpu/drm/i915/display/intel_dram.c | 4 ++--
>  2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 07b4531a4376..18b80147ddc7 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -9,6 +9,7 @@
>  
>  #include "intel_bw.h"
>  #include "intel_crtc.h"
> +#include "intel_de.h"
>  #include "intel_display_core.h"
>  #include "intel_display_regs.h"
>  #include "intel_display_types.h"
> @@ -211,12 +212,11 @@ static int icl_pcode_restrict_qgv_points(struct intel_display *display,
>  static int mtl_read_qgv_point_info(struct intel_display *display,
>  				   struct intel_qgv_point *sp, int point)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u32 val, val2;
>  	u16 dclk;
>  
> -	val = intel_uncore_read(uncore, MTL_MEM_SS_INFO_QGV_POINT_LOW(point));
> -	val2 = intel_uncore_read(uncore, MTL_MEM_SS_INFO_QGV_POINT_HIGH(point));
> +	val = intel_de_read(display, MTL_MEM_SS_INFO_QGV_POINT_LOW(point));
> +	val2 = intel_de_read(display, MTL_MEM_SS_INFO_QGV_POINT_HIGH(point));
>  	dclk = REG_FIELD_GET(MTL_DCLK_MASK, val);
>  	sp->dclk = DIV_ROUND_CLOSEST(16667 * dclk, 1000);
>  	sp->t_rp = REG_FIELD_GET(MTL_TRP_MASK, val);
> diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
> index bd281d4b4c05..f05796417485 100644
> --- a/drivers/gpu/drm/i915/display/intel_dram.c
> +++ b/drivers/gpu/drm/i915/display/intel_dram.c
> @@ -9,6 +9,7 @@
>  #include <drm/drm_print.h>
>  #include <drm/intel/intel_pcode_regs.h>
>  
> +#include "intel_de.h"
>  #include "intel_display_core.h"
>  #include "intel_display_utils.h"
>  #include "intel_display_regs.h"
> @@ -767,8 +768,7 @@ static int gen12_get_dram_info(struct intel_display *display, struct dram_info *
>  
>  static int xelpdp_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
> -	u32 val = intel_uncore_read(uncore, MTL_MEM_SS_INFO_GLOBAL);
> +	u32 val = intel_de_read(display, MTL_MEM_SS_INFO_GLOBAL);
>  
>  	switch (REG_FIELD_GET(MTL_DDR_TYPE_MASK, val)) {
>  	case 0:

-- 
Jani Nikula, Intel

[PATCH 02/12] drm/i915/mchbar: Provide intel_mchbar_read*() abstraction

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

MCHBAR registers are a bit special in that:
- we access them through the mirror
- the mirror is read only on HSW+
- the mirror requires the actual MCHBAR to be enabled in device 0:0.0
- the mirror is gone on MTL+

So I'd prefer to treat MCHBAR registers as a bit special in
the code as well, and do all accesses to them via dedicated
functions. Prodive such functions in the form of
intel_mchbar_read*().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/Makefile               |  1 +
 drivers/gpu/drm/i915/display/intel_mchbar.c | 32 +++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_mchbar.h | 22 ++++++++++++++
 drivers/gpu/drm/xe/Makefile                 |  1 +
 4 files changed, 56 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/display/intel_mchbar.c
 create mode 100644 drivers/gpu/drm/i915/display/intel_mchbar.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index b677720a1c2d..0e48305df8b2 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -295,6 +295,7 @@ i915-y += \
 	display/intel_link_bw.o \
 	display/intel_load_detect.o \
 	display/intel_lpe_audio.o \
+	display/intel_mchbar.o \
 	display/intel_modeset_lock.o \
 	display/intel_modeset_setup.o \
 	display/intel_modeset_verify.o \
diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.c b/drivers/gpu/drm/i915/display/intel_mchbar.c
new file mode 100644
index 000000000000..950a36d586c3
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_mchbar.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#include "intel_display_core.h"
+#include "intel_mchbar.h"
+#include "intel_uncore.h"
+
+u16 intel_mchbar_read16(struct intel_display *display,
+			i915_reg_t reg)
+{
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+
+	return intel_uncore_read16(uncore, reg);
+}
+
+u32 intel_mchbar_read(struct intel_display *display,
+		      i915_reg_t reg)
+{
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+
+	return intel_uncore_read(uncore, reg);
+}
+
+u64 intel_mchbar_read64(struct intel_display *display,
+			i915_reg_t reg)
+{
+	struct intel_uncore *uncore = to_intel_uncore(display->drm);
+
+	return intel_uncore_read64(uncore, reg);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.h b/drivers/gpu/drm/i915/display/intel_mchbar.h
new file mode 100644
index 000000000000..ced5023c4522
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_mchbar.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+
+#ifndef __INTEL_MCHBAR_H__
+#define __INTEL_MCHBAR_H__
+
+#include <linux/types.h>
+
+#include "i915_reg_defs.h"
+
+struct intel_display;
+
+u16 intel_mchbar_read16(struct intel_display *display,
+			i915_reg_t reg);
+u32 intel_mchbar_read(struct intel_display *display,
+		      i915_reg_t reg);
+u64 intel_mchbar_read64(struct intel_display *display,
+			i915_reg_t reg);
+
+#endif /* __INTEL_MCHBAR_H__ */
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 49de1c22a469..6ae190316b95 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -304,6 +304,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_link_bw.o \
 	i915-display/intel_lspcon.o \
 	i915-display/intel_lt_phy.o \
+	i915-display/intel_mchbar.o \
 	i915-display/intel_modeset_lock.o \
 	i915-display/intel_modeset_setup.o \
 	i915-display/intel_modeset_verify.o \
-- 
2.52.0

Re: [PATCH 02/12] drm/i915/mchbar: Provide intel_mchbar_read*() abstraction

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> MCHBAR registers are a bit special in that:
> - we access them through the mirror
> - the mirror is read only on HSW+
> - the mirror requires the actual MCHBAR to be enabled in device 0:0.0
> - the mirror is gone on MTL+
>
> So I'd prefer to treat MCHBAR registers as a bit special in
> the code as well, and do all accesses to them via dedicated
> functions. Prodive such functions in the form of
> intel_mchbar_read*().
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile               |  1 +
>  drivers/gpu/drm/i915/display/intel_mchbar.c | 32 +++++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_mchbar.h | 22 ++++++++++++++
>  drivers/gpu/drm/xe/Makefile                 |  1 +
>  4 files changed, 56 insertions(+)
>  create mode 100644 drivers/gpu/drm/i915/display/intel_mchbar.c
>  create mode 100644 drivers/gpu/drm/i915/display/intel_mchbar.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index b677720a1c2d..0e48305df8b2 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -295,6 +295,7 @@ i915-y += \
>  	display/intel_link_bw.o \
>  	display/intel_load_detect.o \
>  	display/intel_lpe_audio.o \
> +	display/intel_mchbar.o \
>  	display/intel_modeset_lock.o \
>  	display/intel_modeset_setup.o \
>  	display/intel_modeset_verify.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.c b/drivers/gpu/drm/i915/display/intel_mchbar.c
> new file mode 100644
> index 000000000000..950a36d586c3
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_mchbar.c
> @@ -0,0 +1,32 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#include "intel_display_core.h"
> +#include "intel_mchbar.h"
> +#include "intel_uncore.h"
> +
> +u16 intel_mchbar_read16(struct intel_display *display,
> +			i915_reg_t reg)

Throughout the patch, surely these would fit on one line?

Regardless,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> +{
> +	struct intel_uncore *uncore = to_intel_uncore(display->drm);
> +
> +	return intel_uncore_read16(uncore, reg);
> +}
> +
> +u32 intel_mchbar_read(struct intel_display *display,
> +		      i915_reg_t reg)
> +{
> +	struct intel_uncore *uncore = to_intel_uncore(display->drm);
> +
> +	return intel_uncore_read(uncore, reg);
> +}
> +
> +u64 intel_mchbar_read64(struct intel_display *display,
> +			i915_reg_t reg)
> +{
> +	struct intel_uncore *uncore = to_intel_uncore(display->drm);
> +
> +	return intel_uncore_read64(uncore, reg);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.h b/drivers/gpu/drm/i915/display/intel_mchbar.h
> new file mode 100644
> index 000000000000..ced5023c4522
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_mchbar.h
> @@ -0,0 +1,22 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +
> +#ifndef __INTEL_MCHBAR_H__
> +#define __INTEL_MCHBAR_H__
> +
> +#include <linux/types.h>
> +
> +#include "i915_reg_defs.h"
> +
> +struct intel_display;
> +
> +u16 intel_mchbar_read16(struct intel_display *display,
> +			i915_reg_t reg);
> +u32 intel_mchbar_read(struct intel_display *display,
> +		      i915_reg_t reg);
> +u64 intel_mchbar_read64(struct intel_display *display,
> +			i915_reg_t reg);
> +
> +#endif /* __INTEL_MCHBAR_H__ */
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 49de1c22a469..6ae190316b95 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -304,6 +304,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
>  	i915-display/intel_link_bw.o \
>  	i915-display/intel_lspcon.o \
>  	i915-display/intel_lt_phy.o \
> +	i915-display/intel_mchbar.o \
>  	i915-display/intel_modeset_lock.o \
>  	i915-display/intel_modeset_setup.o \
>  	i915-display/intel_modeset_verify.o \

-- 
Jani Nikula, Intel

[PATCH 03/12] drm/i915/mchbar: Define the end of the MCHBAR mirror

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add defines for the end of the MCHBAR mirror. I'm planning to
use this for some range sanity checks.

BSpec: 51771
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_mchbar_regs.h | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_mchbar_regs.h b/drivers/gpu/drm/i915/intel_mchbar_regs.h
index 614d4017b57b..ca0d421be16c 100644
--- a/drivers/gpu/drm/i915/intel_mchbar_regs.h
+++ b/drivers/gpu/drm/i915/intel_mchbar_regs.h
@@ -16,11 +16,16 @@
  * every way.  It is not accessible from the CP register read instructions.
  *
  * Starting from Haswell, you can't write registers using the MCHBAR mirror,
- * just read.
+ * just read. On MTL+ the mirror no longer exists.
  */
 
 #define MCHBAR_MIRROR_BASE			0x10000
+#define MCHBAR_MIRROR_END			0x13fff
+
 #define MCHBAR_MIRROR_BASE_SNB			0x140000
+#define MCHBAR_MIRROR_END_SNB			0x147fff
+#define MCHBAR_MIRROR_END_ICL_RKL		0x14ffff
+#define MCHBAR_MIRROR_END_TGL			0x15ffff
 
 #define CTG_STOLEN_RESERVED			_MMIO(MCHBAR_MIRROR_BASE + 0x34)
 #define ELK_STOLEN_RESERVED			_MMIO(MCHBAR_MIRROR_BASE + 0x48)
-- 
2.52.0

Re: [PATCH 03/12] drm/i915/mchbar: Define the end of the MCHBAR mirror

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add defines for the end of the MCHBAR mirror. I'm planning to
> use this for some range sanity checks.
>
> BSpec: 51771
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_mchbar_regs.h | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_mchbar_regs.h b/drivers/gpu/drm/i915/intel_mchbar_regs.h
> index 614d4017b57b..ca0d421be16c 100644
> --- a/drivers/gpu/drm/i915/intel_mchbar_regs.h
> +++ b/drivers/gpu/drm/i915/intel_mchbar_regs.h
> @@ -16,11 +16,16 @@
>   * every way.  It is not accessible from the CP register read instructions.
>   *
>   * Starting from Haswell, you can't write registers using the MCHBAR mirror,
> - * just read.
> + * just read. On MTL+ the mirror no longer exists.
>   */
>  
>  #define MCHBAR_MIRROR_BASE			0x10000
> +#define MCHBAR_MIRROR_END			0x13fff
> +
>  #define MCHBAR_MIRROR_BASE_SNB			0x140000
> +#define MCHBAR_MIRROR_END_SNB			0x147fff
> +#define MCHBAR_MIRROR_END_ICL_RKL		0x14ffff
> +#define MCHBAR_MIRROR_END_TGL			0x15ffff
>  
>  #define CTG_STOLEN_RESERVED			_MMIO(MCHBAR_MIRROR_BASE + 0x34)
>  #define ELK_STOLEN_RESERVED			_MMIO(MCHBAR_MIRROR_BASE + 0x48)

-- 
Jani Nikula, Intel

[PATCH 04/12] drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The intel_mchbar_read*() functions should only be used for
accessing MCHBAR registers. Warn if someone tries to use
them for other registers.

I suppose we could even have a dedicated type for MCHBAR
registers. But that is true for many other special register
types as well, and so far we haven't bothered adding any
special types.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_mchbar.c | 49 +++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.c b/drivers/gpu/drm/i915/display/intel_mchbar.c
index 950a36d586c3..82b47c00101a 100644
--- a/drivers/gpu/drm/i915/display/intel_mchbar.c
+++ b/drivers/gpu/drm/i915/display/intel_mchbar.c
@@ -3,15 +3,60 @@
  * Copyright © 2026 Intel Corporation
  */
 
+#include <linux/minmax.h>
+
+#include <drm/drm_print.h>
+
 #include "intel_display_core.h"
 #include "intel_mchbar.h"
+#include "intel_mchbar_regs.h"
 #include "intel_uncore.h"
 
+static bool has_mchbar_mirror(struct intel_display *display)
+{
+	return DISPLAY_VER(display) < 14;
+}
+
+static u32 mchbar_mirror_base(struct intel_display *display)
+{
+	if (DISPLAY_VER(display) >= 6)
+		return MCHBAR_MIRROR_BASE_SNB;
+	else
+		return MCHBAR_MIRROR_BASE;
+}
+
+static u32 mchbar_mirror_end(struct intel_display *display)
+{
+	if (DISPLAY_VER(display) >= 12 && !display->platform.rocketlake)
+		return MCHBAR_MIRROR_END_TGL;
+	else if (DISPLAY_VER(display) >= 11)
+		return MCHBAR_MIRROR_END_ICL_RKL;
+	else if (DISPLAY_VER(display) >= 6)
+		return MCHBAR_MIRROR_END_SNB;
+	else
+		return MCHBAR_MIRROR_END;
+}
+
+static u32 mchbar_mirror_len(struct intel_display *display)
+{
+	return mchbar_mirror_end(display) - mchbar_mirror_base(display) + 1;
+}
+
+static bool is_mchbar_reg(struct intel_display *display, i915_reg_t reg)
+{
+	return has_mchbar_mirror(display) &&
+		in_range32(i915_mmio_reg_offset(reg),
+			   mchbar_mirror_base(display),
+			   mchbar_mirror_len(display));
+}
+
 u16 intel_mchbar_read16(struct intel_display *display,
 			i915_reg_t reg)
 {
 	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 
+	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
+
 	return intel_uncore_read16(uncore, reg);
 }
 
@@ -20,6 +65,8 @@ u32 intel_mchbar_read(struct intel_display *display,
 {
 	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 
+	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
+
 	return intel_uncore_read(uncore, reg);
 }
 
@@ -28,5 +75,7 @@ u64 intel_mchbar_read64(struct intel_display *display,
 {
 	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 
+	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
+
 	return intel_uncore_read64(uncore, reg);
 }
-- 
2.52.0

Re: [PATCH 04/12] drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*()

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The intel_mchbar_read*() functions should only be used for
> accessing MCHBAR registers. Warn if someone tries to use
> them for other registers.
>
> I suppose we could even have a dedicated type for MCHBAR
> registers. But that is true for many other special register
> types as well, and so far we haven't bothered adding any
> special types.

There's the i915_mcr_reg_t, and xe uses bits in the offset to identify
the type. But let's roll with this for now.

>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_mchbar.c | 49 +++++++++++++++++++++
>  1 file changed, 49 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.c b/drivers/gpu/drm/i915/display/intel_mchbar.c
> index 950a36d586c3..82b47c00101a 100644
> --- a/drivers/gpu/drm/i915/display/intel_mchbar.c
> +++ b/drivers/gpu/drm/i915/display/intel_mchbar.c
> @@ -3,15 +3,60 @@
>   * Copyright © 2026 Intel Corporation
>   */
>  
> +#include <linux/minmax.h>
> +
> +#include <drm/drm_print.h>
> +
>  #include "intel_display_core.h"
>  #include "intel_mchbar.h"
> +#include "intel_mchbar_regs.h"
>  #include "intel_uncore.h"
>  
> +static bool has_mchbar_mirror(struct intel_display *display)
> +{
> +	return DISPLAY_VER(display) < 14;
> +}
> +
> +static u32 mchbar_mirror_base(struct intel_display *display)
> +{
> +	if (DISPLAY_VER(display) >= 6)
> +		return MCHBAR_MIRROR_BASE_SNB;
> +	else
> +		return MCHBAR_MIRROR_BASE;
> +}
> +
> +static u32 mchbar_mirror_end(struct intel_display *display)
> +{
> +	if (DISPLAY_VER(display) >= 12 && !display->platform.rocketlake)
> +		return MCHBAR_MIRROR_END_TGL;
> +	else if (DISPLAY_VER(display) >= 11)
> +		return MCHBAR_MIRROR_END_ICL_RKL;
> +	else if (DISPLAY_VER(display) >= 6)
> +		return MCHBAR_MIRROR_END_SNB;
> +	else
> +		return MCHBAR_MIRROR_END;
> +}
> +
> +static u32 mchbar_mirror_len(struct intel_display *display)
> +{
> +	return mchbar_mirror_end(display) - mchbar_mirror_base(display) + 1;
> +}
> +
> +static bool is_mchbar_reg(struct intel_display *display, i915_reg_t reg)
> +{
> +	return has_mchbar_mirror(display) &&
> +		in_range32(i915_mmio_reg_offset(reg),
> +			   mchbar_mirror_base(display),
> +			   mchbar_mirror_len(display));

Pedantically reg offset + size (2, 4 or 8 bytes) could overflow the
range even if the reg offset is within range for 1 byte access.

Not a big deal I guess.

> +}
> +
>  u16 intel_mchbar_read16(struct intel_display *display,
>  			i915_reg_t reg)
>  {
>  	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  
> +	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));

Is the backtrace enough to pinpoint the offending register? No need to
use drm_WARN() with a message indicating the reg? *shrug*

Overall,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> +
>  	return intel_uncore_read16(uncore, reg);
>  }
>  
> @@ -20,6 +65,8 @@ u32 intel_mchbar_read(struct intel_display *display,
>  {
>  	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  
> +	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
> +
>  	return intel_uncore_read(uncore, reg);
>  }
>  
> @@ -28,5 +75,7 @@ u64 intel_mchbar_read64(struct intel_display *display,
>  {
>  	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  
> +	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
> +
>  	return intel_uncore_read64(uncore, reg);
>  }

-- 
Jani Nikula, Intel

[PATCH 05/12] drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We are doing a few accesses to MCHBAR registers with intel_de_read().
Use the dedicated intel_mchbar_read() instead.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c         | 5 +++--
 drivers/gpu/drm/i915/display/intel_display_power.c | 3 ++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 121a12c5b8ac..2a17e9b22740 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -41,6 +41,7 @@
 #include "intel_display_utils.h"
 #include "intel_display_wa.h"
 #include "intel_dram.h"
+#include "intel_mchbar.h"
 #include "intel_mchbar_regs.h"
 #include "intel_parent.h"
 #include "intel_pci_config.h"
@@ -376,8 +377,8 @@ static unsigned int intel_hpll_vco(struct intel_display *display)
 	else
 		return 0;
 
-	tmp = intel_de_read(display, display->platform.pineview ||
-			    display->platform.mobile ? HPLLVCO_MOBILE : HPLLVCO);
+	tmp = intel_mchbar_read(display, display->platform.pineview ||
+				display->platform.mobile ? HPLLVCO_MOBILE : HPLLVCO);
 
 	vco = vco_table[tmp & 0x7];
 	if (vco == 0)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index ec96b141c74c..8da2990395e0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -24,6 +24,7 @@
 #include "intel_display_wa.h"
 #include "intel_dmc.h"
 #include "intel_dram.h"
+#include "intel_mchbar.h"
 #include "intel_mchbar_regs.h"
 #include "intel_parent.h"
 #include "intel_pch_refclk.h"
@@ -1252,7 +1253,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
 static u32 hsw_read_dcomp(struct intel_display *display)
 {
 	if (display->platform.haswell)
-		return intel_de_read(display, D_COMP_HSW);
+		return intel_mchbar_read(display, D_COMP_HSW);
 	else
 		return intel_de_read(display, D_COMP_BDW);
 }
-- 
2.52.0

Re: [PATCH 05/12] drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read()

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We are doing a few accesses to MCHBAR registers with intel_de_read().
> Use the dedicated intel_mchbar_read() instead.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c         | 5 +++--
>  drivers/gpu/drm/i915/display/intel_display_power.c | 3 ++-
>  2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 121a12c5b8ac..2a17e9b22740 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -41,6 +41,7 @@
>  #include "intel_display_utils.h"
>  #include "intel_display_wa.h"
>  #include "intel_dram.h"
> +#include "intel_mchbar.h"
>  #include "intel_mchbar_regs.h"
>  #include "intel_parent.h"
>  #include "intel_pci_config.h"
> @@ -376,8 +377,8 @@ static unsigned int intel_hpll_vco(struct intel_display *display)
>  	else
>  		return 0;
>  
> -	tmp = intel_de_read(display, display->platform.pineview ||
> -			    display->platform.mobile ? HPLLVCO_MOBILE : HPLLVCO);
> +	tmp = intel_mchbar_read(display, display->platform.pineview ||
> +				display->platform.mobile ? HPLLVCO_MOBILE : HPLLVCO);
>  
>  	vco = vco_table[tmp & 0x7];
>  	if (vco == 0)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index ec96b141c74c..8da2990395e0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -24,6 +24,7 @@
>  #include "intel_display_wa.h"
>  #include "intel_dmc.h"
>  #include "intel_dram.h"
> +#include "intel_mchbar.h"
>  #include "intel_mchbar_regs.h"
>  #include "intel_parent.h"
>  #include "intel_pch_refclk.h"
> @@ -1252,7 +1253,7 @@ static void assert_can_disable_lcpll(struct intel_display *display)
>  static u32 hsw_read_dcomp(struct intel_display *display)
>  {
>  	if (display->platform.haswell)
> -		return intel_de_read(display, D_COMP_HSW);
> +		return intel_mchbar_read(display, D_COMP_HSW);
>  	else
>  		return intel_de_read(display, D_COMP_BDW);
>  }

-- 
Jani Nikula, Intel

[PATCH 06/12] drm/i915/mchbar: Use intel_mchbar_read*() instead of intel_uncore_read*()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Replace all the naked intel_uncore_read*() accesses to MCHBAR
registers with the dedicated intel_mchbar_read*().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/i9xx_wm.c    | 10 ++++----
 drivers/gpu/drm/i915/display/intel_bw.c   | 11 ++++-----
 drivers/gpu/drm/i915/display/intel_dram.c | 29 ++++++++---------------
 3 files changed, 19 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 9e170e79dcf6..ef84c7bb50d9 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -19,6 +19,7 @@
 #include "intel_display_utils.h"
 #include "intel_dram.h"
 #include "intel_fb.h"
+#include "intel_mchbar.h"
 #include "intel_mchbar_regs.h"
 #include "intel_wm.h"
 #include "skl_watermark.h"
@@ -2742,12 +2743,11 @@ static void ilk_compute_wm_level(struct intel_display *display,
 
 static void hsw_read_wm_latency(struct intel_display *display, u16 wm[])
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u64 sskpd;
 
 	display->wm.num_levels = 5;
 
-	sskpd = intel_uncore_read64(uncore, MCH_SSKPD);
+	sskpd = intel_mchbar_read64(display, MCH_SSKPD);
 
 	wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
 	if (wm[0] == 0)
@@ -2760,12 +2760,11 @@ static void hsw_read_wm_latency(struct intel_display *display, u16 wm[])
 
 static void snb_read_wm_latency(struct intel_display *display, u16 wm[])
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u32 sskpd;
 
 	display->wm.num_levels = 4;
 
-	sskpd = intel_uncore_read(uncore, MCH_SSKPD);
+	sskpd = intel_mchbar_read(display, MCH_SSKPD);
 
 	wm[0] = REG_FIELD_GET(SSKPD_WM0_MASK_SNB, sskpd);
 	wm[1] = REG_FIELD_GET(SSKPD_WM1_MASK_SNB, sskpd);
@@ -2775,12 +2774,11 @@ static void snb_read_wm_latency(struct intel_display *display, u16 wm[])
 
 static void ilk_read_wm_latency(struct intel_display *display, u16 wm[])
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u32 mltr;
 
 	display->wm.num_levels = 3;
 
-	mltr = intel_uncore_read(uncore, MLTR_ILK);
+	mltr = intel_mchbar_read(display, MLTR_ILK);
 
 	/* ILK primary LP0 latency is 700 ns */
 	wm[0] = 7;
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 18b80147ddc7..e6c8fd630294 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -15,9 +15,9 @@
 #include "intel_display_types.h"
 #include "intel_display_utils.h"
 #include "intel_dram.h"
+#include "intel_mchbar.h"
 #include "intel_mchbar_regs.h"
 #include "intel_parent.h"
-#include "intel_uncore.h"
 #include "skl_watermark.h"
 
 struct intel_bw_state {
@@ -75,11 +75,10 @@ static int dg1_mchbar_read_qgv_point_info(struct intel_display *display,
 					  struct intel_qgv_point *sp,
 					  int point)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u32 dclk_ratio, dclk_reference;
 	u32 val;
 
-	val = intel_uncore_read(uncore, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
+	val = intel_mchbar_read(display, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
 	dclk_ratio = REG_FIELD_GET(DG1_QCLK_RATIO_MASK, val);
 	if (val & DG1_QCLK_REFERENCE)
 		dclk_reference = 6; /* 6 * 16.666 MHz = 100 MHz */
@@ -87,18 +86,18 @@ static int dg1_mchbar_read_qgv_point_info(struct intel_display *display,
 		dclk_reference = 8; /* 8 * 16.666 MHz = 133 MHz */
 	sp->dclk = DIV_ROUND_UP((16667 * dclk_ratio * dclk_reference) + 500, 1000);
 
-	val = intel_uncore_read(uncore, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
+	val = intel_mchbar_read(display, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
 	if (val & DG1_GEAR_TYPE)
 		sp->dclk *= 2;
 
 	if (sp->dclk == 0)
 		return -EINVAL;
 
-	val = intel_uncore_read(uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
+	val = intel_mchbar_read(display, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
 	sp->t_rp = REG_FIELD_GET(DG1_DRAM_T_RP_MASK, val);
 	sp->t_rdpre = REG_FIELD_GET(DG1_DRAM_T_RDPRE_MASK, val);
 
-	val = intel_uncore_read(uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
+	val = intel_mchbar_read(display, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
 	sp->t_rcd = REG_FIELD_GET(DG1_DRAM_T_RCD_MASK, val);
 	sp->t_ras = REG_FIELD_GET(DG1_DRAM_T_RAS_MASK, val);
 
diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
index f05796417485..05da74534a5a 100644
--- a/drivers/gpu/drm/i915/display/intel_dram.c
+++ b/drivers/gpu/drm/i915/display/intel_dram.c
@@ -14,9 +14,9 @@
 #include "intel_display_utils.h"
 #include "intel_display_regs.h"
 #include "intel_dram.h"
+#include "intel_mchbar.h"
 #include "intel_mchbar_regs.h"
 #include "intel_parent.h"
-#include "intel_uncore.h"
 #include "vlv_iosf_sb.h"
 
 struct dram_dimm_info {
@@ -59,18 +59,15 @@ const char *intel_dram_type_str(enum intel_dram_type type)
 
 static enum intel_dram_type pnv_dram_type(struct intel_display *display)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
-
-	return intel_uncore_read(uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
+	return intel_mchbar_read(display, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
 		INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
 }
 
 static unsigned int pnv_mem_freq(struct intel_display *display)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u32 tmp;
 
-	tmp = intel_uncore_read(uncore, CLKCFG);
+	tmp = intel_mchbar_read(display, CLKCFG);
 
 	switch (tmp & CLKCFG_MEM_MASK) {
 	case CLKCFG_MEM_533:
@@ -86,10 +83,9 @@ static unsigned int pnv_mem_freq(struct intel_display *display)
 
 static unsigned int ilk_mem_freq(struct intel_display *display)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u16 ddrpll;
 
-	ddrpll = intel_uncore_read16(uncore, DDRMPLL1);
+	ddrpll = intel_mchbar_read16(display, DDRMPLL1);
 	switch (ddrpll & 0xff) {
 	case 0xc:
 		return 800000;
@@ -159,7 +155,6 @@ unsigned int intel_mem_freq(struct intel_display *display)
 
 static unsigned int i9xx_fsb_freq(struct intel_display *display)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u32 fsb;
 
 	/*
@@ -170,7 +165,7 @@ static unsigned int i9xx_fsb_freq(struct intel_display *display)
 	 * don't know which registers have that information,
 	 * and all the relevant docs have gone to bit heaven :(
 	 */
-	fsb = intel_uncore_read(uncore, CLKCFG) & CLKCFG_FSB_MASK;
+	fsb = intel_mchbar_read(display, CLKCFG) & CLKCFG_FSB_MASK;
 
 	if (display->platform.pineview || display->platform.mobile) {
 		switch (fsb) {
@@ -215,10 +210,9 @@ static unsigned int i9xx_fsb_freq(struct intel_display *display)
 
 static unsigned int ilk_fsb_freq(struct intel_display *display)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u16 fsb;
 
-	fsb = intel_uncore_read16(uncore, CSIPLL0) & 0x3ff;
+	fsb = intel_mchbar_read16(display, CSIPLL0) & 0x3ff;
 
 	switch (fsb) {
 	case 0x00c:
@@ -485,7 +479,6 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
 static int
 skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	struct dram_channel_info ch0 = {}, ch1 = {};
 	u32 val;
 	int ret;
@@ -493,12 +486,12 @@ skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram
 	/* Assume 16Gb+ DIMMs are present until proven otherwise */
 	dram_info->has_16gb_dimms = true;
 
-	val = intel_uncore_read(uncore, SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
+	val = intel_mchbar_read(display, SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
 	ret = skl_dram_get_channel_info(display, &ch0, 0, val);
 	if (ret == 0)
 		dram_info->num_channels++;
 
-	val = intel_uncore_read(uncore, SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
+	val = intel_mchbar_read(display, SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
 	ret = skl_dram_get_channel_info(display, &ch1, 1, val);
 	if (ret == 0)
 		dram_info->num_channels++;
@@ -529,10 +522,9 @@ skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram
 static enum intel_dram_type
 skl_get_dram_type(struct intel_display *display)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u32 val;
 
-	val = intel_uncore_read(uncore, SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN);
+	val = intel_mchbar_read(display, SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN);
 
 	switch (val & SKL_DRAM_DDR_TYPE_MASK) {
 	case SKL_DRAM_DDR_TYPE_DDR3:
@@ -643,7 +635,6 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
 
 static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
 	u32 val;
 	u8 valid_ranks = 0;
 	int i;
@@ -655,7 +646,7 @@ static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dr
 		struct dram_dimm_info dimm;
 		enum intel_dram_type type;
 
-		val = intel_uncore_read(uncore, BXT_D_CR_DRP0_DUNIT(i));
+		val = intel_mchbar_read(display, BXT_D_CR_DRP0_DUNIT(i));
 		if (val == 0xFFFFFFFF)
 			continue;
 
-- 
2.52.0

Re: [PATCH 06/12] drm/i915/mchbar: Use intel_mchbar_read*() instead of intel_uncore_read*()

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Replace all the naked intel_uncore_read*() accesses to MCHBAR
> registers with the dedicated intel_mchbar_read*().
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/i9xx_wm.c    | 10 ++++----
>  drivers/gpu/drm/i915/display/intel_bw.c   | 11 ++++-----
>  drivers/gpu/drm/i915/display/intel_dram.c | 29 ++++++++---------------
>  3 files changed, 19 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index 9e170e79dcf6..ef84c7bb50d9 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -19,6 +19,7 @@
>  #include "intel_display_utils.h"
>  #include "intel_dram.h"
>  #include "intel_fb.h"
> +#include "intel_mchbar.h"
>  #include "intel_mchbar_regs.h"
>  #include "intel_wm.h"
>  #include "skl_watermark.h"
> @@ -2742,12 +2743,11 @@ static void ilk_compute_wm_level(struct intel_display *display,
>  
>  static void hsw_read_wm_latency(struct intel_display *display, u16 wm[])
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u64 sskpd;
>  
>  	display->wm.num_levels = 5;
>  
> -	sskpd = intel_uncore_read64(uncore, MCH_SSKPD);
> +	sskpd = intel_mchbar_read64(display, MCH_SSKPD);
>  
>  	wm[0] = REG_FIELD_GET64(SSKPD_NEW_WM0_MASK_HSW, sskpd);
>  	if (wm[0] == 0)
> @@ -2760,12 +2760,11 @@ static void hsw_read_wm_latency(struct intel_display *display, u16 wm[])
>  
>  static void snb_read_wm_latency(struct intel_display *display, u16 wm[])
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u32 sskpd;
>  
>  	display->wm.num_levels = 4;
>  
> -	sskpd = intel_uncore_read(uncore, MCH_SSKPD);
> +	sskpd = intel_mchbar_read(display, MCH_SSKPD);
>  
>  	wm[0] = REG_FIELD_GET(SSKPD_WM0_MASK_SNB, sskpd);
>  	wm[1] = REG_FIELD_GET(SSKPD_WM1_MASK_SNB, sskpd);
> @@ -2775,12 +2774,11 @@ static void snb_read_wm_latency(struct intel_display *display, u16 wm[])
>  
>  static void ilk_read_wm_latency(struct intel_display *display, u16 wm[])
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u32 mltr;
>  
>  	display->wm.num_levels = 3;
>  
> -	mltr = intel_uncore_read(uncore, MLTR_ILK);
> +	mltr = intel_mchbar_read(display, MLTR_ILK);
>  
>  	/* ILK primary LP0 latency is 700 ns */
>  	wm[0] = 7;
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 18b80147ddc7..e6c8fd630294 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -15,9 +15,9 @@
>  #include "intel_display_types.h"
>  #include "intel_display_utils.h"
>  #include "intel_dram.h"
> +#include "intel_mchbar.h"
>  #include "intel_mchbar_regs.h"
>  #include "intel_parent.h"
> -#include "intel_uncore.h"
>  #include "skl_watermark.h"
>  
>  struct intel_bw_state {
> @@ -75,11 +75,10 @@ static int dg1_mchbar_read_qgv_point_info(struct intel_display *display,
>  					  struct intel_qgv_point *sp,
>  					  int point)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u32 dclk_ratio, dclk_reference;
>  	u32 val;
>  
> -	val = intel_uncore_read(uncore, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
> +	val = intel_mchbar_read(display, SA_PERF_STATUS_0_0_0_MCHBAR_PC);
>  	dclk_ratio = REG_FIELD_GET(DG1_QCLK_RATIO_MASK, val);
>  	if (val & DG1_QCLK_REFERENCE)
>  		dclk_reference = 6; /* 6 * 16.666 MHz = 100 MHz */
> @@ -87,18 +86,18 @@ static int dg1_mchbar_read_qgv_point_info(struct intel_display *display,
>  		dclk_reference = 8; /* 8 * 16.666 MHz = 133 MHz */
>  	sp->dclk = DIV_ROUND_UP((16667 * dclk_ratio * dclk_reference) + 500, 1000);
>  
> -	val = intel_uncore_read(uncore, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
> +	val = intel_mchbar_read(display, SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU);
>  	if (val & DG1_GEAR_TYPE)
>  		sp->dclk *= 2;
>  
>  	if (sp->dclk == 0)
>  		return -EINVAL;
>  
> -	val = intel_uncore_read(uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
> +	val = intel_mchbar_read(display, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR);
>  	sp->t_rp = REG_FIELD_GET(DG1_DRAM_T_RP_MASK, val);
>  	sp->t_rdpre = REG_FIELD_GET(DG1_DRAM_T_RDPRE_MASK, val);
>  
> -	val = intel_uncore_read(uncore, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
> +	val = intel_mchbar_read(display, MCHBAR_CH0_CR_TC_PRE_0_0_0_MCHBAR_HIGH);
>  	sp->t_rcd = REG_FIELD_GET(DG1_DRAM_T_RCD_MASK, val);
>  	sp->t_ras = REG_FIELD_GET(DG1_DRAM_T_RAS_MASK, val);
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_dram.c b/drivers/gpu/drm/i915/display/intel_dram.c
> index f05796417485..05da74534a5a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dram.c
> +++ b/drivers/gpu/drm/i915/display/intel_dram.c
> @@ -14,9 +14,9 @@
>  #include "intel_display_utils.h"
>  #include "intel_display_regs.h"
>  #include "intel_dram.h"
> +#include "intel_mchbar.h"
>  #include "intel_mchbar_regs.h"
>  #include "intel_parent.h"
> -#include "intel_uncore.h"
>  #include "vlv_iosf_sb.h"
>  
>  struct dram_dimm_info {
> @@ -59,18 +59,15 @@ const char *intel_dram_type_str(enum intel_dram_type type)
>  
>  static enum intel_dram_type pnv_dram_type(struct intel_display *display)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
> -
> -	return intel_uncore_read(uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
> +	return intel_mchbar_read(display, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3 ?
>  		INTEL_DRAM_DDR3 : INTEL_DRAM_DDR2;
>  }
>  
>  static unsigned int pnv_mem_freq(struct intel_display *display)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u32 tmp;
>  
> -	tmp = intel_uncore_read(uncore, CLKCFG);
> +	tmp = intel_mchbar_read(display, CLKCFG);
>  
>  	switch (tmp & CLKCFG_MEM_MASK) {
>  	case CLKCFG_MEM_533:
> @@ -86,10 +83,9 @@ static unsigned int pnv_mem_freq(struct intel_display *display)
>  
>  static unsigned int ilk_mem_freq(struct intel_display *display)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u16 ddrpll;
>  
> -	ddrpll = intel_uncore_read16(uncore, DDRMPLL1);
> +	ddrpll = intel_mchbar_read16(display, DDRMPLL1);
>  	switch (ddrpll & 0xff) {
>  	case 0xc:
>  		return 800000;
> @@ -159,7 +155,6 @@ unsigned int intel_mem_freq(struct intel_display *display)
>  
>  static unsigned int i9xx_fsb_freq(struct intel_display *display)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u32 fsb;
>  
>  	/*
> @@ -170,7 +165,7 @@ static unsigned int i9xx_fsb_freq(struct intel_display *display)
>  	 * don't know which registers have that information,
>  	 * and all the relevant docs have gone to bit heaven :(
>  	 */
> -	fsb = intel_uncore_read(uncore, CLKCFG) & CLKCFG_FSB_MASK;
> +	fsb = intel_mchbar_read(display, CLKCFG) & CLKCFG_FSB_MASK;
>  
>  	if (display->platform.pineview || display->platform.mobile) {
>  		switch (fsb) {
> @@ -215,10 +210,9 @@ static unsigned int i9xx_fsb_freq(struct intel_display *display)
>  
>  static unsigned int ilk_fsb_freq(struct intel_display *display)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u16 fsb;
>  
> -	fsb = intel_uncore_read16(uncore, CSIPLL0) & 0x3ff;
> +	fsb = intel_mchbar_read16(display, CSIPLL0) & 0x3ff;
>  
>  	switch (fsb) {
>  	case 0x00c:
> @@ -485,7 +479,6 @@ intel_is_dram_symmetric(const struct dram_channel_info *ch0,
>  static int
>  skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram_info)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	struct dram_channel_info ch0 = {}, ch1 = {};
>  	u32 val;
>  	int ret;
> @@ -493,12 +486,12 @@ skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram
>  	/* Assume 16Gb+ DIMMs are present until proven otherwise */
>  	dram_info->has_16gb_dimms = true;
>  
> -	val = intel_uncore_read(uncore, SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
> +	val = intel_mchbar_read(display, SKL_MAD_DIMM_CH0_0_0_0_MCHBAR_MCMAIN);
>  	ret = skl_dram_get_channel_info(display, &ch0, 0, val);
>  	if (ret == 0)
>  		dram_info->num_channels++;
>  
> -	val = intel_uncore_read(uncore, SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
> +	val = intel_mchbar_read(display, SKL_MAD_DIMM_CH1_0_0_0_MCHBAR_MCMAIN);
>  	ret = skl_dram_get_channel_info(display, &ch1, 1, val);
>  	if (ret == 0)
>  		dram_info->num_channels++;
> @@ -529,10 +522,9 @@ skl_dram_get_channels_info(struct intel_display *display, struct dram_info *dram
>  static enum intel_dram_type
>  skl_get_dram_type(struct intel_display *display)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u32 val;
>  
> -	val = intel_uncore_read(uncore, SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN);
> +	val = intel_mchbar_read(display, SKL_MAD_INTER_CHANNEL_0_0_0_MCHBAR_MCMAIN);
>  
>  	switch (val & SKL_DRAM_DDR_TYPE_MASK) {
>  	case SKL_DRAM_DDR_TYPE_DDR3:
> @@ -643,7 +635,6 @@ static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val)
>  
>  static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dram_info)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
>  	u32 val;
>  	u8 valid_ranks = 0;
>  	int i;
> @@ -655,7 +646,7 @@ static int bxt_get_dram_info(struct intel_display *display, struct dram_info *dr
>  		struct dram_dimm_info dimm;
>  		enum intel_dram_type type;
>  
> -		val = intel_uncore_read(uncore, BXT_D_CR_DRP0_DUNIT(i));
> +		val = intel_mchbar_read(display, BXT_D_CR_DRP0_DUNIT(i));
>  		if (val == 0xFFFFFFFF)
>  			continue;

-- 
Jani Nikula, Intel

[PATCH 07/12] drm/i915/de: Add intel_de_read16()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We'll need a replacement for intel_uncore_read16() in order to
untangle intel_mchbar_read16() from uncore. As with the 8 bit
counterpart this doesn't need to work on modern platforms
so we can forgo all the DMC wakelock stuff and whatnot.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_de.c | 8 ++++++++
 drivers/gpu/drm/i915/display/intel_de.h | 1 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_de.c b/drivers/gpu/drm/i915/display/intel_de.c
index d2a418da2d54..a96e83d76eaa 100644
--- a/drivers/gpu/drm/i915/display/intel_de.c
+++ b/drivers/gpu/drm/i915/display/intel_de.c
@@ -176,3 +176,11 @@ void intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val)
 
 	intel_uncore_write8(__to_uncore(display), reg, val);
 }
+
+u16 intel_de_read16(struct intel_display *display, i915_reg_t reg)
+{
+	/* this is only used on MCHBAR registers on pre-SNB */
+	drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 6);
+
+	return intel_uncore_read16(__to_uncore(display), reg);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index f87b84ab9d6d..3f9861b7a589 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -19,6 +19,7 @@ static inline struct intel_uncore *__to_uncore(struct intel_display *display)
 
 u8 intel_de_read8(struct intel_display *display, i915_reg_t reg);
 void intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val);
+u16 intel_de_read16(struct intel_display *display, i915_reg_t reg);
 
 static inline u32
 intel_de_read(struct intel_display *display, i915_reg_t reg)
-- 
2.52.0

Re: [PATCH 07/12] drm/i915/de: Add intel_de_read16()

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We'll need a replacement for intel_uncore_read16() in order to
> untangle intel_mchbar_read16() from uncore. As with the 8 bit
> counterpart this doesn't need to work on modern platforms
> so we can forgo all the DMC wakelock stuff and whatnot.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_de.c | 8 ++++++++
>  drivers/gpu/drm/i915/display/intel_de.h | 1 +
>  2 files changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_de.c b/drivers/gpu/drm/i915/display/intel_de.c
> index d2a418da2d54..a96e83d76eaa 100644
> --- a/drivers/gpu/drm/i915/display/intel_de.c
> +++ b/drivers/gpu/drm/i915/display/intel_de.c
> @@ -176,3 +176,11 @@ void intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val)
>  
>  	intel_uncore_write8(__to_uncore(display), reg, val);
>  }
> +
> +u16 intel_de_read16(struct intel_display *display, i915_reg_t reg)
> +{
> +	/* this is only used on MCHBAR registers on pre-SNB */
> +	drm_WARN_ON(display->drm, DISPLAY_VER(display) >= 6);
> +
> +	return intel_uncore_read16(__to_uncore(display), reg);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
> index f87b84ab9d6d..3f9861b7a589 100644
> --- a/drivers/gpu/drm/i915/display/intel_de.h
> +++ b/drivers/gpu/drm/i915/display/intel_de.h
> @@ -19,6 +19,7 @@ static inline struct intel_uncore *__to_uncore(struct intel_display *display)
>  
>  u8 intel_de_read8(struct intel_display *display, i915_reg_t reg);
>  void intel_de_write8(struct intel_display *display, i915_reg_t reg, u8 val);
> +u16 intel_de_read16(struct intel_display *display, i915_reg_t reg);
>  
>  static inline u32
>  intel_de_read(struct intel_display *display, i915_reg_t reg)

-- 
Jani Nikula, Intel

[PATCH 08/12] drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The raison d'etre of intel_de_read64_2x32() is that it can
handle registers where volatile values are split across two
registers. I don't like that it's being used needlessly.

Rename it to intel_de_read64_2x32_volatile() to make it
more clear when it should be used.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_de.h     | 4 ++--
 drivers/gpu/drm/i915/display/intel_vblank.c | 4 ++--
 drivers/gpu/drm/i915/display/intel_vrr.c    | 8 ++++----
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index 3f9861b7a589..295e7176b732 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -36,8 +36,8 @@ intel_de_read(struct intel_display *display, i915_reg_t reg)
 }
 
 static inline u64
-intel_de_read64_2x32(struct intel_display *display,
-		     i915_reg_t lower_reg, i915_reg_t upper_reg)
+intel_de_read64_2x32_volatile(struct intel_display *display,
+			      i915_reg_t lower_reg, i915_reg_t upper_reg)
 {
 	u64 val;
 
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 1b7cfe226ff8..0726a2abed38 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -109,8 +109,8 @@ u32 i915_get_vblank_counter(struct drm_crtc *crtc)
 	 * we get a low value that's stable across two reads of the high
 	 * register.
 	 */
-	frame = intel_de_read64_2x32(display, PIPEFRAMEPIXEL(display, pipe),
-				     PIPEFRAME(display, pipe));
+	frame = intel_de_read64_2x32_volatile(display, PIPEFRAMEPIXEL(display, pipe),
+					      PIPEFRAME(display, pipe));
 
 	pixel = frame & PIPE_PIXEL_MASK;
 	frame = (frame >> PIPE_FRAME_LOW_SHIFT) & 0xffffff;
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 8a957804cb97..ae5385e92889 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -1053,11 +1053,11 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
 
 	if (crtc_state->cmrr.enable) {
 		crtc_state->cmrr.cmrr_n =
-			intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder),
-					     TRANS_CMRR_N_HI(display, cpu_transcoder));
+			intel_de_read64_2x32_volatile(display, TRANS_CMRR_N_LO(display, cpu_transcoder),
+						      TRANS_CMRR_N_HI(display, cpu_transcoder));
 		crtc_state->cmrr.cmrr_m =
-			intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder),
-					     TRANS_CMRR_M_HI(display, cpu_transcoder));
+			intel_de_read64_2x32_volatile(display, TRANS_CMRR_M_LO(display, cpu_transcoder),
+						      TRANS_CMRR_M_HI(display, cpu_transcoder));
 	}
 
 	if (DISPLAY_VER(display) >= 13) {
-- 
2.52.0

Re: [PATCH 08/12] drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The raison d'etre of intel_de_read64_2x32() is that it can
> handle registers where volatile values are split across two
> registers. I don't like that it's being used needlessly.
>
> Rename it to intel_de_read64_2x32_volatile() to make it
> more clear when it should be used.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_de.h     | 4 ++--
>  drivers/gpu/drm/i915/display/intel_vblank.c | 4 ++--
>  drivers/gpu/drm/i915/display/intel_vrr.c    | 8 ++++----
>  3 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
> index 3f9861b7a589..295e7176b732 100644
> --- a/drivers/gpu/drm/i915/display/intel_de.h
> +++ b/drivers/gpu/drm/i915/display/intel_de.h
> @@ -36,8 +36,8 @@ intel_de_read(struct intel_display *display, i915_reg_t reg)
>  }
>  
>  static inline u64
> -intel_de_read64_2x32(struct intel_display *display,
> -		     i915_reg_t lower_reg, i915_reg_t upper_reg)
> +intel_de_read64_2x32_volatile(struct intel_display *display,
> +			      i915_reg_t lower_reg, i915_reg_t upper_reg)
>  {
>  	u64 val;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 1b7cfe226ff8..0726a2abed38 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -109,8 +109,8 @@ u32 i915_get_vblank_counter(struct drm_crtc *crtc)
>  	 * we get a low value that's stable across two reads of the high
>  	 * register.
>  	 */
> -	frame = intel_de_read64_2x32(display, PIPEFRAMEPIXEL(display, pipe),
> -				     PIPEFRAME(display, pipe));
> +	frame = intel_de_read64_2x32_volatile(display, PIPEFRAMEPIXEL(display, pipe),
> +					      PIPEFRAME(display, pipe));
>  
>  	pixel = frame & PIPE_PIXEL_MASK;
>  	frame = (frame >> PIPE_FRAME_LOW_SHIFT) & 0xffffff;
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 8a957804cb97..ae5385e92889 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -1053,11 +1053,11 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
>  
>  	if (crtc_state->cmrr.enable) {
>  		crtc_state->cmrr.cmrr_n =
> -			intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder),
> -					     TRANS_CMRR_N_HI(display, cpu_transcoder));
> +			intel_de_read64_2x32_volatile(display, TRANS_CMRR_N_LO(display, cpu_transcoder),
> +						      TRANS_CMRR_N_HI(display, cpu_transcoder));
>  		crtc_state->cmrr.cmrr_m =
> -			intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder),
> -					     TRANS_CMRR_M_HI(display, cpu_transcoder));
> +			intel_de_read64_2x32_volatile(display, TRANS_CMRR_M_LO(display, cpu_transcoder),
> +						      TRANS_CMRR_M_HI(display, cpu_transcoder));
>  	}
>  
>  	if (DISPLAY_VER(display) >= 13) {

-- 
Jani Nikula, Intel

[PATCH 09/12] drm/i915/de: Add a simple intel_de_read64_2x32()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_de_read64_2x32_volatile() is a complex beast because
it needs to deal with volatile register values. For simpler
cases we can simply do a pair normal intel_de_read()s.

My main reason for hating overuse of intel_de_read64_2x32_volatile()
is that it makes register tracepoints confusing. It always
does three accesses in the somewhat weird udw,ldw,udw order,
confusing the reader of the trace. Much more clear if we just
observe the two reads in the natural little endian order.

We also have no non-volatile use case where the LDW and UDW
are stored in non-consecutive registers, so we can just pass
along a single register offset.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_de.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
index 295e7176b732..624a0627b95c 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -53,6 +53,19 @@ intel_de_read64_2x32_volatile(struct intel_display *display,
 	return val;
 }
 
+static inline u64
+intel_de_read64_2x32(struct intel_display *display,
+		     i915_reg_t reg)
+{
+	i915_reg_t upper_reg = _MMIO(i915_mmio_reg_offset(reg) + 4);
+	u32 lower, upper;
+
+	lower = intel_de_read(display, reg);
+	upper = intel_de_read(display, upper_reg);
+
+	return (u64)upper << 32 | lower;
+}
+
 static inline void
 intel_de_posting_read(struct intel_display *display, i915_reg_t reg)
 {
-- 
2.52.0

Re: [PATCH 09/12] drm/i915/de: Add a simple intel_de_read64_2x32()

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> intel_de_read64_2x32_volatile() is a complex beast because
> it needs to deal with volatile register values. For simpler
> cases we can simply do a pair normal intel_de_read()s.
>
> My main reason for hating overuse of intel_de_read64_2x32_volatile()
> is that it makes register tracepoints confusing. It always
> does three accesses in the somewhat weird udw,ldw,udw order,
> confusing the reader of the trace. Much more clear if we just
> observe the two reads in the natural little endian order.
>
> We also have no non-volatile use case where the LDW and UDW
> are stored in non-consecutive registers, so we can just pass
> along a single register offset.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_de.h | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_de.h b/drivers/gpu/drm/i915/display/intel_de.h
> index 295e7176b732..624a0627b95c 100644
> --- a/drivers/gpu/drm/i915/display/intel_de.h
> +++ b/drivers/gpu/drm/i915/display/intel_de.h
> @@ -53,6 +53,19 @@ intel_de_read64_2x32_volatile(struct intel_display *display,
>  	return val;
>  }
>  
> +static inline u64
> +intel_de_read64_2x32(struct intel_display *display,
> +		     i915_reg_t reg)

Could fit on one line, matter of taste I guess.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> +{
> +	i915_reg_t upper_reg = _MMIO(i915_mmio_reg_offset(reg) + 4);
> +	u32 lower, upper;
> +
> +	lower = intel_de_read(display, reg);
> +	upper = intel_de_read(display, upper_reg);
> +
> +	return (u64)upper << 32 | lower;
> +}
> +
>  static inline void
>  intel_de_posting_read(struct intel_display *display, i915_reg_t reg)
>  {

-- 
Jani Nikula, Intel

[PATCH 10/12] drm/i915/vrr: Use intel_de_read64_2x32()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Replace the pointless use of intel_de_read64_2x32_volatile()
with the simpler intel_de_read64_2x32().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index ae5385e92889..fae1186a90b2 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -1053,11 +1053,9 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
 
 	if (crtc_state->cmrr.enable) {
 		crtc_state->cmrr.cmrr_n =
-			intel_de_read64_2x32_volatile(display, TRANS_CMRR_N_LO(display, cpu_transcoder),
-						      TRANS_CMRR_N_HI(display, cpu_transcoder));
+			intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder));
 		crtc_state->cmrr.cmrr_m =
-			intel_de_read64_2x32_volatile(display, TRANS_CMRR_M_LO(display, cpu_transcoder),
-						      TRANS_CMRR_M_HI(display, cpu_transcoder));
+			intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder));
 	}
 
 	if (DISPLAY_VER(display) >= 13) {
-- 
2.52.0

Re: [PATCH 10/12] drm/i915/vrr: Use intel_de_read64_2x32()

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Replace the pointless use of intel_de_read64_2x32_volatile()
> with the simpler intel_de_read64_2x32().
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_vrr.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index ae5385e92889..fae1186a90b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -1053,11 +1053,9 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
>  
>  	if (crtc_state->cmrr.enable) {
>  		crtc_state->cmrr.cmrr_n =
> -			intel_de_read64_2x32_volatile(display, TRANS_CMRR_N_LO(display, cpu_transcoder),
> -						      TRANS_CMRR_N_HI(display, cpu_transcoder));
> +			intel_de_read64_2x32(display, TRANS_CMRR_N_LO(display, cpu_transcoder));
>  		crtc_state->cmrr.cmrr_m =
> -			intel_de_read64_2x32_volatile(display, TRANS_CMRR_M_LO(display, cpu_transcoder),
> -						      TRANS_CMRR_M_HI(display, cpu_transcoder));
> +			intel_de_read64_2x32(display, TRANS_CMRR_M_LO(display, cpu_transcoder));
>  	}
>  
>  	if (DISPLAY_VER(display) >= 13) {

-- 
Jani Nikula, Intel

[PATCH 11/12] drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Replace the naked intel_uncore_read*() with intel_de_read*()
in the MCHBAR code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_mchbar.c | 14 ++++----------
 1 file changed, 4 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.c b/drivers/gpu/drm/i915/display/intel_mchbar.c
index 82b47c00101a..da74147f471e 100644
--- a/drivers/gpu/drm/i915/display/intel_mchbar.c
+++ b/drivers/gpu/drm/i915/display/intel_mchbar.c
@@ -7,10 +7,10 @@
 
 #include <drm/drm_print.h>
 
+#include "intel_de.h"
 #include "intel_display_core.h"
 #include "intel_mchbar.h"
 #include "intel_mchbar_regs.h"
-#include "intel_uncore.h"
 
 static bool has_mchbar_mirror(struct intel_display *display)
 {
@@ -53,29 +53,23 @@ static bool is_mchbar_reg(struct intel_display *display, i915_reg_t reg)
 u16 intel_mchbar_read16(struct intel_display *display,
 			i915_reg_t reg)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
-
 	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
 
-	return intel_uncore_read16(uncore, reg);
+	return intel_de_read16(display, reg);
 }
 
 u32 intel_mchbar_read(struct intel_display *display,
 		      i915_reg_t reg)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
-
 	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
 
-	return intel_uncore_read(uncore, reg);
+	return intel_de_read(display, reg);
 }
 
 u64 intel_mchbar_read64(struct intel_display *display,
 			i915_reg_t reg)
 {
-	struct intel_uncore *uncore = to_intel_uncore(display->drm);
-
 	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
 
-	return intel_uncore_read64(uncore, reg);
+	return intel_de_read64_2x32(display, reg);
 }
-- 
2.52.0

Re: [PATCH 11/12] drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Replace the naked intel_uncore_read*() with intel_de_read*()
> in the MCHBAR code.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_mchbar.c | 14 ++++----------
>  1 file changed, 4 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_mchbar.c b/drivers/gpu/drm/i915/display/intel_mchbar.c
> index 82b47c00101a..da74147f471e 100644
> --- a/drivers/gpu/drm/i915/display/intel_mchbar.c
> +++ b/drivers/gpu/drm/i915/display/intel_mchbar.c
> @@ -7,10 +7,10 @@
>  
>  #include <drm/drm_print.h>
>  
> +#include "intel_de.h"
>  #include "intel_display_core.h"
>  #include "intel_mchbar.h"
>  #include "intel_mchbar_regs.h"
> -#include "intel_uncore.h"
>  
>  static bool has_mchbar_mirror(struct intel_display *display)
>  {
> @@ -53,29 +53,23 @@ static bool is_mchbar_reg(struct intel_display *display, i915_reg_t reg)
>  u16 intel_mchbar_read16(struct intel_display *display,
>  			i915_reg_t reg)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
> -
>  	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
>  
> -	return intel_uncore_read16(uncore, reg);
> +	return intel_de_read16(display, reg);
>  }
>  
>  u32 intel_mchbar_read(struct intel_display *display,
>  		      i915_reg_t reg)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
> -
>  	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
>  
> -	return intel_uncore_read(uncore, reg);
> +	return intel_de_read(display, reg);
>  }
>  
>  u64 intel_mchbar_read64(struct intel_display *display,
>  			i915_reg_t reg)
>  {
> -	struct intel_uncore *uncore = to_intel_uncore(display->drm);
> -
>  	drm_WARN_ON(display->drm, !is_mchbar_reg(display, reg));
>  
> -	return intel_uncore_read64(uncore, reg);
> +	return intel_de_read64_2x32(display, reg);
>  }

-- 
Jani Nikula, Intel

[PATCH 12/12] drm/i915/rom: Use intel_de for SPI ROM register access

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Since we moved intel_rom.c back into the display code, juse
use intel_de_{read,write}() for the register accesses.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_rom.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_rom.c b/drivers/gpu/drm/i915/display/intel_rom.c
index d573059fb0d9..54f842c09fb0 100644
--- a/drivers/gpu/drm/i915/display/intel_rom.c
+++ b/drivers/gpu/drm/i915/display/intel_rom.c
@@ -7,8 +7,9 @@
 
 #include <drm/drm_device.h>
 
+#include "intel_de.h"
+#include "intel_display_types.h"
 #include "intel_rom.h"
-#include "intel_uncore.h"
 #include "intel_oprom_regs.h"
 
 struct intel_rom {
@@ -17,7 +18,7 @@ struct intel_rom {
 	void __iomem *oprom;
 
 	/* for SPI */
-	struct intel_uncore *uncore;
+	struct intel_display *display;
 	loff_t offset;
 
 	size_t size;
@@ -30,10 +31,10 @@ struct intel_rom {
 
 static u32 spi_read32(struct intel_rom *rom, loff_t offset)
 {
-	intel_uncore_write(rom->uncore, PRIMARY_SPI_ADDRESS,
-			   rom->offset + offset);
+	intel_de_write(rom->display, PRIMARY_SPI_ADDRESS,
+		       rom->offset + offset);
 
-	return intel_uncore_read(rom->uncore, PRIMARY_SPI_TRIGGER);
+	return intel_de_read(rom->display, PRIMARY_SPI_TRIGGER);
 }
 
 static u16 spi_read16(struct intel_rom *rom, loff_t offset)
@@ -50,13 +51,13 @@ struct intel_rom *intel_rom_spi(struct drm_device *drm)
 	if (!rom)
 		return NULL;
 
-	rom->uncore = to_intel_uncore(drm);
+	rom->display = to_intel_display(drm);
 
-	static_region = intel_uncore_read(rom->uncore, SPI_STATIC_REGIONS);
+	static_region = intel_de_read(rom->display, SPI_STATIC_REGIONS);
 	static_region &= OPTIONROM_SPI_REGIONID_MASK;
-	intel_uncore_write(rom->uncore, PRIMARY_SPI_REGIONID, static_region);
+	intel_de_write(rom->display, PRIMARY_SPI_REGIONID, static_region);
 
-	rom->offset = intel_uncore_read(rom->uncore, OROM_OFFSET) & OROM_OFFSET_MASK;
+	rom->offset = intel_de_read(rom->display, OROM_OFFSET) & OROM_OFFSET_MASK;
 
 	rom->size = 0x200000;
 
-- 
2.52.0

Re: [PATCH 12/12] drm/i915/rom: Use intel_de for SPI ROM register access

[Jani Nikula]

On Wed, 25 Mar 2026, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Since we moved intel_rom.c back into the display code, juse
> use intel_de_{read,write}() for the register accesses.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_rom.c | 19 ++++++++++---------
>  1 file changed, 10 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_rom.c b/drivers/gpu/drm/i915/display/intel_rom.c
> index d573059fb0d9..54f842c09fb0 100644
> --- a/drivers/gpu/drm/i915/display/intel_rom.c
> +++ b/drivers/gpu/drm/i915/display/intel_rom.c
> @@ -7,8 +7,9 @@
>  
>  #include <drm/drm_device.h>
>  
> +#include "intel_de.h"
> +#include "intel_display_types.h"
>  #include "intel_rom.h"
> -#include "intel_uncore.h"
>  #include "intel_oprom_regs.h"
>  
>  struct intel_rom {
> @@ -17,7 +18,7 @@ struct intel_rom {
>  	void __iomem *oprom;
>  
>  	/* for SPI */
> -	struct intel_uncore *uncore;
> +	struct intel_display *display;
>  	loff_t offset;
>  
>  	size_t size;
> @@ -30,10 +31,10 @@ struct intel_rom {
>  
>  static u32 spi_read32(struct intel_rom *rom, loff_t offset)
>  {
> -	intel_uncore_write(rom->uncore, PRIMARY_SPI_ADDRESS,
> -			   rom->offset + offset);
> +	intel_de_write(rom->display, PRIMARY_SPI_ADDRESS,
> +		       rom->offset + offset);
>  
> -	return intel_uncore_read(rom->uncore, PRIMARY_SPI_TRIGGER);
> +	return intel_de_read(rom->display, PRIMARY_SPI_TRIGGER);
>  }
>  
>  static u16 spi_read16(struct intel_rom *rom, loff_t offset)
> @@ -50,13 +51,13 @@ struct intel_rom *intel_rom_spi(struct drm_device *drm)
>  	if (!rom)
>  		return NULL;
>  
> -	rom->uncore = to_intel_uncore(drm);
> +	rom->display = to_intel_display(drm);
>  
> -	static_region = intel_uncore_read(rom->uncore, SPI_STATIC_REGIONS);
> +	static_region = intel_de_read(rom->display, SPI_STATIC_REGIONS);
>  	static_region &= OPTIONROM_SPI_REGIONID_MASK;
> -	intel_uncore_write(rom->uncore, PRIMARY_SPI_REGIONID, static_region);
> +	intel_de_write(rom->display, PRIMARY_SPI_REGIONID, static_region);
>  
> -	rom->offset = intel_uncore_read(rom->uncore, OROM_OFFSET) & OROM_OFFSET_MASK;
> +	rom->offset = intel_de_read(rom->display, OROM_OFFSET) & OROM_OFFSET_MASK;
>  
>  	rom->size = 0x200000;

-- 
Jani Nikula, Intel

✗ CI.checkpatch: warning for drm/i915: More uncore nukage from display code

[Patchwork]

== Series Details ==

Series: drm/i915: More uncore nukage from display code
URL   : https://patchwork.freedesktop.org/series/163872/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 0c687e06e1f8752f6a44cda333f0c77e37caadc5
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Wed Mar 25 20:53:41 2026 +0200

    drm/i915/rom: Use intel_de for SPI ROM register access
    
    Since we moved intel_rom.c back into the display code, juse
    use intel_de_{read,write}() for the register accesses.
    
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ /mt/dim checkpatch ec0484d20b9f962d04a62ff1feb03676c3ce7611 drm-intel
fc2ebcac1aa2 drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads
165e3e9bbae5 drm/i915/mchbar: Provide intel_mchbar_read*() abstraction
-:35: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#35: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 68 lines checked
74fff15b5f11 drm/i915/mchbar: Define the end of the MCHBAR mirror
322acee1d01a drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*()
0d6bcbdb0624 drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read()
01fd71cbbf8a drm/i915/mchbar: Use intel_mchbar_read*() instead of intel_uncore_read*()
e186a90fa62d drm/i915/de: Add intel_de_read16()
4a545876adec drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/
-:59: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#59: FILE: drivers/gpu/drm/i915/display/intel_vrr.c:1056:
+			intel_de_read64_2x32_volatile(display, TRANS_CMRR_N_LO(display, cpu_transcoder),

-:64: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#64: FILE: drivers/gpu/drm/i915/display/intel_vrr.c:1059:
+			intel_de_read64_2x32_volatile(display, TRANS_CMRR_M_LO(display, cpu_transcoder),

total: 0 errors, 2 warnings, 0 checks, 35 lines checked
9be2f0b50872 drm/i915/de: Add a simple intel_de_read64_2x32()
8067a565a6cc drm/i915/vrr: Use intel_de_read64_2x32()
ca537d298ec6 drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses
0c687e06e1f8 drm/i915/rom: Use intel_de for SPI ROM register access
-:9: WARNING:TYPO_SPELLING: 'juse' may be misspelled - perhaps 'just'?
#9: 
Since we moved intel_rom.c back into the display code, juse
                                                       ^^^^

total: 0 errors, 1 warnings, 0 checks, 48 lines checked

✓ CI.KUnit: success for drm/i915: More uncore nukage from display code

[Patchwork]

== Series Details ==

Series: drm/i915: More uncore nukage from display code
URL   : https://patchwork.freedesktop.org/series/163872/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[19:30:49] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:30:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:31:24] Starting KUnit Kernel (1/1)...
[19:31:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:31:24] ================== guc_buf (11 subtests) ===================
[19:31:24] [PASSED] test_smallest
[19:31:24] [PASSED] test_largest
[19:31:24] [PASSED] test_granular
[19:31:24] [PASSED] test_unique
[19:31:24] [PASSED] test_overlap
[19:31:24] [PASSED] test_reusable
[19:31:24] [PASSED] test_too_big
[19:31:24] [PASSED] test_flush
[19:31:24] [PASSED] test_lookup
[19:31:24] [PASSED] test_data
[19:31:24] [PASSED] test_class
[19:31:24] ===================== [PASSED] guc_buf =====================
[19:31:24] =================== guc_dbm (7 subtests) ===================
[19:31:24] [PASSED] test_empty
[19:31:24] [PASSED] test_default
[19:31:24] ======================== test_size  ========================
[19:31:24] [PASSED] 4
[19:31:24] [PASSED] 8
[19:31:24] [PASSED] 32
[19:31:24] [PASSED] 256
[19:31:24] ==================== [PASSED] test_size ====================
[19:31:24] ======================= test_reuse  ========================
[19:31:24] [PASSED] 4
[19:31:24] [PASSED] 8
[19:31:24] [PASSED] 32
[19:31:24] [PASSED] 256
[19:31:24] =================== [PASSED] test_reuse ====================
[19:31:24] =================== test_range_overlap  ====================
[19:31:24] [PASSED] 4
[19:31:24] [PASSED] 8
[19:31:24] [PASSED] 32
[19:31:24] [PASSED] 256
[19:31:24] =============== [PASSED] test_range_overlap ================
[19:31:24] =================== test_range_compact  ====================
[19:31:24] [PASSED] 4
[19:31:24] [PASSED] 8
[19:31:24] [PASSED] 32
[19:31:24] [PASSED] 256
[19:31:24] =============== [PASSED] test_range_compact ================
[19:31:24] ==================== test_range_spare  =====================
[19:31:24] [PASSED] 4
[19:31:24] [PASSED] 8
[19:31:24] [PASSED] 32
[19:31:24] [PASSED] 256
[19:31:24] ================ [PASSED] test_range_spare =================
[19:31:24] ===================== [PASSED] guc_dbm =====================
[19:31:24] =================== guc_idm (6 subtests) ===================
[19:31:24] [PASSED] bad_init
[19:31:24] [PASSED] no_init
[19:31:24] [PASSED] init_fini
[19:31:24] [PASSED] check_used
[19:31:24] [PASSED] check_quota
[19:31:24] [PASSED] check_all
[19:31:24] ===================== [PASSED] guc_idm =====================
[19:31:24] ================== no_relay (3 subtests) ===================
[19:31:24] [PASSED] xe_drops_guc2pf_if_not_ready
[19:31:24] [PASSED] xe_drops_guc2vf_if_not_ready
[19:31:24] [PASSED] xe_rejects_send_if_not_ready
[19:31:24] ==================== [PASSED] no_relay =====================
[19:31:24] ================== pf_relay (14 subtests) ==================
[19:31:24] [PASSED] pf_rejects_guc2pf_too_short
[19:31:24] [PASSED] pf_rejects_guc2pf_too_long
[19:31:24] [PASSED] pf_rejects_guc2pf_no_payload
[19:31:24] [PASSED] pf_fails_no_payload
[19:31:24] [PASSED] pf_fails_bad_origin
[19:31:24] [PASSED] pf_fails_bad_type
[19:31:24] [PASSED] pf_txn_reports_error
[19:31:24] [PASSED] pf_txn_sends_pf2guc
[19:31:24] [PASSED] pf_sends_pf2guc
[19:31:24] [SKIPPED] pf_loopback_nop
[19:31:24] [SKIPPED] pf_loopback_echo
[19:31:24] [SKIPPED] pf_loopback_fail
[19:31:24] [SKIPPED] pf_loopback_busy
[19:31:24] [SKIPPED] pf_loopback_retry
[19:31:24] ==================== [PASSED] pf_relay =====================
[19:31:24] ================== vf_relay (3 subtests) ===================
[19:31:24] [PASSED] vf_rejects_guc2vf_too_short
[19:31:24] [PASSED] vf_rejects_guc2vf_too_long
[19:31:24] [PASSED] vf_rejects_guc2vf_no_payload
[19:31:24] ==================== [PASSED] vf_relay =====================
[19:31:24] ================ pf_gt_config (9 subtests) =================
[19:31:24] [PASSED] fair_contexts_1vf
[19:31:24] [PASSED] fair_doorbells_1vf
[19:31:24] [PASSED] fair_ggtt_1vf
[19:31:24] ====================== fair_vram_1vf  ======================
[19:31:24] [PASSED] 3.50 GiB
[19:31:24] [PASSED] 11.5 GiB
[19:31:24] [PASSED] 15.5 GiB
[19:31:24] [PASSED] 31.5 GiB
[19:31:24] [PASSED] 63.5 GiB
[19:31:24] [PASSED] 1.91 GiB
[19:31:24] ================== [PASSED] fair_vram_1vf ==================
[19:31:24] ================ fair_vram_1vf_admin_only  =================
[19:31:24] [PASSED] 3.50 GiB
[19:31:24] [PASSED] 11.5 GiB
[19:31:24] [PASSED] 15.5 GiB
[19:31:24] [PASSED] 31.5 GiB
[19:31:24] [PASSED] 63.5 GiB
[19:31:24] [PASSED] 1.91 GiB
[19:31:24] ============ [PASSED] fair_vram_1vf_admin_only =============
[19:31:24] ====================== fair_contexts  ======================
[19:31:24] [PASSED] 1 VF
[19:31:24] [PASSED] 2 VFs
[19:31:24] [PASSED] 3 VFs
[19:31:24] [PASSED] 4 VFs
[19:31:24] [PASSED] 5 VFs
[19:31:24] [PASSED] 6 VFs
[19:31:24] [PASSED] 7 VFs
[19:31:24] [PASSED] 8 VFs
[19:31:24] [PASSED] 9 VFs
[19:31:24] [PASSED] 10 VFs
[19:31:24] [PASSED] 11 VFs
[19:31:24] [PASSED] 12 VFs
[19:31:24] [PASSED] 13 VFs
[19:31:24] [PASSED] 14 VFs
[19:31:24] [PASSED] 15 VFs
[19:31:24] [PASSED] 16 VFs
[19:31:24] [PASSED] 17 VFs
[19:31:24] [PASSED] 18 VFs
[19:31:24] [PASSED] 19 VFs
[19:31:24] [PASSED] 20 VFs
[19:31:24] [PASSED] 21 VFs
[19:31:24] [PASSED] 22 VFs
[19:31:24] [PASSED] 23 VFs
[19:31:24] [PASSED] 24 VFs
[19:31:24] [PASSED] 25 VFs
[19:31:24] [PASSED] 26 VFs
[19:31:24] [PASSED] 27 VFs
[19:31:24] [PASSED] 28 VFs
[19:31:24] [PASSED] 29 VFs
[19:31:24] [PASSED] 30 VFs
[19:31:24] [PASSED] 31 VFs
[19:31:24] [PASSED] 32 VFs
[19:31:24] [PASSED] 33 VFs
[19:31:24] [PASSED] 34 VFs
[19:31:24] [PASSED] 35 VFs
[19:31:24] [PASSED] 36 VFs
[19:31:24] [PASSED] 37 VFs
[19:31:24] [PASSED] 38 VFs
[19:31:24] [PASSED] 39 VFs
[19:31:24] [PASSED] 40 VFs
[19:31:24] [PASSED] 41 VFs
[19:31:24] [PASSED] 42 VFs
[19:31:24] [PASSED] 43 VFs
[19:31:24] [PASSED] 44 VFs
[19:31:24] [PASSED] 45 VFs
[19:31:24] [PASSED] 46 VFs
[19:31:24] [PASSED] 47 VFs
[19:31:24] [PASSED] 48 VFs
[19:31:24] [PASSED] 49 VFs
[19:31:24] [PASSED] 50 VFs
[19:31:24] [PASSED] 51 VFs
[19:31:24] [PASSED] 52 VFs
[19:31:24] [PASSED] 53 VFs
[19:31:24] [PASSED] 54 VFs
[19:31:24] [PASSED] 55 VFs
[19:31:24] [PASSED] 56 VFs
[19:31:24] [PASSED] 57 VFs
[19:31:24] [PASSED] 58 VFs
[19:31:24] [PASSED] 59 VFs
[19:31:24] [PASSED] 60 VFs
[19:31:24] [PASSED] 61 VFs
[19:31:24] [PASSED] 62 VFs
[19:31:24] [PASSED] 63 VFs
[19:31:24] ================== [PASSED] fair_contexts ==================
[19:31:24] ===================== fair_doorbells  ======================
[19:31:24] [PASSED] 1 VF
[19:31:24] [PASSED] 2 VFs
[19:31:24] [PASSED] 3 VFs
[19:31:24] [PASSED] 4 VFs
[19:31:24] [PASSED] 5 VFs
[19:31:24] [PASSED] 6 VFs
[19:31:24] [PASSED] 7 VFs
[19:31:24] [PASSED] 8 VFs
[19:31:24] [PASSED] 9 VFs
[19:31:24] [PASSED] 10 VFs
[19:31:24] [PASSED] 11 VFs
[19:31:24] [PASSED] 12 VFs
[19:31:24] [PASSED] 13 VFs
[19:31:24] [PASSED] 14 VFs
[19:31:24] [PASSED] 15 VFs
[19:31:24] [PASSED] 16 VFs
[19:31:24] [PASSED] 17 VFs
[19:31:24] [PASSED] 18 VFs
[19:31:24] [PASSED] 19 VFs
[19:31:24] [PASSED] 20 VFs
[19:31:24] [PASSED] 21 VFs
[19:31:24] [PASSED] 22 VFs
[19:31:24] [PASSED] 23 VFs
[19:31:24] [PASSED] 24 VFs
[19:31:24] [PASSED] 25 VFs
[19:31:24] [PASSED] 26 VFs
[19:31:24] [PASSED] 27 VFs
[19:31:24] [PASSED] 28 VFs
[19:31:24] [PASSED] 29 VFs
[19:31:24] [PASSED] 30 VFs
[19:31:24] [PASSED] 31 VFs
[19:31:24] [PASSED] 32 VFs
[19:31:24] [PASSED] 33 VFs
[19:31:24] [PASSED] 34 VFs
[19:31:24] [PASSED] 35 VFs
[19:31:24] [PASSED] 36 VFs
[19:31:24] [PASSED] 37 VFs
[19:31:24] [PASSED] 38 VFs
[19:31:24] [PASSED] 39 VFs
[19:31:24] [PASSED] 40 VFs
[19:31:24] [PASSED] 41 VFs
[19:31:24] [PASSED] 42 VFs
[19:31:24] [PASSED] 43 VFs
[19:31:24] [PASSED] 44 VFs
[19:31:24] [PASSED] 45 VFs
[19:31:24] [PASSED] 46 VFs
[19:31:24] [PASSED] 47 VFs
[19:31:24] [PASSED] 48 VFs
[19:31:24] [PASSED] 49 VFs
[19:31:24] [PASSED] 50 VFs
[19:31:24] [PASSED] 51 VFs
[19:31:24] [PASSED] 52 VFs
[19:31:24] [PASSED] 53 VFs
[19:31:24] [PASSED] 54 VFs
[19:31:24] [PASSED] 55 VFs
[19:31:24] [PASSED] 56 VFs
[19:31:24] [PASSED] 57 VFs
[19:31:24] [PASSED] 58 VFs
[19:31:24] [PASSED] 59 VFs
[19:31:24] [PASSED] 60 VFs
[19:31:24] [PASSED] 61 VFs
[19:31:24] [PASSED] 62 VFs
[19:31:24] [PASSED] 63 VFs
[19:31:24] ================= [PASSED] fair_doorbells ==================
[19:31:24] ======================== fair_ggtt  ========================
[19:31:24] [PASSED] 1 VF
[19:31:24] [PASSED] 2 VFs
[19:31:24] [PASSED] 3 VFs
[19:31:24] [PASSED] 4 VFs
[19:31:24] [PASSED] 5 VFs
[19:31:24] [PASSED] 6 VFs
[19:31:24] [PASSED] 7 VFs
[19:31:24] [PASSED] 8 VFs
[19:31:24] [PASSED] 9 VFs
[19:31:24] [PASSED] 10 VFs
[19:31:24] [PASSED] 11 VFs
[19:31:24] [PASSED] 12 VFs
[19:31:24] [PASSED] 13 VFs
[19:31:24] [PASSED] 14 VFs
[19:31:24] [PASSED] 15 VFs
[19:31:24] [PASSED] 16 VFs
[19:31:24] [PASSED] 17 VFs
[19:31:24] [PASSED] 18 VFs
[19:31:24] [PASSED] 19 VFs
[19:31:24] [PASSED] 20 VFs
[19:31:24] [PASSED] 21 VFs
[19:31:24] [PASSED] 22 VFs
[19:31:24] [PASSED] 23 VFs
[19:31:24] [PASSED] 24 VFs
[19:31:24] [PASSED] 25 VFs
[19:31:24] [PASSED] 26 VFs
[19:31:24] [PASSED] 27 VFs
[19:31:24] [PASSED] 28 VFs
[19:31:24] [PASSED] 29 VFs
[19:31:24] [PASSED] 30 VFs
[19:31:24] [PASSED] 31 VFs
[19:31:24] [PASSED] 32 VFs
[19:31:24] [PASSED] 33 VFs
[19:31:24] [PASSED] 34 VFs
[19:31:24] [PASSED] 35 VFs
[19:31:24] [PASSED] 36 VFs
[19:31:24] [PASSED] 37 VFs
[19:31:24] [PASSED] 38 VFs
[19:31:24] [PASSED] 39 VFs
[19:31:24] [PASSED] 40 VFs
[19:31:24] [PASSED] 41 VFs
[19:31:24] [PASSED] 42 VFs
[19:31:24] [PASSED] 43 VFs
[19:31:24] [PASSED] 44 VFs
[19:31:24] [PASSED] 45 VFs
[19:31:24] [PASSED] 46 VFs
[19:31:24] [PASSED] 47 VFs
[19:31:24] [PASSED] 48 VFs
[19:31:24] [PASSED] 49 VFs
[19:31:24] [PASSED] 50 VFs
[19:31:24] [PASSED] 51 VFs
[19:31:24] [PASSED] 52 VFs
[19:31:24] [PASSED] 53 VFs
[19:31:24] [PASSED] 54 VFs
[19:31:24] [PASSED] 55 VFs
[19:31:24] [PASSED] 56 VFs
[19:31:24] [PASSED] 57 VFs
[19:31:24] [PASSED] 58 VFs
[19:31:24] [PASSED] 59 VFs
[19:31:24] [PASSED] 60 VFs
[19:31:24] [PASSED] 61 VFs
[19:31:24] [PASSED] 62 VFs
[19:31:24] [PASSED] 63 VFs
[19:31:24] ==================== [PASSED] fair_ggtt ====================
[19:31:24] ======================== fair_vram  ========================
[19:31:24] [PASSED] 1 VF
[19:31:24] [PASSED] 2 VFs
[19:31:24] [PASSED] 3 VFs
[19:31:24] [PASSED] 4 VFs
[19:31:24] [PASSED] 5 VFs
[19:31:24] [PASSED] 6 VFs
[19:31:24] [PASSED] 7 VFs
[19:31:24] [PASSED] 8 VFs
[19:31:24] [PASSED] 9 VFs
[19:31:24] [PASSED] 10 VFs
[19:31:24] [PASSED] 11 VFs
[19:31:24] [PASSED] 12 VFs
[19:31:24] [PASSED] 13 VFs
[19:31:24] [PASSED] 14 VFs
[19:31:24] [PASSED] 15 VFs
[19:31:24] [PASSED] 16 VFs
[19:31:24] [PASSED] 17 VFs
[19:31:24] [PASSED] 18 VFs
[19:31:24] [PASSED] 19 VFs
[19:31:24] [PASSED] 20 VFs
[19:31:24] [PASSED] 21 VFs
[19:31:24] [PASSED] 22 VFs
[19:31:24] [PASSED] 23 VFs
[19:31:24] [PASSED] 24 VFs
[19:31:24] [PASSED] 25 VFs
[19:31:24] [PASSED] 26 VFs
[19:31:24] [PASSED] 27 VFs
[19:31:24] [PASSED] 28 VFs
[19:31:24] [PASSED] 29 VFs
[19:31:24] [PASSED] 30 VFs
[19:31:24] [PASSED] 31 VFs
[19:31:24] [PASSED] 32 VFs
[19:31:24] [PASSED] 33 VFs
[19:31:24] [PASSED] 34 VFs
[19:31:24] [PASSED] 35 VFs
[19:31:24] [PASSED] 36 VFs
[19:31:25] [PASSED] 37 VFs
[19:31:25] [PASSED] 38 VFs
[19:31:25] [PASSED] 39 VFs
[19:31:25] [PASSED] 40 VFs
[19:31:25] [PASSED] 41 VFs
[19:31:25] [PASSED] 42 VFs
[19:31:25] [PASSED] 43 VFs
[19:31:25] [PASSED] 44 VFs
[19:31:25] [PASSED] 45 VFs
[19:31:25] [PASSED] 46 VFs
[19:31:25] [PASSED] 47 VFs
[19:31:25] [PASSED] 48 VFs
[19:31:25] [PASSED] 49 VFs
[19:31:25] [PASSED] 50 VFs
[19:31:25] [PASSED] 51 VFs
[19:31:25] [PASSED] 52 VFs
[19:31:25] [PASSED] 53 VFs
[19:31:25] [PASSED] 54 VFs
[19:31:25] [PASSED] 55 VFs
[19:31:25] [PASSED] 56 VFs
[19:31:25] [PASSED] 57 VFs
[19:31:25] [PASSED] 58 VFs
[19:31:25] [PASSED] 59 VFs
[19:31:25] [PASSED] 60 VFs
[19:31:25] [PASSED] 61 VFs
[19:31:25] [PASSED] 62 VFs
[19:31:25] [PASSED] 63 VFs
[19:31:25] ==================== [PASSED] fair_vram ====================
[19:31:25] ================== [PASSED] pf_gt_config ===================
[19:31:25] ===================== lmtt (1 subtest) =====================
[19:31:25] ======================== test_ops  =========================
[19:31:25] [PASSED] 2-level
[19:31:25] [PASSED] multi-level
[19:31:25] ==================== [PASSED] test_ops =====================
[19:31:25] ====================== [PASSED] lmtt =======================
[19:31:25] ================= pf_service (11 subtests) =================
[19:31:25] [PASSED] pf_negotiate_any
[19:31:25] [PASSED] pf_negotiate_base_match
[19:31:25] [PASSED] pf_negotiate_base_newer
[19:31:25] [PASSED] pf_negotiate_base_next
[19:31:25] [SKIPPED] pf_negotiate_base_older
[19:31:25] [PASSED] pf_negotiate_base_prev
[19:31:25] [PASSED] pf_negotiate_latest_match
[19:31:25] [PASSED] pf_negotiate_latest_newer
[19:31:25] [PASSED] pf_negotiate_latest_next
[19:31:25] [SKIPPED] pf_negotiate_latest_older
[19:31:25] [SKIPPED] pf_negotiate_latest_prev
[19:31:25] =================== [PASSED] pf_service ====================
[19:31:25] ================= xe_guc_g2g (2 subtests) ==================
[19:31:25] ============== xe_live_guc_g2g_kunit_default  ==============
[19:31:25] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[19:31:25] ============== xe_live_guc_g2g_kunit_allmem  ===============
[19:31:25] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[19:31:25] =================== [SKIPPED] xe_guc_g2g ===================
[19:31:25] =================== xe_mocs (2 subtests) ===================
[19:31:25] ================ xe_live_mocs_kernel_kunit  ================
[19:31:25] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[19:31:25] ================ xe_live_mocs_reset_kunit  =================
[19:31:25] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[19:31:25] ==================== [SKIPPED] xe_mocs =====================
[19:31:25] ================= xe_migrate (2 subtests) ==================
[19:31:25] ================= xe_migrate_sanity_kunit  =================
[19:31:25] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[19:31:25] ================== xe_validate_ccs_kunit  ==================
[19:31:25] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[19:31:25] =================== [SKIPPED] xe_migrate ===================
[19:31:25] ================== xe_dma_buf (1 subtest) ==================
[19:31:25] ==================== xe_dma_buf_kunit  =====================
[19:31:25] ================ [SKIPPED] xe_dma_buf_kunit ================
[19:31:25] =================== [SKIPPED] xe_dma_buf ===================
[19:31:25] ================= xe_bo_shrink (1 subtest) =================
[19:31:25] =================== xe_bo_shrink_kunit  ====================
[19:31:25] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[19:31:25] ================== [SKIPPED] xe_bo_shrink ==================
[19:31:25] ==================== xe_bo (2 subtests) ====================
[19:31:25] ================== xe_ccs_migrate_kunit  ===================
[19:31:25] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[19:31:25] ==================== xe_bo_evict_kunit  ====================
[19:31:25] =============== [SKIPPED] xe_bo_evict_kunit ================
[19:31:25] ===================== [SKIPPED] xe_bo ======================
[19:31:25] ==================== args (13 subtests) ====================
[19:31:25] [PASSED] count_args_test
[19:31:25] [PASSED] call_args_example
[19:31:25] [PASSED] call_args_test
[19:31:25] [PASSED] drop_first_arg_example
[19:31:25] [PASSED] drop_first_arg_test
[19:31:25] [PASSED] first_arg_example
[19:31:25] [PASSED] first_arg_test
[19:31:25] [PASSED] last_arg_example
[19:31:25] [PASSED] last_arg_test
[19:31:25] [PASSED] pick_arg_example
[19:31:25] [PASSED] if_args_example
[19:31:25] [PASSED] if_args_test
[19:31:25] [PASSED] sep_comma_example
[19:31:25] ====================== [PASSED] args =======================
[19:31:25] =================== xe_pci (3 subtests) ====================
[19:31:25] ==================== check_graphics_ip  ====================
[19:31:25] [PASSED] 12.00 Xe_LP
[19:31:25] [PASSED] 12.10 Xe_LP+
[19:31:25] [PASSED] 12.55 Xe_HPG
[19:31:25] [PASSED] 12.60 Xe_HPC
[19:31:25] [PASSED] 12.70 Xe_LPG
[19:31:25] [PASSED] 12.71 Xe_LPG
[19:31:25] [PASSED] 12.74 Xe_LPG+
[19:31:25] [PASSED] 20.01 Xe2_HPG
[19:31:25] [PASSED] 20.02 Xe2_HPG
[19:31:25] [PASSED] 20.04 Xe2_LPG
[19:31:25] [PASSED] 30.00 Xe3_LPG
[19:31:25] [PASSED] 30.01 Xe3_LPG
[19:31:25] [PASSED] 30.03 Xe3_LPG
[19:31:25] [PASSED] 30.04 Xe3_LPG
[19:31:25] [PASSED] 30.05 Xe3_LPG
[19:31:25] [PASSED] 35.10 Xe3p_LPG
[19:31:25] [PASSED] 35.11 Xe3p_XPC
[19:31:25] ================ [PASSED] check_graphics_ip ================
[19:31:25] ===================== check_media_ip  ======================
[19:31:25] [PASSED] 12.00 Xe_M
[19:31:25] [PASSED] 12.55 Xe_HPM
[19:31:25] [PASSED] 13.00 Xe_LPM+
[19:31:25] [PASSED] 13.01 Xe2_HPM
[19:31:25] [PASSED] 20.00 Xe2_LPM
[19:31:25] [PASSED] 30.00 Xe3_LPM
[19:31:25] [PASSED] 30.02 Xe3_LPM
[19:31:25] [PASSED] 35.00 Xe3p_LPM
[19:31:25] [PASSED] 35.03 Xe3p_HPM
[19:31:25] ================= [PASSED] check_media_ip ==================
[19:31:25] =================== check_platform_desc  ===================
[19:31:25] [PASSED] 0x9A60 (TIGERLAKE)
[19:31:25] [PASSED] 0x9A68 (TIGERLAKE)
[19:31:25] [PASSED] 0x9A70 (TIGERLAKE)
[19:31:25] [PASSED] 0x9A40 (TIGERLAKE)
[19:31:25] [PASSED] 0x9A49 (TIGERLAKE)
[19:31:25] [PASSED] 0x9A59 (TIGERLAKE)
[19:31:25] [PASSED] 0x9A78 (TIGERLAKE)
[19:31:25] [PASSED] 0x9AC0 (TIGERLAKE)
[19:31:25] [PASSED] 0x9AC9 (TIGERLAKE)
[19:31:25] [PASSED] 0x9AD9 (TIGERLAKE)
[19:31:25] [PASSED] 0x9AF8 (TIGERLAKE)
[19:31:25] [PASSED] 0x4C80 (ROCKETLAKE)
[19:31:25] [PASSED] 0x4C8A (ROCKETLAKE)
[19:31:25] [PASSED] 0x4C8B (ROCKETLAKE)
[19:31:25] [PASSED] 0x4C8C (ROCKETLAKE)
[19:31:25] [PASSED] 0x4C90 (ROCKETLAKE)
[19:31:25] [PASSED] 0x4C9A (ROCKETLAKE)
[19:31:25] [PASSED] 0x4680 (ALDERLAKE_S)
[19:31:25] [PASSED] 0x4682 (ALDERLAKE_S)
[19:31:25] [PASSED] 0x4688 (ALDERLAKE_S)
[19:31:25] [PASSED] 0x468A (ALDERLAKE_S)
[19:31:25] [PASSED] 0x468B (ALDERLAKE_S)
[19:31:25] [PASSED] 0x4690 (ALDERLAKE_S)
[19:31:25] [PASSED] 0x4692 (ALDERLAKE_S)
[19:31:25] [PASSED] 0x4693 (ALDERLAKE_S)
[19:31:25] [PASSED] 0x46A0 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46A1 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46A2 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46A3 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46A6 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46A8 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46AA (ALDERLAKE_P)
[19:31:25] [PASSED] 0x462A (ALDERLAKE_P)
[19:31:25] [PASSED] 0x4626 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x4628 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46B0 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46B1 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46B2 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46B3 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46C0 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46C1 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46C2 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46C3 (ALDERLAKE_P)
[19:31:25] [PASSED] 0x46D0 (ALDERLAKE_N)
[19:31:25] [PASSED] 0x46D1 (ALDERLAKE_N)
[19:31:25] [PASSED] 0x46D2 (ALDERLAKE_N)
[19:31:25] [PASSED] 0x46D3 (ALDERLAKE_N)
[19:31:25] [PASSED] 0x46D4 (ALDERLAKE_N)
[19:31:25] [PASSED] 0xA721 (ALDERLAKE_P)
[19:31:25] [PASSED] 0xA7A1 (ALDERLAKE_P)
[19:31:25] [PASSED] 0xA7A9 (ALDERLAKE_P)
[19:31:25] [PASSED] 0xA7AC (ALDERLAKE_P)
[19:31:25] [PASSED] 0xA7AD (ALDERLAKE_P)
[19:31:25] [PASSED] 0xA720 (ALDERLAKE_P)
[19:31:25] [PASSED] 0xA7A0 (ALDERLAKE_P)
[19:31:25] [PASSED] 0xA7A8 (ALDERLAKE_P)
[19:31:25] [PASSED] 0xA7AA (ALDERLAKE_P)
[19:31:25] [PASSED] 0xA7AB (ALDERLAKE_P)
[19:31:25] [PASSED] 0xA780 (ALDERLAKE_S)
[19:31:25] [PASSED] 0xA781 (ALDERLAKE_S)
[19:31:25] [PASSED] 0xA782 (ALDERLAKE_S)
[19:31:25] [PASSED] 0xA783 (ALDERLAKE_S)
[19:31:25] [PASSED] 0xA788 (ALDERLAKE_S)
[19:31:25] [PASSED] 0xA789 (ALDERLAKE_S)
[19:31:25] [PASSED] 0xA78A (ALDERLAKE_S)
[19:31:25] [PASSED] 0xA78B (ALDERLAKE_S)
[19:31:25] [PASSED] 0x4905 (DG1)
[19:31:25] [PASSED] 0x4906 (DG1)
[19:31:25] [PASSED] 0x4907 (DG1)
[19:31:25] [PASSED] 0x4908 (DG1)
[19:31:25] [PASSED] 0x4909 (DG1)
[19:31:25] [PASSED] 0x56C0 (DG2)
[19:31:25] [PASSED] 0x56C2 (DG2)
[19:31:25] [PASSED] 0x56C1 (DG2)
[19:31:25] [PASSED] 0x7D51 (METEORLAKE)
[19:31:25] [PASSED] 0x7DD1 (METEORLAKE)
[19:31:25] [PASSED] 0x7D41 (METEORLAKE)
[19:31:25] [PASSED] 0x7D67 (METEORLAKE)
[19:31:25] [PASSED] 0xB640 (METEORLAKE)
[19:31:25] [PASSED] 0x56A0 (DG2)
[19:31:25] [PASSED] 0x56A1 (DG2)
[19:31:25] [PASSED] 0x56A2 (DG2)
[19:31:25] [PASSED] 0x56BE (DG2)
[19:31:25] [PASSED] 0x56BF (DG2)
[19:31:25] [PASSED] 0x5690 (DG2)
[19:31:25] [PASSED] 0x5691 (DG2)
[19:31:25] [PASSED] 0x5692 (DG2)
[19:31:25] [PASSED] 0x56A5 (DG2)
[19:31:25] [PASSED] 0x56A6 (DG2)
[19:31:25] [PASSED] 0x56B0 (DG2)
[19:31:25] [PASSED] 0x56B1 (DG2)
[19:31:25] [PASSED] 0x56BA (DG2)
[19:31:25] [PASSED] 0x56BB (DG2)
[19:31:25] [PASSED] 0x56BC (DG2)
[19:31:25] [PASSED] 0x56BD (DG2)
[19:31:25] [PASSED] 0x5693 (DG2)
[19:31:25] [PASSED] 0x5694 (DG2)
[19:31:25] [PASSED] 0x5695 (DG2)
[19:31:25] [PASSED] 0x56A3 (DG2)
[19:31:25] [PASSED] 0x56A4 (DG2)
[19:31:25] [PASSED] 0x56B2 (DG2)
[19:31:25] [PASSED] 0x56B3 (DG2)
[19:31:25] [PASSED] 0x5696 (DG2)
[19:31:25] [PASSED] 0x5697 (DG2)
[19:31:25] [PASSED] 0xB69 (PVC)
[19:31:25] [PASSED] 0xB6E (PVC)
[19:31:25] [PASSED] 0xBD4 (PVC)
[19:31:25] [PASSED] 0xBD5 (PVC)
[19:31:25] [PASSED] 0xBD6 (PVC)
[19:31:25] [PASSED] 0xBD7 (PVC)
[19:31:25] [PASSED] 0xBD8 (PVC)
[19:31:25] [PASSED] 0xBD9 (PVC)
[19:31:25] [PASSED] 0xBDA (PVC)
[19:31:25] [PASSED] 0xBDB (PVC)
[19:31:25] [PASSED] 0xBE0 (PVC)
[19:31:25] [PASSED] 0xBE1 (PVC)
[19:31:25] [PASSED] 0xBE5 (PVC)
[19:31:25] [PASSED] 0x7D40 (METEORLAKE)
[19:31:25] [PASSED] 0x7D45 (METEORLAKE)
[19:31:25] [PASSED] 0x7D55 (METEORLAKE)
[19:31:25] [PASSED] 0x7D60 (METEORLAKE)
[19:31:25] [PASSED] 0x7DD5 (METEORLAKE)
[19:31:25] [PASSED] 0x6420 (LUNARLAKE)
[19:31:25] [PASSED] 0x64A0 (LUNARLAKE)
[19:31:25] [PASSED] 0x64B0 (LUNARLAKE)
[19:31:25] [PASSED] 0xE202 (BATTLEMAGE)
[19:31:25] [PASSED] 0xE209 (BATTLEMAGE)
[19:31:25] [PASSED] 0xE20B (BATTLEMAGE)
[19:31:25] [PASSED] 0xE20C (BATTLEMAGE)
[19:31:25] [PASSED] 0xE20D (BATTLEMAGE)
[19:31:25] [PASSED] 0xE210 (BATTLEMAGE)
[19:31:25] [PASSED] 0xE211 (BATTLEMAGE)
[19:31:25] [PASSED] 0xE212 (BATTLEMAGE)
[19:31:25] [PASSED] 0xE216 (BATTLEMAGE)
[19:31:25] [PASSED] 0xE220 (BATTLEMAGE)
[19:31:25] [PASSED] 0xE221 (BATTLEMAGE)
[19:31:25] [PASSED] 0xE222 (BATTLEMAGE)
[19:31:25] [PASSED] 0xE223 (BATTLEMAGE)
[19:31:25] [PASSED] 0xB080 (PANTHERLAKE)
[19:31:25] [PASSED] 0xB081 (PANTHERLAKE)
[19:31:25] [PASSED] 0xB082 (PANTHERLAKE)
[19:31:25] [PASSED] 0xB083 (PANTHERLAKE)
[19:31:25] [PASSED] 0xB084 (PANTHERLAKE)
[19:31:25] [PASSED] 0xB085 (PANTHERLAKE)
[19:31:25] [PASSED] 0xB086 (PANTHERLAKE)
[19:31:25] [PASSED] 0xB087 (PANTHERLAKE)
[19:31:25] [PASSED] 0xB08F (PANTHERLAKE)
[19:31:25] [PASSED] 0xB090 (PANTHERLAKE)
[19:31:25] [PASSED] 0xB0A0 (PANTHERLAKE)
[19:31:25] [PASSED] 0xB0B0 (PANTHERLAKE)
[19:31:25] [PASSED] 0xFD80 (PANTHERLAKE)
[19:31:25] [PASSED] 0xFD81 (PANTHERLAKE)
[19:31:25] [PASSED] 0xD740 (NOVALAKE_S)
[19:31:25] [PASSED] 0xD741 (NOVALAKE_S)
[19:31:25] [PASSED] 0xD742 (NOVALAKE_S)
[19:31:25] [PASSED] 0xD743 (NOVALAKE_S)
[19:31:25] [PASSED] 0xD744 (NOVALAKE_S)
[19:31:25] [PASSED] 0xD745 (NOVALAKE_S)
[19:31:25] [PASSED] 0x674C (CRESCENTISLAND)
[19:31:25] [PASSED] 0xD750 (NOVALAKE_P)
[19:31:25] [PASSED] 0xD751 (NOVALAKE_P)
[19:31:25] [PASSED] 0xD752 (NOVALAKE_P)
[19:31:25] [PASSED] 0xD753 (NOVALAKE_P)
[19:31:25] [PASSED] 0xD754 (NOVALAKE_P)
[19:31:25] [PASSED] 0xD755 (NOVALAKE_P)
[19:31:25] [PASSED] 0xD756 (NOVALAKE_P)
[19:31:25] [PASSED] 0xD757 (NOVALAKE_P)
[19:31:25] [PASSED] 0xD75F (NOVALAKE_P)
[19:31:25] =============== [PASSED] check_platform_desc ===============
[19:31:25] ===================== [PASSED] xe_pci ======================
[19:31:25] =================== xe_rtp (2 subtests) ====================
[19:31:25] =============== xe_rtp_process_to_sr_tests  ================
[19:31:25] [PASSED] coalesce-same-reg
[19:31:25] [PASSED] no-match-no-add
[19:31:25] [PASSED] match-or
[19:31:25] [PASSED] match-or-xfail
[19:31:25] [PASSED] no-match-no-add-multiple-rules
[19:31:25] [PASSED] two-regs-two-entries
[19:31:25] [PASSED] clr-one-set-other
[19:31:25] [PASSED] set-field
[19:31:25] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[19:31:25] [PASSED] conflict-not-disjoint
[19:31:25] [PASSED] conflict-reg-type
[19:31:25] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[19:31:25] ================== xe_rtp_process_tests  ===================
[19:31:25] [PASSED] active1
[19:31:25] [PASSED] active2
[19:31:25] [PASSED] active-inactive
[19:31:25] [PASSED] inactive-active
[19:31:25] [PASSED] inactive-1st_or_active-inactive
[19:31:25] [PASSED] inactive-2nd_or_active-inactive
[19:31:25] [PASSED] inactive-last_or_active-inactive
[19:31:25] [PASSED] inactive-no_or_active-inactive
[19:31:25] ============== [PASSED] xe_rtp_process_tests ===============
[19:31:25] ===================== [PASSED] xe_rtp ======================
[19:31:25] ==================== xe_wa (1 subtest) =====================
[19:31:25] ======================== xe_wa_gt  =========================
[19:31:25] [PASSED] TIGERLAKE B0
[19:31:25] [PASSED] DG1 A0
[19:31:25] [PASSED] DG1 B0
[19:31:25] [PASSED] ALDERLAKE_S A0
[19:31:25] [PASSED] ALDERLAKE_S B0
[19:31:25] [PASSED] ALDERLAKE_S C0
[19:31:25] [PASSED] ALDERLAKE_S D0
[19:31:25] [PASSED] ALDERLAKE_P A0
[19:31:25] [PASSED] ALDERLAKE_P B0
[19:31:25] [PASSED] ALDERLAKE_P C0
[19:31:25] [PASSED] ALDERLAKE_S RPLS D0
[19:31:25] [PASSED] ALDERLAKE_P RPLU E0
[19:31:25] [PASSED] DG2 G10 C0
[19:31:25] [PASSED] DG2 G11 B1
[19:31:25] [PASSED] DG2 G12 A1
[19:31:25] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:31:25] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[19:31:25] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[19:31:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[19:31:25] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[19:31:25] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[19:31:25] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[19:31:25] ==================== [PASSED] xe_wa_gt =====================
[19:31:25] ====================== [PASSED] xe_wa ======================
[19:31:25] ============================================================
[19:31:25] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[19:31:25] Elapsed time: 35.449s total, 4.263s configuring, 30.569s building, 0.604s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[19:31:25] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:31:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:31:51] Starting KUnit Kernel (1/1)...
[19:31:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:31:51] ============ drm_test_pick_cmdline (2 subtests) ============
[19:31:51] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[19:31:51] =============== drm_test_pick_cmdline_named  ===============
[19:31:51] [PASSED] NTSC
[19:31:51] [PASSED] NTSC-J
[19:31:51] [PASSED] PAL
[19:31:51] [PASSED] PAL-M
[19:31:51] =========== [PASSED] drm_test_pick_cmdline_named ===========
[19:31:51] ============== [PASSED] drm_test_pick_cmdline ==============
[19:31:51] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[19:31:51] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[19:31:51] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[19:31:51] =========== drm_validate_clone_mode (2 subtests) ===========
[19:31:51] ============== drm_test_check_in_clone_mode  ===============
[19:31:51] [PASSED] in_clone_mode
[19:31:51] [PASSED] not_in_clone_mode
[19:31:51] ========== [PASSED] drm_test_check_in_clone_mode ===========
[19:31:51] =============== drm_test_check_valid_clones  ===============
[19:31:51] [PASSED] not_in_clone_mode
[19:31:51] [PASSED] valid_clone
[19:31:51] [PASSED] invalid_clone
[19:31:51] =========== [PASSED] drm_test_check_valid_clones ===========
[19:31:51] ============= [PASSED] drm_validate_clone_mode =============
[19:31:51] ============= drm_validate_modeset (1 subtest) =============
[19:31:51] [PASSED] drm_test_check_connector_changed_modeset
[19:31:51] ============== [PASSED] drm_validate_modeset ===============
[19:31:51] ====== drm_test_bridge_get_current_state (2 subtests) ======
[19:31:51] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[19:31:51] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[19:31:51] ======== [PASSED] drm_test_bridge_get_current_state ========
[19:31:51] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[19:31:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[19:31:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[19:31:51] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[19:31:51] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[19:31:51] ============== drm_bridge_alloc (2 subtests) ===============
[19:31:51] [PASSED] drm_test_drm_bridge_alloc_basic
[19:31:51] [PASSED] drm_test_drm_bridge_alloc_get_put
[19:31:51] ================ [PASSED] drm_bridge_alloc =================
[19:31:51] ============= drm_cmdline_parser (40 subtests) =============
[19:31:51] [PASSED] drm_test_cmdline_force_d_only
[19:31:51] [PASSED] drm_test_cmdline_force_D_only_dvi
[19:31:51] [PASSED] drm_test_cmdline_force_D_only_hdmi
[19:31:51] [PASSED] drm_test_cmdline_force_D_only_not_digital
[19:31:51] [PASSED] drm_test_cmdline_force_e_only
[19:31:51] [PASSED] drm_test_cmdline_res
[19:31:51] [PASSED] drm_test_cmdline_res_vesa
[19:31:51] [PASSED] drm_test_cmdline_res_vesa_rblank
[19:31:51] [PASSED] drm_test_cmdline_res_rblank
[19:31:51] [PASSED] drm_test_cmdline_res_bpp
[19:31:51] [PASSED] drm_test_cmdline_res_refresh
[19:31:51] [PASSED] drm_test_cmdline_res_bpp_refresh
[19:31:51] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[19:31:51] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[19:31:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[19:31:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[19:31:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[19:31:51] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[19:31:51] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[19:31:51] [PASSED] drm_test_cmdline_res_margins_force_on
[19:31:51] [PASSED] drm_test_cmdline_res_vesa_margins
[19:31:51] [PASSED] drm_test_cmdline_name
[19:31:51] [PASSED] drm_test_cmdline_name_bpp
[19:31:51] [PASSED] drm_test_cmdline_name_option
[19:31:51] [PASSED] drm_test_cmdline_name_bpp_option
[19:31:51] [PASSED] drm_test_cmdline_rotate_0
[19:31:51] [PASSED] drm_test_cmdline_rotate_90
[19:31:51] [PASSED] drm_test_cmdline_rotate_180
[19:31:51] [PASSED] drm_test_cmdline_rotate_270
[19:31:51] [PASSED] drm_test_cmdline_hmirror
[19:31:51] [PASSED] drm_test_cmdline_vmirror
[19:31:51] [PASSED] drm_test_cmdline_margin_options
[19:31:51] [PASSED] drm_test_cmdline_multiple_options
[19:31:51] [PASSED] drm_test_cmdline_bpp_extra_and_option
[19:31:51] [PASSED] drm_test_cmdline_extra_and_option
[19:31:51] [PASSED] drm_test_cmdline_freestanding_options
[19:31:51] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[19:31:51] [PASSED] drm_test_cmdline_panel_orientation
[19:31:51] ================ drm_test_cmdline_invalid  =================
[19:31:51] [PASSED] margin_only
[19:31:51] [PASSED] interlace_only
[19:31:51] [PASSED] res_missing_x
[19:31:51] [PASSED] res_missing_y
[19:31:51] [PASSED] res_bad_y
[19:31:51] [PASSED] res_missing_y_bpp
[19:31:51] [PASSED] res_bad_bpp
[19:31:51] [PASSED] res_bad_refresh
[19:31:51] [PASSED] res_bpp_refresh_force_on_off
[19:31:51] [PASSED] res_invalid_mode
[19:31:51] [PASSED] res_bpp_wrong_place_mode
[19:31:51] [PASSED] name_bpp_refresh
[19:31:51] [PASSED] name_refresh
[19:31:51] [PASSED] name_refresh_wrong_mode
[19:31:51] [PASSED] name_refresh_invalid_mode
[19:31:51] [PASSED] rotate_multiple
[19:31:51] [PASSED] rotate_invalid_val
[19:31:51] [PASSED] rotate_truncated
[19:31:51] [PASSED] invalid_option
[19:31:51] [PASSED] invalid_tv_option
[19:31:51] [PASSED] truncated_tv_option
[19:31:51] ============ [PASSED] drm_test_cmdline_invalid =============
[19:31:51] =============== drm_test_cmdline_tv_options  ===============
[19:31:51] [PASSED] NTSC
[19:31:51] [PASSED] NTSC_443
[19:31:51] [PASSED] NTSC_J
[19:31:51] [PASSED] PAL
[19:31:51] [PASSED] PAL_M
[19:31:51] [PASSED] PAL_N
[19:31:51] [PASSED] SECAM
[19:31:51] [PASSED] MONO_525
[19:31:51] [PASSED] MONO_625
[19:31:51] =========== [PASSED] drm_test_cmdline_tv_options ===========
[19:31:51] =============== [PASSED] drm_cmdline_parser ================
[19:31:51] ========== drmm_connector_hdmi_init (20 subtests) ==========
[19:31:51] [PASSED] drm_test_connector_hdmi_init_valid
[19:31:51] [PASSED] drm_test_connector_hdmi_init_bpc_8
[19:31:51] [PASSED] drm_test_connector_hdmi_init_bpc_10
[19:31:51] [PASSED] drm_test_connector_hdmi_init_bpc_12
[19:31:51] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[19:31:51] [PASSED] drm_test_connector_hdmi_init_bpc_null
[19:31:51] [PASSED] drm_test_connector_hdmi_init_formats_empty
[19:31:51] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[19:31:51] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[19:31:51] [PASSED] supported_formats=0x9 yuv420_allowed=1
[19:31:51] [PASSED] supported_formats=0x9 yuv420_allowed=0
[19:31:51] [PASSED] supported_formats=0x5 yuv420_allowed=1
[19:31:51] [PASSED] supported_formats=0x5 yuv420_allowed=0
[19:31:51] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:31:51] [PASSED] drm_test_connector_hdmi_init_null_ddc
[19:31:51] [PASSED] drm_test_connector_hdmi_init_null_product
[19:31:51] [PASSED] drm_test_connector_hdmi_init_null_vendor
[19:31:51] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[19:31:51] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[19:31:51] [PASSED] drm_test_connector_hdmi_init_product_valid
[19:31:51] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[19:31:51] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[19:31:51] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[19:31:51] ========= drm_test_connector_hdmi_init_type_valid  =========
[19:31:51] [PASSED] HDMI-A
[19:31:51] [PASSED] HDMI-B
[19:31:51] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[19:31:51] ======== drm_test_connector_hdmi_init_type_invalid  ========
[19:31:51] [PASSED] Unknown
[19:31:51] [PASSED] VGA
[19:31:51] [PASSED] DVI-I
[19:31:51] [PASSED] DVI-D
[19:31:51] [PASSED] DVI-A
[19:31:51] [PASSED] Composite
[19:31:51] [PASSED] SVIDEO
[19:31:51] [PASSED] LVDS
[19:31:51] [PASSED] Component
[19:31:51] [PASSED] DIN
[19:31:51] [PASSED] DP
[19:31:51] [PASSED] TV
[19:31:51] [PASSED] eDP
[19:31:51] [PASSED] Virtual
[19:31:51] [PASSED] DSI
[19:31:51] [PASSED] DPI
[19:31:51] [PASSED] Writeback
[19:31:51] [PASSED] SPI
[19:31:51] [PASSED] USB
[19:31:51] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[19:31:51] ============ [PASSED] drmm_connector_hdmi_init =============
[19:31:51] ============= drmm_connector_init (3 subtests) =============
[19:31:51] [PASSED] drm_test_drmm_connector_init
[19:31:51] [PASSED] drm_test_drmm_connector_init_null_ddc
[19:31:51] ========= drm_test_drmm_connector_init_type_valid  =========
[19:31:51] [PASSED] Unknown
[19:31:51] [PASSED] VGA
[19:31:51] [PASSED] DVI-I
[19:31:51] [PASSED] DVI-D
[19:31:51] [PASSED] DVI-A
[19:31:51] [PASSED] Composite
[19:31:51] [PASSED] SVIDEO
[19:31:51] [PASSED] LVDS
[19:31:51] [PASSED] Component
[19:31:51] [PASSED] DIN
[19:31:51] [PASSED] DP
[19:31:51] [PASSED] HDMI-A
[19:31:51] [PASSED] HDMI-B
[19:31:51] [PASSED] TV
[19:31:51] [PASSED] eDP
[19:31:51] [PASSED] Virtual
[19:31:51] [PASSED] DSI
[19:31:51] [PASSED] DPI
[19:31:51] [PASSED] Writeback
[19:31:51] [PASSED] SPI
[19:31:51] [PASSED] USB
[19:31:51] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[19:31:51] =============== [PASSED] drmm_connector_init ===============
[19:31:51] ========= drm_connector_dynamic_init (6 subtests) ==========
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_init
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_init_properties
[19:31:51] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[19:31:51] [PASSED] Unknown
[19:31:51] [PASSED] VGA
[19:31:51] [PASSED] DVI-I
[19:31:51] [PASSED] DVI-D
[19:31:51] [PASSED] DVI-A
[19:31:51] [PASSED] Composite
[19:31:51] [PASSED] SVIDEO
[19:31:51] [PASSED] LVDS
[19:31:51] [PASSED] Component
[19:31:51] [PASSED] DIN
[19:31:51] [PASSED] DP
[19:31:51] [PASSED] HDMI-A
[19:31:51] [PASSED] HDMI-B
[19:31:51] [PASSED] TV
[19:31:51] [PASSED] eDP
[19:31:51] [PASSED] Virtual
[19:31:51] [PASSED] DSI
[19:31:51] [PASSED] DPI
[19:31:51] [PASSED] Writeback
[19:31:51] [PASSED] SPI
[19:31:51] [PASSED] USB
[19:31:51] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[19:31:51] ======== drm_test_drm_connector_dynamic_init_name  =========
[19:31:51] [PASSED] Unknown
[19:31:51] [PASSED] VGA
[19:31:51] [PASSED] DVI-I
[19:31:51] [PASSED] DVI-D
[19:31:51] [PASSED] DVI-A
[19:31:51] [PASSED] Composite
[19:31:51] [PASSED] SVIDEO
[19:31:51] [PASSED] LVDS
[19:31:51] [PASSED] Component
[19:31:51] [PASSED] DIN
[19:31:51] [PASSED] DP
[19:31:51] [PASSED] HDMI-A
[19:31:51] [PASSED] HDMI-B
[19:31:51] [PASSED] TV
[19:31:51] [PASSED] eDP
[19:31:51] [PASSED] Virtual
[19:31:51] [PASSED] DSI
[19:31:51] [PASSED] DPI
[19:31:51] [PASSED] Writeback
[19:31:51] [PASSED] SPI
[19:31:51] [PASSED] USB
[19:31:51] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[19:31:51] =========== [PASSED] drm_connector_dynamic_init ============
[19:31:51] ==== drm_connector_dynamic_register_early (4 subtests) =====
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[19:31:51] ====== [PASSED] drm_connector_dynamic_register_early =======
[19:31:51] ======= drm_connector_dynamic_register (7 subtests) ========
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[19:31:51] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[19:31:51] ========= [PASSED] drm_connector_dynamic_register ==========
[19:31:51] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[19:31:51] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[19:31:51] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[19:31:51] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[19:31:51] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[19:31:51] ========== drm_test_get_tv_mode_from_name_valid  ===========
[19:31:51] [PASSED] NTSC
[19:31:51] [PASSED] NTSC-443
[19:31:51] [PASSED] NTSC-J
[19:31:51] [PASSED] PAL
[19:31:51] [PASSED] PAL-M
[19:31:51] [PASSED] PAL-N
[19:31:51] [PASSED] SECAM
[19:31:51] [PASSED] Mono
[19:31:51] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[19:31:51] [PASSED] drm_test_get_tv_mode_from_name_truncated
[19:31:51] ============ [PASSED] drm_get_tv_mode_from_name ============
[19:31:51] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[19:31:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[19:31:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[19:31:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[19:31:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[19:31:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[19:31:51] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[19:31:51] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[19:31:51] [PASSED] VIC 96
[19:31:51] [PASSED] VIC 97
[19:31:51] [PASSED] VIC 101
[19:31:51] [PASSED] VIC 102
[19:31:51] [PASSED] VIC 106
[19:31:51] [PASSED] VIC 107
[19:31:51] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[19:31:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[19:31:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[19:31:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[19:31:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[19:31:51] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[19:31:51] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[19:31:51] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[19:31:51] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[19:31:51] [PASSED] Automatic
[19:31:51] [PASSED] Full
[19:31:51] [PASSED] Limited 16:235
[19:31:51] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[19:31:51] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[19:31:51] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[19:31:51] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[19:31:51] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[19:31:51] [PASSED] RGB
[19:31:51] [PASSED] YUV 4:2:0
[19:31:51] [PASSED] YUV 4:2:2
[19:31:51] [PASSED] YUV 4:4:4
[19:31:51] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[19:31:51] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[19:31:51] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[19:31:51] ============= drm_damage_helper (21 subtests) ==============
[19:31:51] [PASSED] drm_test_damage_iter_no_damage
[19:31:51] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[19:31:51] [PASSED] drm_test_damage_iter_no_damage_src_moved
[19:31:51] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[19:31:51] [PASSED] drm_test_damage_iter_no_damage_not_visible
[19:31:51] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[19:31:51] [PASSED] drm_test_damage_iter_no_damage_no_fb
[19:31:51] [PASSED] drm_test_damage_iter_simple_damage
[19:31:51] [PASSED] drm_test_damage_iter_single_damage
[19:31:51] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[19:31:51] [PASSED] drm_test_damage_iter_single_damage_outside_src
[19:31:51] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[19:31:51] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[19:31:51] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[19:31:51] [PASSED] drm_test_damage_iter_single_damage_src_moved
[19:31:51] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[19:31:51] [PASSED] drm_test_damage_iter_damage
[19:31:51] [PASSED] drm_test_damage_iter_damage_one_intersect
[19:31:51] [PASSED] drm_test_damage_iter_damage_one_outside
[19:31:51] [PASSED] drm_test_damage_iter_damage_src_moved
[19:31:51] [PASSED] drm_test_damage_iter_damage_not_visible
[19:31:51] ================ [PASSED] drm_damage_helper ================
[19:31:51] ============== drm_dp_mst_helper (3 subtests) ==============
[19:31:51] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[19:31:51] [PASSED] Clock 154000 BPP 30 DSC disabled
[19:31:51] [PASSED] Clock 234000 BPP 30 DSC disabled
[19:31:51] [PASSED] Clock 297000 BPP 24 DSC disabled
[19:31:51] [PASSED] Clock 332880 BPP 24 DSC enabled
[19:31:51] [PASSED] Clock 324540 BPP 24 DSC enabled
[19:31:51] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[19:31:51] ============== drm_test_dp_mst_calc_pbn_div  ===============
[19:31:51] [PASSED] Link rate 2000000 lane count 4
[19:31:51] [PASSED] Link rate 2000000 lane count 2
[19:31:51] [PASSED] Link rate 2000000 lane count 1
[19:31:51] [PASSED] Link rate 1350000 lane count 4
[19:31:51] [PASSED] Link rate 1350000 lane count 2
[19:31:51] [PASSED] Link rate 1350000 lane count 1
[19:31:51] [PASSED] Link rate 1000000 lane count 4
[19:31:51] [PASSED] Link rate 1000000 lane count 2
[19:31:51] [PASSED] Link rate 1000000 lane count 1
[19:31:51] [PASSED] Link rate 810000 lane count 4
[19:31:51] [PASSED] Link rate 810000 lane count 2
[19:31:51] [PASSED] Link rate 810000 lane count 1
[19:31:51] [PASSED] Link rate 540000 lane count 4
[19:31:51] [PASSED] Link rate 540000 lane count 2
[19:31:51] [PASSED] Link rate 540000 lane count 1
[19:31:51] [PASSED] Link rate 270000 lane count 4
[19:31:51] [PASSED] Link rate 270000 lane count 2
[19:31:51] [PASSED] Link rate 270000 lane count 1
[19:31:51] [PASSED] Link rate 162000 lane count 4
[19:31:51] [PASSED] Link rate 162000 lane count 2
[19:31:51] [PASSED] Link rate 162000 lane count 1
[19:31:51] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[19:31:51] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[19:31:51] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[19:31:51] [PASSED] DP_POWER_UP_PHY with port number
[19:31:51] [PASSED] DP_POWER_DOWN_PHY with port number
[19:31:51] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[19:31:51] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[19:31:51] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[19:31:51] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[19:31:51] [PASSED] DP_QUERY_PAYLOAD with port number
[19:31:51] [PASSED] DP_QUERY_PAYLOAD with VCPI
[19:31:51] [PASSED] DP_REMOTE_DPCD_READ with port number
[19:31:51] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[19:31:51] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[19:31:51] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[19:31:51] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[19:31:51] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[19:31:51] [PASSED] DP_REMOTE_I2C_READ with port number
[19:31:51] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[19:31:51] [PASSED] DP_REMOTE_I2C_READ with transactions array
[19:31:51] [PASSED] DP_REMOTE_I2C_WRITE with port number
[19:31:51] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[19:31:51] [PASSED] DP_REMOTE_I2C_WRITE with data array
[19:31:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[19:31:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[19:31:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[19:31:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[19:31:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[19:31:51] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[19:31:51] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[19:31:51] ================ [PASSED] drm_dp_mst_helper ================
[19:31:51] ================== drm_exec (7 subtests) ===================
[19:31:51] [PASSED] sanitycheck
[19:31:51] [PASSED] test_lock
[19:31:51] [PASSED] test_lock_unlock
[19:31:51] [PASSED] test_duplicates
[19:31:51] [PASSED] test_prepare
[19:31:51] [PASSED] test_prepare_array
[19:31:51] [PASSED] test_multiple_loops
[19:31:51] ==================== [PASSED] drm_exec =====================
[19:31:51] =========== drm_format_helper_test (17 subtests) ===========
[19:31:51] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[19:31:51] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[19:31:51] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[19:31:51] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[19:31:51] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[19:31:51] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[19:31:51] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[19:31:51] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[19:31:51] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[19:31:51] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[19:31:51] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[19:31:51] ============== drm_test_fb_xrgb8888_to_mono  ===============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[19:31:51] ==================== drm_test_fb_swab  =====================
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ================ [PASSED] drm_test_fb_swab =================
[19:31:51] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[19:31:51] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[19:31:51] [PASSED] single_pixel_source_buffer
[19:31:51] [PASSED] single_pixel_clip_rectangle
[19:31:51] [PASSED] well_known_colors
[19:31:51] [PASSED] destination_pitch
[19:31:51] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[19:31:51] ================= drm_test_fb_clip_offset  =================
[19:31:51] [PASSED] pass through
[19:31:51] [PASSED] horizontal offset
[19:31:51] [PASSED] vertical offset
[19:31:51] [PASSED] horizontal and vertical offset
[19:31:51] [PASSED] horizontal offset (custom pitch)
[19:31:51] [PASSED] vertical offset (custom pitch)
[19:31:51] [PASSED] horizontal and vertical offset (custom pitch)
[19:31:51] ============= [PASSED] drm_test_fb_clip_offset =============
[19:31:51] =================== drm_test_fb_memcpy  ====================
[19:31:51] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[19:31:51] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[19:31:51] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[19:31:51] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[19:31:51] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[19:31:51] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[19:31:51] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[19:31:51] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[19:31:51] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[19:31:51] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[19:31:51] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[19:31:51] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[19:31:51] =============== [PASSED] drm_test_fb_memcpy ================
[19:31:51] ============= [PASSED] drm_format_helper_test ==============
[19:31:51] ================= drm_format (18 subtests) =================
[19:31:51] [PASSED] drm_test_format_block_width_invalid
[19:31:51] [PASSED] drm_test_format_block_width_one_plane
[19:31:51] [PASSED] drm_test_format_block_width_two_plane
[19:31:51] [PASSED] drm_test_format_block_width_three_plane
[19:31:51] [PASSED] drm_test_format_block_width_tiled
[19:31:51] [PASSED] drm_test_format_block_height_invalid
[19:31:51] [PASSED] drm_test_format_block_height_one_plane
[19:31:51] [PASSED] drm_test_format_block_height_two_plane
[19:31:51] [PASSED] drm_test_format_block_height_three_plane
[19:31:51] [PASSED] drm_test_format_block_height_tiled
[19:31:51] [PASSED] drm_test_format_min_pitch_invalid
[19:31:51] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[19:31:51] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[19:31:51] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[19:31:51] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[19:31:51] [PASSED] drm_test_format_min_pitch_two_plane
[19:31:51] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[19:31:51] [PASSED] drm_test_format_min_pitch_tiled
[19:31:51] =================== [PASSED] drm_format ====================
[19:31:51] ============== drm_framebuffer (10 subtests) ===============
[19:31:51] ========== drm_test_framebuffer_check_src_coords  ==========
[19:31:51] [PASSED] Success: source fits into fb
[19:31:51] [PASSED] Fail: overflowing fb with x-axis coordinate
[19:31:51] [PASSED] Fail: overflowing fb with y-axis coordinate
[19:31:51] [PASSED] Fail: overflowing fb with source width
[19:31:51] [PASSED] Fail: overflowing fb with source height
[19:31:51] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[19:31:51] [PASSED] drm_test_framebuffer_cleanup
[19:31:51] =============== drm_test_framebuffer_create  ===============
[19:31:51] [PASSED] ABGR8888 normal sizes
[19:31:51] [PASSED] ABGR8888 max sizes
[19:31:51] [PASSED] ABGR8888 pitch greater than min required
[19:31:51] [PASSED] ABGR8888 pitch less than min required
[19:31:51] [PASSED] ABGR8888 Invalid width
[19:31:51] [PASSED] ABGR8888 Invalid buffer handle
[19:31:51] [PASSED] No pixel format
[19:31:51] [PASSED] ABGR8888 Width 0
[19:31:51] [PASSED] ABGR8888 Height 0
[19:31:51] [PASSED] ABGR8888 Out of bound height * pitch combination
[19:31:51] [PASSED] ABGR8888 Large buffer offset
[19:31:51] [PASSED] ABGR8888 Buffer offset for inexistent plane
[19:31:51] [PASSED] ABGR8888 Invalid flag
[19:31:51] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[19:31:51] [PASSED] ABGR8888 Valid buffer modifier
[19:31:51] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[19:31:51] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[19:31:51] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[19:31:51] [PASSED] NV12 Normal sizes
[19:31:51] [PASSED] NV12 Max sizes
[19:31:51] [PASSED] NV12 Invalid pitch
[19:31:51] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[19:31:51] [PASSED] NV12 different  modifier per-plane
[19:31:51] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[19:31:51] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[19:31:51] [PASSED] NV12 Modifier for inexistent plane
[19:31:51] [PASSED] NV12 Handle for inexistent plane
[19:31:51] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[19:31:51] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[19:31:51] [PASSED] YVU420 Normal sizes
[19:31:51] [PASSED] YVU420 Max sizes
[19:31:51] [PASSED] YVU420 Invalid pitch
[19:31:51] [PASSED] YVU420 Different pitches
[19:31:51] [PASSED] YVU420 Different buffer offsets/pitches
[19:31:51] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[19:31:51] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[19:31:51] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[19:31:51] [PASSED] YVU420 Valid modifier
[19:31:51] [PASSED] YVU420 Different modifiers per plane
[19:31:51] [PASSED] YVU420 Modifier for inexistent plane
[19:31:51] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[19:31:51] [PASSED] X0L2 Normal sizes
[19:31:51] [PASSED] X0L2 Max sizes
[19:31:51] [PASSED] X0L2 Invalid pitch
[19:31:51] [PASSED] X0L2 Pitch greater than minimum required
[19:31:51] [PASSED] X0L2 Handle for inexistent plane
[19:31:51] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[19:31:51] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[19:31:51] [PASSED] X0L2 Valid modifier
[19:31:51] [PASSED] X0L2 Modifier for inexistent plane
[19:31:51] =========== [PASSED] drm_test_framebuffer_create ===========
[19:31:51] [PASSED] drm_test_framebuffer_free
[19:31:51] [PASSED] drm_test_framebuffer_init
[19:31:51] [PASSED] drm_test_framebuffer_init_bad_format
[19:31:51] [PASSED] drm_test_framebuffer_init_dev_mismatch
[19:31:51] [PASSED] drm_test_framebuffer_lookup
[19:31:51] [PASSED] drm_test_framebuffer_lookup_inexistent
[19:31:51] [PASSED] drm_test_framebuffer_modifiers_not_supported
[19:31:51] ================= [PASSED] drm_framebuffer =================
[19:31:51] ================ drm_gem_shmem (8 subtests) ================
[19:31:51] [PASSED] drm_gem_shmem_test_obj_create
[19:31:51] [PASSED] drm_gem_shmem_test_obj_create_private
[19:31:51] [PASSED] drm_gem_shmem_test_pin_pages
[19:31:51] [PASSED] drm_gem_shmem_test_vmap
[19:31:51] [PASSED] drm_gem_shmem_test_get_sg_table
[19:31:51] [PASSED] drm_gem_shmem_test_get_pages_sgt
[19:31:51] [PASSED] drm_gem_shmem_test_madvise
[19:31:51] [PASSED] drm_gem_shmem_test_purge
[19:31:51] ================== [PASSED] drm_gem_shmem ==================
[19:31:51] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[19:31:51] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[19:31:51] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[19:31:51] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[19:31:51] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[19:31:51] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[19:31:51] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[19:31:51] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[19:31:51] [PASSED] Automatic
[19:31:51] [PASSED] Full
[19:31:51] [PASSED] Limited 16:235
[19:31:51] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[19:31:51] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[19:31:51] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[19:31:51] [PASSED] drm_test_check_disable_connector
[19:31:51] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[19:31:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[19:31:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[19:31:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[19:31:51] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[19:31:51] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[19:31:51] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[19:31:51] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[19:31:51] [PASSED] drm_test_check_output_bpc_dvi
[19:31:51] [PASSED] drm_test_check_output_bpc_format_vic_1
[19:31:51] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[19:31:51] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[19:31:51] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[19:31:51] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[19:31:51] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[19:31:51] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[19:31:51] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[19:31:51] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[19:31:51] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[19:31:51] [PASSED] drm_test_check_broadcast_rgb_value
[19:31:51] [PASSED] drm_test_check_bpc_8_value
[19:31:51] [PASSED] drm_test_check_bpc_10_value
[19:31:51] [PASSED] drm_test_check_bpc_12_value
[19:31:51] [PASSED] drm_test_check_format_value
[19:31:51] [PASSED] drm_test_check_tmds_char_value
[19:31:51] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[19:31:51] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[19:31:51] [PASSED] drm_test_check_mode_valid
[19:31:51] [PASSED] drm_test_check_mode_valid_reject
[19:31:51] [PASSED] drm_test_check_mode_valid_reject_rate
[19:31:51] [PASSED] drm_test_check_mode_valid_reject_max_clock
[19:31:51] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[19:31:51] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[19:31:51] [PASSED] drm_test_check_infoframes
[19:31:51] [PASSED] drm_test_check_reject_avi_infoframe
[19:31:51] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[19:31:51] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[19:31:51] [PASSED] drm_test_check_reject_audio_infoframe
[19:31:51] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[19:31:51] ================= drm_managed (2 subtests) =================
[19:31:51] [PASSED] drm_test_managed_release_action
[19:31:51] [PASSED] drm_test_managed_run_action
[19:31:51] =================== [PASSED] drm_managed ===================
[19:31:51] =================== drm_mm (6 subtests) ====================
[19:31:51] [PASSED] drm_test_mm_init
[19:31:51] [PASSED] drm_test_mm_debug
[19:31:51] [PASSED] drm_test_mm_align32
[19:31:51] [PASSED] drm_test_mm_align64
[19:31:51] [PASSED] drm_test_mm_lowest
[19:31:51] [PASSED] drm_test_mm_highest
[19:31:51] ===================== [PASSED] drm_mm ======================
[19:31:51] ============= drm_modes_analog_tv (5 subtests) =============
[19:31:51] [PASSED] drm_test_modes_analog_tv_mono_576i
[19:31:51] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[19:31:51] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[19:31:51] [PASSED] drm_test_modes_analog_tv_pal_576i
[19:31:51] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[19:31:51] =============== [PASSED] drm_modes_analog_tv ===============
[19:31:51] ============== drm_plane_helper (2 subtests) ===============
[19:31:51] =============== drm_test_check_plane_state  ================
[19:31:51] [PASSED] clipping_simple
[19:31:51] [PASSED] clipping_rotate_reflect
[19:31:51] [PASSED] positioning_simple
[19:31:51] [PASSED] upscaling
[19:31:51] [PASSED] downscaling
[19:31:51] [PASSED] rounding1
[19:31:51] [PASSED] rounding2
[19:31:51] [PASSED] rounding3
[19:31:51] [PASSED] rounding4
[19:31:51] =========== [PASSED] drm_test_check_plane_state ============
[19:31:51] =========== drm_test_check_invalid_plane_state  ============
[19:31:51] [PASSED] positioning_invalid
[19:31:51] [PASSED] upscaling_invalid
[19:31:51] [PASSED] downscaling_invalid
[19:31:51] ======= [PASSED] drm_test_check_invalid_plane_state ========
[19:31:51] ================ [PASSED] drm_plane_helper =================
[19:31:51] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[19:31:51] ====== drm_test_connector_helper_tv_get_modes_check  =======
[19:31:51] [PASSED] None
[19:31:51] [PASSED] PAL
[19:31:51] [PASSED] NTSC
[19:31:51] [PASSED] Both, NTSC Default
[19:31:51] [PASSED] Both, PAL Default
[19:31:51] [PASSED] Both, NTSC Default, with PAL on command-line
[19:31:51] [PASSED] Both, PAL Default, with NTSC on command-line
[19:31:51] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[19:31:51] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[19:31:51] ================== drm_rect (9 subtests) ===================
[19:31:51] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[19:31:51] [PASSED] drm_test_rect_clip_scaled_not_clipped
[19:31:51] [PASSED] drm_test_rect_clip_scaled_clipped
[19:31:51] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[19:31:51] ================= drm_test_rect_intersect  =================
[19:31:51] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[19:31:51] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[19:31:51] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[19:31:51] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[19:31:51] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[19:31:51] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[19:31:51] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[19:31:51] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[19:31:51] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[19:31:51] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[19:31:51] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[19:31:51] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[19:31:51] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[19:31:51] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[19:31:51] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[19:31:51] ============= [PASSED] drm_test_rect_intersect =============
[19:31:51] ================ drm_test_rect_calc_hscale  ================
[19:31:51] [PASSED] normal use
[19:31:51] [PASSED] out of max range
[19:31:51] [PASSED] out of min range
[19:31:51] [PASSED] zero dst
[19:31:51] [PASSED] negative src
[19:31:51] [PASSED] negative dst
[19:31:51] ============ [PASSED] drm_test_rect_calc_hscale ============
[19:31:51] ================ drm_test_rect_calc_vscale  ================
[19:31:51] [PASSED] normal use
[19:31:51] [PASSED] out of max range
[19:31:51] [PASSED] out of min range
[19:31:51] [PASSED] zero dst
[19:31:51] [PASSED] negative src
[19:31:51] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[19:31:51] ============ [PASSED] drm_test_rect_calc_vscale ============
[19:31:51] ================== drm_test_rect_rotate  ===================
[19:31:51] [PASSED] reflect-x
[19:31:51] [PASSED] reflect-y
[19:31:51] [PASSED] rotate-0
[19:31:51] [PASSED] rotate-90
[19:31:51] [PASSED] rotate-180
[19:31:51] [PASSED] rotate-270
[19:31:51] ============== [PASSED] drm_test_rect_rotate ===============
[19:31:51] ================ drm_test_rect_rotate_inv  =================
[19:31:51] [PASSED] reflect-x
[19:31:51] [PASSED] reflect-y
[19:31:51] [PASSED] rotate-0
[19:31:51] [PASSED] rotate-90
[19:31:51] [PASSED] rotate-180
[19:31:51] [PASSED] rotate-270
[19:31:51] ============ [PASSED] drm_test_rect_rotate_inv =============
[19:31:51] ==================== [PASSED] drm_rect =====================
[19:31:51] ============ drm_sysfb_modeset_test (1 subtest) ============
[19:31:51] ============ drm_test_sysfb_build_fourcc_list  =============
[19:31:51] [PASSED] no native formats
[19:31:51] [PASSED] XRGB8888 as native format
[19:31:51] [PASSED] remove duplicates
[19:31:51] [PASSED] convert alpha formats
[19:31:51] [PASSED] random formats
[19:31:51] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[19:31:51] ============= [PASSED] drm_sysfb_modeset_test ==============
[19:31:51] ================== drm_fixp (2 subtests) ===================
[19:31:51] [PASSED] drm_test_int2fixp
[19:31:51] [PASSED] drm_test_sm2fixp
[19:31:51] ==================== [PASSED] drm_fixp =====================
[19:31:51] ============================================================
[19:31:51] Testing complete. Ran 621 tests: passed: 621
[19:31:51] Elapsed time: 26.187s total, 1.759s configuring, 24.249s building, 0.177s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[19:31:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:31:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:32:02] Starting KUnit Kernel (1/1)...
[19:32:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:32:02] ================= ttm_device (5 subtests) ==================
[19:32:02] [PASSED] ttm_device_init_basic
[19:32:02] [PASSED] ttm_device_init_multiple
[19:32:02] [PASSED] ttm_device_fini_basic
[19:32:02] [PASSED] ttm_device_init_no_vma_man
[19:32:02] ================== ttm_device_init_pools  ==================
[19:32:02] [PASSED] No DMA allocations, no DMA32 required
[19:32:02] [PASSED] DMA allocations, DMA32 required
[19:32:02] [PASSED] No DMA allocations, DMA32 required
[19:32:02] [PASSED] DMA allocations, no DMA32 required
[19:32:02] ============== [PASSED] ttm_device_init_pools ==============
[19:32:02] =================== [PASSED] ttm_device ====================
[19:32:02] ================== ttm_pool (8 subtests) ===================
[19:32:02] ================== ttm_pool_alloc_basic  ===================
[19:32:02] [PASSED] One page
[19:32:02] [PASSED] More than one page
[19:32:02] [PASSED] Above the allocation limit
[19:32:02] [PASSED] One page, with coherent DMA mappings enabled
[19:32:02] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:32:02] ============== [PASSED] ttm_pool_alloc_basic ===============
[19:32:02] ============== ttm_pool_alloc_basic_dma_addr  ==============
[19:32:02] [PASSED] One page
[19:32:02] [PASSED] More than one page
[19:32:02] [PASSED] Above the allocation limit
[19:32:02] [PASSED] One page, with coherent DMA mappings enabled
[19:32:02] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:32:02] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[19:32:02] [PASSED] ttm_pool_alloc_order_caching_match
[19:32:02] [PASSED] ttm_pool_alloc_caching_mismatch
[19:32:02] [PASSED] ttm_pool_alloc_order_mismatch
[19:32:02] [PASSED] ttm_pool_free_dma_alloc
[19:32:02] [PASSED] ttm_pool_free_no_dma_alloc
[19:32:02] [PASSED] ttm_pool_fini_basic
[19:32:02] ==================== [PASSED] ttm_pool =====================
[19:32:02] ================ ttm_resource (8 subtests) =================
[19:32:02] ================= ttm_resource_init_basic  =================
[19:32:02] [PASSED] Init resource in TTM_PL_SYSTEM
[19:32:02] [PASSED] Init resource in TTM_PL_VRAM
[19:32:02] [PASSED] Init resource in a private placement
[19:32:02] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[19:32:02] ============= [PASSED] ttm_resource_init_basic =============
[19:32:02] [PASSED] ttm_resource_init_pinned
[19:32:02] [PASSED] ttm_resource_fini_basic
[19:32:02] [PASSED] ttm_resource_manager_init_basic
[19:32:02] [PASSED] ttm_resource_manager_usage_basic
[19:32:02] [PASSED] ttm_resource_manager_set_used_basic
[19:32:02] [PASSED] ttm_sys_man_alloc_basic
[19:32:02] [PASSED] ttm_sys_man_free_basic
[19:32:02] ================== [PASSED] ttm_resource ===================
[19:32:02] =================== ttm_tt (15 subtests) ===================
[19:32:02] ==================== ttm_tt_init_basic  ====================
[19:32:02] [PASSED] Page-aligned size
[19:32:02] [PASSED] Extra pages requested
[19:32:02] ================ [PASSED] ttm_tt_init_basic ================
[19:32:02] [PASSED] ttm_tt_init_misaligned
[19:32:02] [PASSED] ttm_tt_fini_basic
[19:32:02] [PASSED] ttm_tt_fini_sg
[19:32:02] [PASSED] ttm_tt_fini_shmem
[19:32:02] [PASSED] ttm_tt_create_basic
[19:32:02] [PASSED] ttm_tt_create_invalid_bo_type
[19:32:02] [PASSED] ttm_tt_create_ttm_exists
[19:32:02] [PASSED] ttm_tt_create_failed
[19:32:02] [PASSED] ttm_tt_destroy_basic
[19:32:02] [PASSED] ttm_tt_populate_null_ttm
[19:32:02] [PASSED] ttm_tt_populate_populated_ttm
[19:32:02] [PASSED] ttm_tt_unpopulate_basic
[19:32:02] [PASSED] ttm_tt_unpopulate_empty_ttm
[19:32:02] [PASSED] ttm_tt_swapin_basic
[19:32:02] ===================== [PASSED] ttm_tt ======================
[19:32:02] =================== ttm_bo (14 subtests) ===================
[19:32:02] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[19:32:02] [PASSED] Cannot be interrupted and sleeps
[19:32:02] [PASSED] Cannot be interrupted, locks straight away
[19:32:02] [PASSED] Can be interrupted, sleeps
[19:32:02] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[19:32:02] [PASSED] ttm_bo_reserve_locked_no_sleep
[19:32:02] [PASSED] ttm_bo_reserve_no_wait_ticket
[19:32:02] [PASSED] ttm_bo_reserve_double_resv
[19:32:02] [PASSED] ttm_bo_reserve_interrupted
[19:32:02] [PASSED] ttm_bo_reserve_deadlock
[19:32:02] [PASSED] ttm_bo_unreserve_basic
[19:32:02] [PASSED] ttm_bo_unreserve_pinned
[19:32:02] [PASSED] ttm_bo_unreserve_bulk
[19:32:02] [PASSED] ttm_bo_fini_basic
[19:32:02] [PASSED] ttm_bo_fini_shared_resv
[19:32:02] [PASSED] ttm_bo_pin_basic
[19:32:02] [PASSED] ttm_bo_pin_unpin_resource
[19:32:02] [PASSED] ttm_bo_multiple_pin_one_unpin
[19:32:02] ===================== [PASSED] ttm_bo ======================
[19:32:02] ============== ttm_bo_validate (22 subtests) ===============
[19:32:02] ============== ttm_bo_init_reserved_sys_man  ===============
[19:32:02] [PASSED] Buffer object for userspace
[19:32:02] [PASSED] Kernel buffer object
[19:32:02] [PASSED] Shared buffer object
[19:32:02] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[19:32:02] ============== ttm_bo_init_reserved_mock_man  ==============
[19:32:02] [PASSED] Buffer object for userspace
[19:32:02] [PASSED] Kernel buffer object
[19:32:02] [PASSED] Shared buffer object
[19:32:02] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[19:32:02] [PASSED] ttm_bo_init_reserved_resv
[19:32:02] ================== ttm_bo_validate_basic  ==================
[19:32:02] [PASSED] Buffer object for userspace
[19:32:02] [PASSED] Kernel buffer object
[19:32:02] [PASSED] Shared buffer object
[19:32:02] ============== [PASSED] ttm_bo_validate_basic ==============
[19:32:02] [PASSED] ttm_bo_validate_invalid_placement
[19:32:02] ============= ttm_bo_validate_same_placement  ==============
[19:32:02] [PASSED] System manager
[19:32:02] [PASSED] VRAM manager
[19:32:02] ========= [PASSED] ttm_bo_validate_same_placement ==========
[19:32:02] [PASSED] ttm_bo_validate_failed_alloc
[19:32:02] [PASSED] ttm_bo_validate_pinned
[19:32:02] [PASSED] ttm_bo_validate_busy_placement
[19:32:02] ================ ttm_bo_validate_multihop  =================
[19:32:02] [PASSED] Buffer object for userspace
[19:32:02] [PASSED] Kernel buffer object
[19:32:02] [PASSED] Shared buffer object
[19:32:02] ============ [PASSED] ttm_bo_validate_multihop =============
[19:32:02] ========== ttm_bo_validate_no_placement_signaled  ==========
[19:32:02] [PASSED] Buffer object in system domain, no page vector
[19:32:02] [PASSED] Buffer object in system domain with an existing page vector
[19:32:02] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[19:32:02] ======== ttm_bo_validate_no_placement_not_signaled  ========
[19:32:02] [PASSED] Buffer object for userspace
[19:32:02] [PASSED] Kernel buffer object
[19:32:02] [PASSED] Shared buffer object
[19:32:02] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[19:32:02] [PASSED] ttm_bo_validate_move_fence_signaled
[19:32:02] ========= ttm_bo_validate_move_fence_not_signaled  =========
[19:32:02] [PASSED] Waits for GPU
[19:32:02] [PASSED] Tries to lock straight away
[19:32:02] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[19:32:02] [PASSED] ttm_bo_validate_swapout
[19:32:02] [PASSED] ttm_bo_validate_happy_evict
[19:32:02] [PASSED] ttm_bo_validate_all_pinned_evict
[19:32:02] [PASSED] ttm_bo_validate_allowed_only_evict
[19:32:02] [PASSED] ttm_bo_validate_deleted_evict
[19:32:02] [PASSED] ttm_bo_validate_busy_domain_evict
[19:32:02] [PASSED] ttm_bo_validate_evict_gutting
[19:32:02] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[19:32:02] ================= [PASSED] ttm_bo_validate =================
[19:32:02] ============================================================
[19:32:02] Testing complete. Ran 102 tests: passed: 102
[19:32:02] Elapsed time: 11.248s total, 1.649s configuring, 9.334s building, 0.225s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checkpatch: warning for drm/i915: More uncore nukage from display code (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: More uncore nukage from display code (rev2)
URL   : https://patchwork.freedesktop.org/series/163872/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 4238fd7d6d6ded049bc118c560c5dd88b061a5d8
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Wed Mar 25 20:53:41 2026 +0200

    drm/i915/rom: Use intel_de for SPI ROM register access
    
    Since we moved intel_rom.c back into the display code, juse
    use intel_de_{read,write}() for the register accesses.
    
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: Jani Nikula <jani.nikula@intel.com>
+ /mt/dim checkpatch bd31fb142d057e5995cfeaad45b36e051ccb7ccb drm-intel
c1da6d5d3aef drm/i915/qgv: Use intel_de_read() for MTL_MEM_SS_INFO* reads
f973f89a738c drm/i915/mchbar: Provide intel_mchbar_read*() abstraction
-:36: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#36: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 68 lines checked
75287a4fab41 drm/i915/mchbar: Define the end of the MCHBAR mirror
384c6568ce41 drm/i915/mchbar: WARN when accessing non-MCHBAR registers via intel_mchbar_read*()
2105a8c9e0cb drm/i915/mchbar: Use intel_mchbar_read() instead of intel_de_read()
2dd44457c7a6 drm/i915/mchbar: Use intel_mchbar_read*() instead of intel_uncore_read*()
8332568468da drm/i915/de: Add intel_de_read16()
4e1106d22c39 drm/i915/de: s/intel_de_read64_2x32()/intel_de_read64_2x32_volatile()/
-:60: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#60: FILE: drivers/gpu/drm/i915/display/intel_vrr.c:1056:
+			intel_de_read64_2x32_volatile(display, TRANS_CMRR_N_LO(display, cpu_transcoder),

-:65: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#65: FILE: drivers/gpu/drm/i915/display/intel_vrr.c:1059:
+			intel_de_read64_2x32_volatile(display, TRANS_CMRR_M_LO(display, cpu_transcoder),

total: 0 errors, 2 warnings, 0 checks, 35 lines checked
aff964c0fb83 drm/i915/de: Add a simple intel_de_read64_2x32()
ffee75a3b527 drm/i915/vrr: Use intel_de_read64_2x32()
19e72eba6338 drm/i915/mchbar: Use intel_de_read*() for MCHBAR register accesses
4238fd7d6d6d drm/i915/rom: Use intel_de for SPI ROM register access
-:9: WARNING:TYPO_SPELLING: 'juse' may be misspelled - perhaps 'just'?
#9: 
Since we moved intel_rom.c back into the display code, juse
                                                       ^^^^

total: 0 errors, 1 warnings, 0 checks, 48 lines checked

✓ CI.KUnit: success for drm/i915: More uncore nukage from display code (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: More uncore nukage from display code (rev2)
URL   : https://patchwork.freedesktop.org/series/163872/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[16:05:22] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:05:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:05:57] Starting KUnit Kernel (1/1)...
[16:05:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:05:57] ================== guc_buf (11 subtests) ===================
[16:05:57] [PASSED] test_smallest
[16:05:57] [PASSED] test_largest
[16:05:57] [PASSED] test_granular
[16:05:57] [PASSED] test_unique
[16:05:57] [PASSED] test_overlap
[16:05:57] [PASSED] test_reusable
[16:05:57] [PASSED] test_too_big
[16:05:57] [PASSED] test_flush
[16:05:57] [PASSED] test_lookup
[16:05:57] [PASSED] test_data
[16:05:57] [PASSED] test_class
[16:05:57] ===================== [PASSED] guc_buf =====================
[16:05:57] =================== guc_dbm (7 subtests) ===================
[16:05:57] [PASSED] test_empty
[16:05:57] [PASSED] test_default
[16:05:57] ======================== test_size  ========================
[16:05:57] [PASSED] 4
[16:05:57] [PASSED] 8
[16:05:57] [PASSED] 32
[16:05:57] [PASSED] 256
[16:05:57] ==================== [PASSED] test_size ====================
[16:05:57] ======================= test_reuse  ========================
[16:05:57] [PASSED] 4
[16:05:57] [PASSED] 8
[16:05:57] [PASSED] 32
[16:05:57] [PASSED] 256
[16:05:57] =================== [PASSED] test_reuse ====================
[16:05:57] =================== test_range_overlap  ====================
[16:05:57] [PASSED] 4
[16:05:57] [PASSED] 8
[16:05:57] [PASSED] 32
[16:05:57] [PASSED] 256
[16:05:57] =============== [PASSED] test_range_overlap ================
[16:05:57] =================== test_range_compact  ====================
[16:05:57] [PASSED] 4
[16:05:57] [PASSED] 8
[16:05:57] [PASSED] 32
[16:05:57] [PASSED] 256
[16:05:57] =============== [PASSED] test_range_compact ================
[16:05:57] ==================== test_range_spare  =====================
[16:05:57] [PASSED] 4
[16:05:57] [PASSED] 8
[16:05:57] [PASSED] 32
[16:05:57] [PASSED] 256
[16:05:57] ================ [PASSED] test_range_spare =================
[16:05:57] ===================== [PASSED] guc_dbm =====================
[16:05:57] =================== guc_idm (6 subtests) ===================
[16:05:57] [PASSED] bad_init
[16:05:57] [PASSED] no_init
[16:05:57] [PASSED] init_fini
[16:05:57] [PASSED] check_used
[16:05:57] [PASSED] check_quota
[16:05:57] [PASSED] check_all
[16:05:57] ===================== [PASSED] guc_idm =====================
[16:05:57] ================== no_relay (3 subtests) ===================
[16:05:57] [PASSED] xe_drops_guc2pf_if_not_ready
[16:05:57] [PASSED] xe_drops_guc2vf_if_not_ready
[16:05:57] [PASSED] xe_rejects_send_if_not_ready
[16:05:57] ==================== [PASSED] no_relay =====================
[16:05:57] ================== pf_relay (14 subtests) ==================
[16:05:57] [PASSED] pf_rejects_guc2pf_too_short
[16:05:57] [PASSED] pf_rejects_guc2pf_too_long
[16:05:57] [PASSED] pf_rejects_guc2pf_no_payload
[16:05:57] [PASSED] pf_fails_no_payload
[16:05:57] [PASSED] pf_fails_bad_origin
[16:05:57] [PASSED] pf_fails_bad_type
[16:05:57] [PASSED] pf_txn_reports_error
[16:05:57] [PASSED] pf_txn_sends_pf2guc
[16:05:57] [PASSED] pf_sends_pf2guc
[16:05:57] [SKIPPED] pf_loopback_nop
[16:05:57] [SKIPPED] pf_loopback_echo
[16:05:57] [SKIPPED] pf_loopback_fail
[16:05:57] [SKIPPED] pf_loopback_busy
[16:05:57] [SKIPPED] pf_loopback_retry
[16:05:57] ==================== [PASSED] pf_relay =====================
[16:05:57] ================== vf_relay (3 subtests) ===================
[16:05:57] [PASSED] vf_rejects_guc2vf_too_short
[16:05:57] [PASSED] vf_rejects_guc2vf_too_long
[16:05:57] [PASSED] vf_rejects_guc2vf_no_payload
[16:05:57] ==================== [PASSED] vf_relay =====================
[16:05:57] ================ pf_gt_config (9 subtests) =================
[16:05:57] [PASSED] fair_contexts_1vf
[16:05:57] [PASSED] fair_doorbells_1vf
[16:05:57] [PASSED] fair_ggtt_1vf
[16:05:57] ====================== fair_vram_1vf  ======================
[16:05:57] [PASSED] 3.50 GiB
[16:05:57] [PASSED] 11.5 GiB
[16:05:57] [PASSED] 15.5 GiB
[16:05:57] [PASSED] 31.5 GiB
[16:05:57] [PASSED] 63.5 GiB
[16:05:57] [PASSED] 1.91 GiB
[16:05:57] ================== [PASSED] fair_vram_1vf ==================
[16:05:57] ================ fair_vram_1vf_admin_only  =================
[16:05:57] [PASSED] 3.50 GiB
[16:05:57] [PASSED] 11.5 GiB
[16:05:57] [PASSED] 15.5 GiB
[16:05:57] [PASSED] 31.5 GiB
[16:05:57] [PASSED] 63.5 GiB
[16:05:57] [PASSED] 1.91 GiB
[16:05:57] ============ [PASSED] fair_vram_1vf_admin_only =============
[16:05:57] ====================== fair_contexts  ======================
[16:05:57] [PASSED] 1 VF
[16:05:57] [PASSED] 2 VFs
[16:05:57] [PASSED] 3 VFs
[16:05:57] [PASSED] 4 VFs
[16:05:57] [PASSED] 5 VFs
[16:05:57] [PASSED] 6 VFs
[16:05:57] [PASSED] 7 VFs
[16:05:57] [PASSED] 8 VFs
[16:05:57] [PASSED] 9 VFs
[16:05:57] [PASSED] 10 VFs
[16:05:57] [PASSED] 11 VFs
[16:05:57] [PASSED] 12 VFs
[16:05:57] [PASSED] 13 VFs
[16:05:57] [PASSED] 14 VFs
[16:05:57] [PASSED] 15 VFs
[16:05:57] [PASSED] 16 VFs
[16:05:57] [PASSED] 17 VFs
[16:05:57] [PASSED] 18 VFs
[16:05:57] [PASSED] 19 VFs
[16:05:57] [PASSED] 20 VFs
[16:05:57] [PASSED] 21 VFs
[16:05:57] [PASSED] 22 VFs
[16:05:57] [PASSED] 23 VFs
[16:05:57] [PASSED] 24 VFs
[16:05:57] [PASSED] 25 VFs
[16:05:57] [PASSED] 26 VFs
[16:05:57] [PASSED] 27 VFs
[16:05:57] [PASSED] 28 VFs
[16:05:57] [PASSED] 29 VFs
[16:05:57] [PASSED] 30 VFs
[16:05:57] [PASSED] 31 VFs
[16:05:57] [PASSED] 32 VFs
[16:05:57] [PASSED] 33 VFs
[16:05:57] [PASSED] 34 VFs
[16:05:57] [PASSED] 35 VFs
[16:05:57] [PASSED] 36 VFs
[16:05:57] [PASSED] 37 VFs
[16:05:57] [PASSED] 38 VFs
[16:05:57] [PASSED] 39 VFs
[16:05:57] [PASSED] 40 VFs
[16:05:57] [PASSED] 41 VFs
[16:05:57] [PASSED] 42 VFs
[16:05:57] [PASSED] 43 VFs
[16:05:57] [PASSED] 44 VFs
[16:05:57] [PASSED] 45 VFs
[16:05:57] [PASSED] 46 VFs
[16:05:57] [PASSED] 47 VFs
[16:05:57] [PASSED] 48 VFs
[16:05:57] [PASSED] 49 VFs
[16:05:57] [PASSED] 50 VFs
[16:05:57] [PASSED] 51 VFs
[16:05:57] [PASSED] 52 VFs
[16:05:57] [PASSED] 53 VFs
[16:05:57] [PASSED] 54 VFs
[16:05:57] [PASSED] 55 VFs
[16:05:57] [PASSED] 56 VFs
[16:05:57] [PASSED] 57 VFs
[16:05:57] [PASSED] 58 VFs
[16:05:57] [PASSED] 59 VFs
[16:05:57] [PASSED] 60 VFs
[16:05:57] [PASSED] 61 VFs
[16:05:57] [PASSED] 62 VFs
[16:05:57] [PASSED] 63 VFs
[16:05:57] ================== [PASSED] fair_contexts ==================
[16:05:57] ===================== fair_doorbells  ======================
[16:05:57] [PASSED] 1 VF
[16:05:57] [PASSED] 2 VFs
[16:05:57] [PASSED] 3 VFs
[16:05:57] [PASSED] 4 VFs
[16:05:57] [PASSED] 5 VFs
[16:05:57] [PASSED] 6 VFs
[16:05:57] [PASSED] 7 VFs
[16:05:57] [PASSED] 8 VFs
[16:05:57] [PASSED] 9 VFs
[16:05:57] [PASSED] 10 VFs
[16:05:57] [PASSED] 11 VFs
[16:05:57] [PASSED] 12 VFs
[16:05:57] [PASSED] 13 VFs
[16:05:57] [PASSED] 14 VFs
[16:05:57] [PASSED] 15 VFs
[16:05:57] [PASSED] 16 VFs
[16:05:57] [PASSED] 17 VFs
[16:05:57] [PASSED] 18 VFs
[16:05:57] [PASSED] 19 VFs
[16:05:57] [PASSED] 20 VFs
[16:05:57] [PASSED] 21 VFs
[16:05:57] [PASSED] 22 VFs
[16:05:57] [PASSED] 23 VFs
[16:05:57] [PASSED] 24 VFs
[16:05:57] [PASSED] 25 VFs
[16:05:57] [PASSED] 26 VFs
[16:05:57] [PASSED] 27 VFs
[16:05:57] [PASSED] 28 VFs
[16:05:57] [PASSED] 29 VFs
[16:05:57] [PASSED] 30 VFs
[16:05:57] [PASSED] 31 VFs
[16:05:57] [PASSED] 32 VFs
[16:05:57] [PASSED] 33 VFs
[16:05:57] [PASSED] 34 VFs
[16:05:57] [PASSED] 35 VFs
[16:05:57] [PASSED] 36 VFs
[16:05:57] [PASSED] 37 VFs
[16:05:57] [PASSED] 38 VFs
[16:05:57] [PASSED] 39 VFs
[16:05:57] [PASSED] 40 VFs
[16:05:57] [PASSED] 41 VFs
[16:05:57] [PASSED] 42 VFs
[16:05:57] [PASSED] 43 VFs
[16:05:57] [PASSED] 44 VFs
[16:05:57] [PASSED] 45 VFs
[16:05:57] [PASSED] 46 VFs
[16:05:57] [PASSED] 47 VFs
[16:05:57] [PASSED] 48 VFs
[16:05:57] [PASSED] 49 VFs
[16:05:57] [PASSED] 50 VFs
[16:05:57] [PASSED] 51 VFs
[16:05:57] [PASSED] 52 VFs
[16:05:57] [PASSED] 53 VFs
[16:05:57] [PASSED] 54 VFs
[16:05:57] [PASSED] 55 VFs
[16:05:57] [PASSED] 56 VFs
[16:05:57] [PASSED] 57 VFs
[16:05:57] [PASSED] 58 VFs
[16:05:57] [PASSED] 59 VFs
[16:05:57] [PASSED] 60 VFs
[16:05:57] [PASSED] 61 VFs
[16:05:57] [PASSED] 62 VFs
[16:05:57] [PASSED] 63 VFs
[16:05:57] ================= [PASSED] fair_doorbells ==================
[16:05:57] ======================== fair_ggtt  ========================
[16:05:57] [PASSED] 1 VF
[16:05:57] [PASSED] 2 VFs
[16:05:57] [PASSED] 3 VFs
[16:05:57] [PASSED] 4 VFs
[16:05:57] [PASSED] 5 VFs
[16:05:57] [PASSED] 6 VFs
[16:05:57] [PASSED] 7 VFs
[16:05:57] [PASSED] 8 VFs
[16:05:57] [PASSED] 9 VFs
[16:05:57] [PASSED] 10 VFs
[16:05:57] [PASSED] 11 VFs
[16:05:57] [PASSED] 12 VFs
[16:05:57] [PASSED] 13 VFs
[16:05:57] [PASSED] 14 VFs
[16:05:57] [PASSED] 15 VFs
[16:05:57] [PASSED] 16 VFs
[16:05:57] [PASSED] 17 VFs
[16:05:57] [PASSED] 18 VFs
[16:05:57] [PASSED] 19 VFs
[16:05:57] [PASSED] 20 VFs
[16:05:57] [PASSED] 21 VFs
[16:05:57] [PASSED] 22 VFs
[16:05:57] [PASSED] 23 VFs
[16:05:57] [PASSED] 24 VFs
[16:05:57] [PASSED] 25 VFs
[16:05:57] [PASSED] 26 VFs
[16:05:57] [PASSED] 27 VFs
[16:05:57] [PASSED] 28 VFs
[16:05:57] [PASSED] 29 VFs
[16:05:57] [PASSED] 30 VFs
[16:05:57] [PASSED] 31 VFs
[16:05:57] [PASSED] 32 VFs
[16:05:57] [PASSED] 33 VFs
[16:05:57] [PASSED] 34 VFs
[16:05:57] [PASSED] 35 VFs
[16:05:57] [PASSED] 36 VFs
[16:05:57] [PASSED] 37 VFs
[16:05:57] [PASSED] 38 VFs
[16:05:57] [PASSED] 39 VFs
[16:05:57] [PASSED] 40 VFs
[16:05:57] [PASSED] 41 VFs
[16:05:57] [PASSED] 42 VFs
[16:05:57] [PASSED] 43 VFs
[16:05:57] [PASSED] 44 VFs
[16:05:57] [PASSED] 45 VFs
[16:05:57] [PASSED] 46 VFs
[16:05:57] [PASSED] 47 VFs
[16:05:57] [PASSED] 48 VFs
[16:05:57] [PASSED] 49 VFs
[16:05:57] [PASSED] 50 VFs
[16:05:57] [PASSED] 51 VFs
[16:05:57] [PASSED] 52 VFs
[16:05:57] [PASSED] 53 VFs
[16:05:57] [PASSED] 54 VFs
[16:05:57] [PASSED] 55 VFs
[16:05:57] [PASSED] 56 VFs
[16:05:57] [PASSED] 57 VFs
[16:05:57] [PASSED] 58 VFs
[16:05:57] [PASSED] 59 VFs
[16:05:57] [PASSED] 60 VFs
[16:05:57] [PASSED] 61 VFs
[16:05:57] [PASSED] 62 VFs
[16:05:57] [PASSED] 63 VFs
[16:05:57] ==================== [PASSED] fair_ggtt ====================
[16:05:57] ======================== fair_vram  ========================
[16:05:57] [PASSED] 1 VF
[16:05:57] [PASSED] 2 VFs
[16:05:57] [PASSED] 3 VFs
[16:05:57] [PASSED] 4 VFs
[16:05:57] [PASSED] 5 VFs
[16:05:57] [PASSED] 6 VFs
[16:05:57] [PASSED] 7 VFs
[16:05:57] [PASSED] 8 VFs
[16:05:57] [PASSED] 9 VFs
[16:05:57] [PASSED] 10 VFs
[16:05:57] [PASSED] 11 VFs
[16:05:57] [PASSED] 12 VFs
[16:05:57] [PASSED] 13 VFs
[16:05:57] [PASSED] 14 VFs
[16:05:57] [PASSED] 15 VFs
[16:05:57] [PASSED] 16 VFs
[16:05:57] [PASSED] 17 VFs
[16:05:57] [PASSED] 18 VFs
[16:05:57] [PASSED] 19 VFs
[16:05:57] [PASSED] 20 VFs
[16:05:57] [PASSED] 21 VFs
[16:05:57] [PASSED] 22 VFs
[16:05:57] [PASSED] 23 VFs
[16:05:57] [PASSED] 24 VFs
[16:05:57] [PASSED] 25 VFs
[16:05:57] [PASSED] 26 VFs
[16:05:57] [PASSED] 27 VFs
[16:05:57] [PASSED] 28 VFs
[16:05:57] [PASSED] 29 VFs
[16:05:57] [PASSED] 30 VFs
[16:05:57] [PASSED] 31 VFs
[16:05:57] [PASSED] 32 VFs
[16:05:57] [PASSED] 33 VFs
[16:05:57] [PASSED] 34 VFs
[16:05:57] [PASSED] 35 VFs
[16:05:57] [PASSED] 36 VFs
[16:05:57] [PASSED] 37 VFs
[16:05:57] [PASSED] 38 VFs
[16:05:57] [PASSED] 39 VFs
[16:05:57] [PASSED] 40 VFs
[16:05:57] [PASSED] 41 VFs
[16:05:57] [PASSED] 42 VFs
[16:05:57] [PASSED] 43 VFs
[16:05:57] [PASSED] 44 VFs
[16:05:57] [PASSED] 45 VFs
[16:05:57] [PASSED] 46 VFs
[16:05:57] [PASSED] 47 VFs
[16:05:57] [PASSED] 48 VFs
[16:05:57] [PASSED] 49 VFs
[16:05:57] [PASSED] 50 VFs
[16:05:57] [PASSED] 51 VFs
[16:05:57] [PASSED] 52 VFs
[16:05:57] [PASSED] 53 VFs
[16:05:57] [PASSED] 54 VFs
[16:05:57] [PASSED] 55 VFs
[16:05:57] [PASSED] 56 VFs
[16:05:57] [PASSED] 57 VFs
[16:05:57] [PASSED] 58 VFs
[16:05:57] [PASSED] 59 VFs
[16:05:57] [PASSED] 60 VFs
[16:05:57] [PASSED] 61 VFs
[16:05:57] [PASSED] 62 VFs
[16:05:57] [PASSED] 63 VFs
[16:05:57] ==================== [PASSED] fair_vram ====================
[16:05:57] ================== [PASSED] pf_gt_config ===================
[16:05:57] ===================== lmtt (1 subtest) =====================
[16:05:57] ======================== test_ops  =========================
[16:05:57] [PASSED] 2-level
[16:05:57] [PASSED] multi-level
[16:05:57] ==================== [PASSED] test_ops =====================
[16:05:57] ====================== [PASSED] lmtt =======================
[16:05:57] ================= pf_service (11 subtests) =================
[16:05:57] [PASSED] pf_negotiate_any
[16:05:57] [PASSED] pf_negotiate_base_match
[16:05:57] [PASSED] pf_negotiate_base_newer
[16:05:57] [PASSED] pf_negotiate_base_next
[16:05:57] [SKIPPED] pf_negotiate_base_older
[16:05:57] [PASSED] pf_negotiate_base_prev
[16:05:57] [PASSED] pf_negotiate_latest_match
[16:05:57] [PASSED] pf_negotiate_latest_newer
[16:05:57] [PASSED] pf_negotiate_latest_next
[16:05:57] [SKIPPED] pf_negotiate_latest_older
[16:05:57] [SKIPPED] pf_negotiate_latest_prev
[16:05:57] =================== [PASSED] pf_service ====================
[16:05:57] ================= xe_guc_g2g (2 subtests) ==================
[16:05:57] ============== xe_live_guc_g2g_kunit_default  ==============
[16:05:57] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[16:05:57] ============== xe_live_guc_g2g_kunit_allmem  ===============
[16:05:57] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[16:05:57] =================== [SKIPPED] xe_guc_g2g ===================
[16:05:57] =================== xe_mocs (2 subtests) ===================
[16:05:57] ================ xe_live_mocs_kernel_kunit  ================
[16:05:57] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[16:05:57] ================ xe_live_mocs_reset_kunit  =================
[16:05:57] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[16:05:57] ==================== [SKIPPED] xe_mocs =====================
[16:05:57] ================= xe_migrate (2 subtests) ==================
[16:05:57] ================= xe_migrate_sanity_kunit  =================
[16:05:57] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[16:05:57] ================== xe_validate_ccs_kunit  ==================
[16:05:57] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[16:05:57] =================== [SKIPPED] xe_migrate ===================
[16:05:57] ================== xe_dma_buf (1 subtest) ==================
[16:05:57] ==================== xe_dma_buf_kunit  =====================
[16:05:57] ================ [SKIPPED] xe_dma_buf_kunit ================
[16:05:57] =================== [SKIPPED] xe_dma_buf ===================
[16:05:57] ================= xe_bo_shrink (1 subtest) =================
[16:05:57] =================== xe_bo_shrink_kunit  ====================
[16:05:57] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[16:05:57] ================== [SKIPPED] xe_bo_shrink ==================
[16:05:57] ==================== xe_bo (2 subtests) ====================
[16:05:57] ================== xe_ccs_migrate_kunit  ===================
[16:05:57] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[16:05:57] ==================== xe_bo_evict_kunit  ====================
[16:05:57] =============== [SKIPPED] xe_bo_evict_kunit ================
[16:05:57] ===================== [SKIPPED] xe_bo ======================
[16:05:57] ==================== args (13 subtests) ====================
[16:05:57] [PASSED] count_args_test
[16:05:57] [PASSED] call_args_example
[16:05:57] [PASSED] call_args_test
[16:05:57] [PASSED] drop_first_arg_example
[16:05:57] [PASSED] drop_first_arg_test
[16:05:57] [PASSED] first_arg_example
[16:05:57] [PASSED] first_arg_test
[16:05:57] [PASSED] last_arg_example
[16:05:57] [PASSED] last_arg_test
[16:05:57] [PASSED] pick_arg_example
[16:05:57] [PASSED] if_args_example
[16:05:57] [PASSED] if_args_test
[16:05:57] [PASSED] sep_comma_example
[16:05:57] ====================== [PASSED] args =======================
[16:05:57] =================== xe_pci (3 subtests) ====================
[16:05:57] ==================== check_graphics_ip  ====================
[16:05:57] [PASSED] 12.00 Xe_LP
[16:05:57] [PASSED] 12.10 Xe_LP+
[16:05:57] [PASSED] 12.55 Xe_HPG
[16:05:57] [PASSED] 12.60 Xe_HPC
[16:05:57] [PASSED] 12.70 Xe_LPG
[16:05:57] [PASSED] 12.71 Xe_LPG
[16:05:57] [PASSED] 12.74 Xe_LPG+
[16:05:57] [PASSED] 20.01 Xe2_HPG
[16:05:57] [PASSED] 20.02 Xe2_HPG
[16:05:57] [PASSED] 20.04 Xe2_LPG
[16:05:57] [PASSED] 30.00 Xe3_LPG
[16:05:57] [PASSED] 30.01 Xe3_LPG
[16:05:57] [PASSED] 30.03 Xe3_LPG
[16:05:57] [PASSED] 30.04 Xe3_LPG
[16:05:57] [PASSED] 30.05 Xe3_LPG
[16:05:57] [PASSED] 35.10 Xe3p_LPG
[16:05:57] [PASSED] 35.11 Xe3p_XPC
[16:05:57] ================ [PASSED] check_graphics_ip ================
[16:05:57] ===================== check_media_ip  ======================
[16:05:57] [PASSED] 12.00 Xe_M
[16:05:57] [PASSED] 12.55 Xe_HPM
[16:05:57] [PASSED] 13.00 Xe_LPM+
[16:05:57] [PASSED] 13.01 Xe2_HPM
[16:05:57] [PASSED] 20.00 Xe2_LPM
[16:05:57] [PASSED] 30.00 Xe3_LPM
[16:05:57] [PASSED] 30.02 Xe3_LPM
[16:05:57] [PASSED] 35.00 Xe3p_LPM
[16:05:57] [PASSED] 35.03 Xe3p_HPM
[16:05:57] ================= [PASSED] check_media_ip ==================
[16:05:57] =================== check_platform_desc  ===================
[16:05:57] [PASSED] 0x9A60 (TIGERLAKE)
[16:05:57] [PASSED] 0x9A68 (TIGERLAKE)
[16:05:57] [PASSED] 0x9A70 (TIGERLAKE)
[16:05:57] [PASSED] 0x9A40 (TIGERLAKE)
[16:05:57] [PASSED] 0x9A49 (TIGERLAKE)
[16:05:57] [PASSED] 0x9A59 (TIGERLAKE)
[16:05:57] [PASSED] 0x9A78 (TIGERLAKE)
[16:05:57] [PASSED] 0x9AC0 (TIGERLAKE)
[16:05:57] [PASSED] 0x9AC9 (TIGERLAKE)
[16:05:57] [PASSED] 0x9AD9 (TIGERLAKE)
[16:05:57] [PASSED] 0x9AF8 (TIGERLAKE)
[16:05:57] [PASSED] 0x4C80 (ROCKETLAKE)
[16:05:57] [PASSED] 0x4C8A (ROCKETLAKE)
[16:05:57] [PASSED] 0x4C8B (ROCKETLAKE)
[16:05:57] [PASSED] 0x4C8C (ROCKETLAKE)
[16:05:57] [PASSED] 0x4C90 (ROCKETLAKE)
[16:05:57] [PASSED] 0x4C9A (ROCKETLAKE)
[16:05:57] [PASSED] 0x4680 (ALDERLAKE_S)
[16:05:57] [PASSED] 0x4682 (ALDERLAKE_S)
[16:05:57] [PASSED] 0x4688 (ALDERLAKE_S)
[16:05:57] [PASSED] 0x468A (ALDERLAKE_S)
[16:05:57] [PASSED] 0x468B (ALDERLAKE_S)
[16:05:57] [PASSED] 0x4690 (ALDERLAKE_S)
[16:05:57] [PASSED] 0x4692 (ALDERLAKE_S)
[16:05:57] [PASSED] 0x4693 (ALDERLAKE_S)
[16:05:57] [PASSED] 0x46A0 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46A1 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46A2 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46A3 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46A6 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46A8 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46AA (ALDERLAKE_P)
[16:05:57] [PASSED] 0x462A (ALDERLAKE_P)
[16:05:57] [PASSED] 0x4626 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x4628 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46B0 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46B1 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46B2 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46B3 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46C0 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46C1 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46C2 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46C3 (ALDERLAKE_P)
[16:05:57] [PASSED] 0x46D0 (ALDERLAKE_N)
[16:05:57] [PASSED] 0x46D1 (ALDERLAKE_N)
[16:05:57] [PASSED] 0x46D2 (ALDERLAKE_N)
[16:05:57] [PASSED] 0x46D3 (ALDERLAKE_N)
[16:05:57] [PASSED] 0x46D4 (ALDERLAKE_N)
[16:05:57] [PASSED] 0xA721 (ALDERLAKE_P)
[16:05:57] [PASSED] 0xA7A1 (ALDERLAKE_P)
[16:05:57] [PASSED] 0xA7A9 (ALDERLAKE_P)
[16:05:57] [PASSED] 0xA7AC (ALDERLAKE_P)
[16:05:57] [PASSED] 0xA7AD (ALDERLAKE_P)
[16:05:57] [PASSED] 0xA720 (ALDERLAKE_P)
[16:05:57] [PASSED] 0xA7A0 (ALDERLAKE_P)
[16:05:57] [PASSED] 0xA7A8 (ALDERLAKE_P)
[16:05:57] [PASSED] 0xA7AA (ALDERLAKE_P)
[16:05:57] [PASSED] 0xA7AB (ALDERLAKE_P)
[16:05:57] [PASSED] 0xA780 (ALDERLAKE_S)
[16:05:57] [PASSED] 0xA781 (ALDERLAKE_S)
[16:05:57] [PASSED] 0xA782 (ALDERLAKE_S)
[16:05:57] [PASSED] 0xA783 (ALDERLAKE_S)
[16:05:57] [PASSED] 0xA788 (ALDERLAKE_S)
[16:05:57] [PASSED] 0xA789 (ALDERLAKE_S)
[16:05:57] [PASSED] 0xA78A (ALDERLAKE_S)
[16:05:57] [PASSED] 0xA78B (ALDERLAKE_S)
[16:05:57] [PASSED] 0x4905 (DG1)
[16:05:57] [PASSED] 0x4906 (DG1)
[16:05:57] [PASSED] 0x4907 (DG1)
[16:05:57] [PASSED] 0x4908 (DG1)
[16:05:57] [PASSED] 0x4909 (DG1)
[16:05:57] [PASSED] 0x56C0 (DG2)
[16:05:57] [PASSED] 0x56C2 (DG2)
[16:05:57] [PASSED] 0x56C1 (DG2)
[16:05:57] [PASSED] 0x7D51 (METEORLAKE)
[16:05:57] [PASSED] 0x7DD1 (METEORLAKE)
[16:05:57] [PASSED] 0x7D41 (METEORLAKE)
[16:05:57] [PASSED] 0x7D67 (METEORLAKE)
[16:05:57] [PASSED] 0xB640 (METEORLAKE)
[16:05:57] [PASSED] 0x56A0 (DG2)
[16:05:57] [PASSED] 0x56A1 (DG2)
[16:05:57] [PASSED] 0x56A2 (DG2)
[16:05:57] [PASSED] 0x56BE (DG2)
[16:05:57] [PASSED] 0x56BF (DG2)
[16:05:57] [PASSED] 0x5690 (DG2)
[16:05:57] [PASSED] 0x5691 (DG2)
[16:05:57] [PASSED] 0x5692 (DG2)
[16:05:57] [PASSED] 0x56A5 (DG2)
[16:05:57] [PASSED] 0x56A6 (DG2)
[16:05:57] [PASSED] 0x56B0 (DG2)
[16:05:57] [PASSED] 0x56B1 (DG2)
[16:05:57] [PASSED] 0x56BA (DG2)
[16:05:57] [PASSED] 0x56BB (DG2)
[16:05:57] [PASSED] 0x56BC (DG2)
[16:05:57] [PASSED] 0x56BD (DG2)
[16:05:57] [PASSED] 0x5693 (DG2)
[16:05:57] [PASSED] 0x5694 (DG2)
[16:05:57] [PASSED] 0x5695 (DG2)
[16:05:57] [PASSED] 0x56A3 (DG2)
[16:05:57] [PASSED] 0x56A4 (DG2)
[16:05:57] [PASSED] 0x56B2 (DG2)
[16:05:57] [PASSED] 0x56B3 (DG2)
[16:05:57] [PASSED] 0x5696 (DG2)
[16:05:57] [PASSED] 0x5697 (DG2)
[16:05:57] [PASSED] 0xB69 (PVC)
[16:05:57] [PASSED] 0xB6E (PVC)
[16:05:57] [PASSED] 0xBD4 (PVC)
[16:05:57] [PASSED] 0xBD5 (PVC)
[16:05:57] [PASSED] 0xBD6 (PVC)
[16:05:57] [PASSED] 0xBD7 (PVC)
[16:05:57] [PASSED] 0xBD8 (PVC)
[16:05:57] [PASSED] 0xBD9 (PVC)
[16:05:57] [PASSED] 0xBDA (PVC)
[16:05:57] [PASSED] 0xBDB (PVC)
[16:05:57] [PASSED] 0xBE0 (PVC)
[16:05:57] [PASSED] 0xBE1 (PVC)
[16:05:57] [PASSED] 0xBE5 (PVC)
[16:05:57] [PASSED] 0x7D40 (METEORLAKE)
[16:05:57] [PASSED] 0x7D45 (METEORLAKE)
[16:05:57] [PASSED] 0x7D55 (METEORLAKE)
[16:05:57] [PASSED] 0x7D60 (METEORLAKE)
[16:05:57] [PASSED] 0x7DD5 (METEORLAKE)
[16:05:57] [PASSED] 0x6420 (LUNARLAKE)
[16:05:57] [PASSED] 0x64A0 (LUNARLAKE)
[16:05:57] [PASSED] 0x64B0 (LUNARLAKE)
[16:05:57] [PASSED] 0xE202 (BATTLEMAGE)
[16:05:57] [PASSED] 0xE209 (BATTLEMAGE)
[16:05:57] [PASSED] 0xE20B (BATTLEMAGE)
[16:05:57] [PASSED] 0xE20C (BATTLEMAGE)
[16:05:57] [PASSED] 0xE20D (BATTLEMAGE)
[16:05:57] [PASSED] 0xE210 (BATTLEMAGE)
[16:05:57] [PASSED] 0xE211 (BATTLEMAGE)
[16:05:57] [PASSED] 0xE212 (BATTLEMAGE)
[16:05:57] [PASSED] 0xE216 (BATTLEMAGE)
[16:05:57] [PASSED] 0xE220 (BATTLEMAGE)
[16:05:57] [PASSED] 0xE221 (BATTLEMAGE)
[16:05:57] [PASSED] 0xE222 (BATTLEMAGE)
[16:05:57] [PASSED] 0xE223 (BATTLEMAGE)
[16:05:57] [PASSED] 0xB080 (PANTHERLAKE)
[16:05:57] [PASSED] 0xB081 (PANTHERLAKE)
[16:05:57] [PASSED] 0xB082 (PANTHERLAKE)
[16:05:57] [PASSED] 0xB083 (PANTHERLAKE)
[16:05:57] [PASSED] 0xB084 (PANTHERLAKE)
[16:05:57] [PASSED] 0xB085 (PANTHERLAKE)
[16:05:57] [PASSED] 0xB086 (PANTHERLAKE)
[16:05:57] [PASSED] 0xB087 (PANTHERLAKE)
[16:05:57] [PASSED] 0xB08F (PANTHERLAKE)
[16:05:57] [PASSED] 0xB090 (PANTHERLAKE)
[16:05:57] [PASSED] 0xB0A0 (PANTHERLAKE)
[16:05:57] [PASSED] 0xB0B0 (PANTHERLAKE)
[16:05:57] [PASSED] 0xFD80 (PANTHERLAKE)
[16:05:57] [PASSED] 0xFD81 (PANTHERLAKE)
[16:05:57] [PASSED] 0xD740 (NOVALAKE_S)
[16:05:57] [PASSED] 0xD741 (NOVALAKE_S)
[16:05:57] [PASSED] 0xD742 (NOVALAKE_S)
[16:05:57] [PASSED] 0xD743 (NOVALAKE_S)
[16:05:57] [PASSED] 0xD744 (NOVALAKE_S)
[16:05:57] [PASSED] 0xD745 (NOVALAKE_S)
[16:05:57] [PASSED] 0x674C (CRESCENTISLAND)
[16:05:57] [PASSED] 0xD750 (NOVALAKE_P)
[16:05:57] [PASSED] 0xD751 (NOVALAKE_P)
[16:05:57] [PASSED] 0xD752 (NOVALAKE_P)
[16:05:57] [PASSED] 0xD753 (NOVALAKE_P)
[16:05:57] [PASSED] 0xD754 (NOVALAKE_P)
[16:05:57] [PASSED] 0xD755 (NOVALAKE_P)
[16:05:57] [PASSED] 0xD756 (NOVALAKE_P)
[16:05:57] [PASSED] 0xD757 (NOVALAKE_P)
[16:05:57] [PASSED] 0xD75F (NOVALAKE_P)
[16:05:57] =============== [PASSED] check_platform_desc ===============
[16:05:57] ===================== [PASSED] xe_pci ======================
[16:05:57] =================== xe_rtp (2 subtests) ====================
[16:05:57] =============== xe_rtp_process_to_sr_tests  ================
[16:05:57] [PASSED] coalesce-same-reg
[16:05:57] [PASSED] no-match-no-add
[16:05:57] [PASSED] match-or
[16:05:57] [PASSED] match-or-xfail
[16:05:57] [PASSED] no-match-no-add-multiple-rules
[16:05:57] [PASSED] two-regs-two-entries
[16:05:57] [PASSED] clr-one-set-other
[16:05:57] [PASSED] set-field
[16:05:57] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[16:05:57] [PASSED] conflict-not-disjoint
[16:05:57] [PASSED] conflict-reg-type
[16:05:57] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[16:05:57] ================== xe_rtp_process_tests  ===================
[16:05:57] [PASSED] active1
[16:05:57] [PASSED] active2
[16:05:57] [PASSED] active-inactive
[16:05:57] [PASSED] inactive-active
[16:05:57] [PASSED] inactive-1st_or_active-inactive
[16:05:57] [PASSED] inactive-2nd_or_active-inactive
[16:05:57] [PASSED] inactive-last_or_active-inactive
[16:05:57] [PASSED] inactive-no_or_active-inactive
[16:05:57] ============== [PASSED] xe_rtp_process_tests ===============
[16:05:57] ===================== [PASSED] xe_rtp ======================
[16:05:57] ==================== xe_wa (1 subtest) =====================
[16:05:57] ======================== xe_wa_gt  =========================
[16:05:57] [PASSED] TIGERLAKE B0
[16:05:57] [PASSED] DG1 A0
[16:05:57] [PASSED] DG1 B0
[16:05:57] [PASSED] ALDERLAKE_S A0
[16:05:57] [PASSED] ALDERLAKE_S B0
[16:05:57] [PASSED] ALDERLAKE_S C0
[16:05:57] [PASSED] ALDERLAKE_S D0
[16:05:57] [PASSED] ALDERLAKE_P A0
[16:05:57] [PASSED] ALDERLAKE_P B0
[16:05:57] [PASSED] ALDERLAKE_P C0
[16:05:57] [PASSED] ALDERLAKE_S RPLS D0
[16:05:57] [PASSED] ALDERLAKE_P RPLU E0
[16:05:57] [PASSED] DG2 G10 C0
[16:05:57] [PASSED] DG2 G11 B1
[16:05:57] [PASSED] DG2 G12 A1
[16:05:57] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:05:57] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:05:57] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[16:05:57] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[16:05:57] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[16:05:57] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[16:05:57] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[16:05:57] ==================== [PASSED] xe_wa_gt =====================
[16:05:57] ====================== [PASSED] xe_wa ======================
[16:05:57] ============================================================
[16:05:57] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[16:05:57] Elapsed time: 35.469s total, 4.221s configuring, 30.631s building, 0.606s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:05:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:05:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:06:23] Starting KUnit Kernel (1/1)...
[16:06:23] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:06:23] ============ drm_test_pick_cmdline (2 subtests) ============
[16:06:23] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[16:06:23] =============== drm_test_pick_cmdline_named  ===============
[16:06:23] [PASSED] NTSC
[16:06:23] [PASSED] NTSC-J
[16:06:23] [PASSED] PAL
[16:06:23] [PASSED] PAL-M
[16:06:23] =========== [PASSED] drm_test_pick_cmdline_named ===========
[16:06:23] ============== [PASSED] drm_test_pick_cmdline ==============
[16:06:23] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[16:06:23] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[16:06:23] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[16:06:23] =========== drm_validate_clone_mode (2 subtests) ===========
[16:06:23] ============== drm_test_check_in_clone_mode  ===============
[16:06:23] [PASSED] in_clone_mode
[16:06:23] [PASSED] not_in_clone_mode
[16:06:23] ========== [PASSED] drm_test_check_in_clone_mode ===========
[16:06:23] =============== drm_test_check_valid_clones  ===============
[16:06:23] [PASSED] not_in_clone_mode
[16:06:23] [PASSED] valid_clone
[16:06:23] [PASSED] invalid_clone
[16:06:23] =========== [PASSED] drm_test_check_valid_clones ===========
[16:06:23] ============= [PASSED] drm_validate_clone_mode =============
[16:06:23] ============= drm_validate_modeset (1 subtest) =============
[16:06:23] [PASSED] drm_test_check_connector_changed_modeset
[16:06:23] ============== [PASSED] drm_validate_modeset ===============
[16:06:23] ====== drm_test_bridge_get_current_state (2 subtests) ======
[16:06:23] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[16:06:23] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[16:06:23] ======== [PASSED] drm_test_bridge_get_current_state ========
[16:06:23] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[16:06:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[16:06:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[16:06:23] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[16:06:23] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[16:06:23] ============== drm_bridge_alloc (2 subtests) ===============
[16:06:23] [PASSED] drm_test_drm_bridge_alloc_basic
[16:06:23] [PASSED] drm_test_drm_bridge_alloc_get_put
[16:06:23] ================ [PASSED] drm_bridge_alloc =================
[16:06:23] ============= drm_cmdline_parser (40 subtests) =============
[16:06:23] [PASSED] drm_test_cmdline_force_d_only
[16:06:23] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:06:23] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:06:23] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:06:23] [PASSED] drm_test_cmdline_force_e_only
[16:06:23] [PASSED] drm_test_cmdline_res
[16:06:23] [PASSED] drm_test_cmdline_res_vesa
[16:06:23] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:06:23] [PASSED] drm_test_cmdline_res_rblank
[16:06:23] [PASSED] drm_test_cmdline_res_bpp
[16:06:23] [PASSED] drm_test_cmdline_res_refresh
[16:06:23] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:06:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:06:23] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:06:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:06:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:06:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:06:23] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:06:23] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:06:23] [PASSED] drm_test_cmdline_res_margins_force_on
[16:06:23] [PASSED] drm_test_cmdline_res_vesa_margins
[16:06:23] [PASSED] drm_test_cmdline_name
[16:06:23] [PASSED] drm_test_cmdline_name_bpp
[16:06:23] [PASSED] drm_test_cmdline_name_option
[16:06:23] [PASSED] drm_test_cmdline_name_bpp_option
[16:06:23] [PASSED] drm_test_cmdline_rotate_0
[16:06:23] [PASSED] drm_test_cmdline_rotate_90
[16:06:23] [PASSED] drm_test_cmdline_rotate_180
[16:06:23] [PASSED] drm_test_cmdline_rotate_270
[16:06:23] [PASSED] drm_test_cmdline_hmirror
[16:06:23] [PASSED] drm_test_cmdline_vmirror
[16:06:23] [PASSED] drm_test_cmdline_margin_options
[16:06:23] [PASSED] drm_test_cmdline_multiple_options
[16:06:23] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:06:23] [PASSED] drm_test_cmdline_extra_and_option
[16:06:23] [PASSED] drm_test_cmdline_freestanding_options
[16:06:23] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:06:23] [PASSED] drm_test_cmdline_panel_orientation
[16:06:23] ================ drm_test_cmdline_invalid  =================
[16:06:23] [PASSED] margin_only
[16:06:23] [PASSED] interlace_only
[16:06:23] [PASSED] res_missing_x
[16:06:23] [PASSED] res_missing_y
[16:06:23] [PASSED] res_bad_y
[16:06:23] [PASSED] res_missing_y_bpp
[16:06:23] [PASSED] res_bad_bpp
[16:06:23] [PASSED] res_bad_refresh
[16:06:23] [PASSED] res_bpp_refresh_force_on_off
[16:06:23] [PASSED] res_invalid_mode
[16:06:23] [PASSED] res_bpp_wrong_place_mode
[16:06:23] [PASSED] name_bpp_refresh
[16:06:23] [PASSED] name_refresh
[16:06:23] [PASSED] name_refresh_wrong_mode
[16:06:23] [PASSED] name_refresh_invalid_mode
[16:06:23] [PASSED] rotate_multiple
[16:06:23] [PASSED] rotate_invalid_val
[16:06:23] [PASSED] rotate_truncated
[16:06:23] [PASSED] invalid_option
[16:06:23] [PASSED] invalid_tv_option
[16:06:23] [PASSED] truncated_tv_option
[16:06:23] ============ [PASSED] drm_test_cmdline_invalid =============
[16:06:23] =============== drm_test_cmdline_tv_options  ===============
[16:06:23] [PASSED] NTSC
[16:06:23] [PASSED] NTSC_443
[16:06:23] [PASSED] NTSC_J
[16:06:23] [PASSED] PAL
[16:06:23] [PASSED] PAL_M
[16:06:23] [PASSED] PAL_N
[16:06:23] [PASSED] SECAM
[16:06:23] [PASSED] MONO_525
[16:06:23] [PASSED] MONO_625
[16:06:23] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:06:23] =============== [PASSED] drm_cmdline_parser ================
[16:06:23] ========== drmm_connector_hdmi_init (20 subtests) ==========
[16:06:23] [PASSED] drm_test_connector_hdmi_init_valid
[16:06:23] [PASSED] drm_test_connector_hdmi_init_bpc_8
[16:06:23] [PASSED] drm_test_connector_hdmi_init_bpc_10
[16:06:23] [PASSED] drm_test_connector_hdmi_init_bpc_12
[16:06:23] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[16:06:23] [PASSED] drm_test_connector_hdmi_init_bpc_null
[16:06:23] [PASSED] drm_test_connector_hdmi_init_formats_empty
[16:06:23] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[16:06:23] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[16:06:23] [PASSED] supported_formats=0x9 yuv420_allowed=1
[16:06:23] [PASSED] supported_formats=0x9 yuv420_allowed=0
[16:06:23] [PASSED] supported_formats=0x5 yuv420_allowed=1
[16:06:23] [PASSED] supported_formats=0x5 yuv420_allowed=0
[16:06:23] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:06:23] [PASSED] drm_test_connector_hdmi_init_null_ddc
[16:06:23] [PASSED] drm_test_connector_hdmi_init_null_product
[16:06:23] [PASSED] drm_test_connector_hdmi_init_null_vendor
[16:06:23] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[16:06:23] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[16:06:23] [PASSED] drm_test_connector_hdmi_init_product_valid
[16:06:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[16:06:23] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[16:06:23] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[16:06:23] ========= drm_test_connector_hdmi_init_type_valid  =========
[16:06:23] [PASSED] HDMI-A
[16:06:23] [PASSED] HDMI-B
[16:06:23] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[16:06:23] ======== drm_test_connector_hdmi_init_type_invalid  ========
[16:06:23] [PASSED] Unknown
[16:06:23] [PASSED] VGA
[16:06:23] [PASSED] DVI-I
[16:06:23] [PASSED] DVI-D
[16:06:23] [PASSED] DVI-A
[16:06:23] [PASSED] Composite
[16:06:23] [PASSED] SVIDEO
[16:06:23] [PASSED] LVDS
[16:06:23] [PASSED] Component
[16:06:23] [PASSED] DIN
[16:06:23] [PASSED] DP
[16:06:23] [PASSED] TV
[16:06:23] [PASSED] eDP
[16:06:23] [PASSED] Virtual
[16:06:23] [PASSED] DSI
[16:06:23] [PASSED] DPI
[16:06:23] [PASSED] Writeback
[16:06:23] [PASSED] SPI
[16:06:23] [PASSED] USB
[16:06:23] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[16:06:23] ============ [PASSED] drmm_connector_hdmi_init =============
[16:06:23] ============= drmm_connector_init (3 subtests) =============
[16:06:23] [PASSED] drm_test_drmm_connector_init
[16:06:23] [PASSED] drm_test_drmm_connector_init_null_ddc
[16:06:23] ========= drm_test_drmm_connector_init_type_valid  =========
[16:06:23] [PASSED] Unknown
[16:06:23] [PASSED] VGA
[16:06:23] [PASSED] DVI-I
[16:06:23] [PASSED] DVI-D
[16:06:23] [PASSED] DVI-A
[16:06:23] [PASSED] Composite
[16:06:23] [PASSED] SVIDEO
[16:06:23] [PASSED] LVDS
[16:06:23] [PASSED] Component
[16:06:23] [PASSED] DIN
[16:06:23] [PASSED] DP
[16:06:23] [PASSED] HDMI-A
[16:06:23] [PASSED] HDMI-B
[16:06:23] [PASSED] TV
[16:06:23] [PASSED] eDP
[16:06:23] [PASSED] Virtual
[16:06:23] [PASSED] DSI
[16:06:23] [PASSED] DPI
[16:06:23] [PASSED] Writeback
[16:06:23] [PASSED] SPI
[16:06:23] [PASSED] USB
[16:06:23] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[16:06:23] =============== [PASSED] drmm_connector_init ===============
[16:06:23] ========= drm_connector_dynamic_init (6 subtests) ==========
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_init
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_init_properties
[16:06:23] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[16:06:23] [PASSED] Unknown
[16:06:23] [PASSED] VGA
[16:06:23] [PASSED] DVI-I
[16:06:23] [PASSED] DVI-D
[16:06:23] [PASSED] DVI-A
[16:06:23] [PASSED] Composite
[16:06:23] [PASSED] SVIDEO
[16:06:23] [PASSED] LVDS
[16:06:23] [PASSED] Component
[16:06:23] [PASSED] DIN
[16:06:23] [PASSED] DP
[16:06:23] [PASSED] HDMI-A
[16:06:23] [PASSED] HDMI-B
[16:06:23] [PASSED] TV
[16:06:23] [PASSED] eDP
[16:06:23] [PASSED] Virtual
[16:06:23] [PASSED] DSI
[16:06:23] [PASSED] DPI
[16:06:23] [PASSED] Writeback
[16:06:23] [PASSED] SPI
[16:06:23] [PASSED] USB
[16:06:23] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[16:06:23] ======== drm_test_drm_connector_dynamic_init_name  =========
[16:06:23] [PASSED] Unknown
[16:06:23] [PASSED] VGA
[16:06:23] [PASSED] DVI-I
[16:06:23] [PASSED] DVI-D
[16:06:23] [PASSED] DVI-A
[16:06:23] [PASSED] Composite
[16:06:23] [PASSED] SVIDEO
[16:06:23] [PASSED] LVDS
[16:06:23] [PASSED] Component
[16:06:23] [PASSED] DIN
[16:06:23] [PASSED] DP
[16:06:23] [PASSED] HDMI-A
[16:06:23] [PASSED] HDMI-B
[16:06:23] [PASSED] TV
[16:06:23] [PASSED] eDP
[16:06:23] [PASSED] Virtual
[16:06:23] [PASSED] DSI
[16:06:23] [PASSED] DPI
[16:06:23] [PASSED] Writeback
[16:06:23] [PASSED] SPI
[16:06:23] [PASSED] USB
[16:06:23] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[16:06:23] =========== [PASSED] drm_connector_dynamic_init ============
[16:06:23] ==== drm_connector_dynamic_register_early (4 subtests) =====
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[16:06:23] ====== [PASSED] drm_connector_dynamic_register_early =======
[16:06:23] ======= drm_connector_dynamic_register (7 subtests) ========
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[16:06:23] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[16:06:23] ========= [PASSED] drm_connector_dynamic_register ==========
[16:06:23] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[16:06:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[16:06:23] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[16:06:23] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[16:06:23] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:06:23] ========== drm_test_get_tv_mode_from_name_valid  ===========
[16:06:23] [PASSED] NTSC
[16:06:23] [PASSED] NTSC-443
[16:06:23] [PASSED] NTSC-J
[16:06:23] [PASSED] PAL
[16:06:23] [PASSED] PAL-M
[16:06:23] [PASSED] PAL-N
[16:06:23] [PASSED] SECAM
[16:06:23] [PASSED] Mono
[16:06:23] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:06:23] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:06:23] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:06:23] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[16:06:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[16:06:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[16:06:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[16:06:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[16:06:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[16:06:23] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[16:06:23] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[16:06:23] [PASSED] VIC 96
[16:06:23] [PASSED] VIC 97
[16:06:23] [PASSED] VIC 101
[16:06:23] [PASSED] VIC 102
[16:06:23] [PASSED] VIC 106
[16:06:23] [PASSED] VIC 107
[16:06:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[16:06:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[16:06:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[16:06:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[16:06:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[16:06:23] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[16:06:23] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[16:06:23] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[16:06:23] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[16:06:23] [PASSED] Automatic
[16:06:23] [PASSED] Full
[16:06:23] [PASSED] Limited 16:235
[16:06:23] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[16:06:23] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[16:06:23] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[16:06:23] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[16:06:23] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[16:06:23] [PASSED] RGB
[16:06:23] [PASSED] YUV 4:2:0
[16:06:23] [PASSED] YUV 4:2:2
[16:06:23] [PASSED] YUV 4:4:4
[16:06:23] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[16:06:23] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[16:06:23] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[16:06:23] ============= drm_damage_helper (21 subtests) ==============
[16:06:23] [PASSED] drm_test_damage_iter_no_damage
[16:06:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:06:23] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:06:23] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:06:23] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:06:23] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:06:23] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:06:23] [PASSED] drm_test_damage_iter_simple_damage
[16:06:23] [PASSED] drm_test_damage_iter_single_damage
[16:06:23] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:06:23] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:06:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:06:23] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:06:23] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:06:23] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:06:23] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:06:23] [PASSED] drm_test_damage_iter_damage
[16:06:23] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:06:23] [PASSED] drm_test_damage_iter_damage_one_outside
[16:06:23] [PASSED] drm_test_damage_iter_damage_src_moved
[16:06:23] [PASSED] drm_test_damage_iter_damage_not_visible
[16:06:23] ================ [PASSED] drm_damage_helper ================
[16:06:23] ============== drm_dp_mst_helper (3 subtests) ==============
[16:06:23] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[16:06:23] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:06:23] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:06:23] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:06:23] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:06:23] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:06:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:06:23] ============== drm_test_dp_mst_calc_pbn_div  ===============
[16:06:23] [PASSED] Link rate 2000000 lane count 4
[16:06:23] [PASSED] Link rate 2000000 lane count 2
[16:06:23] [PASSED] Link rate 2000000 lane count 1
[16:06:23] [PASSED] Link rate 1350000 lane count 4
[16:06:23] [PASSED] Link rate 1350000 lane count 2
[16:06:23] [PASSED] Link rate 1350000 lane count 1
[16:06:23] [PASSED] Link rate 1000000 lane count 4
[16:06:23] [PASSED] Link rate 1000000 lane count 2
[16:06:23] [PASSED] Link rate 1000000 lane count 1
[16:06:23] [PASSED] Link rate 810000 lane count 4
[16:06:23] [PASSED] Link rate 810000 lane count 2
[16:06:23] [PASSED] Link rate 810000 lane count 1
[16:06:23] [PASSED] Link rate 540000 lane count 4
[16:06:23] [PASSED] Link rate 540000 lane count 2
[16:06:23] [PASSED] Link rate 540000 lane count 1
[16:06:23] [PASSED] Link rate 270000 lane count 4
[16:06:23] [PASSED] Link rate 270000 lane count 2
[16:06:23] [PASSED] Link rate 270000 lane count 1
[16:06:23] [PASSED] Link rate 162000 lane count 4
[16:06:23] [PASSED] Link rate 162000 lane count 2
[16:06:23] [PASSED] Link rate 162000 lane count 1
[16:06:23] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[16:06:23] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[16:06:23] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:06:23] [PASSED] DP_POWER_UP_PHY with port number
[16:06:23] [PASSED] DP_POWER_DOWN_PHY with port number
[16:06:23] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:06:23] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:06:23] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:06:23] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:06:23] [PASSED] DP_QUERY_PAYLOAD with port number
[16:06:23] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:06:23] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:06:23] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:06:23] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:06:23] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:06:23] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:06:23] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:06:23] [PASSED] DP_REMOTE_I2C_READ with port number
[16:06:23] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:06:23] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:06:23] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:06:23] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:06:23] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:06:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:06:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:06:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:06:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:06:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:06:23] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:06:23] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:06:23] ================ [PASSED] drm_dp_mst_helper ================
[16:06:23] ================== drm_exec (7 subtests) ===================
[16:06:23] [PASSED] sanitycheck
[16:06:23] [PASSED] test_lock
[16:06:23] [PASSED] test_lock_unlock
[16:06:23] [PASSED] test_duplicates
[16:06:23] [PASSED] test_prepare
[16:06:23] [PASSED] test_prepare_array
[16:06:23] [PASSED] test_multiple_loops
[16:06:23] ==================== [PASSED] drm_exec =====================
[16:06:23] =========== drm_format_helper_test (17 subtests) ===========
[16:06:23] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:06:23] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:06:23] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:06:23] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:06:23] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:06:23] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:06:23] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:06:23] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[16:06:23] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:06:23] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:06:23] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:06:23] ============== drm_test_fb_xrgb8888_to_mono  ===============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:06:23] ==================== drm_test_fb_swab  =====================
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ================ [PASSED] drm_test_fb_swab =================
[16:06:23] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[16:06:23] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[16:06:23] [PASSED] single_pixel_source_buffer
[16:06:23] [PASSED] single_pixel_clip_rectangle
[16:06:23] [PASSED] well_known_colors
[16:06:23] [PASSED] destination_pitch
[16:06:23] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[16:06:23] ================= drm_test_fb_clip_offset  =================
[16:06:23] [PASSED] pass through
[16:06:23] [PASSED] horizontal offset
[16:06:23] [PASSED] vertical offset
[16:06:23] [PASSED] horizontal and vertical offset
[16:06:23] [PASSED] horizontal offset (custom pitch)
[16:06:23] [PASSED] vertical offset (custom pitch)
[16:06:23] [PASSED] horizontal and vertical offset (custom pitch)
[16:06:23] ============= [PASSED] drm_test_fb_clip_offset =============
[16:06:23] =================== drm_test_fb_memcpy  ====================
[16:06:23] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[16:06:23] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[16:06:23] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[16:06:23] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[16:06:23] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[16:06:23] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[16:06:23] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[16:06:23] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[16:06:23] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[16:06:23] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[16:06:23] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[16:06:23] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[16:06:23] =============== [PASSED] drm_test_fb_memcpy ================
[16:06:23] ============= [PASSED] drm_format_helper_test ==============
[16:06:23] ================= drm_format (18 subtests) =================
[16:06:23] [PASSED] drm_test_format_block_width_invalid
[16:06:23] [PASSED] drm_test_format_block_width_one_plane
[16:06:23] [PASSED] drm_test_format_block_width_two_plane
[16:06:23] [PASSED] drm_test_format_block_width_three_plane
[16:06:23] [PASSED] drm_test_format_block_width_tiled
[16:06:23] [PASSED] drm_test_format_block_height_invalid
[16:06:23] [PASSED] drm_test_format_block_height_one_plane
[16:06:23] [PASSED] drm_test_format_block_height_two_plane
[16:06:23] [PASSED] drm_test_format_block_height_three_plane
[16:06:23] [PASSED] drm_test_format_block_height_tiled
[16:06:23] [PASSED] drm_test_format_min_pitch_invalid
[16:06:23] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:06:23] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:06:23] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:06:23] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:06:23] [PASSED] drm_test_format_min_pitch_two_plane
[16:06:23] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:06:23] [PASSED] drm_test_format_min_pitch_tiled
[16:06:23] =================== [PASSED] drm_format ====================
[16:06:23] ============== drm_framebuffer (10 subtests) ===============
[16:06:23] ========== drm_test_framebuffer_check_src_coords  ==========
[16:06:23] [PASSED] Success: source fits into fb
[16:06:23] [PASSED] Fail: overflowing fb with x-axis coordinate
[16:06:23] [PASSED] Fail: overflowing fb with y-axis coordinate
[16:06:23] [PASSED] Fail: overflowing fb with source width
[16:06:23] [PASSED] Fail: overflowing fb with source height
[16:06:23] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[16:06:23] [PASSED] drm_test_framebuffer_cleanup
[16:06:23] =============== drm_test_framebuffer_create  ===============
[16:06:23] [PASSED] ABGR8888 normal sizes
[16:06:23] [PASSED] ABGR8888 max sizes
[16:06:23] [PASSED] ABGR8888 pitch greater than min required
[16:06:23] [PASSED] ABGR8888 pitch less than min required
[16:06:23] [PASSED] ABGR8888 Invalid width
[16:06:23] [PASSED] ABGR8888 Invalid buffer handle
[16:06:23] [PASSED] No pixel format
[16:06:23] [PASSED] ABGR8888 Width 0
[16:06:23] [PASSED] ABGR8888 Height 0
[16:06:23] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:06:23] [PASSED] ABGR8888 Large buffer offset
[16:06:23] [PASSED] ABGR8888 Buffer offset for inexistent plane
[16:06:23] [PASSED] ABGR8888 Invalid flag
[16:06:23] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:06:23] [PASSED] ABGR8888 Valid buffer modifier
[16:06:23] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:06:23] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:06:23] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:06:23] [PASSED] NV12 Normal sizes
[16:06:23] [PASSED] NV12 Max sizes
[16:06:23] [PASSED] NV12 Invalid pitch
[16:06:23] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:06:23] [PASSED] NV12 different  modifier per-plane
[16:06:23] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:06:23] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:06:23] [PASSED] NV12 Modifier for inexistent plane
[16:06:23] [PASSED] NV12 Handle for inexistent plane
[16:06:23] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:06:23] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:06:23] [PASSED] YVU420 Normal sizes
[16:06:23] [PASSED] YVU420 Max sizes
[16:06:23] [PASSED] YVU420 Invalid pitch
[16:06:23] [PASSED] YVU420 Different pitches
[16:06:23] [PASSED] YVU420 Different buffer offsets/pitches
[16:06:23] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:06:23] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:06:23] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:06:23] [PASSED] YVU420 Valid modifier
[16:06:23] [PASSED] YVU420 Different modifiers per plane
[16:06:23] [PASSED] YVU420 Modifier for inexistent plane
[16:06:23] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[16:06:23] [PASSED] X0L2 Normal sizes
[16:06:23] [PASSED] X0L2 Max sizes
[16:06:23] [PASSED] X0L2 Invalid pitch
[16:06:23] [PASSED] X0L2 Pitch greater than minimum required
[16:06:23] [PASSED] X0L2 Handle for inexistent plane
[16:06:23] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:06:23] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:06:23] [PASSED] X0L2 Valid modifier
[16:06:23] [PASSED] X0L2 Modifier for inexistent plane
[16:06:23] =========== [PASSED] drm_test_framebuffer_create ===========
[16:06:23] [PASSED] drm_test_framebuffer_free
[16:06:23] [PASSED] drm_test_framebuffer_init
[16:06:23] [PASSED] drm_test_framebuffer_init_bad_format
[16:06:23] [PASSED] drm_test_framebuffer_init_dev_mismatch
[16:06:23] [PASSED] drm_test_framebuffer_lookup
[16:06:23] [PASSED] drm_test_framebuffer_lookup_inexistent
[16:06:23] [PASSED] drm_test_framebuffer_modifiers_not_supported
[16:06:23] ================= [PASSED] drm_framebuffer =================
[16:06:23] ================ drm_gem_shmem (8 subtests) ================
[16:06:23] [PASSED] drm_gem_shmem_test_obj_create
[16:06:23] [PASSED] drm_gem_shmem_test_obj_create_private
[16:06:23] [PASSED] drm_gem_shmem_test_pin_pages
[16:06:23] [PASSED] drm_gem_shmem_test_vmap
[16:06:23] [PASSED] drm_gem_shmem_test_get_sg_table
[16:06:23] [PASSED] drm_gem_shmem_test_get_pages_sgt
[16:06:23] [PASSED] drm_gem_shmem_test_madvise
[16:06:23] [PASSED] drm_gem_shmem_test_purge
[16:06:23] ================== [PASSED] drm_gem_shmem ==================
[16:06:23] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[16:06:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[16:06:23] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[16:06:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[16:06:23] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[16:06:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[16:06:23] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[16:06:23] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[16:06:23] [PASSED] Automatic
[16:06:23] [PASSED] Full
[16:06:23] [PASSED] Limited 16:235
[16:06:23] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[16:06:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[16:06:23] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[16:06:23] [PASSED] drm_test_check_disable_connector
[16:06:23] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[16:06:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[16:06:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[16:06:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[16:06:23] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[16:06:23] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[16:06:23] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[16:06:23] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[16:06:23] [PASSED] drm_test_check_output_bpc_dvi
[16:06:23] [PASSED] drm_test_check_output_bpc_format_vic_1
[16:06:23] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[16:06:23] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[16:06:23] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[16:06:23] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[16:06:23] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[16:06:23] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[16:06:23] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[16:06:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[16:06:23] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[16:06:23] [PASSED] drm_test_check_broadcast_rgb_value
[16:06:23] [PASSED] drm_test_check_bpc_8_value
[16:06:23] [PASSED] drm_test_check_bpc_10_value
[16:06:23] [PASSED] drm_test_check_bpc_12_value
[16:06:23] [PASSED] drm_test_check_format_value
[16:06:23] [PASSED] drm_test_check_tmds_char_value
[16:06:23] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[16:06:23] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[16:06:23] [PASSED] drm_test_check_mode_valid
[16:06:23] [PASSED] drm_test_check_mode_valid_reject
[16:06:23] [PASSED] drm_test_check_mode_valid_reject_rate
[16:06:23] [PASSED] drm_test_check_mode_valid_reject_max_clock
[16:06:23] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[16:06:23] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[16:06:23] [PASSED] drm_test_check_infoframes
[16:06:23] [PASSED] drm_test_check_reject_avi_infoframe
[16:06:23] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[16:06:23] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[16:06:23] [PASSED] drm_test_check_reject_audio_infoframe
[16:06:23] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[16:06:23] ================= drm_managed (2 subtests) =================
[16:06:23] [PASSED] drm_test_managed_release_action
[16:06:23] [PASSED] drm_test_managed_run_action
[16:06:23] =================== [PASSED] drm_managed ===================
[16:06:23] =================== drm_mm (6 subtests) ====================
[16:06:23] [PASSED] drm_test_mm_init
[16:06:23] [PASSED] drm_test_mm_debug
[16:06:23] [PASSED] drm_test_mm_align32
[16:06:23] [PASSED] drm_test_mm_align64
[16:06:23] [PASSED] drm_test_mm_lowest
[16:06:23] [PASSED] drm_test_mm_highest
[16:06:23] ===================== [PASSED] drm_mm ======================
[16:06:23] ============= drm_modes_analog_tv (5 subtests) =============
[16:06:23] [PASSED] drm_test_modes_analog_tv_mono_576i
[16:06:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:06:23] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:06:23] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:06:23] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:06:23] =============== [PASSED] drm_modes_analog_tv ===============
[16:06:23] ============== drm_plane_helper (2 subtests) ===============
[16:06:23] =============== drm_test_check_plane_state  ================
[16:06:23] [PASSED] clipping_simple
[16:06:23] [PASSED] clipping_rotate_reflect
[16:06:23] [PASSED] positioning_simple
[16:06:23] [PASSED] upscaling
[16:06:23] [PASSED] downscaling
[16:06:23] [PASSED] rounding1
[16:06:23] [PASSED] rounding2
[16:06:23] [PASSED] rounding3
[16:06:23] [PASSED] rounding4
[16:06:23] =========== [PASSED] drm_test_check_plane_state ============
[16:06:23] =========== drm_test_check_invalid_plane_state  ============
[16:06:23] [PASSED] positioning_invalid
[16:06:23] [PASSED] upscaling_invalid
[16:06:23] [PASSED] downscaling_invalid
[16:06:23] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:06:23] ================ [PASSED] drm_plane_helper =================
[16:06:23] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:06:23] ====== drm_test_connector_helper_tv_get_modes_check  =======
[16:06:23] [PASSED] None
[16:06:23] [PASSED] PAL
[16:06:23] [PASSED] NTSC
[16:06:23] [PASSED] Both, NTSC Default
[16:06:23] [PASSED] Both, PAL Default
[16:06:23] [PASSED] Both, NTSC Default, with PAL on command-line
[16:06:23] [PASSED] Both, PAL Default, with NTSC on command-line
[16:06:23] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:06:23] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:06:23] ================== drm_rect (9 subtests) ===================
[16:06:23] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:06:23] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:06:23] [PASSED] drm_test_rect_clip_scaled_clipped
[16:06:23] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:06:23] ================= drm_test_rect_intersect  =================
[16:06:23] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:06:23] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:06:23] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:06:23] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:06:23] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:06:23] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:06:23] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:06:23] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:06:23] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:06:23] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:06:23] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:06:23] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:06:23] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:06:23] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:06:23] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[16:06:23] ============= [PASSED] drm_test_rect_intersect =============
[16:06:23] ================ drm_test_rect_calc_hscale  ================
[16:06:23] [PASSED] normal use
[16:06:23] [PASSED] out of max range
[16:06:23] [PASSED] out of min range
[16:06:23] [PASSED] zero dst
[16:06:23] [PASSED] negative src
[16:06:23] [PASSED] negative dst
[16:06:23] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:06:23] ================ drm_test_rect_calc_vscale  ================
[16:06:23] [PASSED] normal use
[16:06:23] [PASSED] out of max range
[16:06:23] [PASSED] out of min range
[16:06:23] [PASSED] zero dst
[16:06:23] [PASSED] negative src
[16:06:23] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[16:06:23] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:06:23] ================== drm_test_rect_rotate  ===================
[16:06:23] [PASSED] reflect-x
[16:06:23] [PASSED] reflect-y
[16:06:23] [PASSED] rotate-0
[16:06:23] [PASSED] rotate-90
[16:06:23] [PASSED] rotate-180
[16:06:23] [PASSED] rotate-270
[16:06:23] ============== [PASSED] drm_test_rect_rotate ===============
[16:06:23] ================ drm_test_rect_rotate_inv  =================
[16:06:23] [PASSED] reflect-x
[16:06:23] [PASSED] reflect-y
[16:06:23] [PASSED] rotate-0
[16:06:23] [PASSED] rotate-90
[16:06:23] [PASSED] rotate-180
[16:06:23] [PASSED] rotate-270
[16:06:23] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:06:23] ==================== [PASSED] drm_rect =====================
[16:06:23] ============ drm_sysfb_modeset_test (1 subtest) ============
[16:06:23] ============ drm_test_sysfb_build_fourcc_list  =============
[16:06:23] [PASSED] no native formats
[16:06:23] [PASSED] XRGB8888 as native format
[16:06:23] [PASSED] remove duplicates
[16:06:23] [PASSED] convert alpha formats
[16:06:23] [PASSED] random formats
[16:06:23] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[16:06:23] ============= [PASSED] drm_sysfb_modeset_test ==============
[16:06:23] ================== drm_fixp (2 subtests) ===================
[16:06:23] [PASSED] drm_test_int2fixp
[16:06:23] [PASSED] drm_test_sm2fixp
[16:06:23] ==================== [PASSED] drm_fixp =====================
[16:06:23] ============================================================
[16:06:23] Testing complete. Ran 621 tests: passed: 621
[16:06:23] Elapsed time: 25.963s total, 1.767s configuring, 24.012s building, 0.182s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[16:06:24] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:06:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:06:35] Starting KUnit Kernel (1/1)...
[16:06:35] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:06:35] ================= ttm_device (5 subtests) ==================
[16:06:35] [PASSED] ttm_device_init_basic
[16:06:35] [PASSED] ttm_device_init_multiple
[16:06:35] [PASSED] ttm_device_fini_basic
[16:06:35] [PASSED] ttm_device_init_no_vma_man
[16:06:35] ================== ttm_device_init_pools  ==================
[16:06:35] [PASSED] No DMA allocations, no DMA32 required
[16:06:35] [PASSED] DMA allocations, DMA32 required
[16:06:35] [PASSED] No DMA allocations, DMA32 required
[16:06:35] [PASSED] DMA allocations, no DMA32 required
[16:06:35] ============== [PASSED] ttm_device_init_pools ==============
[16:06:35] =================== [PASSED] ttm_device ====================
[16:06:35] ================== ttm_pool (8 subtests) ===================
[16:06:35] ================== ttm_pool_alloc_basic  ===================
[16:06:35] [PASSED] One page
[16:06:35] [PASSED] More than one page
[16:06:35] [PASSED] Above the allocation limit
[16:06:35] [PASSED] One page, with coherent DMA mappings enabled
[16:06:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:06:35] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:06:35] ============== ttm_pool_alloc_basic_dma_addr  ==============
[16:06:35] [PASSED] One page
[16:06:35] [PASSED] More than one page
[16:06:35] [PASSED] Above the allocation limit
[16:06:35] [PASSED] One page, with coherent DMA mappings enabled
[16:06:35] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:06:35] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:06:35] [PASSED] ttm_pool_alloc_order_caching_match
[16:06:35] [PASSED] ttm_pool_alloc_caching_mismatch
[16:06:35] [PASSED] ttm_pool_alloc_order_mismatch
[16:06:35] [PASSED] ttm_pool_free_dma_alloc
[16:06:35] [PASSED] ttm_pool_free_no_dma_alloc
[16:06:35] [PASSED] ttm_pool_fini_basic
[16:06:35] ==================== [PASSED] ttm_pool =====================
[16:06:35] ================ ttm_resource (8 subtests) =================
[16:06:35] ================= ttm_resource_init_basic  =================
[16:06:35] [PASSED] Init resource in TTM_PL_SYSTEM
[16:06:35] [PASSED] Init resource in TTM_PL_VRAM
[16:06:35] [PASSED] Init resource in a private placement
[16:06:35] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:06:35] ============= [PASSED] ttm_resource_init_basic =============
[16:06:35] [PASSED] ttm_resource_init_pinned
[16:06:35] [PASSED] ttm_resource_fini_basic
[16:06:35] [PASSED] ttm_resource_manager_init_basic
[16:06:35] [PASSED] ttm_resource_manager_usage_basic
[16:06:35] [PASSED] ttm_resource_manager_set_used_basic
[16:06:35] [PASSED] ttm_sys_man_alloc_basic
[16:06:35] [PASSED] ttm_sys_man_free_basic
[16:06:35] ================== [PASSED] ttm_resource ===================
[16:06:35] =================== ttm_tt (15 subtests) ===================
[16:06:35] ==================== ttm_tt_init_basic  ====================
[16:06:35] [PASSED] Page-aligned size
[16:06:35] [PASSED] Extra pages requested
[16:06:35] ================ [PASSED] ttm_tt_init_basic ================
[16:06:35] [PASSED] ttm_tt_init_misaligned
[16:06:35] [PASSED] ttm_tt_fini_basic
[16:06:35] [PASSED] ttm_tt_fini_sg
[16:06:35] [PASSED] ttm_tt_fini_shmem
[16:06:35] [PASSED] ttm_tt_create_basic
[16:06:35] [PASSED] ttm_tt_create_invalid_bo_type
[16:06:35] [PASSED] ttm_tt_create_ttm_exists
[16:06:35] [PASSED] ttm_tt_create_failed
[16:06:35] [PASSED] ttm_tt_destroy_basic
[16:06:35] [PASSED] ttm_tt_populate_null_ttm
[16:06:35] [PASSED] ttm_tt_populate_populated_ttm
[16:06:35] [PASSED] ttm_tt_unpopulate_basic
[16:06:35] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:06:35] [PASSED] ttm_tt_swapin_basic
[16:06:35] ===================== [PASSED] ttm_tt ======================
[16:06:35] =================== ttm_bo (14 subtests) ===================
[16:06:35] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[16:06:35] [PASSED] Cannot be interrupted and sleeps
[16:06:35] [PASSED] Cannot be interrupted, locks straight away
[16:06:35] [PASSED] Can be interrupted, sleeps
[16:06:35] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:06:35] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:06:35] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:06:35] [PASSED] ttm_bo_reserve_double_resv
[16:06:35] [PASSED] ttm_bo_reserve_interrupted
[16:06:35] [PASSED] ttm_bo_reserve_deadlock
[16:06:35] [PASSED] ttm_bo_unreserve_basic
[16:06:35] [PASSED] ttm_bo_unreserve_pinned
[16:06:35] [PASSED] ttm_bo_unreserve_bulk
[16:06:35] [PASSED] ttm_bo_fini_basic
[16:06:35] [PASSED] ttm_bo_fini_shared_resv
[16:06:35] [PASSED] ttm_bo_pin_basic
[16:06:35] [PASSED] ttm_bo_pin_unpin_resource
[16:06:35] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:06:35] ===================== [PASSED] ttm_bo ======================
[16:06:35] ============== ttm_bo_validate (22 subtests) ===============
[16:06:35] ============== ttm_bo_init_reserved_sys_man  ===============
[16:06:35] [PASSED] Buffer object for userspace
[16:06:35] [PASSED] Kernel buffer object
[16:06:35] [PASSED] Shared buffer object
[16:06:35] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:06:35] ============== ttm_bo_init_reserved_mock_man  ==============
[16:06:35] [PASSED] Buffer object for userspace
[16:06:35] [PASSED] Kernel buffer object
[16:06:35] [PASSED] Shared buffer object
[16:06:35] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:06:35] [PASSED] ttm_bo_init_reserved_resv
[16:06:35] ================== ttm_bo_validate_basic  ==================
[16:06:35] [PASSED] Buffer object for userspace
[16:06:35] [PASSED] Kernel buffer object
[16:06:35] [PASSED] Shared buffer object
[16:06:35] ============== [PASSED] ttm_bo_validate_basic ==============
[16:06:35] [PASSED] ttm_bo_validate_invalid_placement
[16:06:35] ============= ttm_bo_validate_same_placement  ==============
[16:06:35] [PASSED] System manager
[16:06:35] [PASSED] VRAM manager
[16:06:35] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:06:35] [PASSED] ttm_bo_validate_failed_alloc
[16:06:35] [PASSED] ttm_bo_validate_pinned
[16:06:35] [PASSED] ttm_bo_validate_busy_placement
[16:06:35] ================ ttm_bo_validate_multihop  =================
[16:06:35] [PASSED] Buffer object for userspace
[16:06:35] [PASSED] Kernel buffer object
[16:06:35] [PASSED] Shared buffer object
[16:06:35] ============ [PASSED] ttm_bo_validate_multihop =============
[16:06:35] ========== ttm_bo_validate_no_placement_signaled  ==========
[16:06:35] [PASSED] Buffer object in system domain, no page vector
[16:06:35] [PASSED] Buffer object in system domain with an existing page vector
[16:06:35] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:06:35] ======== ttm_bo_validate_no_placement_not_signaled  ========
[16:06:35] [PASSED] Buffer object for userspace
[16:06:35] [PASSED] Kernel buffer object
[16:06:35] [PASSED] Shared buffer object
[16:06:35] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:06:35] [PASSED] ttm_bo_validate_move_fence_signaled
[16:06:35] ========= ttm_bo_validate_move_fence_not_signaled  =========
[16:06:35] [PASSED] Waits for GPU
[16:06:35] [PASSED] Tries to lock straight away
[16:06:35] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:06:35] [PASSED] ttm_bo_validate_swapout
[16:06:35] [PASSED] ttm_bo_validate_happy_evict
[16:06:35] [PASSED] ttm_bo_validate_all_pinned_evict
[16:06:35] [PASSED] ttm_bo_validate_allowed_only_evict
[16:06:35] [PASSED] ttm_bo_validate_deleted_evict
[16:06:35] [PASSED] ttm_bo_validate_busy_domain_evict
[16:06:35] [PASSED] ttm_bo_validate_evict_gutting
[16:06:35] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[16:06:35] ================= [PASSED] ttm_bo_validate =================
[16:06:35] ============================================================
[16:06:35] Testing complete. Ran 102 tests: passed: 102
[16:06:35] Elapsed time: 11.562s total, 1.757s configuring, 9.588s building, 0.179s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915: More uncore nukage from display code (rev2)

[Patchwork]

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== Series Details ==

Series: drm/i915: More uncore nukage from display code (rev2)
URL   : https://patchwork.freedesktop.org/series/163872/
State : success

== Summary ==

CI Bug Log - changes from xe-4820-bd31fb142d057e5995cfeaad45b36e051ccb7ccb_BAT -> xe-pw-163872v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-163872v2_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1:
    - bat-adlp-7:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#7483])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4820-bd31fb142d057e5995cfeaad45b36e051ccb7ccb/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@d-edp1.html

  
#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
    - bat-adlp-7:         [DMESG-WARN][3] ([Intel XE#7483]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4820-bd31fb142d057e5995cfeaad45b36e051ccb7ccb/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/bat-adlp-7/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html

  
  [Intel XE#7483]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7483


Build changes
-------------

  * Linux: xe-4820-bd31fb142d057e5995cfeaad45b36e051ccb7ccb -> xe-pw-163872v2

  IGT_8835: 8835
  xe-4820-bd31fb142d057e5995cfeaad45b36e051ccb7ccb: bd31fb142d057e5995cfeaad45b36e051ccb7ccb
  xe-pw-163872v2: 163872v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/index.html

[-- Attachment #2: Type: text/html, Size: 2575 bytes --]

✓ Xe.CI.FULL: success for drm/i915: More uncore nukage from display code (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 7116 bytes --]

== Series Details ==

Series: drm/i915: More uncore nukage from display code (rev2)
URL   : https://patchwork.freedesktop.org/series/163872/
State : success

== Summary ==

CI Bug Log - changes from xe-4820-bd31fb142d057e5995cfeaad45b36e051ccb7ccb_FULL -> xe-pw-163872v2_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-163872v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@fbdev@write:
    - shard-bmg:          NOTRUN -> [SKIP][1] ([Intel XE#2134]) +1 other test skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-bmg-5/igt@fbdev@write.html

  * igt@kms_atomic_transition@plane-all-modeset-transition:
    - shard-lnl:          NOTRUN -> [SKIP][2] ([Intel XE#3279])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-2/igt@kms_atomic_transition@plane-all-modeset-transition.html

  * igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][3] ([Intel XE#2887]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-2/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-mc-ccs.html

  * igt@kms_content_protection@dp-mst-type-0-hdcp14:
    - shard-lnl:          NOTRUN -> [SKIP][4] ([Intel XE#6974])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-2/igt@kms_content_protection@dp-mst-type-0-hdcp14.html

  * igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#6312] / [Intel XE#651])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-2/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][6] ([Intel XE#656])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#6703]) +441 other tests skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#6901])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-2/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@xe_eudebug_online@pagefault-one-of-many:
    - shard-lnl:          NOTRUN -> [SKIP][9] ([Intel XE#7636])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-2/igt@xe_eudebug_online@pagefault-one-of-many.html

  * igt@xe_exec_balancer@once-parallel-basic:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#7482])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-2/igt@xe_exec_balancer@once-parallel-basic.html

  * igt@xe_exec_basic@multigpu-once-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#1392])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-2/igt@xe_exec_basic@multigpu-once-userptr-rebind.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][12] ([Intel XE#7136])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-2/igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-race-prefetch.html

  * igt@xe_exec_system_allocator@eu-fault-4k-range-device-host:
    - shard-lnl:          [PASS][13] -> [FAIL][14] ([Intel XE#7592])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4820-bd31fb142d057e5995cfeaad45b36e051ccb7ccb/shard-lnl-8/igt@xe_exec_system_allocator@eu-fault-4k-range-device-host.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-5/igt@xe_exec_system_allocator@eu-fault-4k-range-device-host.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma:
    - shard-lnl:          [PASS][15] -> [FAIL][16] ([Intel XE#5625])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4820-bd31fb142d057e5995cfeaad45b36e051ccb7ccb/shard-lnl-6/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-lnl-6/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-multi-vma.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#6557] / [Intel XE#6703]) +5 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-prefetch.html

  * igt@xe_multigpu_svm@mgpu-latency-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#6964]) +1 other test skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/shard-bmg-5/igt@xe_multigpu_svm@mgpu-latency-prefetch.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#3279]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3279
  [Intel XE#5625]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5625
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7592]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7592
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636


Build changes
-------------

  * Linux: xe-4820-bd31fb142d057e5995cfeaad45b36e051ccb7ccb -> xe-pw-163872v2

  IGT_8835: 8835
  xe-4820-bd31fb142d057e5995cfeaad45b36e051ccb7ccb: bd31fb142d057e5995cfeaad45b36e051ccb7ccb
  xe-pw-163872v2: 163872v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-163872v2/index.html

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