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From: "Poosa, Karthik" <karthik.poosa@intel.com>
To: <sashiko-reviews@lists.linux.dev>
Cc: <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v9 01/14] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit
Date: Mon, 12 Oct 2026 16:39:21 +0530	[thread overview]
Message-ID: <d3672dc6-ff87-4f16-8262-ee4a87b83d11@intel.com> (raw)
In-Reply-To: <e597a6a2-bcd3-4945-9f50-0b38f8e6dde1@intel.com>


On 10-10-2026 10:44, Poosa, Karthik wrote:
>
> On 09-10-2026 17:44, sashiko-bot@kernel.org wrote:
>> Thank you for your contribution! Sashiko AI review found 2 potential 
>> issue(s) to consider:
>> - [Medium] drm/xe/hwmon: unchecked return value from 
>> xe_hwmon_pcode_rmw_power_limit()
>> - [Medium] hwmon: ignored pcode read errors fabricate valid sysfs 
>> responses
>> -- 
>>
>> commit 6cc9575a02c32b9a8a28e257650ff7b17698865f
>> Author: Karthik Poosa <karthik.poosa@intel.com>
>>
>> drm/xe/hwmon: Handle pcode read failures of 
>> xe_hwmon_pcode_rmw_power_limit
>>
>> This commit adds a return on read failures inside
>> xe_hwmon_pcode_rmw_power_limit and updates callers to avoid updating
>> power limit settings with invalid data.
>>
>>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c 
>>> b/drivers/gpu/drm/xe/xe_hwmon.c
>>> index 5edeac961ec33..9884e06f83e59 100644
>>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
>>> @@ -232,9 +232,11 @@ static int xe_hwmon_pcode_rmw_power_limit(const 
>>> struct xe_hwmon *hwmon, u32 attr
>>>                             READ_PSYSGPU_POWER_LIMIT :
>>>                             READ_PACKAGE_POWER_LIMIT,
>>> prepare_power_limit_param2(hwmon)), &val0, &val1);
>>> -    if (ret)
>>> -        drm_dbg(&hwmon->xe->drm, "read failed ch %d val0 0x%08x, 
>>> val1 0x%08x, ret %d\n",
>>> +    if (ret) {
>>> +        drm_err(&hwmon->xe->drm, "read failed ch %d val0 0x%08x, 
>>> val1 0x%08x, ret %d\n",
>>>               channel, val0, val1, ret);
>>> +        return ret;
>>> +    }
>> [Severity: Medium]
>> Since this function now returns early on error, skipping the 
>> subsequent PCODE
>> writes, could this cause regressions in 
>> xe_hwmon_get_preregistration_info?
>>
>> In xe_hwmon_get_preregistration_info, there are four calls to this 
>> function
>> that ignore the return value. If these initialization writes fail, the
>> function still sets hwmon->boot_power_limit_read = true.
>>
>> Setting this flag alters the subcommand used for later reads, 
>> changing it from
>> READ_PL_FROM_FW to READ_PL_FROM_PCODE. Could this cause userspace to 
>> receive
>> incorrect power limit values if the initial writes were aborted?
>>
>> [ ... ]
>
> No, This won't cause a regression.
>
> boot_power_limit_read is set only after all four READ_PL_FROM_FW reads 
> succeed. Later PCODE failures don't change the cached pl1_on_boot and 
> pl2_on_boot values.
>
> If the RMW read fails, nothing is written. If the write fails, PCODE 
> doesn't apply it. Either way, PCODE keeps the firmware defaults.
>>> @@ -394,7 +396,9 @@ static int xe_hwmon_power_max_write(struct 
>>> xe_hwmon *hwmon, u32 attr, int channe
>>>           if (hwmon->xe->info.has_mbx_power_limits) {
>>>               drm_dbg(&hwmon->xe->drm, "disabling %s on channel %d\n",
>>>                   PWR_ATTR_TO_STR(attr), channel);
>>> -            xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, 
>>> PWR_LIM_EN, 0);
>>> +            ret = xe_hwmon_pcode_rmw_power_limit(hwmon, attr, 
>>> channel, PWR_LIM_EN, 0);
>>> +            if (ret)
>>> +                goto unlock;
>>>               xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, 
>>> &reg_val);
>> .
>> [Severity: Medium]
>> Is it intentional that the return value of 
>> xe_hwmon_pcode_read_power_limit is
>> discarded right after checking the write failure?
>>
>> If this read fails due to a hardware timeout, it could leave reg_val
>> uninitialized or zeroed, bypassing the disable verification check 
>> that follows.
>>
>> Additionally, could the ignored read errors in xe_hwmon_power_max_read
>> fabricate valid sysfs responses? If xe_hwmon_pcode_read_power_limit 
>> fails in
>> that function, it returns fake 0 readings instead of propagating the 
>> hardware
>> error, which might mislead userspace tools into believing the power 
>> limit is
>> disabled.
> Valid points, but they're unrelated to this patch. this shall be 
> handled in separate patch series.
Raised this patch for this 
https://patchwork.freedesktop.org/patch/759383/?series=175943&rev=1

  reply	other threads:[~2026-10-12 11:09 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-09 12:03 [PATCH v9 00/14] drm/xe/hwmon: Update hwmon thermal mailbox Karthik Poosa
2026-10-09 12:03 ` [PATCH v9 01/14] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit Karthik Poosa
2026-10-09 12:14   ` sashiko-bot
2026-10-10  5:14     ` Poosa, Karthik
2026-10-12 11:09       ` Poosa, Karthik [this message]
2026-10-09 12:03 ` [PATCH v9 02/14] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude Karthik Poosa
2026-10-09 12:03 ` [PATCH v9 03/14] drm/xe/hwmon: Fix memory controller thermal data handling Karthik Poosa
2026-10-09 12:15   ` sashiko-bot
2026-10-09 12:03 ` [PATCH v9 04/14] drm/xe/hwmon: Add helpers to validate thermal sensor readings Karthik Poosa
2026-10-09 12:03 ` [PATCH v9 05/14] drm/xe/hwmon: Handle unavailable memory controller sensors Karthik Poosa
2026-10-09 12:03 ` [PATCH v9 06/14] drm/xe/hwmon: Detect unavailable PCIe thermal sensors Karthik Poosa
2026-10-09 12:03 ` [PATCH v9 07/14] drm/xe/hwmon: Consolidate temperature sensor availability checks Karthik Poosa
2026-10-09 12:16   ` sashiko-bot
2026-10-10  5:19     ` Poosa, Karthik
2026-10-12 13:10       ` Poosa, Karthik
2026-10-09 12:03 ` [PATCH v9 08/14] drm/xe/hwmon: Cache temperature availability to reduce probe time Karthik Poosa
2026-10-09 12:03 ` [PATCH v9 09/14] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers Karthik Poosa
2026-10-09 12:03 ` [PATCH v9 10/14] drm/xe/hwmon: Add platform-aware VRAM thermal channel support Karthik Poosa
2026-10-09 12:18   ` sashiko-bot
2026-10-10  5:39     ` Poosa, Karthik
2026-10-09 12:03 ` [PATCH v9 11/14] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754 Karthik Poosa
2026-10-09 12:03 ` [PATCH v9 12/14] drm/xe/hwmon: Update memory controller temperature offset for CRI Karthik Poosa
2026-10-09 12:03 ` [PATCH v9 13/14] drm/xe/hwmon: add PCIe temperature support " Karthik Poosa
2026-10-09 12:03 ` [PATCH v9 14/14] drm/xe/hwmon: Simplify temperature channels config Karthik Poosa
2026-10-09 12:17 ` ✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox (rev6) Patchwork
2026-10-09 13:42 ` ✓ Xe.CI.BAT: " Patchwork

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