Re: [PATCH] drm/xe: Apply Wa_14020316580 in xe_gt_idle_enable_pg()

[Riana Tauro <riana.tauro@intel.com>]

On 11/29/2025 10:55 AM, Vinay Belgaumkar wrote:
> Wa_14020316580 was getting clobbered by power gating init code
> later in the driver load sequence. Move the Wa so that
> it applies correctly.
> 
> Fixes: 7cd05ef89c9d ("drm/xe/xe2hpm: Add initial set of workarounds")
> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>

Looks good to me

Reviewed-by: Riana Tauro <riana.tauro@intel.com>


> ---
>   drivers/gpu/drm/xe/xe_gt_idle.c    | 8 ++++++++
>   drivers/gpu/drm/xe/xe_wa.c         | 8 --------
>   drivers/gpu/drm/xe/xe_wa_oob.rules | 1 +
>   3 files changed, 9 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gt_idle.c b/drivers/gpu/drm/xe/xe_gt_idle.c
> index 3ca7bd7c9bcd..c1c9bec3c487 100644
> --- a/drivers/gpu/drm/xe/xe_gt_idle.c
> +++ b/drivers/gpu/drm/xe/xe_gt_idle.c
> @@ -5,6 +5,7 @@
>   
>   #include <drm/drm_managed.h>
>   
> +#include <generated/xe_wa_oob.h>
>   #include "xe_force_wake.h"
>   #include "xe_device.h"
>   #include "xe_gt.h"
> @@ -16,6 +17,7 @@
>   #include "xe_mmio.h"
>   #include "xe_pm.h"
>   #include "xe_sriov.h"
> +#include "xe_wa.h"
>   
>   /**
>    * DOC: Xe GT Idle
> @@ -144,6 +146,12 @@ void xe_gt_idle_enable_pg(struct xe_gt *gt)
>   		xe_mmio_write32(mmio, RENDER_POWERGATE_IDLE_HYSTERESIS, 25);
>   	}
>   
> +	if (XE_GT_WA(gt, 14020316580))
> +		gtidle->powergate_enable &= ~(VDN_HCP_POWERGATE_ENABLE(0) |
> +					      VDN_MFXVDENC_POWERGATE_ENABLE(0) |
> +					      VDN_HCP_POWERGATE_ENABLE(2) |
> +					      VDN_MFXVDENC_POWERGATE_ENABLE(2));
> +
>   	xe_mmio_write32(mmio, POWERGATE_ENABLE, gtidle->powergate_enable);
>   }
>   
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index 3764abca3d4f..e32dd2fde6f1 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -270,14 +270,6 @@ static const struct xe_rtp_entry_sr gt_was[] = {
>   	  XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),
>   	  XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
>   	},
> -	{ XE_RTP_NAME("14020316580"),
> -	  XE_RTP_RULES(MEDIA_VERSION(1301)),
> -	  XE_RTP_ACTIONS(CLR(POWERGATE_ENABLE,
> -			     VDN_HCP_POWERGATE_ENABLE(0) |
> -			     VDN_MFXVDENC_POWERGATE_ENABLE(0) |
> -			     VDN_HCP_POWERGATE_ENABLE(2) |
> -			     VDN_MFXVDENC_POWERGATE_ENABLE(2))),
> -	},
>   	{ XE_RTP_NAME("14019449301"),
>   	  XE_RTP_RULES(MEDIA_VERSION(1301), ENGINE_CLASS(VIDEO_DECODE)),
>   	  XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F08(0), CG3DDISHRS_CLKGATE_DIS)),
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index fb38eb3d6e9a..7ca7258eb5d8 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -76,3 +76,4 @@
>   
>   15015404425_disable	PLATFORM(PANTHERLAKE), MEDIA_STEP(B0, FOREVER)
>   16026007364    MEDIA_VERSION(3000)
> +14020316580    MEDIA_VERSION(1301)