[PATCH 0/6] PSR/Panel Replay/ALPM logging improvements

[PATCH 0/6] PSR/Panel Replay/ALPM logging improvements

[Jouni Högander]

These patches are adding traces to ease parsing PSR, Panel Replay and
ALPM CRTC state using dmesg. Also printing out DPCD capability/support
registers for these features are dumped out.

Jouni Högander (7):
  drm/i915/psr: Improve PSR state information in crtc state dump
  drm/i915/alpm: Dump out computed ALPM parameters in crtc state dump
  drm/dp: Include PSR2 granularity registers into PSR capability size
    define
  drm/i915/psr: Add new macro for accessing cached PSR DPCD registers
  drm/i915/psr: Read all PSR capability registers at once
  drm/i915/psr: Dump out PSR and Panel Replay DPCD registers
  drm/i915/alpm: Dump out ALPM capability DPCD register

 .../drm/i915/display/intel_crtc_state_dump.c  | 16 +++++-
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c       |  2 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 55 ++++++++-----------
 include/drm/display/drm_dp.h                  |  2 +-
 5 files changed, 41 insertions(+), 35 deletions(-)

-- 
2.43.0

[PATCH 1/7] drm/i915/psr: Improve PSR state information in crtc state dump

[Jouni Högander]

We are currenty missing some information in crtc state dump about computed
PSR state. Add this missing information.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index c85ba9a95322..41aa28f1c72c 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -244,12 +244,16 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
 		drm_printf(&p, "sdp split: %s\n",
 			   str_enabled_disabled(pipe_config->sdp_split_enable));
 
-		drm_printf(&p, "psr: %s, selective update: %s, panel replay: %s, selective fetch: %s\n",
+		drm_printf(&p, "psr: %s, selective update: %s, panel replay: %s, selective fetch: %s (y granularity = %d), early transport: %s, sdp prior scanline = %s, entry setup frames = %d\n",
 			   str_enabled_disabled(pipe_config->has_psr &&
 						!pipe_config->has_panel_replay),
 			   str_enabled_disabled(pipe_config->has_sel_update),
 			   str_enabled_disabled(pipe_config->has_panel_replay),
-			   str_enabled_disabled(pipe_config->enable_psr2_sel_fetch));
+			   str_enabled_disabled(pipe_config->enable_psr2_sel_fetch),
+			   pipe_config->su_y_granularity,
+			   str_enabled_disabled(pipe_config->enable_psr2_su_region_et),
+			   str_enabled_disabled(pipe_config->req_psr2_sdp_prior_scanline),
+			   pipe_config->entry_setup_frames);
 		drm_printf(&p, "minimum hblank: %d\n", pipe_config->min_hblank);
 	}
 
-- 
2.43.0

[PATCH 2/7] drm/i915/alpm: Dump out computed ALPM parameters in crtc state dump

[Jouni Högander]

We are currently not dumping out any information about computed ALPM
parameters. Add this missing information.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_crtc_state_dump.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 41aa28f1c72c..e610527bb5f6 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -254,6 +254,14 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config,
 			   str_enabled_disabled(pipe_config->enable_psr2_su_region_et),
 			   str_enabled_disabled(pipe_config->req_psr2_sdp_prior_scanline),
 			   pipe_config->entry_setup_frames);
+		drm_printf(&p, "alpm: lobf = %s, io wake lines = %d, fast wake lines = %d, check entry lines = %d, aux less wake lines = %d, silence period symbol clocks = %d, lfps half cycle number of symbols = %d\n",
+			   str_enabled_disabled(pipe_config->has_lobf),
+			   pipe_config->alpm_state.io_wake_lines,
+			   pipe_config->alpm_state.fast_wake_lines,
+			   pipe_config->alpm_state.check_entry_lines,
+			   pipe_config->alpm_state.aux_less_wake_lines,
+			   pipe_config->alpm_state.silence_period_sym_clocks,
+			   pipe_config->alpm_state.lfps_half_cycle_num_of_syms);
 		drm_printf(&p, "minimum hblank: %d\n", pipe_config->min_hblank);
 	}
 
-- 
2.43.0

[PATCH 3/7] drm/dp: Include PSR2 granularity registers into PSR capability size define

[Jouni Högander]

Currently EDP_PSR_RECEIVER_CAP_SIZE contains only DP_PSR_SUPPORT and
DP_PSR_CAPS register. Include also granularity registers into this size to
avoid need to read them separately.

Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 include/drm/display/drm_dp.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 8b15d3eeb716..9af87c88b9c4 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -1691,7 +1691,7 @@ enum drm_dp_phy {
 #define DP_RECEIVER_CAP_SIZE		0xf
 #define DP_DSC_RECEIVER_CAP_SIZE        0x10 /* DSC Capabilities 0x60 through 0x6F */
 #define DP_DSC_BRANCH_CAP_SIZE		3
-#define EDP_PSR_RECEIVER_CAP_SIZE	2
+#define EDP_PSR_RECEIVER_CAP_SIZE	5
 #define EDP_DISPLAY_CTL_CAP_SIZE	5
 #define DP_LTTPR_COMMON_CAP_SIZE	8
 #define DP_LTTPR_PHY_CAP_SIZE		3
-- 
2.43.0

[PATCH 4/7] drm/i915/psr: Add new macro for accessing cached PSR DPCD registers

[Jouni Högander]

Add new macro to ease accessing cached PSR DPCD registers.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index e2496db1642a..7d04867e3053 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -584,6 +584,7 @@ struct intel_connector {
 
 		struct {
 			u8 dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
+#define INTEL_PSR_DPCD_INDEX(psr_dpcd_register)	((psr_dpcd_register) - DP_PSR_SUPPORT)
 
 			bool support;
 			bool su_support;
-- 
2.43.0

[PATCH 5/7] drm/i915/psr: Read all PSR capability registers at once

[Jouni Högander]

Currently we are reading PSR capability registers in three phases:

1. read PSR capability and support register
2. read PSR2 X granularity register
3. read PSR2 Y grnaularity register

instead read them on one go and cache them all in
intel_connector:psr_caps:psr_dpcd.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 48 ++++++++----------------
 1 file changed, 16 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a927b73c3f6e..0adaba7e8f7a 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -496,47 +496,31 @@ static u8 intel_dp_get_sink_sync_latency(struct intel_dp *intel_dp)
 	return val;
 }
 
-static void _psr_compute_su_granularity(struct intel_dp *intel_dp,
-					struct intel_connector *connector)
+static void _psr_compute_su_granularity(struct intel_connector *connector)
 {
-	struct intel_display *display = to_intel_display(intel_dp);
-	ssize_t r;
-	__le16 w;
+	u16 w;
 	u8 y;
 
 	/*
 	 * If sink don't have specific granularity requirements set legacy
 	 * ones.
 	 */
-	if (!(connector->dp.psr_caps.dpcd[1] & DP_PSR2_SU_GRANULARITY_REQUIRED)) {
+	if (!(connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_CAPS)] & DP_PSR2_SU_GRANULARITY_REQUIRED)) {
 		/* As PSR2 HW sends full lines, we do not care about x granularity */
-		w = cpu_to_le16(4);
+		w = 4;
 		y = 4;
 		goto exit;
 	}
 
-	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY, &w, sizeof(w));
-	if (r != sizeof(w))
-		drm_dbg_kms(display->drm,
-			    "Unable to read selective update x granularity\n");
 	/*
 	 * Spec says that if the value read is 0 the default granularity should
 	 * be used instead.
 	 */
-	if (r != sizeof(w) || w == 0)
-		w = cpu_to_le16(4);
-
-	r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_Y_GRANULARITY, &y, 1);
-	if (r != 1) {
-		drm_dbg_kms(display->drm,
-			    "Unable to read selective update y granularity\n");
-		y = 4;
-	}
-	if (y == 0)
-		y = 1;
+	w = le16_to_cpu(*(__le16 *)&connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR2_SU_X_GRANULARITY)]) ? : 4;
+	y = connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR2_SU_Y_GRANULARITY)] ? : 1;
 
 exit:
-	connector->dp.psr_caps.su_w_granularity = le16_to_cpu(w);
+	connector->dp.psr_caps.su_w_granularity = w;
 	connector->dp.psr_caps.su_y_granularity = y;
 }
 
@@ -672,11 +656,11 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp, struct intel_connector *co
 	if (ret < 0)
 		return;
 
-	if (!connector->dp.psr_caps.dpcd[0])
+	if (!connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)])
 		return;
 
 	drm_dbg_kms(display->drm, "eDP panel supports PSR version %x\n",
-		    connector->dp.psr_caps.dpcd[0]);
+		    connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)]);
 
 	if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_PSR)) {
 		drm_dbg_kms(display->drm,
@@ -696,8 +680,8 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp, struct intel_connector *co
 	connector->dp.psr_caps.sync_latency = intel_dp_get_sink_sync_latency(intel_dp);
 
 	if (DISPLAY_VER(display) >= 9 &&
-	    connector->dp.psr_caps.dpcd[0] >= DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) {
-		bool y_req = connector->dp.psr_caps.dpcd[1] &
+	    connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)] >= DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) {
+		bool y_req = connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_CAPS)] &
 			     DP_PSR2_SU_Y_COORDINATE_REQUIRED;
 
 		/*
@@ -718,7 +702,7 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp, struct intel_connector *co
 	}
 
 	if (connector->dp.psr_caps.su_support)
-		_psr_compute_su_granularity(intel_dp, connector);
+		_psr_compute_su_granularity(connector);
 }
 
 void intel_psr_init_dpcd(struct intel_dp *intel_dp, struct intel_connector *connector)
@@ -777,7 +761,7 @@ static bool psr2_su_region_et_valid(struct intel_connector *connector, bool pane
 	return panel_replay ?
 		connector->dp.panel_replay_caps.dpcd[INTEL_PR_DPCD_INDEX(DP_PANEL_REPLAY_CAP_SUPPORT)] &
 		DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT :
-		connector->dp.psr_caps.dpcd[0] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED;
+		connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED;
 }
 
 static void _panel_replay_enable_sink(struct intel_dp *intel_dp,
@@ -1415,7 +1399,7 @@ static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
 	if (psr_setup_time < 0) {
 		drm_dbg_kms(display->drm,
 			    "PSR condition failed: Invalid PSR setup time (0x%02x)\n",
-			    connector->dp.psr_caps.dpcd[1]);
+			    connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_CAPS)]);
 		return -ETIME;
 	}
 
@@ -4222,8 +4206,8 @@ static void intel_psr_sink_capability(struct intel_connector *connector,
 		   str_yes_no(connector->dp.psr_caps.support));
 
 	if (connector->dp.psr_caps.support)
-		seq_printf(m, " [0x%02x]", connector->dp.psr_caps.dpcd[0]);
-	if (connector->dp.psr_caps.dpcd[0] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED)
+		seq_printf(m, " [0x%02x]", connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)]);
+	if (connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED)
 		seq_printf(m, " (Early Transport)");
 	seq_printf(m, ", Panel Replay = %s", str_yes_no(connector->dp.panel_replay_caps.support));
 	seq_printf(m, ", Panel Replay Selective Update = %s",
-- 
2.43.0

[PATCH 6/7] drm/i915/psr: Dump out PSR and Panel Replay DPCD registers

[Jouni Högander]

Add dumping out PSR and Panel Replay DPCD registers after reading
them. This helps parsing dmesg logs and tracing possible PSR/Panel Replay
issues.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 0adaba7e8f7a..129ba0da19ee 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -608,6 +608,10 @@ static void _panel_replay_init_dpcd(struct intel_dp *intel_dp, struct intel_conn
 	if (ret < 0)
 		return;
 
+	drm_dbg_kms(display->drm, "Panel Replay DPCD: %*ph\n",
+		    DP_PANEL_REPLAY_CAP_SIZE,
+		    connector->dp.panel_replay_caps.dpcd);
+
 	if (!(connector->dp.panel_replay_caps.dpcd[INTEL_PR_DPCD_INDEX(DP_PANEL_REPLAY_CAP_SUPPORT)] &
 	      DP_PANEL_REPLAY_SUPPORT))
 		return;
@@ -656,6 +660,9 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp, struct intel_connector *co
 	if (ret < 0)
 		return;
 
+	drm_dbg_kms(display->drm, "PSR DPCD: %*ph\n", EDP_PSR_RECEIVER_CAP_SIZE,
+		    connector->dp.psr_caps.dpcd);
+
 	if (!connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)])
 		return;
 
-- 
2.43.0

[PATCH 7/7] drm/i915/alpm: Dump out ALPM capability DPCD register

[Jouni Högander]

Add dumping out ALPM capability DPCD registers. This helps parsing dmesg
logs and tracing possible ALPM issues.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4955bd8b11d7..6906226d8a9d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4768,6 +4768,8 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp, struct intel_connector *connector
 	if (ret < 0)
 		return false;
 
+	drm_dbg_kms(display->drm, "ALPM DPCD: %02x\n", intel_dp->alpm_dpcd);
+
 	/*
 	 * This has to be called after intel_dp->edp_dpcd is filled, PSR checks
 	 * for SET_POWER_CAPABLE bit in intel_dp->edp_dpcd[1]
-- 
2.43.0

Re: [PATCH 4/7] drm/i915/psr: Add new macro for accessing cached PSR DPCD registers

[Jani Nikula]

On Wed, 08 Apr 2026, Jouni Högander <jouni.hogander@intel.com> wrote:
> Add new macro to ease accessing cached PSR DPCD registers.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e2496db1642a..7d04867e3053 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -584,6 +584,7 @@ struct intel_connector {
>  
>  		struct {
>  			u8 dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
> +#define INTEL_PSR_DPCD_INDEX(psr_dpcd_register)	((psr_dpcd_register) - DP_PSR_SUPPORT)

Dunno, feels like maybe this should be in intel_psr.c. The point being,
that the whole member should basically be off-limits outside of
intel_psr.c.

BR,
Jani.

>  
>  			bool support;
>  			bool su_support;

-- 
Jani Nikula, Intel

✗ CI.checkpatch: warning for PSR/Panel Replay/ALPM logging improvements

[Patchwork]

== Series Details ==

Series: PSR/Panel Replay/ALPM logging improvements
URL   : https://patchwork.freedesktop.org/series/164546/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 50d45c9c4ab549ca359cbf235341bc0c93a9f8cd
Author: Jouni Högander <jouni.hogander@intel.com>
Date:   Wed Apr 8 17:00:59 2026 +0300

    drm/i915/alpm: Dump out ALPM capability DPCD register
    
    Add dumping out ALPM capability DPCD registers. This helps parsing dmesg
    logs and tracing possible ALPM issues.
    
    Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
+ /mt/dim checkpatch 05dcf2051adc715e5c76bb3d4fefea2696a69876 drm-intel
044ee658c009 drm/i915/psr: Improve PSR state information in crtc state dump
6ff3e1889a4d drm/i915/alpm: Dump out computed ALPM parameters in crtc state dump
9a713666f3f4 drm/dp: Include PSR2 granularity registers into PSR capability size define
c711c89d00a2 drm/i915/psr: Add new macro for accessing cached PSR DPCD registers
f5926d17e38a drm/i915/psr: Read all PSR capability registers at once
-:43: WARNING:LONG_LINE: line length of 114 exceeds 100 columns
#43: FILE: drivers/gpu/drm/i915/display/intel_psr.c:508:
+	if (!(connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_CAPS)] & DP_PSR2_SU_GRANULARITY_REQUIRED)) {

-:70: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#70: FILE: drivers/gpu/drm/i915/display/intel_psr.c:519:
+	w = le16_to_cpu(*(__le16 *)&connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR2_SU_X_GRANULARITY)]) ? : 4;

-:99: WARNING:LONG_LINE: line length of 117 exceeds 100 columns
#99: FILE: drivers/gpu/drm/i915/display/intel_psr.c:683:
+	    connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)] >= DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) {

-:118: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#118: FILE: drivers/gpu/drm/i915/display/intel_psr.c:764:
+		connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED;

-:137: WARNING:LONG_LINE: line length of 110 exceeds 100 columns
#137: FILE: drivers/gpu/drm/i915/display/intel_psr.c:4209:
+		seq_printf(m, " [0x%02x]", connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)]);

-:138: WARNING:LONG_LINE: line length of 115 exceeds 100 columns
#138: FILE: drivers/gpu/drm/i915/display/intel_psr.c:4210:
+	if (connector->dp.psr_caps.dpcd[INTEL_PSR_DPCD_INDEX(DP_PSR_SUPPORT)] == DP_PSR2_WITH_Y_COORD_ET_SUPPORTED)

total: 0 errors, 6 warnings, 0 checks, 111 lines checked
39ad26caf191 drm/i915/psr: Dump out PSR and Panel Replay DPCD registers
50d45c9c4ab5 drm/i915/alpm: Dump out ALPM capability DPCD register

✗ CI.KUnit: failure for PSR/Panel Replay/ALPM logging improvements

[Patchwork]

== Series Details ==

Series: PSR/Panel Replay/ALPM logging improvements
URL   : https://patchwork.freedesktop.org/series/164546/
State : failure

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[14:09:07] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:09:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:09:42] Starting KUnit Kernel (1/1)...
[14:09:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:09:42] ================== guc_buf (11 subtests) ===================
[14:09:42] [PASSED] test_smallest
[14:09:42] [PASSED] test_largest
[14:09:42] [PASSED] test_granular
[14:09:42] [PASSED] test_unique
[14:09:42] [PASSED] test_overlap
[14:09:42] [PASSED] test_reusable
[14:09:42] [PASSED] test_too_big
[14:09:42] [PASSED] test_flush
[14:09:42] [PASSED] test_lookup
[14:09:42] [PASSED] test_data
[14:09:42] [PASSED] test_class
[14:09:42] ===================== [PASSED] guc_buf =====================
[14:09:42] =================== guc_dbm (7 subtests) ===================
[14:09:42] [PASSED] test_empty
[14:09:42] [PASSED] test_default
[14:09:42] ======================== test_size  ========================
[14:09:42] [PASSED] 4
[14:09:42] [PASSED] 8
[14:09:42] [PASSED] 32
[14:09:42] [PASSED] 256
[14:09:42] ==================== [PASSED] test_size ====================
[14:09:42] ======================= test_reuse  ========================
[14:09:42] [PASSED] 4
[14:09:42] [PASSED] 8
[14:09:42] [PASSED] 32
[14:09:42] [PASSED] 256
[14:09:42] =================== [PASSED] test_reuse ====================
[14:09:42] =================== test_range_overlap  ====================
[14:09:42] [PASSED] 4
[14:09:42] [PASSED] 8
[14:09:42] [PASSED] 32
[14:09:42] [PASSED] 256
[14:09:42] =============== [PASSED] test_range_overlap ================
[14:09:42] =================== test_range_compact  ====================
[14:09:42] [PASSED] 4
[14:09:42] [PASSED] 8
[14:09:42] [PASSED] 32
[14:09:42] [PASSED] 256
[14:09:42] =============== [PASSED] test_range_compact ================
[14:09:42] ==================== test_range_spare  =====================
[14:09:42] [PASSED] 4
[14:09:42] [PASSED] 8
[14:09:42] [PASSED] 32
[14:09:42] [PASSED] 256
[14:09:42] ================ [PASSED] test_range_spare =================
[14:09:42] ===================== [PASSED] guc_dbm =====================
[14:09:42] =================== guc_idm (6 subtests) ===================
[14:09:42] [PASSED] bad_init
[14:09:42] [PASSED] no_init
[14:09:42] [PASSED] init_fini
[14:09:42] [PASSED] check_used
[14:09:43] [PASSED] check_quota
[14:09:43] [PASSED] check_all
[14:09:43] ===================== [PASSED] guc_idm =====================
[14:09:43] ================== no_relay (3 subtests) ===================
[14:09:43] [PASSED] xe_drops_guc2pf_if_not_ready
[14:09:43] [PASSED] xe_drops_guc2vf_if_not_ready
[14:09:43] [PASSED] xe_rejects_send_if_not_ready
[14:09:43] ==================== [PASSED] no_relay =====================
[14:09:43] ================== pf_relay (14 subtests) ==================
[14:09:43] [PASSED] pf_rejects_guc2pf_too_short
[14:09:43] [PASSED] pf_rejects_guc2pf_too_long
[14:09:43] [PASSED] pf_rejects_guc2pf_no_payload
[14:09:43] [PASSED] pf_fails_no_payload
[14:09:43] [PASSED] pf_fails_bad_origin
[14:09:43] [PASSED] pf_fails_bad_type
[14:09:43] [PASSED] pf_txn_reports_error
[14:09:43] [PASSED] pf_txn_sends_pf2guc
[14:09:43] [PASSED] pf_sends_pf2guc
[14:09:43] [SKIPPED] pf_loopback_nop
[14:09:43] [SKIPPED] pf_loopback_echo
[14:09:43] [SKIPPED] pf_loopback_fail
[14:09:43] [SKIPPED] pf_loopback_busy
[14:09:43] [SKIPPED] pf_loopback_retry
[14:09:43] ==================== [PASSED] pf_relay =====================
[14:09:43] ================== vf_relay (3 subtests) ===================
[14:09:43] [PASSED] vf_rejects_guc2vf_too_short
[14:09:43] [PASSED] vf_rejects_guc2vf_too_long
[14:09:43] [PASSED] vf_rejects_guc2vf_no_payload
[14:09:43] ==================== [PASSED] vf_relay =====================
[14:09:43] ================ pf_gt_config (9 subtests) =================
[14:09:43] [PASSED] fair_contexts_1vf
[14:09:43] [PASSED] fair_doorbells_1vf
[14:09:43] [PASSED] fair_ggtt_1vf
[14:09:43] ====================== fair_vram_1vf  ======================
[14:09:43] [PASSED] 3.50 GiB
[14:09:43] [PASSED] 11.5 GiB
[14:09:43] [PASSED] 15.5 GiB
[14:09:43] [PASSED] 31.5 GiB
[14:09:43] [PASSED] 63.5 GiB
[14:09:43] [PASSED] 1.91 GiB
[14:09:43] ================== [PASSED] fair_vram_1vf ==================
[14:09:43] ================ fair_vram_1vf_admin_only  =================
[14:09:43] [PASSED] 3.50 GiB
[14:09:43] [PASSED] 11.5 GiB
[14:09:43] [PASSED] 15.5 GiB
[14:09:43] [PASSED] 31.5 GiB
[14:09:43] [PASSED] 63.5 GiB
[14:09:43] [PASSED] 1.91 GiB
[14:09:43] ============ [PASSED] fair_vram_1vf_admin_only =============
[14:09:43] ====================== fair_contexts  ======================
[14:09:43] [PASSED] 1 VF
[14:09:43] [PASSED] 2 VFs
[14:09:43] [PASSED] 3 VFs
[14:09:43] [PASSED] 4 VFs
[14:09:43] [PASSED] 5 VFs
[14:09:43] [PASSED] 6 VFs
[14:09:43] [PASSED] 7 VFs
[14:09:43] [PASSED] 8 VFs
[14:09:43] [PASSED] 9 VFs
[14:09:43] [PASSED] 10 VFs
[14:09:43] [PASSED] 11 VFs
[14:09:43] [PASSED] 12 VFs
[14:09:43] [PASSED] 13 VFs
[14:09:43] [PASSED] 14 VFs
[14:09:43] [PASSED] 15 VFs
[14:09:43] [PASSED] 16 VFs
[14:09:43] [PASSED] 17 VFs
[14:09:43] [PASSED] 18 VFs
[14:09:43] [PASSED] 19 VFs
[14:09:43] [PASSED] 20 VFs
[14:09:43] [PASSED] 21 VFs
[14:09:43] [PASSED] 22 VFs
[14:09:43] [PASSED] 23 VFs
[14:09:43] [PASSED] 24 VFs
[14:09:43] [PASSED] 25 VFs
[14:09:43] [PASSED] 26 VFs
[14:09:43] [PASSED] 27 VFs
[14:09:43] [PASSED] 28 VFs
[14:09:43] [PASSED] 29 VFs
[14:09:43] [PASSED] 30 VFs
[14:09:43] [PASSED] 31 VFs
[14:09:43] [PASSED] 32 VFs
[14:09:43] [PASSED] 33 VFs
[14:09:43] [PASSED] 34 VFs
[14:09:43] [PASSED] 35 VFs
[14:09:43] [PASSED] 36 VFs
[14:09:43] [PASSED] 37 VFs
[14:09:43] [PASSED] 38 VFs
[14:09:43] [PASSED] 39 VFs
[14:09:43] [PASSED] 40 VFs
[14:09:43] [PASSED] 41 VFs
[14:09:43] [PASSED] 42 VFs
[14:09:43] [PASSED] 43 VFs
[14:09:43] [PASSED] 44 VFs
[14:09:43] [PASSED] 45 VFs
[14:09:43] [PASSED] 46 VFs
[14:09:43] [PASSED] 47 VFs
[14:09:43] [PASSED] 48 VFs
[14:09:43] [PASSED] 49 VFs
[14:09:43] [PASSED] 50 VFs
[14:09:43] [PASSED] 51 VFs
[14:09:43] [PASSED] 52 VFs
[14:09:43] [PASSED] 53 VFs
[14:09:43] [PASSED] 54 VFs
[14:09:43] [PASSED] 55 VFs
[14:09:43] [PASSED] 56 VFs
[14:09:43] [PASSED] 57 VFs
[14:09:43] [PASSED] 58 VFs
[14:09:43] [PASSED] 59 VFs
[14:09:43] [PASSED] 60 VFs
[14:09:43] [PASSED] 61 VFs
[14:09:43] [PASSED] 62 VFs
[14:09:43] [PASSED] 63 VFs
[14:09:43] ================== [PASSED] fair_contexts ==================
[14:09:43] ===================== fair_doorbells  ======================
[14:09:43] [PASSED] 1 VF
[14:09:43] [PASSED] 2 VFs
[14:09:43] [PASSED] 3 VFs
[14:09:43] [PASSED] 4 VFs
[14:09:43] [PASSED] 5 VFs
[14:09:43] [PASSED] 6 VFs
[14:09:43] [PASSED] 7 VFs
[14:09:43] [PASSED] 8 VFs
[14:09:43] [PASSED] 9 VFs
[14:09:43] [PASSED] 10 VFs
[14:09:43] [PASSED] 11 VFs
[14:09:43] [PASSED] 12 VFs
[14:09:43] [PASSED] 13 VFs
[14:09:43] [PASSED] 14 VFs
[14:09:43] [PASSED] 15 VFs
[14:09:43] [PASSED] 16 VFs
[14:09:43] [PASSED] 17 VFs
[14:09:43] [PASSED] 18 VFs
[14:09:43] [PASSED] 19 VFs
[14:09:43] [PASSED] 20 VFs
[14:09:43] [PASSED] 21 VFs
[14:09:43] [PASSED] 22 VFs
[14:09:43] [PASSED] 23 VFs
[14:09:43] [PASSED] 24 VFs
[14:09:43] [PASSED] 25 VFs
[14:09:43] [PASSED] 26 VFs
[14:09:43] [PASSED] 27 VFs
[14:09:43] [PASSED] 28 VFs
[14:09:43] [PASSED] 29 VFs
[14:09:43] [PASSED] 30 VFs
[14:09:43] [PASSED] 31 VFs
[14:09:43] [PASSED] 32 VFs
[14:09:43] [PASSED] 33 VFs
[14:09:43] [PASSED] 34 VFs
[14:09:43] [PASSED] 35 VFs
[14:09:43] [PASSED] 36 VFs
[14:09:43] [PASSED] 37 VFs
[14:09:43] [PASSED] 38 VFs
[14:09:43] [PASSED] 39 VFs
[14:09:43] [PASSED] 40 VFs
[14:09:43] [PASSED] 41 VFs
[14:09:43] [PASSED] 42 VFs
[14:09:43] [PASSED] 43 VFs
[14:09:43] [PASSED] 44 VFs
[14:09:43] [PASSED] 45 VFs
[14:09:43] [PASSED] 46 VFs
[14:09:43] [PASSED] 47 VFs
[14:09:43] [PASSED] 48 VFs
[14:09:43] [PASSED] 49 VFs
[14:09:43] [PASSED] 50 VFs
[14:09:43] [PASSED] 51 VFs
[14:09:43] [PASSED] 52 VFs
[14:09:43] [PASSED] 53 VFs
[14:09:43] [PASSED] 54 VFs
[14:09:43] [PASSED] 55 VFs
[14:09:43] [PASSED] 56 VFs
[14:09:43] [PASSED] 57 VFs
[14:09:43] [PASSED] 58 VFs
[14:09:43] [PASSED] 59 VFs
[14:09:43] [PASSED] 60 VFs
[14:09:43] [PASSED] 61 VFs
[14:09:43] [PASSED] 62 VFs
[14:09:43] [PASSED] 63 VFs
[14:09:43] ================= [PASSED] fair_doorbells ==================
[14:09:43] ======================== fair_ggtt  ========================
[14:09:43] [PASSED] 1 VF
[14:09:43] [PASSED] 2 VFs
[14:09:43] [PASSED] 3 VFs
[14:09:43] [PASSED] 4 VFs
[14:09:43] [PASSED] 5 VFs
[14:09:43] [PASSED] 6 VFs
[14:09:43] [PASSED] 7 VFs
[14:09:43] [PASSED] 8 VFs
[14:09:43] [PASSED] 9 VFs
[14:09:43] [PASSED] 10 VFs
[14:09:43] [PASSED] 11 VFs
[14:09:43] [PASSED] 12 VFs
[14:09:43] [PASSED] 13 VFs
[14:09:43] [PASSED] 14 VFs
[14:09:43] [PASSED] 15 VFs
[14:09:43] [PASSED] 16 VFs
[14:09:43] [PASSED] 17 VFs
[14:09:43] [PASSED] 18 VFs
[14:09:43] [PASSED] 19 VFs
[14:09:43] [PASSED] 20 VFs
[14:09:43] [PASSED] 21 VFs
[14:09:43] [PASSED] 22 VFs
[14:09:43] [PASSED] 23 VFs
[14:09:43] [PASSED] 24 VFs
[14:09:43] [PASSED] 25 VFs
[14:09:43] [PASSED] 26 VFs
[14:09:43] [PASSED] 27 VFs
[14:09:43] [PASSED] 28 VFs
[14:09:43] [PASSED] 29 VFs
[14:09:43] [PASSED] 30 VFs
[14:09:43] [PASSED] 31 VFs
[14:09:43] [PASSED] 32 VFs
[14:09:43] [PASSED] 33 VFs
[14:09:43] [PASSED] 34 VFs
[14:09:43] [PASSED] 35 VFs
[14:09:43] [PASSED] 36 VFs
[14:09:43] [PASSED] 37 VFs
[14:09:43] [PASSED] 38 VFs
[14:09:43] [PASSED] 39 VFs
[14:09:43] [PASSED] 40 VFs
[14:09:43] [PASSED] 41 VFs
[14:09:43] [PASSED] 42 VFs
[14:09:43] [PASSED] 43 VFs
[14:09:43] [PASSED] 44 VFs
[14:09:43] [PASSED] 45 VFs
[14:09:43] [PASSED] 46 VFs
[14:09:43] [PASSED] 47 VFs
[14:09:43] [PASSED] 48 VFs
[14:09:43] [PASSED] 49 VFs
[14:09:43] [PASSED] 50 VFs
[14:09:43] [PASSED] 51 VFs
[14:09:43] [PASSED] 52 VFs
[14:09:43] [PASSED] 53 VFs
[14:09:43] [PASSED] 54 VFs
[14:09:43] [PASSED] 55 VFs
[14:09:43] [PASSED] 56 VFs
[14:09:43] [PASSED] 57 VFs
[14:09:43] [PASSED] 58 VFs
[14:09:43] [PASSED] 59 VFs
[14:09:43] [PASSED] 60 VFs
[14:09:43] [PASSED] 61 VFs
[14:09:43] [PASSED] 62 VFs
[14:09:43] [PASSED] 63 VFs
[14:09:43] ==================== [PASSED] fair_ggtt ====================
[14:09:43] ======================== fair_vram  ========================
[14:09:43] [PASSED] 1 VF
[14:09:43] [PASSED] 2 VFs
[14:09:43] [PASSED] 3 VFs
[14:09:43] [PASSED] 4 VFs
[14:09:43] [PASSED] 5 VFs
[14:09:43] [PASSED] 6 VFs
[14:09:43] [PASSED] 7 VFs
[14:09:43] [PASSED] 8 VFs
[14:09:43] [PASSED] 9 VFs
[14:09:43] [PASSED] 10 VFs
[14:09:43] [PASSED] 11 VFs
[14:09:43] [PASSED] 12 VFs
[14:09:43] [PASSED] 13 VFs
[14:09:43] [PASSED] 14 VFs
[14:09:43] [PASSED] 15 VFs
[14:09:43] [PASSED] 16 VFs
[14:09:43] [PASSED] 17 VFs
[14:09:43] [PASSED] 18 VFs
[14:09:43] [PASSED] 19 VFs
[14:09:43] [PASSED] 20 VFs
[14:09:43] [PASSED] 21 VFs
[14:09:43] [PASSED] 22 VFs
[14:09:43] [PASSED] 23 VFs
[14:09:43] [PASSED] 24 VFs
[14:09:43] [PASSED] 25 VFs
[14:09:43] [PASSED] 26 VFs
[14:09:43] [PASSED] 27 VFs
[14:09:43] [PASSED] 28 VFs
[14:09:43] [PASSED] 29 VFs
[14:09:43] [PASSED] 30 VFs
[14:09:43] [PASSED] 31 VFs
[14:09:43] [PASSED] 32 VFs
[14:09:43] [PASSED] 33 VFs
[14:09:43] [PASSED] 34 VFs
[14:09:43] [PASSED] 35 VFs
[14:09:43] [PASSED] 36 VFs
[14:09:43] [PASSED] 37 VFs
[14:09:43] [PASSED] 38 VFs
[14:09:43] [PASSED] 39 VFs
[14:09:43] [PASSED] 40 VFs
[14:09:43] [PASSED] 41 VFs
[14:09:43] [PASSED] 42 VFs
[14:09:43] [PASSED] 43 VFs
[14:09:43] [PASSED] 44 VFs
[14:09:43] [PASSED] 45 VFs
[14:09:43] [PASSED] 46 VFs
[14:09:43] [PASSED] 47 VFs
[14:09:43] [PASSED] 48 VFs
[14:09:43] [PASSED] 49 VFs
[14:09:43] [PASSED] 50 VFs
[14:09:43] [PASSED] 51 VFs
[14:09:43] [PASSED] 52 VFs
[14:09:43] [PASSED] 53 VFs
[14:09:43] [PASSED] 54 VFs
[14:09:43] [PASSED] 55 VFs
[14:09:43] [PASSED] 56 VFs
[14:09:43] [PASSED] 57 VFs
[14:09:43] [PASSED] 58 VFs
[14:09:43] [PASSED] 59 VFs
[14:09:43] [PASSED] 60 VFs
[14:09:43] [PASSED] 61 VFs
[14:09:43] [PASSED] 62 VFs
[14:09:43] [PASSED] 63 VFs
[14:09:43] ==================== [PASSED] fair_vram ====================
[14:09:43] ================== [PASSED] pf_gt_config ===================
[14:09:43] ===================== lmtt (1 subtest) =====================
[14:09:43] ======================== test_ops  =========================
[14:09:43] [PASSED] 2-level
[14:09:43] [PASSED] multi-level
[14:09:43] ==================== [PASSED] test_ops =====================
[14:09:43] ====================== [PASSED] lmtt =======================
[14:09:43] ================= pf_service (11 subtests) =================
[14:09:43] [PASSED] pf_negotiate_any
[14:09:43] [PASSED] pf_negotiate_base_match
[14:09:43] [PASSED] pf_negotiate_base_newer
[14:09:43] [PASSED] pf_negotiate_base_next
[14:09:43] [SKIPPED] pf_negotiate_base_older
[14:09:43] [PASSED] pf_negotiate_base_prev
[14:09:43] [PASSED] pf_negotiate_latest_match
[14:09:43] [PASSED] pf_negotiate_latest_newer
[14:09:43] [PASSED] pf_negotiate_latest_next
[14:09:43] [SKIPPED] pf_negotiate_latest_older
[14:09:43] [SKIPPED] pf_negotiate_latest_prev
[14:09:43] =================== [PASSED] pf_service ====================
[14:09:43] ================= xe_guc_g2g (2 subtests) ==================
[14:09:43] ============== xe_live_guc_g2g_kunit_default  ==============
[14:09:43] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[14:09:43] ============== xe_live_guc_g2g_kunit_allmem  ===============
[14:09:43] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[14:09:43] =================== [SKIPPED] xe_guc_g2g ===================
[14:09:43] =================== xe_mocs (2 subtests) ===================
[14:09:43] ================ xe_live_mocs_kernel_kunit  ================
[14:09:43] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[14:09:43] ================ xe_live_mocs_reset_kunit  =================
[14:09:43] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[14:09:43] ==================== [SKIPPED] xe_mocs =====================
[14:09:43] ================= xe_migrate (2 subtests) ==================
[14:09:43] ================= xe_migrate_sanity_kunit  =================
[14:09:43] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[14:09:43] ================== xe_validate_ccs_kunit  ==================
[14:09:43] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[14:09:43] =================== [SKIPPED] xe_migrate ===================
[14:09:43] ================== xe_dma_buf (1 subtest) ==================
[14:09:43] ==================== xe_dma_buf_kunit  =====================
[14:09:43] ================ [SKIPPED] xe_dma_buf_kunit ================
[14:09:43] =================== [SKIPPED] xe_dma_buf ===================
[14:09:43] ================= xe_bo_shrink (1 subtest) =================
[14:09:43] =================== xe_bo_shrink_kunit  ====================
[14:09:43] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[14:09:43] ================== [SKIPPED] xe_bo_shrink ==================
[14:09:43] ==================== xe_bo (2 subtests) ====================
[14:09:43] ================== xe_ccs_migrate_kunit  ===================
[14:09:43] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[14:09:43] ==================== xe_bo_evict_kunit  ====================
[14:09:43] =============== [SKIPPED] xe_bo_evict_kunit ================
[14:09:43] ===================== [SKIPPED] xe_bo ======================
[14:09:43] ==================== args (13 subtests) ====================
[14:09:43] [PASSED] count_args_test
[14:09:43] [PASSED] call_args_example
[14:09:43] [PASSED] call_args_test
[14:09:43] [PASSED] drop_first_arg_example
[14:09:43] [PASSED] drop_first_arg_test
[14:09:43] [PASSED] first_arg_example
[14:09:43] [PASSED] first_arg_test
[14:09:43] [PASSED] last_arg_example
[14:09:43] [PASSED] last_arg_test
[14:09:43] [PASSED] pick_arg_example
[14:09:43] [PASSED] if_args_example
[14:09:43] [PASSED] if_args_test
[14:09:43] [PASSED] sep_comma_example
[14:09:43] ====================== [PASSED] args =======================
[14:09:43] =================== xe_pci (3 subtests) ====================
[14:09:43] ==================== check_graphics_ip  ====================
[14:09:43] [PASSED] 12.00 Xe_LP
[14:09:43] [PASSED] 12.10 Xe_LP+
[14:09:43] [PASSED] 12.55 Xe_HPG
[14:09:43] [PASSED] 12.60 Xe_HPC
[14:09:43] [PASSED] 12.70 Xe_LPG
[14:09:43] [PASSED] 12.71 Xe_LPG
[14:09:43] [PASSED] 12.74 Xe_LPG+
[14:09:43] [PASSED] 20.01 Xe2_HPG
[14:09:43] [PASSED] 20.02 Xe2_HPG
[14:09:43] [PASSED] 20.04 Xe2_LPG
[14:09:43] [PASSED] 30.00 Xe3_LPG
[14:09:43] [PASSED] 30.01 Xe3_LPG
[14:09:43] [PASSED] 30.03 Xe3_LPG
[14:09:43] [PASSED] 30.04 Xe3_LPG
[14:09:43] [PASSED] 30.05 Xe3_LPG
[14:09:43] [PASSED] 35.10 Xe3p_LPG
[14:09:43] [PASSED] 35.11 Xe3p_XPC
[14:09:43] ================ [PASSED] check_graphics_ip ================
[14:09:43] ===================== check_media_ip  ======================
[14:09:43] [PASSED] 12.00 Xe_M
[14:09:43] [PASSED] 12.55 Xe_HPM
[14:09:43] [PASSED] 13.00 Xe_LPM+
[14:09:43] [PASSED] 13.01 Xe2_HPM
[14:09:43] [PASSED] 20.00 Xe2_LPM
[14:09:43] [PASSED] 30.00 Xe3_LPM
[14:09:43] [PASSED] 30.02 Xe3_LPM
[14:09:43] [PASSED] 35.00 Xe3p_LPM
[14:09:43] [PASSED] 35.03 Xe3p_HPM
[14:09:43] ================= [PASSED] check_media_ip ==================
[14:09:43] =================== check_platform_desc  ===================
[14:09:43] [PASSED] 0x9A60 (TIGERLAKE)
[14:09:43] [PASSED] 0x9A68 (TIGERLAKE)
[14:09:43] [PASSED] 0x9A70 (TIGERLAKE)
[14:09:43] [PASSED] 0x9A40 (TIGERLAKE)
[14:09:43] [PASSED] 0x9A49 (TIGERLAKE)
[14:09:43] [PASSED] 0x9A59 (TIGERLAKE)
[14:09:43] [PASSED] 0x9A78 (TIGERLAKE)
[14:09:43] [PASSED] 0x9AC0 (TIGERLAKE)
[14:09:43] [PASSED] 0x9AC9 (TIGERLAKE)
[14:09:43] [PASSED] 0x9AD9 (TIGERLAKE)
[14:09:43] [PASSED] 0x9AF8 (TIGERLAKE)
[14:09:43] [PASSED] 0x4C80 (ROCKETLAKE)
[14:09:43] [PASSED] 0x4C8A (ROCKETLAKE)
[14:09:43] [PASSED] 0x4C8B (ROCKETLAKE)
[14:09:43] [PASSED] 0x4C8C (ROCKETLAKE)
[14:09:43] [PASSED] 0x4C90 (ROCKETLAKE)
[14:09:43] [PASSED] 0x4C9A (ROCKETLAKE)
[14:09:43] [PASSED] 0x4680 (ALDERLAKE_S)
[14:09:43] [PASSED] 0x4682 (ALDERLAKE_S)
[14:09:43] [PASSED] 0x4688 (ALDERLAKE_S)
[14:09:43] [PASSED] 0x468A (ALDERLAKE_S)
[14:09:43] [PASSED] 0x468B (ALDERLAKE_S)
[14:09:43] [PASSED] 0x4690 (ALDERLAKE_S)
[14:09:43] [PASSED] 0x4692 (ALDERLAKE_S)
[14:09:43] [PASSED] 0x4693 (ALDERLAKE_S)
[14:09:43] [PASSED] 0x46A0 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46A1 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46A2 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46A3 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46A6 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46A8 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46AA (ALDERLAKE_P)
[14:09:43] [PASSED] 0x462A (ALDERLAKE_P)
[14:09:43] [PASSED] 0x4626 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x4628 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46B0 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46B1 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46B2 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46B3 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46C0 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46C1 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46C2 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46C3 (ALDERLAKE_P)
[14:09:43] [PASSED] 0x46D0 (ALDERLAKE_N)
[14:09:43] [PASSED] 0x46D1 (ALDERLAKE_N)
[14:09:43] [PASSED] 0x46D2 (ALDERLAKE_N)
[14:09:43] [PASSED] 0x46D3 (ALDERLAKE_N)
[14:09:43] [PASSED] 0x46D4 (ALDERLAKE_N)
[14:09:43] [PASSED] 0xA721 (ALDERLAKE_P)
[14:09:43] [PASSED] 0xA7A1 (ALDERLAKE_P)
[14:09:43] [PASSED] 0xA7A9 (ALDERLAKE_P)
[14:09:43] [PASSED] 0xA7AC (ALDERLAKE_P)
[14:09:43] [PASSED] 0xA7AD (ALDERLAKE_P)
[14:09:43] [PASSED] 0xA720 (ALDERLAKE_P)
[14:09:43] [PASSED] 0xA7A0 (ALDERLAKE_P)
[14:09:43] [PASSED] 0xA7A8 (ALDERLAKE_P)
[14:09:43] [PASSED] 0xA7AA (ALDERLAKE_P)
[14:09:43] [PASSED] 0xA7AB (ALDERLAKE_P)
[14:09:43] [PASSED] 0xA780 (ALDERLAKE_S)
[14:09:43] [PASSED] 0xA781 (ALDERLAKE_S)
[14:09:43] [PASSED] 0xA782 (ALDERLAKE_S)
[14:09:43] [PASSED] 0xA783 (ALDERLAKE_S)
[14:09:43] [PASSED] 0xA788 (ALDERLAKE_S)
[14:09:43] [PASSED] 0xA789 (ALDERLAKE_S)
[14:09:43] [PASSED] 0xA78A (ALDERLAKE_S)
[14:09:43] [PASSED] 0xA78B (ALDERLAKE_S)
[14:09:43] [PASSED] 0x4905 (DG1)
[14:09:43] [PASSED] 0x4906 (DG1)
[14:09:43] [PASSED] 0x4907 (DG1)
[14:09:43] [PASSED] 0x4908 (DG1)
[14:09:43] [PASSED] 0x4909 (DG1)
[14:09:43] [PASSED] 0x56C0 (DG2)
[14:09:43] [PASSED] 0x56C2 (DG2)
[14:09:43] [PASSED] 0x56C1 (DG2)
[14:09:43] [PASSED] 0x7D51 (METEORLAKE)
[14:09:43] [PASSED] 0x7DD1 (METEORLAKE)
[14:09:43] [PASSED] 0x7D41 (METEORLAKE)
[14:09:43] [PASSED] 0x7D67 (METEORLAKE)
[14:09:43] [PASSED] 0xB640 (METEORLAKE)
[14:09:43] [PASSED] 0x56A0 (DG2)
[14:09:43] [PASSED] 0x56A1 (DG2)
[14:09:43] [PASSED] 0x56A2 (DG2)
[14:09:43] [PASSED] 0x56BE (DG2)
[14:09:43] [PASSED] 0x56BF (DG2)
[14:09:43] [PASSED] 0x5690 (DG2)
[14:09:43] [PASSED] 0x5691 (DG2)
[14:09:43] [PASSED] 0x5692 (DG2)
[14:09:43] [PASSED] 0x56A5 (DG2)
[14:09:43] [PASSED] 0x56A6 (DG2)
[14:09:43] [PASSED] 0x56B0 (DG2)
[14:09:43] [PASSED] 0x56B1 (DG2)
[14:09:43] [PASSED] 0x56BA (DG2)
[14:09:43] [PASSED] 0x56BB (DG2)
[14:09:43] [PASSED] 0x56BC (DG2)
[14:09:43] [PASSED] 0x56BD (DG2)
[14:09:43] [PASSED] 0x5693 (DG2)
[14:09:43] [PASSED] 0x5694 (DG2)
[14:09:43] [PASSED] 0x5695 (DG2)
[14:09:43] [PASSED] 0x56A3 (DG2)
[14:09:43] [PASSED] 0x56A4 (DG2)
[14:09:43] [PASSED] 0x56B2 (DG2)
[14:09:43] [PASSED] 0x56B3 (DG2)
[14:09:43] [PASSED] 0x5696 (DG2)
[14:09:43] [PASSED] 0x5697 (DG2)
[14:09:43] [PASSED] 0xB69 (PVC)
[14:09:43] [PASSED] 0xB6E (PVC)
[14:09:43] [PASSED] 0xBD4 (PVC)
[14:09:43] [PASSED] 0xBD5 (PVC)
[14:09:43] [PASSED] 0xBD6 (PVC)
[14:09:43] [PASSED] 0xBD7 (PVC)
[14:09:43] [PASSED] 0xBD8 (PVC)
[14:09:43] [PASSED] 0xBD9 (PVC)
[14:09:43] [PASSED] 0xBDA (PVC)
[14:09:43] [PASSED] 0xBDB (PVC)
[14:09:43] [PASSED] 0xBE0 (PVC)
[14:09:43] [PASSED] 0xBE1 (PVC)
[14:09:43] [PASSED] 0xBE5 (PVC)
[14:09:43] [PASSED] 0x7D40 (METEORLAKE)
[14:09:43] [PASSED] 0x7D45 (METEORLAKE)
[14:09:43] [PASSED] 0x7D55 (METEORLAKE)
[14:09:43] [PASSED] 0x7D60 (METEORLAKE)
[14:09:43] [PASSED] 0x7DD5 (METEORLAKE)
[14:09:43] [PASSED] 0x6420 (LUNARLAKE)
[14:09:43] [PASSED] 0x64A0 (LUNARLAKE)
[14:09:43] [PASSED] 0x64B0 (LUNARLAKE)
[14:09:43] [PASSED] 0xE202 (BATTLEMAGE)
[14:09:43] [PASSED] 0xE209 (BATTLEMAGE)
[14:09:43] [PASSED] 0xE20B (BATTLEMAGE)
[14:09:43] [PASSED] 0xE20C (BATTLEMAGE)
[14:09:43] [PASSED] 0xE20D (BATTLEMAGE)
[14:09:43] [PASSED] 0xE210 (BATTLEMAGE)
[14:09:43] [PASSED] 0xE211 (BATTLEMAGE)
[14:09:43] [PASSED] 0xE212 (BATTLEMAGE)
[14:09:43] [PASSED] 0xE216 (BATTLEMAGE)
[14:09:43] [PASSED] 0xE220 (BATTLEMAGE)
[14:09:43] [PASSED] 0xE221 (BATTLEMAGE)
[14:09:43] [PASSED] 0xE222 (BATTLEMAGE)
[14:09:43] [PASSED] 0xE223 (BATTLEMAGE)
[14:09:43] [PASSED] 0xB080 (PANTHERLAKE)
[14:09:43] [PASSED] 0xB081 (PANTHERLAKE)
[14:09:43] [PASSED] 0xB082 (PANTHERLAKE)
[14:09:43] [PASSED] 0xB083 (PANTHERLAKE)
[14:09:43] [PASSED] 0xB084 (PANTHERLAKE)
[14:09:43] [PASSED] 0xB085 (PANTHERLAKE)
[14:09:43] [PASSED] 0xB086 (PANTHERLAKE)
[14:09:43] [PASSED] 0xB087 (PANTHERLAKE)
[14:09:43] [PASSED] 0xB08F (PANTHERLAKE)
[14:09:43] [PASSED] 0xB090 (PANTHERLAKE)
[14:09:43] [PASSED] 0xB0A0 (PANTHERLAKE)
[14:09:43] [PASSED] 0xB0B0 (PANTHERLAKE)
[14:09:43] [PASSED] 0xFD80 (PANTHERLAKE)
[14:09:43] [PASSED] 0xFD81 (PANTHERLAKE)
[14:09:43] [PASSED] 0xD740 (NOVALAKE_S)
[14:09:43] [PASSED] 0xD741 (NOVALAKE_S)
[14:09:43] [PASSED] 0xD742 (NOVALAKE_S)
[14:09:43] [PASSED] 0xD743 (NOVALAKE_S)
[14:09:43] [PASSED] 0xD744 (NOVALAKE_S)
[14:09:43] [PASSED] 0xD745 (NOVALAKE_S)
[14:09:43] [PASSED] 0x674C (CRESCENTISLAND)
[14:09:43] [PASSED] 0xD750 (NOVALAKE_P)
[14:09:43] [PASSED] 0xD751 (NOVALAKE_P)
[14:09:43] [PASSED] 0xD752 (NOVALAKE_P)
[14:09:43] [PASSED] 0xD753 (NOVALAKE_P)
[14:09:43] [PASSED] 0xD754 (NOVALAKE_P)
[14:09:43] [PASSED] 0xD755 (NOVALAKE_P)
[14:09:43] [PASSED] 0xD756 (NOVALAKE_P)
[14:09:43] [PASSED] 0xD757 (NOVALAKE_P)
[14:09:43] [PASSED] 0xD75F (NOVALAKE_P)
[14:09:43] =============== [PASSED] check_platform_desc ===============
[14:09:43] ===================== [PASSED] xe_pci ======================
[14:09:43] =================== xe_rtp (2 subtests) ====================
[14:09:43] =============== xe_rtp_process_to_sr_tests  ================
[14:09:43] [PASSED] coalesce-same-reg
[14:09:43] [PASSED] no-match-no-add
[14:09:43] [PASSED] match-or
[14:09:43] [PASSED] match-or-xfail
[14:09:43] [PASSED] no-match-no-add-multiple-rules
[14:09:43] [PASSED] two-regs-two-entries
[14:09:43] [PASSED] clr-one-set-other
[14:09:43] [PASSED] set-field
[14:09:43] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[14:09:43] [PASSED] conflict-not-disjoint
[14:09:43] [PASSED] conflict-reg-type
[14:09:43] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[14:09:43] ================== xe_rtp_process_tests  ===================
[14:09:43] [PASSED] active1
[14:09:43] [PASSED] active2
[14:09:43] [PASSED] active-inactive
[14:09:43] [PASSED] inactive-active
[14:09:43] [PASSED] inactive-1st_or_active-inactive
[14:09:43] [PASSED] inactive-2nd_or_active-inactive
[14:09:43] [PASSED] inactive-last_or_active-inactive
[14:09:43] [PASSED] inactive-no_or_active-inactive
[14:09:43] ============== [PASSED] xe_rtp_process_tests ===============
[14:09:43] ===================== [PASSED] xe_rtp ======================
[14:09:43] ==================== xe_wa (1 subtest) =====================
[14:09:43] ======================== xe_wa_gt  =========================
[14:09:43] [PASSED] TIGERLAKE B0
[14:09:43] [PASSED] DG1 A0
[14:09:43] [PASSED] DG1 B0
[14:09:43] [PASSED] ALDERLAKE_S A0
[14:09:43] [PASSED] ALDERLAKE_S B0
[14:09:43] [PASSED] ALDERLAKE_S C0
[14:09:43] [PASSED] ALDERLAKE_S D0
[14:09:43] [PASSED] ALDERLAKE_P A0
[14:09:43] [PASSED] ALDERLAKE_P B0
[14:09:43] [PASSED] ALDERLAKE_P C0
[14:09:43] [PASSED] ALDERLAKE_S RPLS D0
[14:09:43] [PASSED] ALDERLAKE_P RPLU E0
[14:09:43] [PASSED] DG2 G10 C0
[14:09:43] [PASSED] DG2 G11 B1
[14:09:43] [PASSED] DG2 G12 A1
[14:09:43] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:09:43] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[14:09:43] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[14:09:43] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[14:09:43] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[14:09:43] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[14:09:43] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[14:09:43] ==================== [PASSED] xe_wa_gt =====================
[14:09:43] ====================== [PASSED] xe_wa ======================
[14:09:43] ============================================================
[14:09:43] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[14:09:43] Elapsed time: 36.190s total, 4.258s configuring, 31.264s building, 0.617s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[14:09:43] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:09:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:10:09] Starting KUnit Kernel (1/1)...
[14:10:09] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:10:09] ============ drm_test_pick_cmdline (2 subtests) ============
[14:10:09] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[14:10:09] =============== drm_test_pick_cmdline_named  ===============
[14:10:09] [PASSED] NTSC
[14:10:09] [PASSED] NTSC-J
[14:10:09] [PASSED] PAL
[14:10:09] [PASSED] PAL-M
[14:10:09] =========== [PASSED] drm_test_pick_cmdline_named ===========
[14:10:09] ============== [PASSED] drm_test_pick_cmdline ==============
[14:10:09] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[14:10:09] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[14:10:09] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[14:10:09] =========== drm_validate_clone_mode (2 subtests) ===========
[14:10:09] ============== drm_test_check_in_clone_mode  ===============
[14:10:09] [PASSED] in_clone_mode
[14:10:09] [PASSED] not_in_clone_mode
[14:10:09] ========== [PASSED] drm_test_check_in_clone_mode ===========
[14:10:09] =============== drm_test_check_valid_clones  ===============
[14:10:09] [PASSED] not_in_clone_mode
[14:10:09] [PASSED] valid_clone
[14:10:09] [PASSED] invalid_clone
[14:10:09] =========== [PASSED] drm_test_check_valid_clones ===========
[14:10:09] ============= [PASSED] drm_validate_clone_mode =============
[14:10:09] ============= drm_validate_modeset (1 subtest) =============
[14:10:09] [PASSED] drm_test_check_connector_changed_modeset
[14:10:09] ============== [PASSED] drm_validate_modeset ===============
[14:10:09] ====== drm_test_bridge_get_current_state (2 subtests) ======
[14:10:09] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[14:10:09] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[14:10:09] ======== [PASSED] drm_test_bridge_get_current_state ========
[14:10:09] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[14:10:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[14:10:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[14:10:09] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[14:10:09] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[14:10:09] ============== drm_bridge_alloc (2 subtests) ===============
[14:10:09] [PASSED] drm_test_drm_bridge_alloc_basic
[14:10:09] [PASSED] drm_test_drm_bridge_alloc_get_put
[14:10:09] ================ [PASSED] drm_bridge_alloc =================
[14:10:09] ============= drm_cmdline_parser (40 subtests) =============
[14:10:09] [PASSED] drm_test_cmdline_force_d_only
[14:10:09] [PASSED] drm_test_cmdline_force_D_only_dvi
[14:10:09] [PASSED] drm_test_cmdline_force_D_only_hdmi
[14:10:09] [PASSED] drm_test_cmdline_force_D_only_not_digital
[14:10:09] [PASSED] drm_test_cmdline_force_e_only
[14:10:09] [PASSED] drm_test_cmdline_res
[14:10:09] [PASSED] drm_test_cmdline_res_vesa
[14:10:09] [PASSED] drm_test_cmdline_res_vesa_rblank
[14:10:09] [PASSED] drm_test_cmdline_res_rblank
[14:10:09] [PASSED] drm_test_cmdline_res_bpp
[14:10:09] [PASSED] drm_test_cmdline_res_refresh
[14:10:09] [PASSED] drm_test_cmdline_res_bpp_refresh
[14:10:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[14:10:09] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[14:10:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[14:10:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[14:10:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[14:10:09] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[14:10:09] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[14:10:09] [PASSED] drm_test_cmdline_res_margins_force_on
[14:10:09] [PASSED] drm_test_cmdline_res_vesa_margins
[14:10:09] [PASSED] drm_test_cmdline_name
[14:10:09] [PASSED] drm_test_cmdline_name_bpp
[14:10:09] [PASSED] drm_test_cmdline_name_option
[14:10:09] [PASSED] drm_test_cmdline_name_bpp_option
[14:10:09] [PASSED] drm_test_cmdline_rotate_0
[14:10:09] [PASSED] drm_test_cmdline_rotate_90
[14:10:09] [PASSED] drm_test_cmdline_rotate_180
[14:10:09] [PASSED] drm_test_cmdline_rotate_270
[14:10:09] [PASSED] drm_test_cmdline_hmirror
[14:10:09] [PASSED] drm_test_cmdline_vmirror
[14:10:09] [PASSED] drm_test_cmdline_margin_options
[14:10:09] [PASSED] drm_test_cmdline_multiple_options
[14:10:09] [PASSED] drm_test_cmdline_bpp_extra_and_option
[14:10:09] [PASSED] drm_test_cmdline_extra_and_option
[14:10:09] [PASSED] drm_test_cmdline_freestanding_options
[14:10:09] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[14:10:09] [PASSED] drm_test_cmdline_panel_orientation
[14:10:09] ================ drm_test_cmdline_invalid  =================
[14:10:09] [PASSED] margin_only
[14:10:09] [PASSED] interlace_only
[14:10:09] [PASSED] res_missing_x
[14:10:09] [PASSED] res_missing_y
[14:10:09] [PASSED] res_bad_y
[14:10:09] [PASSED] res_missing_y_bpp
[14:10:09] [PASSED] res_bad_bpp
[14:10:09] [PASSED] res_bad_refresh
[14:10:09] [PASSED] res_bpp_refresh_force_on_off
[14:10:09] [PASSED] res_invalid_mode
[14:10:09] [PASSED] res_bpp_wrong_place_mode
[14:10:09] [PASSED] name_bpp_refresh
[14:10:09] [PASSED] name_refresh
[14:10:09] [PASSED] name_refresh_wrong_mode
[14:10:09] [PASSED] name_refresh_invalid_mode
[14:10:09] [PASSED] rotate_multiple
[14:10:09] [PASSED] rotate_invalid_val
[14:10:09] [PASSED] rotate_truncated
[14:10:09] [PASSED] invalid_option
[14:10:09] [PASSED] invalid_tv_option
[14:10:09] [PASSED] truncated_tv_option
[14:10:09] ============ [PASSED] drm_test_cmdline_invalid =============
[14:10:09] =============== drm_test_cmdline_tv_options  ===============
[14:10:09] [PASSED] NTSC
[14:10:09] [PASSED] NTSC_443
[14:10:09] [PASSED] NTSC_J
[14:10:09] [PASSED] PAL
[14:10:09] [PASSED] PAL_M
[14:10:09] [PASSED] PAL_N
[14:10:09] [PASSED] SECAM
[14:10:09] [PASSED] MONO_525
[14:10:09] [PASSED] MONO_625
[14:10:09] =========== [PASSED] drm_test_cmdline_tv_options ===========
[14:10:09] =============== [PASSED] drm_cmdline_parser ================
[14:10:09] ========== drmm_connector_hdmi_init (20 subtests) ==========
[14:10:09] [PASSED] drm_test_connector_hdmi_init_valid
[14:10:09] [PASSED] drm_test_connector_hdmi_init_bpc_8
[14:10:09] [PASSED] drm_test_connector_hdmi_init_bpc_10
[14:10:09] [PASSED] drm_test_connector_hdmi_init_bpc_12
[14:10:09] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[14:10:09] [PASSED] drm_test_connector_hdmi_init_bpc_null
[14:10:09] [PASSED] drm_test_connector_hdmi_init_formats_empty
[14:10:09] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[14:10:09] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[14:10:09] [PASSED] supported_formats=0x9 yuv420_allowed=1
[14:10:09] [PASSED] supported_formats=0x9 yuv420_allowed=0
[14:10:09] [PASSED] supported_formats=0x5 yuv420_allowed=1
[14:10:09] [PASSED] supported_formats=0x5 yuv420_allowed=0
[14:10:09] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:10:09] [PASSED] drm_test_connector_hdmi_init_null_ddc
[14:10:09] [PASSED] drm_test_connector_hdmi_init_null_product
[14:10:09] [PASSED] drm_test_connector_hdmi_init_null_vendor
[14:10:09] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[14:10:09] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[14:10:09] [PASSED] drm_test_connector_hdmi_init_product_valid
[14:10:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[14:10:09] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[14:10:09] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[14:10:09] ========= drm_test_connector_hdmi_init_type_valid  =========
[14:10:09] [PASSED] HDMI-A
[14:10:09] [PASSED] HDMI-B
[14:10:09] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[14:10:09] ======== drm_test_connector_hdmi_init_type_invalid  ========
[14:10:09] [PASSED] Unknown
[14:10:09] [PASSED] VGA
[14:10:09] [PASSED] DVI-I
[14:10:09] [PASSED] DVI-D
[14:10:09] [PASSED] DVI-A
[14:10:09] [PASSED] Composite
[14:10:09] [PASSED] SVIDEO
[14:10:09] [PASSED] LVDS
[14:10:09] [PASSED] Component
[14:10:09] [PASSED] DIN
[14:10:09] [PASSED] DP
[14:10:09] [PASSED] TV
[14:10:09] [PASSED] eDP
[14:10:09] [PASSED] Virtual
[14:10:09] [PASSED] DSI
[14:10:09] [PASSED] DPI
[14:10:09] [PASSED] Writeback
[14:10:09] [PASSED] SPI
[14:10:09] [PASSED] USB
[14:10:09] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[14:10:09] ============ [PASSED] drmm_connector_hdmi_init =============
[14:10:09] ============= drmm_connector_init (3 subtests) =============
[14:10:09] [PASSED] drm_test_drmm_connector_init
[14:10:09] [PASSED] drm_test_drmm_connector_init_null_ddc
[14:10:09] ========= drm_test_drmm_connector_init_type_valid  =========
[14:10:09] [PASSED] Unknown
[14:10:09] [PASSED] VGA
[14:10:09] [PASSED] DVI-I
[14:10:09] [PASSED] DVI-D
[14:10:09] [PASSED] DVI-A
[14:10:09] [PASSED] Composite
[14:10:09] [PASSED] SVIDEO
[14:10:09] [PASSED] LVDS
[14:10:09] [PASSED] Component
[14:10:09] [PASSED] DIN
[14:10:09] [PASSED] DP
[14:10:09] [PASSED] HDMI-A
[14:10:09] [PASSED] HDMI-B
[14:10:09] [PASSED] TV
[14:10:09] [PASSED] eDP
[14:10:09] [PASSED] Virtual
[14:10:09] [PASSED] DSI
[14:10:09] [PASSED] DPI
[14:10:09] [PASSED] Writeback
[14:10:09] [PASSED] SPI
[14:10:09] [PASSED] USB
[14:10:09] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[14:10:09] =============== [PASSED] drmm_connector_init ===============
[14:10:09] ========= drm_connector_dynamic_init (6 subtests) ==========
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_init
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_init_properties
[14:10:09] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[14:10:09] [PASSED] Unknown
[14:10:09] [PASSED] VGA
[14:10:09] [PASSED] DVI-I
[14:10:09] [PASSED] DVI-D
[14:10:09] [PASSED] DVI-A
[14:10:09] [PASSED] Composite
[14:10:09] [PASSED] SVIDEO
[14:10:09] [PASSED] LVDS
[14:10:09] [PASSED] Component
[14:10:09] [PASSED] DIN
[14:10:09] [PASSED] DP
[14:10:09] [PASSED] HDMI-A
[14:10:09] [PASSED] HDMI-B
[14:10:09] [PASSED] TV
[14:10:09] [PASSED] eDP
[14:10:09] [PASSED] Virtual
[14:10:09] [PASSED] DSI
[14:10:09] [PASSED] DPI
[14:10:09] [PASSED] Writeback
[14:10:09] [PASSED] SPI
[14:10:09] [PASSED] USB
[14:10:09] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[14:10:09] ======== drm_test_drm_connector_dynamic_init_name  =========
[14:10:09] [PASSED] Unknown
[14:10:09] [PASSED] VGA
[14:10:09] [PASSED] DVI-I
[14:10:09] [PASSED] DVI-D
[14:10:09] [PASSED] DVI-A
[14:10:09] [PASSED] Composite
[14:10:09] [PASSED] SVIDEO
[14:10:09] [PASSED] LVDS
[14:10:09] [PASSED] Component
[14:10:09] [PASSED] DIN
[14:10:09] [PASSED] DP
[14:10:09] [PASSED] HDMI-A
[14:10:09] [PASSED] HDMI-B
[14:10:09] [PASSED] TV
[14:10:09] [PASSED] eDP
[14:10:09] [PASSED] Virtual
[14:10:09] [PASSED] DSI
[14:10:09] [PASSED] DPI
[14:10:09] [PASSED] Writeback
[14:10:09] [PASSED] SPI
[14:10:09] [PASSED] USB
[14:10:09] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[14:10:09] =========== [PASSED] drm_connector_dynamic_init ============
[14:10:09] ==== drm_connector_dynamic_register_early (4 subtests) =====
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[14:10:09] ====== [PASSED] drm_connector_dynamic_register_early =======
[14:10:09] ======= drm_connector_dynamic_register (7 subtests) ========
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[14:10:09] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[14:10:09] ========= [PASSED] drm_connector_dynamic_register ==========
[14:10:09] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[14:10:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[14:10:09] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[14:10:09] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[14:10:09] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[14:10:09] ========== drm_test_get_tv_mode_from_name_valid  ===========
[14:10:09] [PASSED] NTSC
[14:10:09] [PASSED] NTSC-443
[14:10:09] [PASSED] NTSC-J
[14:10:09] [PASSED] PAL
[14:10:09] [PASSED] PAL-M
[14:10:09] [PASSED] PAL-N
[14:10:09] [PASSED] SECAM
[14:10:09] [PASSED] Mono
[14:10:09] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[14:10:09] [PASSED] drm_test_get_tv_mode_from_name_truncated
[14:10:09] ============ [PASSED] drm_get_tv_mode_from_name ============
[14:10:09] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[14:10:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[14:10:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[14:10:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[14:10:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[14:10:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[14:10:09] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[14:10:09] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[14:10:09] [PASSED] VIC 96
[14:10:09] [PASSED] VIC 97
[14:10:09] [PASSED] VIC 101
[14:10:09] [PASSED] VIC 102
[14:10:09] [PASSED] VIC 106
[14:10:09] [PASSED] VIC 107
[14:10:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[14:10:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[14:10:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[14:10:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[14:10:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[14:10:09] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[14:10:09] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[14:10:09] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[14:10:09] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[14:10:09] [PASSED] Automatic
[14:10:09] [PASSED] Full
[14:10:09] [PASSED] Limited 16:235
[14:10:09] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[14:10:09] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[14:10:09] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[14:10:09] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[14:10:09] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[14:10:09] [PASSED] RGB
[14:10:09] [PASSED] YUV 4:2:0
[14:10:09] [PASSED] YUV 4:2:2
[14:10:09] [PASSED] YUV 4:4:4
[14:10:09] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[14:10:09] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[14:10:09] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[14:10:09] ============= drm_damage_helper (21 subtests) ==============
[14:10:09] [PASSED] drm_test_damage_iter_no_damage
[14:10:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[14:10:09] [PASSED] drm_test_damage_iter_no_damage_src_moved
[14:10:09] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[14:10:09] [PASSED] drm_test_damage_iter_no_damage_not_visible
[14:10:09] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[14:10:09] [PASSED] drm_test_damage_iter_no_damage_no_fb
[14:10:09] [PASSED] drm_test_damage_iter_simple_damage
[14:10:09] [PASSED] drm_test_damage_iter_single_damage
[14:10:09] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[14:10:09] [PASSED] drm_test_damage_iter_single_damage_outside_src
[14:10:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[14:10:09] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[14:10:09] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[14:10:09] [PASSED] drm_test_damage_iter_single_damage_src_moved
[14:10:09] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[14:10:09] [PASSED] drm_test_damage_iter_damage
[14:10:09] [PASSED] drm_test_damage_iter_damage_one_intersect
[14:10:09] [PASSED] drm_test_damage_iter_damage_one_outside
[14:10:09] [PASSED] drm_test_damage_iter_damage_src_moved
[14:10:09] [PASSED] drm_test_damage_iter_damage_not_visible
[14:10:09] ================ [PASSED] drm_damage_helper ================
[14:10:09] ============== drm_dp_mst_helper (3 subtests) ==============
[14:10:09] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[14:10:09] [PASSED] Clock 154000 BPP 30 DSC disabled
[14:10:09] [PASSED] Clock 234000 BPP 30 DSC disabled
[14:10:09] [PASSED] Clock 297000 BPP 24 DSC disabled
[14:10:09] [PASSED] Clock 332880 BPP 24 DSC enabled
[14:10:09] [PASSED] Clock 324540 BPP 24 DSC enabled
[14:10:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[14:10:09] ============== drm_test_dp_mst_calc_pbn_div  ===============
[14:10:09] [PASSED] Link rate 2000000 lane count 4
[14:10:09] [PASSED] Link rate 2000000 lane count 2
[14:10:09] [PASSED] Link rate 2000000 lane count 1
[14:10:09] [PASSED] Link rate 1350000 lane count 4
[14:10:09] [PASSED] Link rate 1350000 lane count 2
[14:10:09] [PASSED] Link rate 1350000 lane count 1
[14:10:09] [PASSED] Link rate 1000000 lane count 4
[14:10:09] [PASSED] Link rate 1000000 lane count 2
[14:10:09] [PASSED] Link rate 1000000 lane count 1
[14:10:09] [PASSED] Link rate 810000 lane count 4
[14:10:09] [PASSED] Link rate 810000 lane count 2
[14:10:09] [PASSED] Link rate 810000 lane count 1
[14:10:09] [PASSED] Link rate 540000 lane count 4
[14:10:09] [PASSED] Link rate 540000 lane count 2
[14:10:09] [PASSED] Link rate 540000 lane count 1
[14:10:09] [PASSED] Link rate 270000 lane count 4
[14:10:09] [PASSED] Link rate 270000 lane count 2
[14:10:09] [PASSED] Link rate 270000 lane count 1
[14:10:09] [PASSED] Link rate 162000 lane count 4
[14:10:09] [PASSED] Link rate 162000 lane count 2
[14:10:09] [PASSED] Link rate 162000 lane count 1
[14:10:09] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[14:10:09] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[14:10:09] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[14:10:09] [PASSED] DP_POWER_UP_PHY with port number
[14:10:09] [PASSED] DP_POWER_DOWN_PHY with port number
[14:10:09] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[14:10:09] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[14:10:09] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[14:10:09] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[14:10:09] [PASSED] DP_QUERY_PAYLOAD with port number
[14:10:09] [PASSED] DP_QUERY_PAYLOAD with VCPI
[14:10:09] [PASSED] DP_REMOTE_DPCD_READ with port number
[14:10:09] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[14:10:09] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[14:10:09] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[14:10:09] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[14:10:09] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[14:10:09] [PASSED] DP_REMOTE_I2C_READ with port number
[14:10:09] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[14:10:09] [PASSED] DP_REMOTE_I2C_READ with transactions array
[14:10:09] [PASSED] DP_REMOTE_I2C_WRITE with port number
[14:10:09] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[14:10:09] [PASSED] DP_REMOTE_I2C_WRITE with data array
[14:10:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[14:10:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[14:10:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[14:10:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[14:10:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[14:10:09] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[14:10:09] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[14:10:09] ================ [PASSED] drm_dp_mst_helper ================
[14:10:09] ================== drm_exec (7 subtests) ===================
[14:10:09] [PASSED] sanitycheck
[14:10:09] [PASSED] test_lock
[14:10:09] [PASSED] test_lock_unlock
[14:10:09] [PASSED] test_duplicates
[14:10:09] [PASSED] test_prepare
[14:10:09] [PASSED] test_prepare_array
[14:10:09] [PASSED] test_multiple_loops
[14:10:09] ==================== [PASSED] drm_exec =====================
[14:10:09] =========== drm_format_helper_test (17 subtests) ===========
[14:10:09] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[14:10:09] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[14:10:09] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[14:10:09] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[14:10:09] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[14:10:09] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[14:10:09] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[14:10:09] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[14:10:09] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[14:10:09] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[14:10:09] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[14:10:09] ============== drm_test_fb_xrgb8888_to_mono  ===============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[14:10:09] ==================== drm_test_fb_swab  =====================
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ================ [PASSED] drm_test_fb_swab =================
[14:10:09] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[14:10:09] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[14:10:09] [PASSED] single_pixel_source_buffer
[14:10:09] [PASSED] single_pixel_clip_rectangle
[14:10:09] [PASSED] well_known_colors
[14:10:09] [PASSED] destination_pitch
[14:10:09] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[14:10:09] ================= drm_test_fb_clip_offset  =================
[14:10:09] [PASSED] pass through
[14:10:09] [PASSED] horizontal offset
[14:10:09] [PASSED] vertical offset
[14:10:09] [PASSED] horizontal and vertical offset
[14:10:09] [PASSED] horizontal offset (custom pitch)
[14:10:09] [PASSED] vertical offset (custom pitch)
[14:10:09] [PASSED] horizontal and vertical offset (custom pitch)
[14:10:09] ============= [PASSED] drm_test_fb_clip_offset =============
[14:10:09] =================== drm_test_fb_memcpy  ====================
[14:10:09] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[14:10:09] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[14:10:09] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[14:10:09] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[14:10:09] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[14:10:09] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[14:10:09] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[14:10:09] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[14:10:09] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[14:10:09] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[14:10:09] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[14:10:09] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[14:10:09] =============== [PASSED] drm_test_fb_memcpy ================
[14:10:09] ============= [PASSED] drm_format_helper_test ==============
[14:10:09] ================= drm_format (18 subtests) =================
[14:10:09] [PASSED] drm_test_format_block_width_invalid
[14:10:09] [PASSED] drm_test_format_block_width_one_plane
[14:10:09] [PASSED] drm_test_format_block_width_two_plane
[14:10:09] [PASSED] drm_test_format_block_width_three_plane
[14:10:09] [PASSED] drm_test_format_block_width_tiled
[14:10:09] [PASSED] drm_test_format_block_height_invalid
[14:10:09] [PASSED] drm_test_format_block_height_one_plane
[14:10:09] [PASSED] drm_test_format_block_height_two_plane
[14:10:09] [PASSED] drm_test_format_block_height_three_plane
[14:10:09] [PASSED] drm_test_format_block_height_tiled
[14:10:09] [PASSED] drm_test_format_min_pitch_invalid
[14:10:09] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[14:10:09] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[14:10:09] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[14:10:09] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[14:10:09] [PASSED] drm_test_format_min_pitch_two_plane
[14:10:09] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[14:10:09] [PASSED] drm_test_format_min_pitch_tiled
[14:10:09] =================== [PASSED] drm_format ====================
[14:10:09] ============== drm_framebuffer (10 subtests) ===============
[14:10:09] ========== drm_test_framebuffer_check_src_coords  ==========
[14:10:09] [PASSED] Success: source fits into fb
[14:10:09] [PASSED] Fail: overflowing fb with x-axis coordinate
[14:10:09] [PASSED] Fail: overflowing fb with y-axis coordinate
[14:10:09] [PASSED] Fail: overflowing fb with source width
[14:10:09] [PASSED] Fail: overflowing fb with source height
[14:10:09] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[14:10:09] [PASSED] drm_test_framebuffer_cleanup
[14:10:09] =============== drm_test_framebuffer_create  ===============
[14:10:09] [PASSED] ABGR8888 normal sizes
[14:10:09] [PASSED] ABGR8888 max sizes
[14:10:09] [PASSED] ABGR8888 pitch greater than min required
[14:10:09] [PASSED] ABGR8888 pitch less than min required
[14:10:09] [PASSED] ABGR8888 Invalid width
[14:10:09] [PASSED] ABGR8888 Invalid buffer handle
[14:10:09] [PASSED] No pixel format
[14:10:09] [PASSED] ABGR8888 Width 0
[14:10:09] [PASSED] ABGR8888 Height 0
[14:10:09] [PASSED] ABGR8888 Out of bound height * pitch combination
[14:10:09] [PASSED] ABGR8888 Large buffer offset
[14:10:09] [PASSED] ABGR8888 Buffer offset for inexistent plane
[14:10:09] [PASSED] ABGR8888 Invalid flag
[14:10:09] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[14:10:09] [PASSED] ABGR8888 Valid buffer modifier
[14:10:09] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[14:10:09] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[14:10:09] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[14:10:09] [PASSED] NV12 Normal sizes
[14:10:09] [PASSED] NV12 Max sizes
[14:10:09] [PASSED] NV12 Invalid pitch
[14:10:09] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[14:10:09] [PASSED] NV12 different  modifier per-plane
[14:10:09] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[14:10:09] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[14:10:09] [PASSED] NV12 Modifier for inexistent plane
[14:10:09] [PASSED] NV12 Handle for inexistent plane
[14:10:09] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[14:10:09] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[14:10:09] [PASSED] YVU420 Normal sizes
[14:10:09] [PASSED] YVU420 Max sizes
[14:10:09] [PASSED] YVU420 Invalid pitch
[14:10:09] [PASSED] YVU420 Different pitches
[14:10:09] [PASSED] YVU420 Different buffer offsets/pitches
[14:10:09] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[14:10:09] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[14:10:09] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[14:10:09] [PASSED] YVU420 Valid modifier
[14:10:09] [PASSED] YVU420 Different modifiers per plane
[14:10:09] [PASSED] YVU420 Modifier for inexistent plane
[14:10:09] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[14:10:09] [PASSED] X0L2 Normal sizes
[14:10:09] [PASSED] X0L2 Max sizes
[14:10:09] [PASSED] X0L2 Invalid pitch
[14:10:09] [PASSED] X0L2 Pitch greater than minimum required
[14:10:09] [PASSED] X0L2 Handle for inexistent plane
[14:10:09] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[14:10:09] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[14:10:09] [PASSED] X0L2 Valid modifier
[14:10:09] [PASSED] X0L2 Modifier for inexistent plane
[14:10:09] =========== [PASSED] drm_test_framebuffer_create ===========
[14:10:09] [PASSED] drm_test_framebuffer_free
[14:10:09] [PASSED] drm_test_framebuffer_init
[14:10:09] [PASSED] drm_test_framebuffer_init_bad_format
[14:10:09] [PASSED] drm_test_framebuffer_init_dev_mismatch
[14:10:09] [PASSED] drm_test_framebuffer_lookup
[14:10:09] [PASSED] drm_test_framebuffer_lookup_inexistent
[14:10:09] [PASSED] drm_test_framebuffer_modifiers_not_supported
[14:10:09] ================= [PASSED] drm_framebuffer =================
[14:10:09] ================ drm_gem_shmem (8 subtests) ================
[14:10:09] [PASSED] drm_gem_shmem_test_obj_create
[14:10:09] [PASSED] drm_gem_shmem_test_obj_create_private
[14:10:09] [PASSED] drm_gem_shmem_test_pin_pages
[14:10:09] [PASSED] drm_gem_shmem_test_vmap
[14:10:09] [PASSED] drm_gem_shmem_test_get_sg_table
[14:10:09] [PASSED] drm_gem_shmem_test_get_pages_sgt
[14:10:09] [PASSED] drm_gem_shmem_test_madvise
[14:10:09] [PASSED] drm_gem_shmem_test_purge
[14:10:09] ================== [PASSED] drm_gem_shmem ==================
[14:10:09] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[14:10:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[14:10:09] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[14:10:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[14:10:09] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[14:10:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[14:10:09] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[14:10:09] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[14:10:09] [PASSED] Automatic
[14:10:09] [PASSED] Full
[14:10:09] [PASSED] Limited 16:235
[14:10:09] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[14:10:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[14:10:09] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[14:10:09] [PASSED] drm_test_check_disable_connector
[14:10:09] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[14:10:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[14:10:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[14:10:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[14:10:09] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[14:10:09] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[14:10:09] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[14:10:09] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[14:10:09] [PASSED] drm_test_check_output_bpc_dvi
[14:10:09] [PASSED] drm_test_check_output_bpc_format_vic_1
[14:10:09] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[14:10:09] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[14:10:09] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[14:10:09] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[14:10:09] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[14:10:09] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[14:10:09] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[14:10:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[14:10:09] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[14:10:09] [PASSED] drm_test_check_broadcast_rgb_value
[14:10:09] [PASSED] drm_test_check_bpc_8_value
[14:10:09] [PASSED] drm_test_check_bpc_10_value
[14:10:09] [PASSED] drm_test_check_bpc_12_value
[14:10:09] [PASSED] drm_test_check_format_value
[14:10:09] [PASSED] drm_test_check_tmds_char_value
[14:10:09] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[14:10:09] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[14:10:09] [PASSED] drm_test_check_mode_valid
[14:10:09] [PASSED] drm_test_check_mode_valid_reject
[14:10:09] [PASSED] drm_test_check_mode_valid_reject_rate
[14:10:09] [PASSED] drm_test_check_mode_valid_reject_max_clock
[14:10:09] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[14:10:09] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[14:10:09] [PASSED] drm_test_check_infoframes
[14:10:09] [PASSED] drm_test_check_reject_avi_infoframe
[14:10:09] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[14:10:09] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[14:10:09] [PASSED] drm_test_check_reject_audio_infoframe
[14:10:09] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[14:10:09] ================= drm_managed (2 subtests) =================
[14:10:09] [PASSED] drm_test_managed_release_action
[14:10:09] [PASSED] drm_test_managed_run_action
[14:10:09] =================== [PASSED] drm_managed ===================
[14:10:09] =================== drm_mm (6 subtests) ====================
[14:10:09] [PASSED] drm_test_mm_init
[14:10:09] [PASSED] drm_test_mm_debug
[14:10:09] [PASSED] drm_test_mm_align32
[14:10:09] [PASSED] drm_test_mm_align64
[14:10:09] [PASSED] drm_test_mm_lowest
[14:10:09] [PASSED] drm_test_mm_highest
[14:10:09] ===================== [PASSED] drm_mm ======================
[14:10:09] ============= drm_modes_analog_tv (5 subtests) =============
[14:10:09] [PASSED] drm_test_modes_analog_tv_mono_576i
[14:10:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[14:10:09] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[14:10:09] [PASSED] drm_test_modes_analog_tv_pal_576i
[14:10:09] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[14:10:09] =============== [PASSED] drm_modes_analog_tv ===============
[14:10:09] ============== drm_plane_helper (2 subtests) ===============
[14:10:09] =============== drm_test_check_plane_state  ================
[14:10:09] [PASSED] clipping_simple
[14:10:09] [PASSED] clipping_rotate_reflect
[14:10:09] [PASSED] positioning_simple
[14:10:09] [PASSED] upscaling
[14:10:09] [PASSED] downscaling
[14:10:09] [PASSED] rounding1
[14:10:09] [PASSED] rounding2
[14:10:09] [PASSED] rounding3
[14:10:09] [PASSED] rounding4
[14:10:09] =========== [PASSED] drm_test_check_plane_state ============
[14:10:09] =========== drm_test_check_invalid_plane_state  ============
[14:10:09] [PASSED] positioning_invalid
[14:10:09] [PASSED] upscaling_invalid
[14:10:09] [PASSED] downscaling_invalid
[14:10:09] ======= [PASSED] drm_test_check_invalid_plane_state ========
[14:10:09] ================ [PASSED] drm_plane_helper =================
[14:10:09] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[14:10:09] ====== drm_test_connector_helper_tv_get_modes_check  =======
[14:10:09] [PASSED] None
[14:10:09] [PASSED] PAL
[14:10:09] [PASSED] NTSC
[14:10:09] [PASSED] Both, NTSC Default
[14:10:09] [PASSED] Both, PAL Default
[14:10:09] [PASSED] Both, NTSC Default, with PAL on command-line
[14:10:09] [PASSED] Both, PAL Default, with NTSC on command-line
[14:10:09] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[14:10:09] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[14:10:09] ================== drm_rect (9 subtests) ===================
[14:10:09] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[14:10:09] [PASSED] drm_test_rect_clip_scaled_not_clipped
[14:10:09] [PASSED] drm_test_rect_clip_scaled_clipped
[14:10:09] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[14:10:09] ================= drm_test_rect_intersect  =================
[14:10:09] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[14:10:09] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[14:10:09] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[14:10:09] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[14:10:09] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[14:10:09] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[14:10:09] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[14:10:09] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[14:10:09] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[14:10:09] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[14:10:09] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[14:10:09] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[14:10:09] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[14:10:09] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[14:10:09] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[14:10:09] ============= [PASSED] drm_test_rect_intersect =============
[14:10:09] ================ drm_test_rect_calc_hscale  ================
[14:10:09] [PASSED] normal use
[14:10:09] [PASSED] out of max range
[14:10:09] [PASSED] out of min range
[14:10:09] [PASSED] zero dst
[14:10:09] [PASSED] negative src
[14:10:09] [PASSED] negative dst
[14:10:09] ============ [PASSED] drm_test_rect_calc_hscale ============
[14:10:09] ================ drm_test_rect_calc_vscale  ================
[14:10:09] [PASSED] normal use
[14:10:09] [PASSED] out of max range
[14:10:09] [PASSED] out of min range
[14:10:09] [PASSED] zero dst
[14:10:09] [PASSED] negative src
[14:10:09] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[14:10:09] ============ [PASSED] drm_test_rect_calc_vscale ============
[14:10:09] ================== drm_test_rect_rotate  ===================
[14:10:09] [PASSED] reflect-x
[14:10:09] [PASSED] reflect-y
[14:10:09] [PASSED] rotate-0
[14:10:09] [PASSED] rotate-90
[14:10:09] [PASSED] rotate-180
[14:10:09] [PASSED] rotate-270
[14:10:09] ============== [PASSED] drm_test_rect_rotate ===============
[14:10:09] ================ drm_test_rect_rotate_inv  =================
[14:10:09] [PASSED] reflect-x
[14:10:09] [PASSED] reflect-y
[14:10:09] [PASSED] rotate-0
[14:10:09] [PASSED] rotate-90
[14:10:09] [PASSED] rotate-180
[14:10:09] [PASSED] rotate-270
[14:10:09] ============ [PASSED] drm_test_rect_rotate_inv =============
[14:10:09] ==================== [PASSED] drm_rect =====================
[14:10:09] ============ drm_sysfb_modeset_test (1 subtest) ============
[14:10:09] ============ drm_test_sysfb_build_fourcc_list  =============
[14:10:09] [PASSED] no native formats
[14:10:09] [PASSED] XRGB8888 as native format
[14:10:09] [PASSED] remove duplicates
[14:10:09] [PASSED] convert alpha formats
[14:10:09] [PASSED] random formats
[14:10:09] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[14:10:09] ============= [PASSED] drm_sysfb_modeset_test ==============
[14:10:09] ================== drm_fixp (2 subtests) ===================
[14:10:09] [PASSED] drm_test_int2fixp
[14:10:09] [PASSED] drm_test_sm2fixp
[14:10:09] ==================== [PASSED] drm_fixp =====================
[14:10:09] ============================================================
[14:10:09] Testing complete. Ran 621 tests: passed: 621
[14:10:09] Elapsed time: 25.980s total, 1.677s configuring, 24.131s building, 0.170s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
stty: 'standard input': Inappropriate ioctl for device
[14:10:09] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:10:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:10:20] Starting KUnit Kernel (1/1)...
[14:10:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:10:20] ================= ttm_device (5 subtests) ==================
[14:10:20] [PASSED] ttm_device_init_basic
[14:10:20] [PASSED] ttm_device_init_multiple
[14:10:20] [PASSED] ttm_device_fini_basic
[14:10:20] [PASSED] ttm_device_init_no_vma_man
[14:10:20] ================== ttm_device_init_pools  ==================
[14:10:20] [PASSED] No DMA allocations, no DMA32 required
[14:10:20] # ttm_device_init_pools: ASSERTION FAILED at drivers/gpu/drm/ttm/tests/ttm_device_test.c:178
[14:10:20] Expected !list_lru_count(&pt.pages) to be false, but is true
[14:10:20] [FAILED] DMA allocations, DMA32 required
[14:10:20] [PASSED] No DMA allocations, DMA32 required
[14:10:20]     # ttm_device_init_pools: ASSERTION FAILED at drivers/gpu/drm/ttm/tests/ttm_device_test.c:178
[14:10:20]     Expected !list_lru_count(&pt.pages) to be false, but is true
[14:10:20] ------------[ cut here ]------------
[14:10:20] WARNING: lib/refcount.c:28 at devres_release_all+0xaa/0x100, CPU#0: kunit_try_catch/46
[14:10:20] refcount_t: underflow; use-after-free.
[14:10:20] CPU: 0 UID: 0 PID: 46 Comm: kunit_try_catch Tainted: G        W        N  7.0.0-rc7-g50d45c9c4ab5 #3 VOLUNTARY
[14:10:20] Tainted: [W]=WARN, [N]=TEST
[14:10:20] Stack:
[14:10:20]  6044ed8b 00000000 00000000 00000001
[14:10:20]  ffffff00 6044ed8b 6032367a 00000009
[14:10:20]  0000001c 60043e88 6002381c aa8cbd40
[14:10:20] Call Trace:
[14:10:20]  [<6032367a>] ? devres_release_all+0xaa/0x100
[14:10:20]  [<60043e88>] ? dump_stack_lvl+0x5e/0x7a
[14:10:20]  [<6002381c>] ? _printk+0x0/0x65
[14:10:20]  [<6001f09f>] ? __warn.cold+0x79/0x11f
[14:10:20]  [<6001f1d9>] ? warn_slowpath_fmt+0x94/0xa1
[14:10:20]  [<601ef1a0>] ? kernfs_free_rcu+0x0/0x70
[14:10:20]  [<60052e36>] ? um_set_signals+0x36/0x60
[14:10:20]  [<600c5a42>] ? call_rcu+0x52/0x90
[14:10:20]  [<6001f145>] ? warn_slowpath_fmt+0x0/0xa1
[14:10:20]  [<60147f50>] ? kfree+0x0/0x250
[14:10:20]  [<6032367a>] ? devres_release_all+0xaa/0x100
[14:10:20]  [<60396bb0>] ? mutex_unlock+0x0/0x30
[14:10:20]  [<6031c3c0>] ? bus_notify+0x0/0x60
[14:10:20]  [<60396bb0>] ? mutex_unlock+0x0/0x30
[14:10:20]  [<60398620>] ? mutex_lock+0x0/0x40
[14:10:20]  [<6031ca24>] ? device_unbind_cleanup+0x14/0xb0
[14:10:20]  [<6031e1f6>] ? device_release_driver_internal+0x256/0x2b0
[14:10:20]  [<60372210>] ? kobject_put+0x0/0x150
[14:10:20]  [<601f3d40>] ? sysfs_remove_file_ns+0x0/0x20
[14:10:20]  [<6031c00f>] ? bus_remove_device+0x10f/0x1a0
[14:10:20]  [<601f3d40>] ? sysfs_remove_file_ns+0x0/0x20
[14:10:20]  [<601f17b8>] ? kernfs_remove_by_name_ns+0x98/0x130
[14:10:20]  [<60315a8c>] ? device_del+0x1bc/0x600
[14:10:20]  [<60052e00>] ? um_set_signals+0x0/0x60
[14:10:20]  [<6025b2a0>] ? device_unregister_wrapper+0x0/0x10
[14:10:20]  [<60052e00>] ? um_set_signals+0x0/0x60
[14:10:20]  [<60315ee4>] ? device_unregister+0x14/0x40
[14:10:20]  [<60257e66>] ? kunit_release_action+0xf6/0x170
[14:10:20]  [<60257d70>] ? kunit_release_action+0x0/0x170
[14:10:20]  [<6025b2e2>] ? kunit_device_unregister+0x32/0x80
[14:10:20]  [<60259890>] ? kunit_generic_run_threadfn_adapter+0x0/0x30
[14:10:20]  [<6025748e>] ? kunit_try_run_case_cleanup+0x2e/0x40
[14:10:20]  [<602598a6>] ? kunit_generic_run_threadfn_adapter+0x16/0x30
[14:10:20]  [<60081e36>] ? kthread+0xe6/0x150
[14:10:20]  [<60046435>] ? new_thread_handler+0x45/0x60
[14:10:20] ---[ end trace 0000000000000000 ]---
[14:10:20] [FAILED] DMA allocations, no DMA32 required
[14:10:20] # ttm_device_init_pools: pass:2 fail:2 skip:0 total:4
[14:10:20] ============== [FAILED] ttm_device_init_pools ==============
[14:10:20]     # module: ttm_device_test
[14:10:20] # ttm_device: pass:4 fail:1 skip:0 total:5
[14:10:20] # Totals: pass:6 fail:2 skip:0 total:8
[14:10:20] =================== [FAILED] ttm_device ====================
[14:10:20] ================== ttm_pool (8 subtests) ===================
[14:10:20] ================== ttm_pool_alloc_basic  ===================
[14:10:20] [PASSED] One page
[14:10:20] [PASSED] More than one page
[14:10:20] [PASSED] Above the allocation limit
[14:10:20] [PASSED] One page, with coherent DMA mappings enabled
[14:10:20] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:10:20] ============== [PASSED] ttm_pool_alloc_basic ===============
[14:10:20] ============== ttm_pool_alloc_basic_dma_addr  ==============
[14:10:20] [PASSED] One page
[14:10:20] [PASSED] More than one page
[14:10:20] [PASSED] Above the allocation limit
[14:10:20] [PASSED] One page, with coherent DMA mappings enabled
[14:10:20] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:10:20] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[14:10:20] [PASSED] ttm_pool_alloc_order_caching_match
[14:10:20] [PASSED] ttm_pool_alloc_caching_mismatch
[14:10:20] [PASSED] ttm_pool_alloc_order_mismatch
[14:10:20] [PASSED] ttm_pool_free_dma_alloc
[14:10:20] [ERROR] Test: ttm_pool: missing expected subtest!
[14:10:20] 
[14:10:20] Pid: 75, comm: kunit_try_catch Tainted: G        W        N  7.0.0-rc7-g50d45c9c4ab5
[14:10:20] RIP: 0033:list_lru_count_node+0xe/0x20
[14:10:20] RSP: 00000000aa8cbed8  EFLAGS: 00010246
[14:10:20] RAX: 0000000000000000 RBX: 00000000aa803c90 RCX: 000000006ae4c7d8
[14:10:20] RDX: 0000000000000000 RSI: 0000000000000000 RDI: 000000006ac86880
[14:10:20] RBP: 000000006ac86800 R08: 00000000a94c8c28 R09: 000000006ac50c80
[14:10:20] R10: 0000000000000000 R11: 0000000000000000 R12: 000000006ac50c80
[14:10:20] R13: 0000000060440770 R14: 000000006010eb50 R15: 000000006ac86880
[14:10:20] Kernel panic - not syncing: Segfault with no mm
[14:10:20] [CRASHED] 
[14:10:20] [ERROR] Test: ttm_pool: missing expected subtest!
[14:10:20] [CRASHED] 
[14:10:20] [ERROR] Test: ttm_pool: missing subtest result line!
[14:10:20] # module: ttm_pool_test
[14:10:20] ==================== [CRASHED] ttm_pool ====================
[14:10:20] [ERROR] Test: main: missing expected subtest!
[14:10:20] [CRASHED] 
[14:10:20] [ERROR] Test: main: missing expected subtest!
[14:10:20] [CRASHED] 
[14:10:20] [ERROR] Test: main: missing expected subtest!
[14:10:20] [CRASHED] 
[14:10:20] [ERROR] Test: main: missing expected subtest!
[14:10:20] [CRASHED] 
[14:10:20] ============================================================
[14:10:20] Testing complete. Ran 28 tests: passed: 20, failed: 2, crashed: 6, errors: 7
The kernel seems to have crashed; you can decode the stack traces with:
$ scripts/decode_stacktrace.sh .kunit/vmlinux .kunit < .kunit/test.log | tee .kunit/decoded.log | /kernel/tools/testing/kunit/kunit.py parse
[14:10:20] Elapsed time: 11.347s total, 1.712s configuring, 9.318s building, 0.317s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel