Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: Nemesa Garg <nemesa.garg@intel.com>,
	<intel-gfx@lists.freedesktop.org>,
	<intel-xe@lists.freedesktop.org>,
	<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH 1/3] drm/dp: Add DP_DSC_MAX_BPP_DELTA register
Date: Thu, 14 May 2026 13:49:14 +0530	[thread overview]
Message-ID: <e0eb5070-1790-49ff-be2b-895533caafb8@intel.com> (raw)
In-Reply-To: <20260423143035.2267634-2-nemesa.garg@intel.com>


On 4/23/2026 8:00 PM, Nemesa Garg wrote:
> The dsc max bpp delta masks were incorrectly placed
> under the DP_DSC_BITS_PER_PIXEL_INC(0x06F) register.
> Move these under correct DP_DSC_MAX_BPP_DELTA(0x06E)
> register.
>
> v2: Separate patch for correcting register. [Ankit]
>
> Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
> ---
>   include/drm/display/drm_dp.h | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index 8b15d3eeb716..520490ac6778 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -354,9 +354,11 @@
>   # define DP_DSC_20_PER_DP_DSC_SINK          (1 << 1)
>   # define DP_DSC_24_PER_DP_DSC_SINK          (1 << 2)
>   
> -#define DP_DSC_BITS_PER_PIXEL_INC           0x06F
> +#define DP_DSC_MAX_BPP_DELTA		    0x06E
>   # define DP_DSC_RGB_YCbCr444_MAX_BPP_DELTA_MASK 0x1f
>   # define DP_DSC_RGB_YCbCr420_MAX_BPP_DELTA_MASK 0xe0

This should be called DP_DSC_Native_YCbCr420_MAX_BPP_DELTA_MASK

But that should be yet another patch.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>



> +
> +#define DP_DSC_BITS_PER_PIXEL_INC           0x06F
>   # define DP_DSC_BITS_PER_PIXEL_1_16         0x0
>   # define DP_DSC_BITS_PER_PIXEL_1_8          0x1
>   # define DP_DSC_BITS_PER_PIXEL_1_4          0x2

  reply	other threads:[~2026-05-14  8:19 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-23 14:30 [PATCH 0/3] DSC max delta bpp support Nemesa Garg
2026-04-23 14:30 ` [PATCH 1/3] drm/dp: Add DP_DSC_MAX_BPP_DELTA register Nemesa Garg
2026-05-14  8:19   ` Nautiyal, Ankit K [this message]
2026-04-23 14:30 ` [PATCH 2/3] drm/dp: Add max bpp delta computation constants Nemesa Garg
2026-05-14 10:02   ` Nautiyal, Ankit K
2026-04-23 14:30 ` [PATCH 3/3] drm/i915/dp: Decode dsc max delta bpp from sink dpcd Nemesa Garg
2026-05-14  9:56   ` Nautiyal, Ankit K
2026-04-23 15:24 ` ✓ CI.KUnit: success for DSC max delta bpp support (rev2) Patchwork
2026-04-23 16:18 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-24  0:48 ` ✗ Xe.CI.FULL: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=e0eb5070-1790-49ff-be2b-895533caafb8@intel.com \
    --to=ankit.k.nautiyal@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=nemesa.garg@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox