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d="scan'208";a="267995636" Received: from kniemiec-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.238]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Apr 2026 00:11:30 -0700 From: Jani Nikula To: Dibin Moolakadan Subrahmanian , intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: animesh.manna@intel.com, uma.shankar@intel.com, suresh.kumar.kurmi@intel.com Subject: Re: [PATCH 06/19] drm/i915/display: Fix HAS_DC3CO() and add DC3CO trigger enum In-Reply-To: <20260326171557.2065632-7-dibin.moolakadan.subrahmanian@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland References: <20260326171557.2065632-1-dibin.moolakadan.subrahmanian@intel.com> <20260326171557.2065632-7-dibin.moolakadan.subrahmanian@intel.com> Date: Tue, 14 Apr 2026 10:11:26 +0300 Message-ID: MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" On Thu, 26 Mar 2026, Dibin Moolakadan Subrahmanian wrote: > Fix HAS_DC3CO() based on display version and introduce an enum to > track DC3CO enabling triggers. > > BSpec: 75253 > Signed-off-by: Dibin Moolakadan Subrahmanian > --- > .../gpu/drm/i915/display/intel_display_device.h | 2 +- > .../gpu/drm/i915/display/intel_display_power.h | 15 +++++++++++++++ > 2 files changed, 16 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h > index 35e06fcf794d..002fe0ce951a 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_device.h > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h > @@ -189,7 +189,7 @@ struct intel_display_platforms { > #define HAS_LRR(__display) (DISPLAY_VER(__display) >= 12) > #define HAS_LSPCON(__display) (IS_DISPLAY_VER(__display, 9, 10)) > #define HAS_LT_PHY(__display) ((__display)->platform.novalake) > -#define HAS_DC3CO(__display) ((__display)->platform.novalake) > +#define HAS_DC3CO(__display) (DISPLAY_VER(__display) >= 35) > #define HAS_MBUS_JOINING(__display) ((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14) > #define HAS_MSO(__display) (DISPLAY_VER(__display) >= 12) > #define HAS_OVERLAY(__display) (DISPLAY_INFO(__display)->has_overlay) > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h > index d616d5d09cbe..3fb45154864e 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.h > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h > @@ -131,6 +131,21 @@ struct intel_power_domain_mask { > DECLARE_BITMAP(bits, POWER_DOMAIN_NUM); > }; > > +/* > + * DC3CO enabling triggers (bitmask). > + * DC3CO may be enabled when at least one of these triggers is active. > + * Additional constraints may still apply. > + */ > +enum intel_dc3co_trigger { > + DC3CO_TRIGGER_NONE = 0, > + DC3CO_TRIGGER_PSR2 = BIT(0), > + DC3CO_TRIGGER_LOBF = BIT(1), > + DC3CO_TRIGGER_PANEL_REPLAY = BIT(2), > + DC3CO_TRIGGER_ALL = DC3CO_TRIGGER_PSR2 | > + DC3CO_TRIGGER_LOBF | > + DC3CO_TRIGGER_PANEL_REPLAY, > +}; Enumerations are enumerations and bitmasks are bitmasks, and I don't think they should be mixed like this. Moreover, the enum as a type isn't even used anywhere. BR, Jani. > + > struct i915_power_domains { > /* > * Power wells needed for initialization at driver init and suspend -- Jani Nikula, Intel