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From: "Lis, Tomasz" <tomasz.lis@intel.com>
To: Michal Wajdeczko <michal.wajdeczko@intel.com>,
	<intel-xe@lists.freedesktop.org>
Cc: "Michał Winiarski" <michal.winiarski@intel.com>,
	"Piotr Piórkowski" <piotr.piorkowski@intel.com>,
	"Matthew Brost" <matthew.brost@intel.com>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"Satyanarayana K V P" <satyanarayana.k.v.p@intel.com>
Subject: Re: [PATCH v4 5/8] drm/xe/vf: Rebase HWSP of all contexts after migration
Date: Wed, 11 Jun 2025 22:18:40 +0200	[thread overview]
Message-ID: <e77ec4a2-2429-46e4-8695-c043a29bf674@intel.com> (raw)
In-Reply-To: <46b4bb51-c088-44d9-97de-9cc9b8385a62@intel.com>


On 09.06.2025 13:03, Michal Wajdeczko wrote:
> On 06.06.2025 02:18, Tomasz Lis wrote:
>> All contexts require an update due to GGTT range shift, as that
>> affects their HWSP.
>>
>> The HW status page of a context contains GGTT references, which
>> need to be shifted to a new range (or re-computed using the
>> previously updated vma nodes). The references include ring start
>> address and indirect state address.
>>
>> v2: move some functions to better matched files
>> v3: Add missing kerneldocs
>>
>> Signed-off-by: Tomasz Lis<tomasz.lis@intel.com>
>> Cc: Michal Wajdeczko<michal.wajdeczko@intel.com>
>> Cc: Michal Winiarski<michal.winiarski@intel.com>
>> Acked-by: Satyanarayana K V P<satyanarayana.k.v.p@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_exec_queue.c | 13 +++++++++++++
>>   drivers/gpu/drm/xe/xe_exec_queue.h |  2 ++
>>   drivers/gpu/drm/xe/xe_guc_submit.c | 16 ++++++++++++++++
>>   drivers/gpu/drm/xe/xe_guc_submit.h |  2 ++
>>   drivers/gpu/drm/xe/xe_lrc.c        | 16 ++++++++++++++++
>>   drivers/gpu/drm/xe/xe_lrc.h        |  1 +
>>   drivers/gpu/drm/xe/xe_sriov_vf.c   | 17 +++++++++++++++--
>>   7 files changed, 65 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
>> index fee22358cc09..c44a523ba906 100644
>> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>> @@ -1028,3 +1028,16 @@ int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q, struct xe_vm *vm)
>>   
>>   	return err;
>>   }
>> +
>> +/**
>> + * xe_exec_queue_contexts_hwsp_rebase - Re-compute GGTT references
>> + * within all LRCs of a queue.
>> + * @q: the &xe_exec_queue struct instance containing target LRCs
>> + */
>> +void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q)
>> +{
>> +	int i;
>> +
>> +	for (i = 0; i < q->width; ++i)
>> +		xe_lrc_update_hwctx_regs_with_address(q->lrc[i]);
>> +}
>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
>> index 17bc50a7f05a..1d399a33c5c0 100644
>> --- a/drivers/gpu/drm/xe/xe_exec_queue.h
>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
>> @@ -90,4 +90,6 @@ int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q,
>>   				      struct xe_vm *vm);
>>   void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
>>   
>> +void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q);
>> +
>>   #endif
>> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
>> index 0d6d9e07fc48..89b4c09e733a 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
>> @@ -2449,3 +2449,19 @@ void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p)
>>   		guc_exec_queue_print(q, p);
>>   	mutex_unlock(&guc->submission_state.lock);
>>   }
>> +
>> +/**
>> + * xe_guc_contexts_hwsp_rebase - Re-compute GGTT references within all
>> + * exec queues registered to given GuC.
>> + * @guc: the &xe_guc struct instance
>> + */
>> +void xe_guc_contexts_hwsp_rebase(struct xe_guc *guc)
>> +{
>> +	struct xe_exec_queue *q;
>> +	unsigned long index;
>> +
>> +	mutex_lock(&guc->submission_state.lock);
>> +	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
>> +		xe_exec_queue_contexts_hwsp_rebase(q);
>> +	mutex_unlock(&guc->submission_state.lock);
>> +}
>> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
>> index 45b978b047c9..5b43e6639f52 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_submit.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
>> @@ -45,4 +45,6 @@ void
>>   xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot *snapshot);
>>   void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p);
>>   
>> +void xe_guc_contexts_hwsp_rebase(struct xe_guc *guc);
>> +
>>   #endif
>> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
>> index 63d74e27f54c..72690f71289c 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc.c
>> +++ b/drivers/gpu/drm/xe/xe_lrc.c
>> @@ -1181,6 +1181,22 @@ void xe_lrc_destroy(struct kref *ref)
>>   	kfree(lrc);
>>   }
>>   
>> +/**
>> + * xe_lrc_update_hwctx_regs_with_address - Re-compute GGTT references within given LRC.
>> + * @lrc: the &xe_lrc struct instance
>> + */
>> +void xe_lrc_update_hwctx_regs_with_address(struct xe_lrc *lrc)
>> +{
>> +	if (xe_lrc_has_indirect_ring_state(lrc)) {
>> +		xe_lrc_write_ctx_reg(lrc, CTX_INDIRECT_RING_STATE,
>> +				     __xe_lrc_indirect_ring_ggtt_addr(lrc));
>> +
>> +		xe_lrc_write_indirect_ctx_reg(lrc, INDIRECT_CTX_RING_START,
>> +					      __xe_lrc_ring_ggtt_addr(lrc));
>> +	} else
>> +		xe_lrc_write_ctx_reg(lrc, CTX_RING_START, __xe_lrc_ring_ggtt_addr(lrc));
> please run checkpatch.pl as promised!
>
> 19c7fdd34f6b drm/xe/vf: Rebase HWSP of all contexts after migration
> -:109: CHECK:BRACES: Unbalanced braces around else statement
> #109: FILE: drivers/gpu/drm/xe/xe_lrc.c:1196:
> +	} else

Right, I didn't realized there's a clear rule for that:

"if only one branch of a conditional statement is a single statement 
[...] use braces in both branches"

-Tomasz

>> +}
>> +
>>   void xe_lrc_set_ring_tail(struct xe_lrc *lrc, u32 tail)
>>   {
>>   	if (xe_lrc_has_indirect_ring_state(lrc))
>> diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
>> index eb6e8de8c939..e7a99cfd0abe 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc.h
>> +++ b/drivers/gpu/drm/xe/xe_lrc.h
>> @@ -88,6 +88,7 @@ bool xe_lrc_ring_is_idle(struct xe_lrc *lrc);
>>   u32 xe_lrc_indirect_ring_ggtt_addr(struct xe_lrc *lrc);
>>   u32 xe_lrc_ggtt_addr(struct xe_lrc *lrc);
>>   u32 *xe_lrc_regs(struct xe_lrc *lrc);
>> +void xe_lrc_update_hwctx_regs_with_address(struct xe_lrc *lrc);
>>   
>>   u32 xe_lrc_read_ctx_reg(struct xe_lrc *lrc, int reg_nr);
>>   void xe_lrc_write_ctx_reg(struct xe_lrc *lrc, int reg_nr, u32 val);
>> diff --git a/drivers/gpu/drm/xe/xe_sriov_vf.c b/drivers/gpu/drm/xe/xe_sriov_vf.c
>> index 29f3082c8fa5..d54048bc4576 100644
>> --- a/drivers/gpu/drm/xe/xe_sriov_vf.c
>> +++ b/drivers/gpu/drm/xe/xe_sriov_vf.c
>> @@ -7,12 +7,14 @@
>>   
>>   #include "xe_assert.h"
>>   #include "xe_device.h"
>> +#include "xe_exec_queue_types.h"
>>   #include "xe_gt.h"
>>   #include "xe_gt_sriov_printk.h"
>>   #include "xe_gt_sriov_vf.h"
>>   #include "xe_guc_ct.h"
>>   #include "xe_guc_submit.h"
>>   #include "xe_irq.h"
>> +#include "xe_lrc.h"
>>   #include "xe_pm.h"
>>   #include "xe_sriov.h"
>>   #include "xe_sriov_printk.h"
>> @@ -240,6 +242,15 @@ static int vf_post_migration_requery_guc(struct xe_device *xe)
>>   	return ret;
>>   }
>>   
>> +static void vf_post_migration_fixup_contexts(struct xe_device *xe)
>> +{
>> +	struct xe_gt *gt;
>> +	unsigned int id;
>> +
>> +	for_each_gt(gt, xe, id)
>> +		xe_guc_contexts_hwsp_rebase(&gt->uc.guc);
>> +}
>> +
>>   static void vf_post_migration_fixup_ctb(struct xe_device *xe)
>>   {
>>   	struct xe_gt *gt;
>> @@ -325,9 +336,11 @@ static void vf_post_migration_recovery(struct xe_device *xe)
>>   	}
>>   
>>   	need_fixups = vf_post_migration_fixup_ggtt_nodes(xe);
>> -	/* FIXME: add the recovery steps */
>> -	if (need_fixups)
>> +	if (need_fixups) {
>> +		vf_post_migration_fixup_contexts(xe);
>> +		/* FIXME: add the recovery steps */
>>   		vf_post_migration_fixup_ctb(xe);
>> +	}
>>   
>>   	vf_post_migration_kickstart(xe);
>>   	vf_post_migration_notify_resfix_done(xe);

  reply	other threads:[~2025-06-11 20:18 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-06  0:18 [PATCH v4 0/8] drm/xe/vf: Post-migration recovery of queues and jobs Tomasz Lis
2025-06-06  0:18 ` [PATCH v4 1/8] drm/xe/sa: Avoid caching GGTT address within the manager Tomasz Lis
2025-06-06  0:18 ` [PATCH v4 2/8] drm/xe/vf: Finish RESFIX by reset if CTB not enabled Tomasz Lis
2025-06-09 11:00   ` Michal Wajdeczko
2025-06-11 20:18     ` Lis, Tomasz
2025-06-06  0:18 ` [PATCH v4 3/8] drm/xe/vf: Pause submissions during RESFIX fixups Tomasz Lis
2025-06-06  0:18 ` [PATCH v4 4/8] drm/xe: Block reset while recovering from VF migration Tomasz Lis
2025-06-06  0:18 ` [PATCH v4 5/8] drm/xe/vf: Rebase HWSP of all contexts after migration Tomasz Lis
2025-06-09 11:03   ` Michal Wajdeczko
2025-06-11 20:18     ` Lis, Tomasz [this message]
2025-06-06  0:18 ` [PATCH v4 6/8] drm/xe/vf: Rebase MEMIRQ structures for " Tomasz Lis
2025-06-09 11:15   ` Michal Wajdeczko
2025-06-06  0:18 ` [PATCH v4 7/8] drm/xe/vf: Post migration, repopulate ring area for pending request Tomasz Lis
2025-06-06  0:18 ` [PATCH v4 8/8] drm/xe/vf: Refresh utilization buffer during migration recovery Tomasz Lis
2025-06-06  2:43 ` ✓ CI.Patch_applied: success for drm/xe/vf: Post-migration recovery of queues and jobs (rev4) Patchwork
2025-06-06  2:44 ` ✗ CI.checkpatch: warning " Patchwork
2025-06-06  2:45 ` ✓ CI.KUnit: success " Patchwork
2025-06-06  2:56 ` ✓ CI.Build: " Patchwork
2025-06-06  2:58 ` ✗ CI.Hooks: failure " Patchwork
2025-06-06  3:00 ` ✓ CI.checksparse: success " Patchwork
2025-06-06  3:46 ` ✓ Xe.CI.BAT: " Patchwork
2025-06-08  7:58 ` ✗ Xe.CI.Full: failure " Patchwork

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