From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: Mika Kuoppala <mika.kuoppala@linux.intel.com>,
<intel-xe@lists.freedesktop.org>
Cc: <simona.vetter@ffwll.ch>, <matthew.brost@intel.com>,
<christian.koenig@amd.com>, <thomas.hellstrom@linux.intel.com>,
<joonas.lahtinen@linux.intel.com>,
<christoph.manszewski@intel.com>, <rodrigo.vivi@intel.com>,
<andrzej.hajda@intel.com>, <matthew.auld@intel.com>,
<maciej.patelczyk@intel.com>, <gwan-gyeong.mun@intel.com>,
Lucas De Marchi <lucas.demarchi@intel.com>,
"Jan Sokolowski" <jan.sokolowski@intel.com>,
Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Subject: Re: [PATCH 05/20] drm/xe/eudebug: Mark guc contexts as debuggable
Date: Fri, 5 Dec 2025 18:03:44 -0800 [thread overview]
Message-ID: <e987af92-2320-45c7-afba-b724ea23058f@intel.com> (raw)
In-Reply-To: <20251202135241.880267-6-mika.kuoppala@linux.intel.com>
On 12/2/2025 5:52 AM, Mika Kuoppala wrote:
> We need to inform to guc which contexts are debuggable
> as their handling is different from ordinary contexts.
>
> v2: void return, use xe_gt_dbg, no need for lrc (Matt)
> v3: add the workaround enabling (Daniele)
> v4: version needed to 70.49.4
> v5: bail out early before registering eq (Daniele)
> v6: export the guc action for future (Mika)
>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Jan Sokolowski <jan.sokolowski@intel.com>
> Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
> Signed-off-by: Maciej Patelczyk <maciej.patelczyk@intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/xe/abi/guc_actions_abi.h | 5 ++++
> drivers/gpu/drm/xe/abi/guc_klvs_abi.h | 1 +
> drivers/gpu/drm/xe/xe_exec_queue.c | 5 ++++
> drivers/gpu/drm/xe/xe_guc.c | 17 ++++++++++++
> drivers/gpu/drm/xe/xe_guc.h | 3 +++
> drivers/gpu/drm/xe/xe_guc_ads.c | 17 ++++++++++++
> drivers/gpu/drm/xe/xe_guc_submit.c | 34 ++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_guc_submit.h | 1 +
> drivers/gpu/drm/xe/xe_wa_oob.rules | 2 ++
> 9 files changed, 85 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> index 47756e4674a1..32a5f680a6d2 100644
> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> @@ -155,6 +155,7 @@ enum xe_guc_action {
> XE_GUC_ACTION_NOTIFY_FLUSH_LOG_BUFFER_TO_FILE = 0x8003,
> XE_GUC_ACTION_NOTIFY_CRASH_DUMP_POSTED = 0x8004,
> XE_GUC_ACTION_NOTIFY_EXCEPTION = 0x8005,
> + XE_GUC_ACTION_EU_KERNEL_DEBUG = 0x8006,
> XE_GUC_ACTION_TEST_G2G_SEND = 0xF001,
> XE_GUC_ACTION_TEST_G2G_RECV = 0xF002,
> XE_GUC_ACTION_LIMIT
> @@ -278,4 +279,8 @@ enum xe_guc_g2g_type {
> /* invalid type for XE_GUC_ACTION_NOTIFY_MEMORY_CAT_ERROR */
> #define XE_GUC_CAT_ERR_TYPE_INVALID 0xdeadbeef
>
> +enum xe_guc_eu_kernel_debug_request_type {
> + XE_GUC_EU_KERNEL_DEBUG_ENABLE = 0x3,
> +};
> +
> #endif
> diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> index 265a135e7061..fba190d4f84b 100644
> --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
> @@ -423,6 +423,7 @@ enum xe_guc_klv_ids {
> GUC_WA_KLV_WAKE_POWER_DOMAINS_FOR_OUTBOUND_MMIO = 0x900a,
> GUC_WA_KLV_RESET_BB_STACK_PTR_ON_VF_SWITCH = 0x900b,
> GUC_WA_KLV_RESTORE_UNSAVED_MEDIA_CONTROL_REG = 0x900c,
> + GUC_WA_KLV_RESET_DEP_ENGINES_ON_DEBUG_CTX_SWITCH = 0x900d,
> };
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index ddaef00b56ff..e5590c6e3148 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -17,6 +17,7 @@
> #include "xe_device.h"
> #include "xe_gt.h"
> #include "xe_gt_sriov_vf.h"
> +#include "xe_guc.h"
> #include "xe_hw_engine_class_sysfs.h"
> #include "xe_hw_engine_group.h"
> #include "xe_hw_fence.h"
> @@ -593,6 +594,7 @@ static int exec_queue_set_eudebug(struct xe_device *xe, struct xe_exec_queue *q,
> u64 value)
> {
> const u64 known_flags = DRM_XE_EXEC_QUEUE_EUDEBUG_FLAG_ENABLE;
> + struct xe_guc *guc = &q->gt->uc.guc;
>
> if (XE_IOCTL_DBG(xe, (q->class != XE_ENGINE_CLASS_RENDER &&
> q->class != XE_ENGINE_CLASS_COMPUTE)))
> @@ -604,6 +606,9 @@ static int exec_queue_set_eudebug(struct xe_device *xe, struct xe_exec_queue *q,
> if (XE_IOCTL_DBG(xe, !IS_ENABLED(CONFIG_DRM_XE_EUDEBUG)))
> return -EOPNOTSUPP;
>
> + if (XE_IOCTL_DBG(xe, !xe_guc_has_debug_contexts(guc)))
> + return -EOPNOTSUPP;
> +
> if (XE_IOCTL_DBG(xe, !xe_exec_queue_is_lr(q)))
> return -EINVAL;
> /*
> diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
> index 88376bc2a483..ec0d6b5e0693 100644
> --- a/drivers/gpu/drm/xe/xe_guc.c
> +++ b/drivers/gpu/drm/xe/xe_guc.c
> @@ -1744,6 +1744,23 @@ bool xe_guc_using_main_gamctrl_queues(struct xe_guc *guc)
> return GT_VER(gt) >= 35;
> }
>
> +bool xe_guc_has_debug_contexts(struct xe_guc *guc)
> +{
> + const struct xe_uc_fw_version required = XE_UC_FW_VERSION_DEBUG_CONTEXTS;
> + struct xe_uc_fw_version *version = &guc->fw.versions.found[XE_UC_FW_VER_RELEASE];
> + struct xe_gt *gt = guc_to_gt(guc);
> +
> + if (MAKE_GUC_VER_STRUCT(*version) < MAKE_GUC_VER_STRUCT(required)) {
> + xe_gt_info(gt,
> + "debug context unsupported in GuC interface v%u.%u.%u, need v%u.%u.%u or higher\n",
> + version->major, version->minor, version->patch, required.major,
> + required.minor, required.patch);
> + return false;
> + }
> +
> + return true;
> +}
> +
> #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
> #include "tests/xe_guc_g2g_test.c"
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
> index fdb08658d05a..10e387c72861 100644
> --- a/drivers/gpu/drm/xe/xe_guc.h
> +++ b/drivers/gpu/drm/xe/xe_guc.h
> @@ -23,6 +23,8 @@
> #define GUC_FIRMWARE_VER(guc) \
> MAKE_GUC_VER_STRUCT((guc)->fw.versions.found[XE_UC_FW_VER_RELEASE])
>
> +#define XE_UC_FW_VERSION_DEBUG_CONTEXTS { .major = 70, .minor = 49, .patch = 4 }
> +
> struct drm_printer;
>
> void xe_guc_comm_init_early(struct xe_guc *guc);
> @@ -55,6 +57,7 @@ void xe_guc_stop(struct xe_guc *guc);
> int xe_guc_start(struct xe_guc *guc);
> void xe_guc_declare_wedged(struct xe_guc *guc);
> bool xe_guc_using_main_gamctrl_queues(struct xe_guc *guc);
> +bool xe_guc_has_debug_contexts(struct xe_guc *guc);
>
> #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
> int xe_guc_g2g_test_notification(struct xe_guc *guc, u32 *payload, u32 len);
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> index bcb85a1bf26d..f4d1470229f1 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -363,6 +363,23 @@ static void guc_waklv_init(struct xe_guc_ads *ads)
> guc_waklv_enable(ads, NULL, 0, &offset, &remain,
> GUC_WORKAROUND_KLV_DISABLE_PSMI_INTERRUPTS_AT_C6_ENTRY_RESTORE_AT_EXIT);
>
> +#if IS_ENABLED(CONFIG_DRM_XE_EUDEBUG)
> + if (XE_GT_WA(gt, 14022766366)) {
> + if (xe_guc_has_debug_contexts(>->uc.guc)) {
> + guc_waklv_enable(ads, NULL, 0, &offset, &remain,
> + GUC_WA_KLV_RESET_DEP_ENGINES_ON_DEBUG_CTX_SWITCH);
> + } else {
> + const struct xe_uc_fw_version required =
> + XE_UC_FW_VERSION_DEBUG_CONTEXTS;
> +
> + xe_gt_info(gt, "eudebug needs GuC version %u.%u.%u or greater\n",
> + required.major,
> + required.minor,
> + required.patch);
> + }
> + }
> +#endif
> +
> size = guc_ads_waklv_size(ads) - remain;
> if (!size)
> return;
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index 3ca2558c8c96..dd9d567f0a7b 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -651,6 +651,37 @@ static void __register_exec_queue(struct xe_guc *guc,
> xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
> }
>
> +int xe_guc_action_eu_kernel_debug(struct xe_guc *guc, u32 id, u32 cmd)
> +{
> + const u32 action[] = {
> + XE_GUC_ACTION_EU_KERNEL_DEBUG,
> + id,
> + cmd,
> + 0, /* reserved */
> + };
> +
> + return xe_guc_ct_send(&guc->ct, action,
> + ARRAY_SIZE(action), 0, 0);
> +}
> +
> +static void set_eu_kernel_debug(struct xe_exec_queue *q)
> +{
> + struct xe_guc *guc = exec_queue_to_guc(q);
> + struct xe_gt *gt = guc_to_gt(guc);
> + int ret;
> +
> + ret = xe_guc_action_eu_kernel_debug(guc, q->guc->id,
> + XE_GUC_EU_KERNEL_DEBUG_ENABLE);
> +
> + if (ret)
> + xe_gt_warn(gt,
> + "GuC ctx=%d debug enabling failed with %d",
> + q->guc->id, ret);
> + else
> + xe_gt_dbg(gt,
> + "GuC ctx=%d enabled for debug", q->guc->id);
nit: q->guc->id is unsigned, so maybe use %u?
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Daniele
> +}
> +
> static void register_exec_queue(struct xe_exec_queue *q, int ctx_type)
> {
> struct xe_guc *guc = exec_queue_to_guc(q);
> @@ -705,6 +736,9 @@ static void register_exec_queue(struct xe_exec_queue *q, int ctx_type)
> else
> __register_exec_queue(guc, &info);
> init_policies(guc, q);
> +
> + if (xe_exec_queue_is_debuggable(q))
> + set_eu_kernel_debug(q);
> }
>
> static u32 wq_space_until_wrap(struct xe_exec_queue *q)
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
> index 100a7891b918..b25bd8f32abf 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.h
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
> @@ -50,5 +50,6 @@ void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p);
> void xe_guc_register_vf_exec_queue(struct xe_exec_queue *q, int ctx_type);
>
> int xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch);
> +int xe_guc_action_eu_kernel_debug(struct xe_guc *guc, u32 id, u32 cmd);
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index 7ca7258eb5d8..ae6daa50eaf1 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -77,3 +77,5 @@
> 15015404425_disable PLATFORM(PANTHERLAKE), MEDIA_STEP(B0, FOREVER)
> 16026007364 MEDIA_VERSION(3000)
> 14020316580 MEDIA_VERSION(1301)
> +14022766366 GRAPHICS_VERSION_RANGE(2001, 2004)
> + GRAPHICS_VERSION_RANGE(3000, 3005)
next prev parent reply other threads:[~2025-12-06 2:03 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-02 13:52 [PATCH 00/20] Intel Xe GPU Debug Support (eudebug) v6 Mika Kuoppala
2025-12-02 13:52 ` [PATCH 01/20] drm/xe/eudebug: Introduce eudebug interface Mika Kuoppala
2025-12-10 16:48 ` [PATCH 01/21] " Mika Kuoppala
2025-12-02 13:52 ` [PATCH 02/20] drm/xe/eudebug: Introduce discovery for resources Mika Kuoppala
2025-12-02 13:52 ` [PATCH 03/20] drm/xe/eudebug: Introduce exec_queue events Mika Kuoppala
2025-12-02 13:52 ` [PATCH 04/20] drm/xe: Add EUDEBUG_ENABLE exec queue property Mika Kuoppala
2025-12-02 13:52 ` [PATCH 05/20] drm/xe/eudebug: Mark guc contexts as debuggable Mika Kuoppala
2025-12-06 2:03 ` Daniele Ceraolo Spurio [this message]
2025-12-02 13:52 ` [PATCH 06/20] drm/xe: Introduce ADD_DEBUG_DATA and REMOVE_DEBUG_DATA vm bind ops Mika Kuoppala
2025-12-02 13:52 ` [PATCH 07/20] drm/xe/eudebug: Introduce vm bind and vm bind debug data events Mika Kuoppala
2025-12-02 13:52 ` [PATCH 08/20] drm/xe/eudebug: Add UFENCE events with acks Mika Kuoppala
2025-12-02 13:52 ` [PATCH 09/20] drm/xe/eudebug: vm open/pread/pwrite Mika Kuoppala
2025-12-02 13:52 ` [PATCH 10/20] drm/xe/eudebug: userptr vm pread/pwrite Mika Kuoppala
2025-12-02 13:52 ` [PATCH 11/20] drm/xe/eudebug: hw enablement for eudebug Mika Kuoppala
2025-12-02 13:52 ` [PATCH 12/20] drm/xe/eudebug: Introduce EU control interface Mika Kuoppala
2025-12-02 13:52 ` [PATCH 13/20] drm/xe/eudebug: Introduce per device attention scan worker Mika Kuoppala
2025-12-02 13:52 ` [PATCH 14/20] drm/xe/eudebug_test: Introduce xe_eudebug wa kunit test Mika Kuoppala
2025-12-02 13:52 ` [PATCH 15/20] drm/xe: Implement SR-IOV and eudebug exclusivity Mika Kuoppala
2025-12-02 13:52 ` [PATCH 16/20] drm/xe: Add xe_client_debugfs and introduce debug_data file Mika Kuoppala
2025-12-03 9:07 ` Mika Kuoppala
2025-12-02 13:52 ` [PATCH 17/20] drm/xe/eudebug: Add read/count/compare helper for eu attention Mika Kuoppala
2025-12-02 13:52 ` [PATCH 18/20] drm/xe/vm: Support for adding null page VMA to VM on request Mika Kuoppala
2025-12-02 13:52 ` [PATCH 19/20] drm/xe/eudebug: Introduce EU pagefault handling interface Mika Kuoppala
2025-12-02 13:52 ` [PATCH 20/20] drm/xe/eudebug: Enable EU pagefault handling Mika Kuoppala
2025-12-02 14:02 ` ✗ CI.checkpatch: warning for Intel Xe GPU Debug Support (eudebug) v6 Patchwork
2025-12-02 14:04 ` ✓ CI.KUnit: success " Patchwork
2025-12-02 15:34 ` ✓ Xe.CI.BAT: " Patchwork
2025-12-02 18:30 ` ✗ Xe.CI.Full: failure " Patchwork
2025-12-03 9:13 ` ✗ CI.checkpatch: warning for Intel Xe GPU Debug Support (eudebug) v6 (rev2) Patchwork
2025-12-03 9:15 ` ✓ CI.KUnit: success " Patchwork
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