[PATCH v4 00/10] Enable DP2.1 alpm

[PATCH v4 00/10] Enable DP2.1 alpm

[Animesh Manna]

ALPM support added on DP2.1 and xe3p will support DP2.1 alpm.
This patch series extending alpm supoort for DP2.1.

Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Animesh Manna (10):
  drm/i915/alpm: Add DPCD definition for DP2.1 ALPM capability
  drm/i915/alpm: alpm_init() for DP2.1
  drm/i915/alpm: Enable debugfs for DP2.1
  drm/i915/alpm: Refactor Auxless wake time calculation
  drm/i915/alpm: Auxless wake time calculation for Xe3p
  drm/i915/alpm: Half LFPS cycle calculation
  drm/i915/alpm: Program LTTPR count for DP 2.1 ALPM
  drm/i915/alpm: Enable MAC Transmitting LFPS for LT PHY
  drm/i915/alpm: Replace is_edp() with alpm_is_possible()
  drm/i915/alpm: Introduce has_alpm to decouple from pr/psr2/lobf

 drivers/gpu/drm/i915/display/intel_alpm.c     | 139 ++++++++++++++----
 drivers/gpu/drm/i915/display/intel_alpm.h     |   4 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      |   5 +-
 .../drm/i915/display/intel_display_types.h    |   2 +
 drivers/gpu/drm/i915/display/intel_dp.c       |   8 +-
 .../drm/i915/display/intel_dp_link_training.c |  16 ++
 drivers/gpu/drm/i915/display/intel_lt_phy.c   |  27 ++++
 drivers/gpu/drm/i915/display/intel_lt_phy.h   |   2 +
 .../gpu/drm/i915/display/intel_lt_phy_regs.h  |   3 +
 drivers/gpu/drm/i915/display/intel_psr.c      |  23 ++-
 drivers/gpu/drm/i915/display/intel_psr.h      |   1 -
 include/drm/display/drm_dp.h                  |   4 +-
 12 files changed, 188 insertions(+), 46 deletions(-)

-- 
2.29.0

[PATCH v4 01/10] drm/i915/alpm: Add DPCD definition for DP2.1 ALPM capability

[Animesh Manna]

Add required DPCD address which will be needed to enable DP2.1 ALPM.

Cc: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 include/drm/display/drm_dp.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index e4eebabab975..b4bacbcf130e 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -1512,6 +1512,8 @@
 /* See DP_128B132B_SUPPORTED_LINK_RATES for values */
 #define DP_PHY_REPEATER_128B132B_RATES			    0xf0007 /* 2.0 */
 #define DP_PHY_REPEATER_EQ_DONE                             0xf0008 /* 2.0 E11 */
+#define DP_LTTPR_ALPM_CAPABILITIES                          0xf0009 /* 2.1 */
+#define DP_TOTAL_LTTPR_CNT                                  0xf000a /* 2.1 */
 
 enum drm_dp_phy {
 	DP_PHY_DPRX,
@@ -1691,7 +1693,7 @@ enum drm_dp_phy {
 #define DP_DSC_BRANCH_CAP_SIZE		3
 #define EDP_PSR_RECEIVER_CAP_SIZE	2
 #define EDP_DISPLAY_CTL_CAP_SIZE	5
-#define DP_LTTPR_COMMON_CAP_SIZE	8
+#define DP_LTTPR_COMMON_CAP_SIZE	10
 #define DP_LTTPR_PHY_CAP_SIZE		3
 
 #define DP_SDP_AUDIO_TIMESTAMP		0x01
-- 
2.29.0

[PATCH v4 02/10] drm/i915/alpm: alpm_init() for DP2.1

[Animesh Manna]

Initialize ALPM for DP2.1 and separate out ALPM mutex-init
from alpm-init.

v2: Separate out mutex-init. [Jani]
v3: Refactor further to avoid DISPLAY_VER check in multiple places. [Jani]
V4: Cosmetic changes. [Suraj]

Cc: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 16 ++++++++++++++--
 drivers/gpu/drm/i915/display/intel_alpm.h |  3 ++-
 drivers/gpu/drm/i915/display/intel_dp.c   |  8 +++++++-
 3 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 6372f533f65b..14acd6717e59 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -41,7 +41,20 @@ bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp,
 		(crtc_state->has_lobf && intel_alpm_aux_less_wake_supported(intel_dp));
 }
 
-void intel_alpm_init(struct intel_dp *intel_dp)
+bool intel_alpm_source_supported(struct intel_connector *connector)
+{
+	struct intel_display *display = to_intel_display(connector);
+
+	if (!((connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
+	       DISPLAY_VER(display) >= 35) ||
+	    (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
+	     DISPLAY_VER(display) >= 20)))
+		return false;
+
+	return true;
+}
+
+void intel_alpm_get_sink_capability(struct intel_dp *intel_dp)
 {
 	u8 dpcd;
 
@@ -49,7 +62,6 @@ void intel_alpm_init(struct intel_dp *intel_dp)
 		return;
 
 	intel_dp->alpm_dpcd = dpcd;
-	mutex_init(&intel_dp->alpm.lock);
 }
 
 static int get_silence_period_symbols(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
index 53599b464dea..bcc354a46a1d 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -15,7 +15,8 @@ struct intel_connector;
 struct intel_atomic_state;
 struct intel_crtc;
 
-void intel_alpm_init(struct intel_dp *intel_dp);
+bool intel_alpm_source_supported(struct intel_connector *connector);
+void intel_alpm_get_sink_capability(struct intel_dp *intel_dp);
 bool intel_alpm_compute_params(struct intel_dp *intel_dp,
 			       struct intel_crtc_state *crtc_state);
 void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0ec82fcbcf48..81dd5bf7e3c5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6074,6 +6074,9 @@ intel_dp_detect(struct drm_connector *_connector,
 	if (ret == 1)
 		connector->base.epoch_counter++;
 
+	if (intel_alpm_source_supported(connector))
+		intel_alpm_get_sink_capability(intel_dp);
+
 	if (!intel_dp_is_edp(intel_dp))
 		intel_psr_init_dpcd(intel_dp);
 
@@ -6716,7 +6719,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
 	 */
 	intel_hpd_enable_detection(encoder);
 
-	intel_alpm_init(intel_dp);
+	intel_alpm_get_sink_capability(intel_dp);
 
 	/* Cache DPCD and EDID for edp. */
 	has_dpcd = intel_edp_init_dpcd(intel_dp, connector);
@@ -6932,6 +6935,9 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
 
 	intel_psr_init(intel_dp);
 
+	if (intel_alpm_source_supported(connector))
+		mutex_init(&intel_dp->alpm.lock);
+
 	return true;
 
 fail:
-- 
2.29.0

[PATCH v4 03/10] drm/i915/alpm: Enable debugfs for DP2.1

[Animesh Manna]

Enable ALPM debug info through lobf debug info.

v2: cosmetic change. [Suraj]
v3: Use common api instead of DISPLAY_VER check in multiple places. [Jani]

Cc: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 14acd6717e59..3e271de5504b 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -551,11 +551,9 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_edp_lobf_debug_fops,
 
 void intel_alpm_lobf_debugfs_add(struct intel_connector *connector)
 {
-	struct intel_display *display = to_intel_display(connector);
 	struct dentry *root = connector->base.debugfs_entry;
 
-	if (DISPLAY_VER(display) < 20 ||
-	    connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
+	if (!intel_alpm_source_supported(connector))
 		return;
 
 	debugfs_create_file("i915_edp_lobf_debug", 0644, root,
-- 
2.29.0

[PATCH v4 04/10] drm/i915/alpm: Refactor Auxless wake time calculation

[Animesh Manna]

Divide the auxless wake time calculation in parts which will
help later to add Xe3p related modification.

v2: Refactor first existing calculation. [Jani]
v3: Cosmetic changes. [Jani, Suraj]

Bspec: 71477
Cc: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 31 ++++++++++++++++-------
 1 file changed, 22 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 3e271de5504b..b4b874dd3725 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -98,6 +98,25 @@ static int get_lfps_half_cycle_clocks(const struct intel_crtc_state *crtc_state)
 		1000 / (2 * LFPS_CYCLE_COUNT);
 }
 
+static int get_tphy2_p2_to_p0(const struct intel_crtc_state *crtc_state)
+{
+	return 12 * 1000;
+}
+
+static int get_establishment_period(const struct intel_crtc_state *crtc_state)
+{
+	int t1 = 50 * 1000;
+	int tps4 = 252;
+	/* port_clock is link rate in 10kbit/s units */
+	int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state->port_clock;
+	int tcds, establishment_period;
+
+	tcds = (7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1) * tml_phy_lock;
+	establishment_period = (SILENCE_PERIOD_TIME + t1 + tcds);
+
+	return establishment_period;
+}
+
 /*
  * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period, Max+
  * tSilence, Max+ tPHY Establishment + tCDS) / tline)
@@ -119,17 +138,11 @@ static int get_lfps_half_cycle_clocks(const struct intel_crtc_state *crtc_state)
  */
 static int _lnl_compute_aux_less_wake_time(const struct intel_crtc_state *crtc_state)
 {
-	int tphy2_p2_to_p0 = 12 * 1000;
-	int t1 = 50 * 1000;
-	int tps4 = 252;
-	/* port_clock is link rate in 10kbit/s units */
-	int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state->port_clock;
-	int num_ml_phy_lock = 7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1;
-	int t2 = num_ml_phy_lock * tml_phy_lock;
-	int tcds = 1 * t2;
+	int tphy2_p2_to_p0 = get_tphy2_p2_to_p0(crtc_state);
+	int establishment_period = get_establishment_period(crtc_state);
 
 	return DIV_ROUND_UP(tphy2_p2_to_p0 + get_lfps_cycle_time(crtc_state) +
-			    SILENCE_PERIOD_TIME + t1 + tcds, 1000);
+			    establishment_period, 1000);
 }
 
 static int
-- 
2.29.0

[PATCH v4 05/10] drm/i915/alpm: Auxless wake time calculation for Xe3p

[Animesh Manna]

Add support for auxless waketime calculation for DP2.1 ALPM
as dependent parameter got changed.

v1: Initial version.
v2: Use intel_dp_is_uhbr(). [Jani]

Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 63 +++++++++++++++++++----
 1 file changed, 53 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index b4b874dd3725..81472254ab73 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -100,23 +100,64 @@ static int get_lfps_half_cycle_clocks(const struct intel_crtc_state *crtc_state)
 
 static int get_tphy2_p2_to_p0(const struct intel_crtc_state *crtc_state)
 {
-	return 12 * 1000;
+	struct intel_display *display = to_intel_display(crtc_state);
+
+	return DISPLAY_VER(display) >= 35 ? (40 * 1000) : (12 * 1000);
 }
 
-static int get_establishment_period(const struct intel_crtc_state *crtc_state)
+static int get_establishment_period(struct intel_dp *intel_dp,
+				    const struct intel_crtc_state *crtc_state)
 {
 	int t1 = 50 * 1000;
-	int tps4 = 252;
+	int tps4 = intel_dp_is_uhbr(crtc_state) ? (396 * 32) : (252 * 10);
 	/* port_clock is link rate in 10kbit/s units */
-	int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state->port_clock;
+	int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state->port_clock / 10;
+	int lttpr_count = 0;
 	int tcds, establishment_period;
 
-	tcds = (7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1) * tml_phy_lock;
-	establishment_period = (SILENCE_PERIOD_TIME + t1 + tcds);
+	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
+		tcds = (7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1) * tml_phy_lock;
+	} else {
+		tcds = 7 * tml_phy_lock;
+		lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps);
+	}
+
+	if (lttpr_count) {
+		int tlw = 13000;
+		int tcs = 10000;
+		int tlfps_period = get_lfps_cycle_time(crtc_state);
+		int tdcs = (SILENCE_PERIOD_TIME + t1 + tcs +
+			    (lttpr_count - 1) * (tlw + tlfps_period));
+		int tacds = 70000;
+		int tds = (lttpr_count - 1) * 7 * tml_phy_lock;
+
+		/* tdrl is same as tcds*/
+		establishment_period = tlw + tlfps_period + tdcs + tacds + tds + tcds;
+	} else {
+		/* TODO: Add a check for data realign by DPCD 0x116[3] */
+
+		establishment_period = (SILENCE_PERIOD_TIME + t1 + tcds);
+	}
 
 	return establishment_period;
 }
 
+static int get_switch_to_active(const struct intel_crtc_state *crtc_state)
+{
+	int port_clock = crtc_state->port_clock;
+	int switch_to_active;
+
+	if (intel_dp_is_uhbr(crtc_state)) {
+		int symbol_clock = port_clock / intel_dp_link_symbol_size(port_clock);
+
+		switch_to_active = 32 * DIV_ROUND_UP((396 + 3 + 64), symbol_clock);
+	} else {
+		switch_to_active = 0;
+	}
+
+	return switch_to_active;
+}
+
 /*
  * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period, Max+
  * tSilence, Max+ tPHY Establishment + tCDS) / tline)
@@ -136,13 +177,15 @@ static int get_establishment_period(const struct intel_crtc_state *crtc_state)
  * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
  * TPS4 Length = 252 Symbols
  */
-static int _lnl_compute_aux_less_wake_time(const struct intel_crtc_state *crtc_state)
+static int _lnl_compute_aux_less_wake_time(struct intel_dp *intel_dp,
+					   const struct intel_crtc_state *crtc_state)
 {
 	int tphy2_p2_to_p0 = get_tphy2_p2_to_p0(crtc_state);
-	int establishment_period = get_establishment_period(crtc_state);
+	int establishment_period = get_establishment_period(intel_dp, crtc_state);
+	int switch_to_active = get_switch_to_active(crtc_state);
 
 	return DIV_ROUND_UP(tphy2_p2_to_p0 + get_lfps_cycle_time(crtc_state) +
-			    establishment_period, 1000);
+			    establishment_period + switch_to_active, 1000);
 }
 
 static int
@@ -154,7 +197,7 @@ _lnl_compute_aux_less_alpm_params(struct intel_dp *intel_dp,
 		lfps_half_cycle;
 
 	aux_less_wake_time =
-		_lnl_compute_aux_less_wake_time(crtc_state);
+		_lnl_compute_aux_less_wake_time(intel_dp, crtc_state);
 	aux_less_wake_lines = intel_usecs_to_scanlines(&crtc_state->hw.adjusted_mode,
 						       aux_less_wake_time);
 	silence_period = get_silence_period_symbols(crtc_state);
-- 
2.29.0

[PATCH v4 06/10] drm/i915/alpm: Half LFPS cycle calculation

[Animesh Manna]

Add support for half LFPS cycle calculation for DP2.1 ALPM as dependent
parameters got changed.

v1: Initial version.
v2: Avoid returning early. [Jani]
v3: Use intel_crtc_has_type(). [Suraj]

Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 81472254ab73..33620f95ecc5 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -73,12 +73,20 @@ static int get_silence_period_symbols(const struct intel_crtc_state *crtc_state)
 static void get_lfps_cycle_min_max_time(const struct intel_crtc_state *crtc_state,
 					int *min, int *max)
 {
-	if (crtc_state->port_clock < 540000) {
-		*min = 65 * LFPS_CYCLE_COUNT;
-		*max = 75 * LFPS_CYCLE_COUNT;
+	struct intel_display *display = to_intel_display(crtc_state);
+
+	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
+		if (crtc_state->port_clock < 540000) {
+			*min = DISPLAY_VER(display) < 35 ? 65 * LFPS_CYCLE_COUNT : 140;
+			*max = DISPLAY_VER(display) < 35 ? 75 * LFPS_CYCLE_COUNT : 800;
+		} else {
+			*min = 140;
+			*max = 800;
+		}
 	} else {
-		*min = 140;
-		*max = 800;
+		*min = 320;
+		*max = 1600;
+		return;
 	}
 }
 
-- 
2.29.0

[PATCH v4 07/10] drm/i915/alpm: Program LTTPR count for DP 2.1 ALPM

[Animesh Manna]

Issue a AUX write transaction to DPCD DP_TOTAL_LTTPR_CNT (0xf000a)
with total number of LTTPR before link training.

v2: Cosmetic changes. [Suraj]

Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 .../drm/i915/display/intel_dp_link_training.c    | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index aad5fe14962f..d694c2474159 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1624,6 +1624,20 @@ intel_dp_128b132b_link_train(struct intel_dp *intel_dp,
 	return passed;
 }
 
+static void intel_dp_update_lttpr_count(struct intel_dp *intel_dp,
+					int lttpr_count)
+{
+	/*
+	 * Program only for DP2.1 and return if LTTPR revison is less than 0x20
+	 * where 0:3 represents minor rev and 4:7 represent major rev
+	 */
+	if (!intel_dp_is_edp(intel_dp) ||
+	    intel_dp->lttpr_common_caps[0] <= 0x20)
+		return;
+
+	drm_dp_dpcd_writeb(&intel_dp->aux, DP_TOTAL_LTTPR_CNT, lttpr_count);
+}
+
 /**
  * intel_dp_start_link_train - start link training
  * @state: Atomic state
@@ -1660,6 +1674,8 @@ void intel_dp_start_link_train(struct intel_atomic_state *state,
 
 	intel_dp_prepare_link_train(intel_dp, crtc_state);
 
+	intel_dp_update_lttpr_count(intel_dp, lttpr_count);
+
 	if (intel_dp_is_uhbr(crtc_state))
 		passed = intel_dp_128b132b_link_train(intel_dp, crtc_state, lttpr_count);
 	else
-- 
2.29.0

[PATCH v4 08/10] drm/i915/alpm: Enable MAC Transmitting LFPS for LT PHY

[Animesh Manna]

Enable MAC to transmit LFPS via LT PHY during aux-less alpm.

v2:
- Correct commit description. [Suraj]
- Remove loop as no dependency on the transmitter LT_PHY_CMN_CTL0. [Suraj]
v3: Cosmetic changes. [Suraj]

Cc: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      |  5 +++-
 drivers/gpu/drm/i915/display/intel_lt_phy.c   | 27 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_lt_phy.h   |  2 ++
 .../gpu/drm/i915/display/intel_lt_phy_regs.h  |  3 +++
 4 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 002ccd47856d..89ce3d13246a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3777,7 +3777,10 @@ static void mtl_ddi_prepare_link_retrain(struct intel_dp *intel_dp,
 	 *     ii. Enable MAC Transmits LFPS in the "PHY Common Control 0" PIPE
 	 *         register
 	 */
-	intel_lnl_mac_transmit_lfps(encoder, crtc_state);
+	if (HAS_LT_PHY(display))
+		intel_xe3plpd_mac_transmit_lfps(encoder, crtc_state);
+	else
+		intel_lnl_mac_transmit_lfps(encoder, crtc_state);
 }
 
 static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp,
diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.c b/drivers/gpu/drm/i915/display/intel_lt_phy.c
index a67eb4f7f897..a1a5aed116b7 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.c
@@ -6,6 +6,7 @@
 #include <drm/drm_print.h>
 
 #include "i915_reg.h"
+#include "intel_alpm.h"
 #include "intel_cx0_phy.h"
 #include "intel_cx0_phy_regs.h"
 #include "intel_ddi.h"
@@ -2325,3 +2326,29 @@ void intel_xe3plpd_pll_disable(struct intel_encoder *encoder)
 		intel_lt_phy_pll_disable(encoder);
 
 }
+
+/*
+ * According to HAS we need to enable MAC Transmitting LFPS in the "PHY Common
+ * Control 0" PIPE register in case of AUX Less ALPM is going to be used. This
+ * function is doing that and is called by link retrain sequence.
+ */
+void intel_xe3plpd_mac_transmit_lfps(struct intel_encoder *encoder,
+				     const struct intel_crtc_state *crtc_state)
+{
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+	intel_wakeref_t wakeref;
+	u8 owned_lane_mask;
+
+	if (!intel_alpm_is_alpm_aux_less(intel_dp, crtc_state))
+		return;
+
+	wakeref = intel_lt_phy_transaction_begin(encoder);
+
+	owned_lane_mask = intel_lt_phy_get_owned_lane_mask(encoder);
+
+	intel_lt_phy_rmw(encoder, owned_lane_mask, LT_PHY_CMN_CTL_0,
+			 LT_PHY_CMN_LFPS_ENABLE,
+			 LT_PHY_CMN_LFPS_ENABLE, MB_WRITE_COMMITTED);
+
+	intel_lt_phy_transaction_end(encoder, wakeref);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.h b/drivers/gpu/drm/i915/display/intel_lt_phy.h
index b7911acd7dcd..5cea01b1756a 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy.h
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy.h
@@ -41,6 +41,8 @@ intel_lt_phy_calculate_hdmi_state(struct intel_lt_phy_pll_state *lt_state,
 void intel_xe3plpd_pll_enable(struct intel_encoder *encoder,
 			      const struct intel_crtc_state *crtc_state);
 void intel_xe3plpd_pll_disable(struct intel_encoder *encoder);
+void intel_xe3plpd_mac_transmit_lfps(struct intel_encoder *encoder,
+				     const struct intel_crtc_state *crtc_state);
 
 #define HAS_LT_PHY(display) (DISPLAY_VER(display) >= 35)
 
diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy_regs.h b/drivers/gpu/drm/i915/display/intel_lt_phy_regs.h
index 98ccc069a69b..c50dbad28b78 100644
--- a/drivers/gpu/drm/i915/display/intel_lt_phy_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_lt_phy_regs.h
@@ -35,6 +35,9 @@
 #define LT_PHY_TXY_CTL10_MAC(idx)	_MMIO(LT_PHY_TXY_CTL10(idx))
 #define  LT_PHY_TX_LANE_ENABLE		REG_BIT8(0)
 
+#define LT_PHY_CMN_CTL_0		(0x800)
+#define  LT_PHY_CMN_LFPS_ENABLE		REG_BIT8(1)
+
 /* LT Phy Vendor Register */
 #define LT_PHY_VDR_0_CONFIG	0xC02
 #define  LT_PHY_VDR_DP_PLL_ENABLE	REG_BIT(7)
-- 
2.29.0

[PATCH v4 09/10] drm/i915/alpm: Replace is_edp() with alpm_is_possible()

[Animesh Manna]

Add a separate alpm_is_possible() which will check for both edp and dp.

Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c | 16 +++++++++++++---
 drivers/gpu/drm/i915/display/intel_alpm.h |  1 +
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 33620f95ecc5..87c7c1f6e17f 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -64,6 +64,16 @@ void intel_alpm_get_sink_capability(struct intel_dp *intel_dp)
 	intel_dp->alpm_dpcd = dpcd;
 }
 
+bool intel_alpm_is_possible(struct intel_dp *intel_dp)
+{
+	struct intel_display *display = to_intel_display(intel_dp);
+
+	return (DISPLAY_VER(display) >= 12 && intel_dp->alpm_dpcd) ||
+		(DISPLAY_VER(display) >= 35 &&
+		intel_dp->lttpr_common_caps[DP_LTTPR_ALPM_CAPABILITIES -
+					    DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV]);
+}
+
 static int get_silence_period_symbols(const struct intel_crtc_state *crtc_state)
 {
 	return SILENCE_PERIOD_TIME * intel_dp_link_symbol_clock(crtc_state->port_clock) /
@@ -341,7 +351,7 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
 	if (intel_dp->alpm.sink_alpm_error)
 		return;
 
-	if (!intel_dp_is_edp(intel_dp))
+	if (!intel_alpm_is_possible(intel_dp))
 		return;
 
 	if (DISPLAY_VER(display) < 20)
@@ -492,7 +502,7 @@ void intel_alpm_pre_plane_update(struct intel_atomic_state *state,
 
 		intel_dp = enc_to_intel_dp(encoder);
 
-		if (!intel_dp_is_edp(intel_dp))
+		if (!intel_alpm_is_possible(intel_dp))
 			continue;
 
 		if (old_crtc_state->has_lobf) {
@@ -544,7 +554,7 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state,
 
 		intel_dp = enc_to_intel_dp(encoder);
 
-		if (intel_dp_is_edp(intel_dp)) {
+		if (intel_alpm_is_possible(intel_dp)) {
 			intel_alpm_enable_sink(intel_dp, crtc_state);
 			intel_alpm_configure(intel_dp, crtc_state);
 		}
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
index bcc354a46a1d..05416f64f418 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.h
+++ b/drivers/gpu/drm/i915/display/intel_alpm.h
@@ -17,6 +17,7 @@ struct intel_crtc;
 
 bool intel_alpm_source_supported(struct intel_connector *connector);
 void intel_alpm_get_sink_capability(struct intel_dp *intel_dp);
+bool intel_alpm_is_possible(struct intel_dp *intel_dp);
 bool intel_alpm_compute_params(struct intel_dp *intel_dp,
 			       struct intel_crtc_state *crtc_state);
 void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
-- 
2.29.0

[PATCH v4 10/10] drm/i915/alpm: Introduce has_alpm to decouple from pr/psr2/lobf

[Animesh Manna]

For DP2.1, ALPM is optional and there can be scenario where panel replay
will be supported without ALPM. So decouple ALPM feature by has_alpm flag
from related display features.

Cc: Jouni Högander <jouni.hogander@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_alpm.c     |  7 +++---
 .../drm/i915/display/intel_display_types.h    |  2 ++
 drivers/gpu/drm/i915/display/intel_psr.c      | 23 ++++++++-----------
 drivers/gpu/drm/i915/display/intel_psr.h      |  1 -
 4 files changed, 15 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
index 87c7c1f6e17f..94a092bc5df9 100644
--- a/drivers/gpu/drm/i915/display/intel_alpm.c
+++ b/drivers/gpu/drm/i915/display/intel_alpm.c
@@ -385,6 +385,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
 
 	crtc_state->has_lobf = (context_latency + guardband) >
 		(first_sdp_position + waketime_in_lines);
+
+	crtc_state->has_alpm = crtc_state->has_lobf;
 }
 
 static void lnl_alpm_configure(struct intel_dp *intel_dp,
@@ -394,8 +396,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp,
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 	u32 alpm_ctl;
 
-	if (DISPLAY_VER(display) < 20 || (!intel_psr_needs_alpm(intel_dp, crtc_state) &&
-					  !crtc_state->has_lobf))
+	if (DISPLAY_VER(display) < 20 || !crtc_state->has_alpm)
 		return;
 
 	mutex_lock(&intel_dp->alpm.lock);
@@ -519,7 +520,7 @@ void intel_alpm_enable_sink(struct intel_dp *intel_dp,
 {
 	u8 val;
 
-	if (!intel_psr_needs_alpm(intel_dp, crtc_state) && !crtc_state->has_lobf)
+	if (!crtc_state->has_alpm)
 		return;
 
 	val = DP_ALPM_ENABLE | DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 38702a9e0f50..0290caf9e14d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1391,6 +1391,8 @@ struct intel_crtc_state {
 		u8 silence_period_sym_clocks;
 		u8 lfps_half_cycle_num_of_syms;
 	} alpm_state;
+
+	bool has_alpm;
 };
 
 enum intel_pipe_crc_source {
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 00ac652809cc..99bcbf36252f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1686,6 +1686,8 @@ static bool intel_sel_update_config_valid(struct intel_dp *intel_dp,
 	crtc_state->enable_psr2_su_region_et =
 		psr2_su_region_et_valid(intel_dp, crtc_state->has_panel_replay);
 
+	crtc_state->has_alpm = intel_alpm_is_possible(intel_dp);
+
 	return true;
 
 unsupported:
@@ -1755,11 +1757,17 @@ _panel_replay_compute_config(struct intel_dp *intel_dp,
 		return false;
 	}
 
+	if (intel_alpm_is_possible(intel_dp))
+		crtc_state->has_alpm = alpm_config_valid(intel_dp, crtc_state, true, true, false);
+
 	if (!intel_dp_is_edp(intel_dp))
 		return true;
 
 	/* Remaining checks are for eDP only */
 
+	if (!crtc_state->has_alpm)
+		return false;
+
 	if (to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_A &&
 	    to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_B)
 		return false;
@@ -1782,9 +1790,6 @@ _panel_replay_compute_config(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (!alpm_config_valid(intel_dp, crtc_state, true, true, false))
-		return false;
-
 	return true;
 }
 
@@ -4450,16 +4455,6 @@ void intel_psr_connector_debugfs_add(struct intel_connector *connector)
 				    connector, &i915_psr_status_fops);
 }
 
-bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state)
-{
-	/*
-	 * eDP Panel Replay uses always ALPM
-	 * PSR2 uses ALPM but PSR1 doesn't
-	 */
-	return intel_dp_is_edp(intel_dp) && (crtc_state->has_sel_update ||
-					     crtc_state->has_panel_replay);
-}
-
 bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
 				   const struct intel_crtc_state *crtc_state)
 {
@@ -4475,7 +4470,7 @@ void intel_psr_compute_config_late(struct intel_dp *intel_dp,
 
 	if (intel_psr_needs_alpm_aux_less(intel_dp, crtc_state))
 		wake_lines = crtc_state->alpm_state.aux_less_wake_lines;
-	else if (intel_psr_needs_alpm(intel_dp, crtc_state))
+	else if (crtc_state->has_alpm)
 		wake_lines = DISPLAY_VER(display) < 20 ?
 			     psr2_block_count_lines(crtc_state->alpm_state.io_wake_lines,
 						    crtc_state->alpm_state.fast_wake_lines) :
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index 620b35928832..3cb4fa20e427 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -80,7 +80,6 @@ void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb,
 int intel_psr_min_set_context_latency(const struct intel_crtc_state *crtc_state);
 void intel_psr_connector_debugfs_add(struct intel_connector *connector);
 void intel_psr_debugfs_register(struct intel_display *display);
-bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);
 bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
 				   const struct intel_crtc_state *crtc_state);
 void intel_psr_compute_config_late(struct intel_dp *intel_dp,
-- 
2.29.0

✓ CI.KUnit: success for Enable DP2.1 alpm (rev4)

[Patchwork]

== Series Details ==

Series: Enable DP2.1 alpm (rev4)
URL   : https://patchwork.freedesktop.org/series/156416/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:33:22] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:33:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:33:59] Starting KUnit Kernel (1/1)...
[13:33:59] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:33:59] ================== guc_buf (11 subtests) ===================
[13:33:59] [PASSED] test_smallest
[13:33:59] [PASSED] test_largest
[13:33:59] [PASSED] test_granular
[13:33:59] [PASSED] test_unique
[13:33:59] [PASSED] test_overlap
[13:33:59] [PASSED] test_reusable
[13:33:59] [PASSED] test_too_big
[13:33:59] [PASSED] test_flush
[13:33:59] [PASSED] test_lookup
[13:33:59] [PASSED] test_data
[13:33:59] [PASSED] test_class
[13:33:59] ===================== [PASSED] guc_buf =====================
[13:33:59] =================== guc_dbm (7 subtests) ===================
[13:33:59] [PASSED] test_empty
[13:33:59] [PASSED] test_default
[13:33:59] ======================== test_size  ========================
[13:33:59] [PASSED] 4
[13:33:59] [PASSED] 8
[13:33:59] [PASSED] 32
[13:33:59] [PASSED] 256
[13:33:59] ==================== [PASSED] test_size ====================
[13:33:59] ======================= test_reuse  ========================
[13:33:59] [PASSED] 4
[13:33:59] [PASSED] 8
[13:33:59] [PASSED] 32
[13:33:59] [PASSED] 256
[13:33:59] =================== [PASSED] test_reuse ====================
[13:33:59] =================== test_range_overlap  ====================
[13:33:59] [PASSED] 4
[13:33:59] [PASSED] 8
[13:33:59] [PASSED] 32
[13:33:59] [PASSED] 256
[13:33:59] =============== [PASSED] test_range_overlap ================
[13:33:59] =================== test_range_compact  ====================
[13:33:59] [PASSED] 4
[13:33:59] [PASSED] 8
[13:33:59] [PASSED] 32
[13:33:59] [PASSED] 256
[13:33:59] =============== [PASSED] test_range_compact ================
[13:33:59] ==================== test_range_spare  =====================
[13:33:59] [PASSED] 4
[13:33:59] [PASSED] 8
[13:33:59] [PASSED] 32
[13:33:59] [PASSED] 256
[13:33:59] ================ [PASSED] test_range_spare =================
[13:33:59] ===================== [PASSED] guc_dbm =====================
[13:33:59] =================== guc_idm (6 subtests) ===================
[13:33:59] [PASSED] bad_init
[13:33:59] [PASSED] no_init
[13:33:59] [PASSED] init_fini
[13:33:59] [PASSED] check_used
[13:33:59] [PASSED] check_quota
[13:33:59] [PASSED] check_all
[13:33:59] ===================== [PASSED] guc_idm =====================
[13:33:59] ================== no_relay (3 subtests) ===================
[13:33:59] [PASSED] xe_drops_guc2pf_if_not_ready
[13:33:59] [PASSED] xe_drops_guc2vf_if_not_ready
[13:33:59] [PASSED] xe_rejects_send_if_not_ready
[13:33:59] ==================== [PASSED] no_relay =====================
[13:33:59] ================== pf_relay (14 subtests) ==================
[13:33:59] [PASSED] pf_rejects_guc2pf_too_short
[13:33:59] [PASSED] pf_rejects_guc2pf_too_long
[13:33:59] [PASSED] pf_rejects_guc2pf_no_payload
[13:33:59] [PASSED] pf_fails_no_payload
[13:33:59] [PASSED] pf_fails_bad_origin
[13:33:59] [PASSED] pf_fails_bad_type
[13:33:59] [PASSED] pf_txn_reports_error
[13:33:59] [PASSED] pf_txn_sends_pf2guc
[13:33:59] [PASSED] pf_sends_pf2guc
[13:33:59] [SKIPPED] pf_loopback_nop
[13:33:59] [SKIPPED] pf_loopback_echo
[13:33:59] [SKIPPED] pf_loopback_fail
[13:33:59] [SKIPPED] pf_loopback_busy
[13:33:59] [SKIPPED] pf_loopback_retry
[13:33:59] ==================== [PASSED] pf_relay =====================
[13:33:59] ================== vf_relay (3 subtests) ===================
[13:33:59] [PASSED] vf_rejects_guc2vf_too_short
[13:33:59] [PASSED] vf_rejects_guc2vf_too_long
[13:33:59] [PASSED] vf_rejects_guc2vf_no_payload
[13:33:59] ==================== [PASSED] vf_relay =====================
[13:33:59] ================ pf_gt_config (4 subtests) =================
[13:33:59] [PASSED] fair_contexts_1vf
[13:33:59] [PASSED] fair_doorbells_1vf
[13:33:59] ====================== fair_contexts  ======================
[13:33:59] [PASSED] 1 VF
[13:33:59] [PASSED] 2 VFs
[13:33:59] [PASSED] 3 VFs
[13:33:59] [PASSED] 4 VFs
[13:33:59] [PASSED] 5 VFs
[13:33:59] [PASSED] 6 VFs
[13:33:59] [PASSED] 7 VFs
[13:33:59] [PASSED] 8 VFs
[13:33:59] [PASSED] 9 VFs
[13:33:59] [PASSED] 10 VFs
[13:33:59] [PASSED] 11 VFs
[13:33:59] [PASSED] 12 VFs
[13:33:59] [PASSED] 13 VFs
[13:33:59] [PASSED] 14 VFs
[13:33:59] [PASSED] 15 VFs
[13:33:59] [PASSED] 16 VFs
[13:33:59] [PASSED] 17 VFs
[13:33:59] [PASSED] 18 VFs
[13:33:59] [PASSED] 19 VFs
[13:33:59] [PASSED] 20 VFs
[13:33:59] [PASSED] 21 VFs
[13:33:59] [PASSED] 22 VFs
[13:33:59] [PASSED] 23 VFs
[13:33:59] [PASSED] 24 VFs
[13:33:59] [PASSED] 25 VFs
[13:33:59] [PASSED] 26 VFs
[13:33:59] [PASSED] 27 VFs
[13:33:59] [PASSED] 28 VFs
[13:33:59] [PASSED] 29 VFs
[13:33:59] [PASSED] 30 VFs
[13:33:59] [PASSED] 31 VFs
[13:33:59] [PASSED] 32 VFs
[13:33:59] [PASSED] 33 VFs
[13:33:59] [PASSED] 34 VFs
[13:33:59] [PASSED] 35 VFs
[13:33:59] [PASSED] 36 VFs
[13:33:59] [PASSED] 37 VFs
[13:33:59] [PASSED] 38 VFs
[13:33:59] [PASSED] 39 VFs
[13:33:59] [PASSED] 40 VFs
[13:33:59] [PASSED] 41 VFs
[13:33:59] [PASSED] 42 VFs
[13:33:59] [PASSED] 43 VFs
[13:33:59] [PASSED] 44 VFs
[13:33:59] [PASSED] 45 VFs
[13:33:59] [PASSED] 46 VFs
[13:33:59] [PASSED] 47 VFs
[13:33:59] [PASSED] 48 VFs
[13:33:59] [PASSED] 49 VFs
[13:33:59] [PASSED] 50 VFs
[13:33:59] [PASSED] 51 VFs
[13:33:59] [PASSED] 52 VFs
[13:33:59] [PASSED] 53 VFs
[13:33:59] [PASSED] 54 VFs
[13:33:59] [PASSED] 55 VFs
[13:33:59] [PASSED] 56 VFs
[13:33:59] [PASSED] 57 VFs
[13:33:59] [PASSED] 58 VFs
[13:33:59] [PASSED] 59 VFs
[13:33:59] [PASSED] 60 VFs
[13:33:59] [PASSED] 61 VFs
[13:33:59] [PASSED] 62 VFs
[13:33:59] [PASSED] 63 VFs
[13:33:59] ================== [PASSED] fair_contexts ==================
[13:33:59] ===================== fair_doorbells  ======================
[13:33:59] [PASSED] 1 VF
[13:33:59] [PASSED] 2 VFs
[13:33:59] [PASSED] 3 VFs
[13:33:59] [PASSED] 4 VFs
[13:33:59] [PASSED] 5 VFs
[13:33:59] [PASSED] 6 VFs
[13:33:59] [PASSED] 7 VFs
[13:33:59] [PASSED] 8 VFs
[13:33:59] [PASSED] 9 VFs
[13:33:59] [PASSED] 10 VFs
[13:33:59] [PASSED] 11 VFs
[13:33:59] [PASSED] 12 VFs
[13:33:59] [PASSED] 13 VFs
[13:33:59] [PASSED] 14 VFs
[13:33:59] [PASSED] 15 VFs
[13:33:59] [PASSED] 16 VFs
[13:33:59] [PASSED] 17 VFs
[13:33:59] [PASSED] 18 VFs
[13:33:59] [PASSED] 19 VFs
[13:33:59] [PASSED] 20 VFs
[13:33:59] [PASSED] 21 VFs
[13:33:59] [PASSED] 22 VFs
[13:33:59] [PASSED] 23 VFs
[13:33:59] [PASSED] 24 VFs
[13:33:59] [PASSED] 25 VFs
[13:33:59] [PASSED] 26 VFs
[13:33:59] [PASSED] 27 VFs
[13:33:59] [PASSED] 28 VFs
[13:33:59] [PASSED] 29 VFs
[13:33:59] [PASSED] 30 VFs
[13:33:59] [PASSED] 31 VFs
[13:33:59] [PASSED] 32 VFs
[13:33:59] [PASSED] 33 VFs
[13:33:59] [PASSED] 34 VFs
[13:33:59] [PASSED] 35 VFs
[13:33:59] [PASSED] 36 VFs
[13:33:59] [PASSED] 37 VFs
[13:33:59] [PASSED] 38 VFs
[13:33:59] [PASSED] 39 VFs
[13:33:59] [PASSED] 40 VFs
[13:33:59] [PASSED] 41 VFs
[13:33:59] [PASSED] 42 VFs
[13:33:59] [PASSED] 43 VFs
[13:33:59] [PASSED] 44 VFs
[13:33:59] [PASSED] 45 VFs
[13:33:59] [PASSED] 46 VFs
[13:33:59] [PASSED] 47 VFs
[13:33:59] [PASSED] 48 VFs
[13:33:59] [PASSED] 49 VFs
[13:33:59] [PASSED] 50 VFs
[13:33:59] [PASSED] 51 VFs
[13:33:59] [PASSED] 52 VFs
[13:33:59] [PASSED] 53 VFs
[13:33:59] [PASSED] 54 VFs
[13:33:59] [PASSED] 55 VFs
[13:33:59] [PASSED] 56 VFs
[13:33:59] [PASSED] 57 VFs
[13:33:59] [PASSED] 58 VFs
[13:33:59] [PASSED] 59 VFs
[13:33:59] [PASSED] 60 VFs
[13:33:59] [PASSED] 61 VFs
[13:33:59] [PASSED] 62 VFs
[13:33:59] [PASSED] 63 VFs
[13:33:59] ================= [PASSED] fair_doorbells ==================
[13:33:59] ================== [PASSED] pf_gt_config ===================
[13:33:59] ===================== lmtt (1 subtest) =====================
[13:33:59] ======================== test_ops  =========================
[13:33:59] [PASSED] 2-level
[13:33:59] [PASSED] multi-level
[13:33:59] ==================== [PASSED] test_ops =====================
[13:33:59] ====================== [PASSED] lmtt =======================
[13:33:59] ================= pf_service (11 subtests) =================
[13:33:59] [PASSED] pf_negotiate_any
[13:33:59] [PASSED] pf_negotiate_base_match
[13:33:59] [PASSED] pf_negotiate_base_newer
[13:33:59] [PASSED] pf_negotiate_base_next
[13:33:59] [SKIPPED] pf_negotiate_base_older
[13:33:59] [PASSED] pf_negotiate_base_prev
[13:33:59] [PASSED] pf_negotiate_latest_match
[13:33:59] [PASSED] pf_negotiate_latest_newer
[13:33:59] [PASSED] pf_negotiate_latest_next
[13:33:59] [SKIPPED] pf_negotiate_latest_older
[13:33:59] [SKIPPED] pf_negotiate_latest_prev
[13:33:59] =================== [PASSED] pf_service ====================
[13:33:59] ================= xe_guc_g2g (2 subtests) ==================
[13:33:59] ============== xe_live_guc_g2g_kunit_default  ==============
[13:33:59] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[13:33:59] ============== xe_live_guc_g2g_kunit_allmem  ===============
[13:33:59] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[13:33:59] =================== [SKIPPED] xe_guc_g2g ===================
[13:33:59] =================== xe_mocs (2 subtests) ===================
[13:33:59] ================ xe_live_mocs_kernel_kunit  ================
[13:33:59] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:33:59] ================ xe_live_mocs_reset_kunit  =================
[13:33:59] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:33:59] ==================== [SKIPPED] xe_mocs =====================
[13:33:59] ================= xe_migrate (2 subtests) ==================
[13:33:59] ================= xe_migrate_sanity_kunit  =================
[13:33:59] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:33:59] ================== xe_validate_ccs_kunit  ==================
[13:33:59] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:33:59] =================== [SKIPPED] xe_migrate ===================
[13:33:59] ================== xe_dma_buf (1 subtest) ==================
[13:33:59] ==================== xe_dma_buf_kunit  =====================
[13:33:59] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:33:59] =================== [SKIPPED] xe_dma_buf ===================
[13:33:59] ================= xe_bo_shrink (1 subtest) =================
[13:33:59] =================== xe_bo_shrink_kunit  ====================
[13:33:59] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:33:59] ================== [SKIPPED] xe_bo_shrink ==================
[13:33:59] ==================== xe_bo (2 subtests) ====================
[13:33:59] ================== xe_ccs_migrate_kunit  ===================
[13:33:59] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:33:59] ==================== xe_bo_evict_kunit  ====================
[13:33:59] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:33:59] ===================== [SKIPPED] xe_bo ======================
[13:33:59] ==================== args (11 subtests) ====================
[13:33:59] [PASSED] count_args_test
[13:33:59] [PASSED] call_args_example
[13:33:59] [PASSED] call_args_test
[13:33:59] [PASSED] drop_first_arg_example
[13:33:59] [PASSED] drop_first_arg_test
[13:33:59] [PASSED] first_arg_example
[13:33:59] [PASSED] first_arg_test
[13:33:59] [PASSED] last_arg_example
[13:33:59] [PASSED] last_arg_test
[13:33:59] [PASSED] pick_arg_example
[13:33:59] [PASSED] sep_comma_example
[13:33:59] ====================== [PASSED] args =======================
[13:33:59] =================== xe_pci (3 subtests) ====================
[13:33:59] ==================== check_graphics_ip  ====================
[13:33:59] [PASSED] 12.00 Xe_LP
[13:33:59] [PASSED] 12.10 Xe_LP+
[13:33:59] [PASSED] 12.55 Xe_HPG
[13:33:59] [PASSED] 12.60 Xe_HPC
[13:33:59] [PASSED] 12.70 Xe_LPG
[13:33:59] [PASSED] 12.71 Xe_LPG
[13:33:59] [PASSED] 12.74 Xe_LPG+
[13:33:59] [PASSED] 20.01 Xe2_HPG
[13:33:59] [PASSED] 20.02 Xe2_HPG
[13:33:59] [PASSED] 20.04 Xe2_LPG
[13:33:59] [PASSED] 30.00 Xe3_LPG
[13:33:59] [PASSED] 30.01 Xe3_LPG
[13:33:59] [PASSED] 30.03 Xe3_LPG
[13:33:59] [PASSED] 30.04 Xe3_LPG
[13:33:59] [PASSED] 30.05 Xe3_LPG
[13:33:59] [PASSED] 35.11 Xe3p_XPC
[13:33:59] ================ [PASSED] check_graphics_ip ================
[13:33:59] ===================== check_media_ip  ======================
[13:33:59] [PASSED] 12.00 Xe_M
[13:33:59] [PASSED] 12.55 Xe_HPM
[13:33:59] [PASSED] 13.00 Xe_LPM+
[13:33:59] [PASSED] 13.01 Xe2_HPM
[13:33:59] [PASSED] 20.00 Xe2_LPM
[13:33:59] [PASSED] 30.00 Xe3_LPM
[13:33:59] [PASSED] 30.02 Xe3_LPM
[13:33:59] [PASSED] 35.00 Xe3p_LPM
[13:33:59] [PASSED] 35.03 Xe3p_HPM
[13:33:59] ================= [PASSED] check_media_ip ==================
[13:33:59] =================== check_platform_desc  ===================
[13:33:59] [PASSED] 0x9A60 (TIGERLAKE)
[13:33:59] [PASSED] 0x9A68 (TIGERLAKE)
[13:33:59] [PASSED] 0x9A70 (TIGERLAKE)
[13:33:59] [PASSED] 0x9A40 (TIGERLAKE)
[13:33:59] [PASSED] 0x9A49 (TIGERLAKE)
[13:33:59] [PASSED] 0x9A59 (TIGERLAKE)
[13:33:59] [PASSED] 0x9A78 (TIGERLAKE)
[13:33:59] [PASSED] 0x9AC0 (TIGERLAKE)
[13:33:59] [PASSED] 0x9AC9 (TIGERLAKE)
[13:33:59] [PASSED] 0x9AD9 (TIGERLAKE)
[13:33:59] [PASSED] 0x9AF8 (TIGERLAKE)
[13:33:59] [PASSED] 0x4C80 (ROCKETLAKE)
[13:33:59] [PASSED] 0x4C8A (ROCKETLAKE)
[13:33:59] [PASSED] 0x4C8B (ROCKETLAKE)
[13:33:59] [PASSED] 0x4C8C (ROCKETLAKE)
[13:33:59] [PASSED] 0x4C90 (ROCKETLAKE)
[13:33:59] [PASSED] 0x4C9A (ROCKETLAKE)
[13:33:59] [PASSED] 0x4680 (ALDERLAKE_S)
[13:33:59] [PASSED] 0x4682 (ALDERLAKE_S)
[13:33:59] [PASSED] 0x4688 (ALDERLAKE_S)
[13:33:59] [PASSED] 0x468A (ALDERLAKE_S)
[13:33:59] [PASSED] 0x468B (ALDERLAKE_S)
[13:33:59] [PASSED] 0x4690 (ALDERLAKE_S)
[13:33:59] [PASSED] 0x4692 (ALDERLAKE_S)
[13:33:59] [PASSED] 0x4693 (ALDERLAKE_S)
[13:33:59] [PASSED] 0x46A0 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46A1 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46A2 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46A3 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46A6 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46A8 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46AA (ALDERLAKE_P)
[13:33:59] [PASSED] 0x462A (ALDERLAKE_P)
[13:33:59] [PASSED] 0x4626 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x4628 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46B0 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46B1 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46B2 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46B3 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46C0 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46C1 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46C2 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46C3 (ALDERLAKE_P)
[13:33:59] [PASSED] 0x46D0 (ALDERLAKE_N)
[13:33:59] [PASSED] 0x46D1 (ALDERLAKE_N)
[13:33:59] [PASSED] 0x46D2 (ALDERLAKE_N)
[13:33:59] [PASSED] 0x46D3 (ALDERLAKE_N)
[13:33:59] [PASSED] 0x46D4 (ALDERLAKE_N)
[13:33:59] [PASSED] 0xA721 (ALDERLAKE_P)
[13:33:59] [PASSED] 0xA7A1 (ALDERLAKE_P)
[13:33:59] [PASSED] 0xA7A9 (ALDERLAKE_P)
[13:33:59] [PASSED] 0xA7AC (ALDERLAKE_P)
[13:33:59] [PASSED] 0xA7AD (ALDERLAKE_P)
[13:33:59] [PASSED] 0xA720 (ALDERLAKE_P)
[13:33:59] [PASSED] 0xA7A0 (ALDERLAKE_P)
[13:33:59] [PASSED] 0xA7A8 (ALDERLAKE_P)
[13:33:59] [PASSED] 0xA7AA (ALDERLAKE_P)
[13:33:59] [PASSED] 0xA7AB (ALDERLAKE_P)
[13:33:59] [PASSED] 0xA780 (ALDERLAKE_S)
[13:33:59] [PASSED] 0xA781 (ALDERLAKE_S)
[13:33:59] [PASSED] 0xA782 (ALDERLAKE_S)
[13:33:59] [PASSED] 0xA783 (ALDERLAKE_S)
[13:33:59] [PASSED] 0xA788 (ALDERLAKE_S)
[13:33:59] [PASSED] 0xA789 (ALDERLAKE_S)
[13:33:59] [PASSED] 0xA78A (ALDERLAKE_S)
[13:33:59] [PASSED] 0xA78B (ALDERLAKE_S)
[13:33:59] [PASSED] 0x4905 (DG1)
[13:33:59] [PASSED] 0x4906 (DG1)
[13:33:59] [PASSED] 0x4907 (DG1)
[13:33:59] [PASSED] 0x4908 (DG1)
[13:33:59] [PASSED] 0x4909 (DG1)
[13:33:59] [PASSED] 0x56C0 (DG2)
[13:33:59] [PASSED] 0x56C2 (DG2)
[13:33:59] [PASSED] 0x56C1 (DG2)
[13:33:59] [PASSED] 0x7D51 (METEORLAKE)
[13:33:59] [PASSED] 0x7DD1 (METEORLAKE)
[13:33:59] [PASSED] 0x7D41 (METEORLAKE)
[13:33:59] [PASSED] 0x7D67 (METEORLAKE)
[13:33:59] [PASSED] 0xB640 (METEORLAKE)
[13:33:59] [PASSED] 0x56A0 (DG2)
[13:33:59] [PASSED] 0x56A1 (DG2)
[13:33:59] [PASSED] 0x56A2 (DG2)
[13:33:59] [PASSED] 0x56BE (DG2)
[13:33:59] [PASSED] 0x56BF (DG2)
[13:33:59] [PASSED] 0x5690 (DG2)
stty: 'standard input': Inappropriate ioctl for device
[13:33:59] [PASSED] 0x5691 (DG2)
[13:33:59] [PASSED] 0x5692 (DG2)
[13:33:59] [PASSED] 0x56A5 (DG2)
[13:33:59] [PASSED] 0x56A6 (DG2)
[13:33:59] [PASSED] 0x56B0 (DG2)
[13:33:59] [PASSED] 0x56B1 (DG2)
[13:33:59] [PASSED] 0x56BA (DG2)
[13:33:59] [PASSED] 0x56BB (DG2)
[13:33:59] [PASSED] 0x56BC (DG2)
[13:33:59] [PASSED] 0x56BD (DG2)
[13:33:59] [PASSED] 0x5693 (DG2)
[13:33:59] [PASSED] 0x5694 (DG2)
[13:33:59] [PASSED] 0x5695 (DG2)
[13:33:59] [PASSED] 0x56A3 (DG2)
[13:33:59] [PASSED] 0x56A4 (DG2)
[13:33:59] [PASSED] 0x56B2 (DG2)
[13:33:59] [PASSED] 0x56B3 (DG2)
[13:33:59] [PASSED] 0x5696 (DG2)
[13:33:59] [PASSED] 0x5697 (DG2)
[13:33:59] [PASSED] 0xB69 (PVC)
[13:33:59] [PASSED] 0xB6E (PVC)
[13:33:59] [PASSED] 0xBD4 (PVC)
[13:33:59] [PASSED] 0xBD5 (PVC)
[13:33:59] [PASSED] 0xBD6 (PVC)
[13:33:59] [PASSED] 0xBD7 (PVC)
[13:33:59] [PASSED] 0xBD8 (PVC)
[13:33:59] [PASSED] 0xBD9 (PVC)
[13:33:59] [PASSED] 0xBDA (PVC)
[13:33:59] [PASSED] 0xBDB (PVC)
[13:33:59] [PASSED] 0xBE0 (PVC)
[13:33:59] [PASSED] 0xBE1 (PVC)
[13:33:59] [PASSED] 0xBE5 (PVC)
[13:33:59] [PASSED] 0x7D40 (METEORLAKE)
[13:33:59] [PASSED] 0x7D45 (METEORLAKE)
[13:33:59] [PASSED] 0x7D55 (METEORLAKE)
[13:33:59] [PASSED] 0x7D60 (METEORLAKE)
[13:33:59] [PASSED] 0x7DD5 (METEORLAKE)
[13:33:59] [PASSED] 0x6420 (LUNARLAKE)
[13:33:59] [PASSED] 0x64A0 (LUNARLAKE)
[13:33:59] [PASSED] 0x64B0 (LUNARLAKE)
[13:33:59] [PASSED] 0xE202 (BATTLEMAGE)
[13:33:59] [PASSED] 0xE209 (BATTLEMAGE)
[13:33:59] [PASSED] 0xE20B (BATTLEMAGE)
[13:33:59] [PASSED] 0xE20C (BATTLEMAGE)
[13:33:59] [PASSED] 0xE20D (BATTLEMAGE)
[13:33:59] [PASSED] 0xE210 (BATTLEMAGE)
[13:33:59] [PASSED] 0xE211 (BATTLEMAGE)
[13:33:59] [PASSED] 0xE212 (BATTLEMAGE)
[13:33:59] [PASSED] 0xE216 (BATTLEMAGE)
[13:33:59] [PASSED] 0xE220 (BATTLEMAGE)
[13:33:59] [PASSED] 0xE221 (BATTLEMAGE)
[13:33:59] [PASSED] 0xE222 (BATTLEMAGE)
[13:33:59] [PASSED] 0xE223 (BATTLEMAGE)
[13:33:59] [PASSED] 0xB080 (PANTHERLAKE)
[13:33:59] [PASSED] 0xB081 (PANTHERLAKE)
[13:33:59] [PASSED] 0xB082 (PANTHERLAKE)
[13:33:59] [PASSED] 0xB083 (PANTHERLAKE)
[13:33:59] [PASSED] 0xB084 (PANTHERLAKE)
[13:33:59] [PASSED] 0xB085 (PANTHERLAKE)
[13:33:59] [PASSED] 0xB086 (PANTHERLAKE)
[13:33:59] [PASSED] 0xB087 (PANTHERLAKE)
[13:33:59] [PASSED] 0xB08F (PANTHERLAKE)
[13:33:59] [PASSED] 0xB090 (PANTHERLAKE)
[13:33:59] [PASSED] 0xB0A0 (PANTHERLAKE)
[13:33:59] [PASSED] 0xB0B0 (PANTHERLAKE)
[13:33:59] [PASSED] 0xD740 (NOVALAKE_S)
[13:33:59] [PASSED] 0xD741 (NOVALAKE_S)
[13:33:59] [PASSED] 0xD742 (NOVALAKE_S)
[13:33:59] [PASSED] 0xD743 (NOVALAKE_S)
[13:33:59] [PASSED] 0xD744 (NOVALAKE_S)
[13:33:59] [PASSED] 0xD745 (NOVALAKE_S)
[13:33:59] [PASSED] 0x674C (CRESCENTISLAND)
[13:33:59] [PASSED] 0xFD80 (PANTHERLAKE)
[13:33:59] [PASSED] 0xFD81 (PANTHERLAKE)
[13:33:59] =============== [PASSED] check_platform_desc ===============
[13:33:59] ===================== [PASSED] xe_pci ======================
[13:33:59] =================== xe_rtp (2 subtests) ====================
[13:33:59] =============== xe_rtp_process_to_sr_tests  ================
[13:33:59] [PASSED] coalesce-same-reg
[13:33:59] [PASSED] no-match-no-add
[13:33:59] [PASSED] match-or
[13:33:59] [PASSED] match-or-xfail
[13:33:59] [PASSED] no-match-no-add-multiple-rules
[13:33:59] [PASSED] two-regs-two-entries
[13:33:59] [PASSED] clr-one-set-other
[13:33:59] [PASSED] set-field
[13:33:59] [PASSED] conflict-duplicate
[13:33:59] [PASSED] conflict-not-disjoint
[13:33:59] [PASSED] conflict-reg-type
[13:33:59] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:33:59] ================== xe_rtp_process_tests  ===================
[13:33:59] [PASSED] active1
[13:33:59] [PASSED] active2
[13:33:59] [PASSED] active-inactive
[13:34:00] [PASSED] inactive-active
[13:34:00] [PASSED] inactive-1st_or_active-inactive
[13:34:00] [PASSED] inactive-2nd_or_active-inactive
[13:34:00] [PASSED] inactive-last_or_active-inactive
[13:34:00] [PASSED] inactive-no_or_active-inactive
[13:34:00] ============== [PASSED] xe_rtp_process_tests ===============
[13:34:00] ===================== [PASSED] xe_rtp ======================
[13:34:00] ==================== xe_wa (1 subtest) =====================
[13:34:00] ======================== xe_wa_gt  =========================
[13:34:00] [PASSED] TIGERLAKE B0
[13:34:00] [PASSED] DG1 A0
[13:34:00] [PASSED] DG1 B0
[13:34:00] [PASSED] ALDERLAKE_S A0
[13:34:00] [PASSED] ALDERLAKE_S B0
[13:34:00] [PASSED] ALDERLAKE_S C0
[13:34:00] [PASSED] ALDERLAKE_S D0
[13:34:00] [PASSED] ALDERLAKE_P A0
[13:34:00] [PASSED] ALDERLAKE_P B0
[13:34:00] [PASSED] ALDERLAKE_P C0
[13:34:00] [PASSED] ALDERLAKE_S RPLS D0
[13:34:00] [PASSED] ALDERLAKE_P RPLU E0
[13:34:00] [PASSED] DG2 G10 C0
[13:34:00] [PASSED] DG2 G11 B1
[13:34:00] [PASSED] DG2 G12 A1
[13:34:00] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:34:00] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:34:00] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[13:34:00] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[13:34:00] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[13:34:00] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[13:34:00] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[13:34:00] ==================== [PASSED] xe_wa_gt =====================
[13:34:00] ====================== [PASSED] xe_wa ======================
[13:34:00] ============================================================
[13:34:00] Testing complete. Ran 446 tests: passed: 428, skipped: 18
[13:34:00] Elapsed time: 37.265s total, 4.251s configuring, 32.548s building, 0.429s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:34:00] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:34:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:34:32] Starting KUnit Kernel (1/1)...
[13:34:32] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:34:32] ============ drm_test_pick_cmdline (2 subtests) ============
[13:34:32] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[13:34:32] =============== drm_test_pick_cmdline_named  ===============
[13:34:32] [PASSED] NTSC
[13:34:32] [PASSED] NTSC-J
[13:34:32] [PASSED] PAL
[13:34:32] [PASSED] PAL-M
[13:34:32] =========== [PASSED] drm_test_pick_cmdline_named ===========
[13:34:32] ============== [PASSED] drm_test_pick_cmdline ==============
[13:34:32] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:34:32] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:34:32] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:34:32] =========== drm_validate_clone_mode (2 subtests) ===========
[13:34:32] ============== drm_test_check_in_clone_mode  ===============
[13:34:32] [PASSED] in_clone_mode
[13:34:32] [PASSED] not_in_clone_mode
[13:34:32] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:34:32] =============== drm_test_check_valid_clones  ===============
[13:34:32] [PASSED] not_in_clone_mode
[13:34:32] [PASSED] valid_clone
[13:34:32] [PASSED] invalid_clone
[13:34:32] =========== [PASSED] drm_test_check_valid_clones ===========
[13:34:32] ============= [PASSED] drm_validate_clone_mode =============
[13:34:32] ============= drm_validate_modeset (1 subtest) =============
[13:34:32] [PASSED] drm_test_check_connector_changed_modeset
[13:34:32] ============== [PASSED] drm_validate_modeset ===============
[13:34:32] ====== drm_test_bridge_get_current_state (2 subtests) ======
[13:34:32] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:34:32] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[13:34:32] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:34:32] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:34:32] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:34:32] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:34:32] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[13:34:32] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:34:32] ============== drm_bridge_alloc (2 subtests) ===============
[13:34:32] [PASSED] drm_test_drm_bridge_alloc_basic
[13:34:32] [PASSED] drm_test_drm_bridge_alloc_get_put
[13:34:32] ================ [PASSED] drm_bridge_alloc =================
[13:34:32] ================== drm_buddy (8 subtests) ==================
[13:34:32] [PASSED] drm_test_buddy_alloc_limit
[13:34:32] [PASSED] drm_test_buddy_alloc_optimistic
[13:34:32] [PASSED] drm_test_buddy_alloc_pessimistic
[13:34:32] [PASSED] drm_test_buddy_alloc_pathological
[13:34:32] [PASSED] drm_test_buddy_alloc_contiguous
[13:34:32] [PASSED] drm_test_buddy_alloc_clear
[13:34:32] [PASSED] drm_test_buddy_alloc_range_bias
[13:34:32] [PASSED] drm_test_buddy_fragmentation_performance
[13:34:32] ==================== [PASSED] drm_buddy ====================
[13:34:32] ============= drm_cmdline_parser (40 subtests) =============
[13:34:32] [PASSED] drm_test_cmdline_force_d_only
[13:34:32] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:34:32] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:34:32] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:34:32] [PASSED] drm_test_cmdline_force_e_only
[13:34:32] [PASSED] drm_test_cmdline_res
[13:34:32] [PASSED] drm_test_cmdline_res_vesa
[13:34:32] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:34:32] [PASSED] drm_test_cmdline_res_rblank
[13:34:32] [PASSED] drm_test_cmdline_res_bpp
[13:34:32] [PASSED] drm_test_cmdline_res_refresh
[13:34:32] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:34:32] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:34:32] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:34:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:34:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:34:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:34:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:34:32] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:34:32] [PASSED] drm_test_cmdline_res_margins_force_on
[13:34:32] [PASSED] drm_test_cmdline_res_vesa_margins
[13:34:32] [PASSED] drm_test_cmdline_name
[13:34:32] [PASSED] drm_test_cmdline_name_bpp
[13:34:32] [PASSED] drm_test_cmdline_name_option
[13:34:32] [PASSED] drm_test_cmdline_name_bpp_option
[13:34:32] [PASSED] drm_test_cmdline_rotate_0
[13:34:32] [PASSED] drm_test_cmdline_rotate_90
[13:34:32] [PASSED] drm_test_cmdline_rotate_180
[13:34:32] [PASSED] drm_test_cmdline_rotate_270
[13:34:32] [PASSED] drm_test_cmdline_hmirror
[13:34:32] [PASSED] drm_test_cmdline_vmirror
[13:34:32] [PASSED] drm_test_cmdline_margin_options
[13:34:32] [PASSED] drm_test_cmdline_multiple_options
[13:34:32] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:34:32] [PASSED] drm_test_cmdline_extra_and_option
[13:34:32] [PASSED] drm_test_cmdline_freestanding_options
[13:34:32] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:34:32] [PASSED] drm_test_cmdline_panel_orientation
[13:34:32] ================ drm_test_cmdline_invalid  =================
[13:34:32] [PASSED] margin_only
[13:34:32] [PASSED] interlace_only
[13:34:32] [PASSED] res_missing_x
[13:34:32] [PASSED] res_missing_y
[13:34:32] [PASSED] res_bad_y
[13:34:32] [PASSED] res_missing_y_bpp
[13:34:32] [PASSED] res_bad_bpp
[13:34:32] [PASSED] res_bad_refresh
[13:34:32] [PASSED] res_bpp_refresh_force_on_off
[13:34:32] [PASSED] res_invalid_mode
[13:34:32] [PASSED] res_bpp_wrong_place_mode
[13:34:32] [PASSED] name_bpp_refresh
[13:34:32] [PASSED] name_refresh
[13:34:32] [PASSED] name_refresh_wrong_mode
[13:34:32] [PASSED] name_refresh_invalid_mode
[13:34:32] [PASSED] rotate_multiple
[13:34:32] [PASSED] rotate_invalid_val
[13:34:32] [PASSED] rotate_truncated
[13:34:32] [PASSED] invalid_option
[13:34:32] [PASSED] invalid_tv_option
[13:34:32] [PASSED] truncated_tv_option
[13:34:32] ============ [PASSED] drm_test_cmdline_invalid =============
[13:34:32] =============== drm_test_cmdline_tv_options  ===============
[13:34:32] [PASSED] NTSC
[13:34:32] [PASSED] NTSC_443
[13:34:32] [PASSED] NTSC_J
[13:34:32] [PASSED] PAL
[13:34:32] [PASSED] PAL_M
[13:34:32] [PASSED] PAL_N
[13:34:32] [PASSED] SECAM
[13:34:32] [PASSED] MONO_525
[13:34:32] [PASSED] MONO_625
[13:34:32] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:34:32] =============== [PASSED] drm_cmdline_parser ================
[13:34:32] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:34:32] [PASSED] drm_test_connector_hdmi_init_valid
[13:34:32] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:34:32] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:34:32] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:34:32] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:34:32] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:34:32] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:34:32] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:34:32] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[13:34:32] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:34:32] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:34:32] [PASSED] supported_formats=0x3 yuv420_allowed=1
[13:34:32] [PASSED] supported_formats=0x3 yuv420_allowed=0
[13:34:32] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:34:32] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:34:32] [PASSED] drm_test_connector_hdmi_init_null_product
[13:34:32] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:34:32] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:34:32] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:34:32] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:34:32] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:34:32] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:34:32] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:34:32] ========= drm_test_connector_hdmi_init_type_valid  =========
[13:34:32] [PASSED] HDMI-A
[13:34:32] [PASSED] HDMI-B
[13:34:32] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:34:32] ======== drm_test_connector_hdmi_init_type_invalid  ========
[13:34:32] [PASSED] Unknown
[13:34:32] [PASSED] VGA
[13:34:32] [PASSED] DVI-I
[13:34:32] [PASSED] DVI-D
[13:34:32] [PASSED] DVI-A
[13:34:32] [PASSED] Composite
[13:34:32] [PASSED] SVIDEO
[13:34:32] [PASSED] LVDS
[13:34:32] [PASSED] Component
[13:34:32] [PASSED] DIN
[13:34:32] [PASSED] DP
[13:34:32] [PASSED] TV
[13:34:32] [PASSED] eDP
[13:34:32] [PASSED] Virtual
[13:34:32] [PASSED] DSI
[13:34:32] [PASSED] DPI
[13:34:32] [PASSED] Writeback
[13:34:32] [PASSED] SPI
[13:34:32] [PASSED] USB
[13:34:32] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:34:32] ============ [PASSED] drmm_connector_hdmi_init =============
[13:34:32] ============= drmm_connector_init (3 subtests) =============
[13:34:32] [PASSED] drm_test_drmm_connector_init
[13:34:32] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:34:32] ========= drm_test_drmm_connector_init_type_valid  =========
[13:34:32] [PASSED] Unknown
[13:34:32] [PASSED] VGA
[13:34:32] [PASSED] DVI-I
[13:34:32] [PASSED] DVI-D
[13:34:32] [PASSED] DVI-A
[13:34:32] [PASSED] Composite
[13:34:32] [PASSED] SVIDEO
[13:34:32] [PASSED] LVDS
[13:34:32] [PASSED] Component
[13:34:32] [PASSED] DIN
[13:34:32] [PASSED] DP
[13:34:32] [PASSED] HDMI-A
[13:34:32] [PASSED] HDMI-B
[13:34:32] [PASSED] TV
[13:34:32] [PASSED] eDP
[13:34:32] [PASSED] Virtual
[13:34:32] [PASSED] DSI
[13:34:32] [PASSED] DPI
[13:34:32] [PASSED] Writeback
[13:34:32] [PASSED] SPI
[13:34:32] [PASSED] USB
[13:34:32] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:34:32] =============== [PASSED] drmm_connector_init ===============
[13:34:32] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_init
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:34:32] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[13:34:32] [PASSED] Unknown
[13:34:32] [PASSED] VGA
[13:34:32] [PASSED] DVI-I
[13:34:32] [PASSED] DVI-D
[13:34:32] [PASSED] DVI-A
[13:34:32] [PASSED] Composite
[13:34:32] [PASSED] SVIDEO
[13:34:32] [PASSED] LVDS
[13:34:32] [PASSED] Component
[13:34:32] [PASSED] DIN
[13:34:32] [PASSED] DP
[13:34:32] [PASSED] HDMI-A
[13:34:32] [PASSED] HDMI-B
[13:34:32] [PASSED] TV
[13:34:32] [PASSED] eDP
[13:34:32] [PASSED] Virtual
[13:34:32] [PASSED] DSI
[13:34:32] [PASSED] DPI
[13:34:32] [PASSED] Writeback
[13:34:32] [PASSED] SPI
[13:34:32] [PASSED] USB
[13:34:32] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:34:32] ======== drm_test_drm_connector_dynamic_init_name  =========
[13:34:32] [PASSED] Unknown
[13:34:32] [PASSED] VGA
[13:34:32] [PASSED] DVI-I
[13:34:32] [PASSED] DVI-D
[13:34:32] [PASSED] DVI-A
[13:34:32] [PASSED] Composite
[13:34:32] [PASSED] SVIDEO
[13:34:32] [PASSED] LVDS
[13:34:32] [PASSED] Component
[13:34:32] [PASSED] DIN
[13:34:32] [PASSED] DP
[13:34:32] [PASSED] HDMI-A
[13:34:32] [PASSED] HDMI-B
[13:34:32] [PASSED] TV
[13:34:32] [PASSED] eDP
[13:34:32] [PASSED] Virtual
[13:34:32] [PASSED] DSI
[13:34:32] [PASSED] DPI
[13:34:32] [PASSED] Writeback
[13:34:32] [PASSED] SPI
[13:34:32] [PASSED] USB
[13:34:32] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:34:32] =========== [PASSED] drm_connector_dynamic_init ============
[13:34:32] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:34:32] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:34:32] ======= drm_connector_dynamic_register (7 subtests) ========
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:34:32] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:34:32] ========= [PASSED] drm_connector_dynamic_register ==========
[13:34:32] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:34:32] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:34:32] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:34:32] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:34:32] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:34:32] ========== drm_test_get_tv_mode_from_name_valid  ===========
[13:34:32] [PASSED] NTSC
[13:34:32] [PASSED] NTSC-443
[13:34:32] [PASSED] NTSC-J
[13:34:32] [PASSED] PAL
[13:34:32] [PASSED] PAL-M
[13:34:32] [PASSED] PAL-N
[13:34:32] [PASSED] SECAM
[13:34:32] [PASSED] Mono
[13:34:32] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:34:32] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:34:32] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:34:32] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:34:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:34:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:34:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:34:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:34:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:34:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:34:32] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[13:34:32] [PASSED] VIC 96
[13:34:32] [PASSED] VIC 97
[13:34:32] [PASSED] VIC 101
[13:34:32] [PASSED] VIC 102
[13:34:32] [PASSED] VIC 106
[13:34:32] [PASSED] VIC 107
[13:34:32] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:34:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:34:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:34:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:34:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:34:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:34:32] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:34:32] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:34:32] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[13:34:32] [PASSED] Automatic
[13:34:32] [PASSED] Full
[13:34:32] [PASSED] Limited 16:235
[13:34:32] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:34:32] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:34:32] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:34:32] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:34:32] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[13:34:32] [PASSED] RGB
[13:34:32] [PASSED] YUV 4:2:0
[13:34:32] [PASSED] YUV 4:2:2
[13:34:32] [PASSED] YUV 4:4:4
[13:34:32] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:34:32] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:34:32] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:34:32] ============= drm_damage_helper (21 subtests) ==============
[13:34:32] [PASSED] drm_test_damage_iter_no_damage
[13:34:32] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:34:32] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:34:32] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:34:32] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:34:32] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:34:32] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:34:32] [PASSED] drm_test_damage_iter_simple_damage
[13:34:32] [PASSED] drm_test_damage_iter_single_damage
[13:34:32] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:34:32] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:34:32] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:34:32] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:34:32] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:34:32] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:34:32] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:34:32] [PASSED] drm_test_damage_iter_damage
[13:34:32] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:34:32] [PASSED] drm_test_damage_iter_damage_one_outside
[13:34:32] [PASSED] drm_test_damage_iter_damage_src_moved
[13:34:32] [PASSED] drm_test_damage_iter_damage_not_visible
[13:34:32] ================ [PASSED] drm_damage_helper ================
[13:34:32] ============== drm_dp_mst_helper (3 subtests) ==============
[13:34:32] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[13:34:32] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:34:32] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:34:32] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:34:32] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:34:32] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:34:32] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:34:32] ============== drm_test_dp_mst_calc_pbn_div  ===============
[13:34:32] [PASSED] Link rate 2000000 lane count 4
[13:34:32] [PASSED] Link rate 2000000 lane count 2
[13:34:32] [PASSED] Link rate 2000000 lane count 1
[13:34:32] [PASSED] Link rate 1350000 lane count 4
[13:34:32] [PASSED] Link rate 1350000 lane count 2
[13:34:32] [PASSED] Link rate 1350000 lane count 1
[13:34:32] [PASSED] Link rate 1000000 lane count 4
[13:34:32] [PASSED] Link rate 1000000 lane count 2
[13:34:32] [PASSED] Link rate 1000000 lane count 1
[13:34:32] [PASSED] Link rate 810000 lane count 4
[13:34:32] [PASSED] Link rate 810000 lane count 2
[13:34:32] [PASSED] Link rate 810000 lane count 1
[13:34:32] [PASSED] Link rate 540000 lane count 4
[13:34:32] [PASSED] Link rate 540000 lane count 2
[13:34:32] [PASSED] Link rate 540000 lane count 1
[13:34:32] [PASSED] Link rate 270000 lane count 4
[13:34:32] [PASSED] Link rate 270000 lane count 2
[13:34:32] [PASSED] Link rate 270000 lane count 1
[13:34:32] [PASSED] Link rate 162000 lane count 4
[13:34:32] [PASSED] Link rate 162000 lane count 2
[13:34:32] [PASSED] Link rate 162000 lane count 1
[13:34:32] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:34:32] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[13:34:32] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:34:32] [PASSED] DP_POWER_UP_PHY with port number
[13:34:32] [PASSED] DP_POWER_DOWN_PHY with port number
[13:34:32] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:34:32] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:34:32] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:34:32] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:34:32] [PASSED] DP_QUERY_PAYLOAD with port number
[13:34:32] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:34:32] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:34:32] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:34:32] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:34:32] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:34:32] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:34:32] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:34:32] [PASSED] DP_REMOTE_I2C_READ with port number
[13:34:32] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:34:32] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:34:32] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:34:32] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:34:32] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:34:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:34:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:34:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:34:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:34:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:34:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:34:32] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:34:32] ================ [PASSED] drm_dp_mst_helper ================
[13:34:32] ================== drm_exec (7 subtests) ===================
[13:34:32] [PASSED] sanitycheck
[13:34:32] [PASSED] test_lock
[13:34:32] [PASSED] test_lock_unlock
[13:34:32] [PASSED] test_duplicates
[13:34:32] [PASSED] test_prepare
[13:34:32] [PASSED] test_prepare_array
[13:34:32] [PASSED] test_multiple_loops
[13:34:32] ==================== [PASSED] drm_exec =====================
[13:34:32] =========== drm_format_helper_test (17 subtests) ===========
[13:34:32] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:34:32] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:34:32] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:34:32] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:34:32] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:34:32] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:34:32] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:34:32] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:34:32] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:34:32] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:34:32] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:34:32] ============== drm_test_fb_xrgb8888_to_mono  ===============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:34:32] ==================== drm_test_fb_swab  =====================
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ================ [PASSED] drm_test_fb_swab =================
[13:34:32] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:34:32] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[13:34:32] [PASSED] single_pixel_source_buffer
[13:34:32] [PASSED] single_pixel_clip_rectangle
[13:34:32] [PASSED] well_known_colors
[13:34:32] [PASSED] destination_pitch
[13:34:32] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:34:32] ================= drm_test_fb_clip_offset  =================
[13:34:32] [PASSED] pass through
[13:34:32] [PASSED] horizontal offset
[13:34:32] [PASSED] vertical offset
[13:34:32] [PASSED] horizontal and vertical offset
[13:34:32] [PASSED] horizontal offset (custom pitch)
[13:34:32] [PASSED] vertical offset (custom pitch)
[13:34:32] [PASSED] horizontal and vertical offset (custom pitch)
[13:34:32] ============= [PASSED] drm_test_fb_clip_offset =============
[13:34:32] =================== drm_test_fb_memcpy  ====================
[13:34:32] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:34:32] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:34:32] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:34:32] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:34:32] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:34:32] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:34:32] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:34:32] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:34:32] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:34:32] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:34:32] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:34:32] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:34:32] =============== [PASSED] drm_test_fb_memcpy ================
[13:34:32] ============= [PASSED] drm_format_helper_test ==============
[13:34:32] ================= drm_format (18 subtests) =================
[13:34:32] [PASSED] drm_test_format_block_width_invalid
[13:34:32] [PASSED] drm_test_format_block_width_one_plane
[13:34:32] [PASSED] drm_test_format_block_width_two_plane
[13:34:32] [PASSED] drm_test_format_block_width_three_plane
[13:34:32] [PASSED] drm_test_format_block_width_tiled
[13:34:32] [PASSED] drm_test_format_block_height_invalid
[13:34:32] [PASSED] drm_test_format_block_height_one_plane
[13:34:32] [PASSED] drm_test_format_block_height_two_plane
[13:34:32] [PASSED] drm_test_format_block_height_three_plane
[13:34:32] [PASSED] drm_test_format_block_height_tiled
[13:34:32] [PASSED] drm_test_format_min_pitch_invalid
[13:34:32] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:34:32] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:34:32] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:34:32] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:34:32] [PASSED] drm_test_format_min_pitch_two_plane
[13:34:32] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:34:32] [PASSED] drm_test_format_min_pitch_tiled
[13:34:32] =================== [PASSED] drm_format ====================
[13:34:32] ============== drm_framebuffer (10 subtests) ===============
[13:34:32] ========== drm_test_framebuffer_check_src_coords  ==========
[13:34:32] [PASSED] Success: source fits into fb
[13:34:32] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:34:32] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:34:32] [PASSED] Fail: overflowing fb with source width
[13:34:32] [PASSED] Fail: overflowing fb with source height
[13:34:32] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:34:32] [PASSED] drm_test_framebuffer_cleanup
[13:34:32] =============== drm_test_framebuffer_create  ===============
[13:34:32] [PASSED] ABGR8888 normal sizes
[13:34:32] [PASSED] ABGR8888 max sizes
[13:34:32] [PASSED] ABGR8888 pitch greater than min required
[13:34:32] [PASSED] ABGR8888 pitch less than min required
[13:34:32] [PASSED] ABGR8888 Invalid width
[13:34:32] [PASSED] ABGR8888 Invalid buffer handle
[13:34:32] [PASSED] No pixel format
[13:34:32] [PASSED] ABGR8888 Width 0
[13:34:32] [PASSED] ABGR8888 Height 0
[13:34:32] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:34:32] [PASSED] ABGR8888 Large buffer offset
[13:34:32] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:34:32] [PASSED] ABGR8888 Invalid flag
[13:34:32] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:34:32] [PASSED] ABGR8888 Valid buffer modifier
[13:34:32] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:34:32] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:34:32] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:34:32] [PASSED] NV12 Normal sizes
[13:34:32] [PASSED] NV12 Max sizes
[13:34:32] [PASSED] NV12 Invalid pitch
[13:34:32] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:34:32] [PASSED] NV12 different  modifier per-plane
[13:34:32] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:34:32] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:34:32] [PASSED] NV12 Modifier for inexistent plane
[13:34:32] [PASSED] NV12 Handle for inexistent plane
[13:34:32] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:34:32] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:34:32] [PASSED] YVU420 Normal sizes
[13:34:32] [PASSED] YVU420 Max sizes
[13:34:32] [PASSED] YVU420 Invalid pitch
[13:34:32] [PASSED] YVU420 Different pitches
[13:34:32] [PASSED] YVU420 Different buffer offsets/pitches
[13:34:32] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:34:32] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:34:32] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:34:32] [PASSED] YVU420 Valid modifier
[13:34:32] [PASSED] YVU420 Different modifiers per plane
[13:34:32] [PASSED] YVU420 Modifier for inexistent plane
[13:34:32] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:34:32] [PASSED] X0L2 Normal sizes
[13:34:32] [PASSED] X0L2 Max sizes
[13:34:32] [PASSED] X0L2 Invalid pitch
[13:34:32] [PASSED] X0L2 Pitch greater than minimum required
[13:34:32] [PASSED] X0L2 Handle for inexistent plane
[13:34:32] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:34:32] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:34:32] [PASSED] X0L2 Valid modifier
[13:34:32] [PASSED] X0L2 Modifier for inexistent plane
[13:34:32] =========== [PASSED] drm_test_framebuffer_create ===========
[13:34:32] [PASSED] drm_test_framebuffer_free
[13:34:32] [PASSED] drm_test_framebuffer_init
[13:34:32] [PASSED] drm_test_framebuffer_init_bad_format
[13:34:32] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:34:32] [PASSED] drm_test_framebuffer_lookup
[13:34:32] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:34:32] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:34:32] ================= [PASSED] drm_framebuffer =================
[13:34:32] ================ drm_gem_shmem (8 subtests) ================
[13:34:32] [PASSED] drm_gem_shmem_test_obj_create
[13:34:32] [PASSED] drm_gem_shmem_test_obj_create_private
[13:34:32] [PASSED] drm_gem_shmem_test_pin_pages
[13:34:32] [PASSED] drm_gem_shmem_test_vmap
[13:34:32] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:34:32] [PASSED] drm_gem_shmem_test_get_sg_table
[13:34:32] [PASSED] drm_gem_shmem_test_madvise
[13:34:32] [PASSED] drm_gem_shmem_test_purge
[13:34:32] ================== [PASSED] drm_gem_shmem ==================
[13:34:32] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[13:34:32] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:34:32] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:34:32] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:34:32] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:34:32] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:34:32] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:34:32] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[13:34:32] [PASSED] Automatic
[13:34:32] [PASSED] Full
[13:34:32] [PASSED] Limited 16:235
[13:34:32] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[13:34:32] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:34:32] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:34:32] [PASSED] drm_test_check_disable_connector
[13:34:32] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:34:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[13:34:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[13:34:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[13:34:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[13:34:32] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[13:34:32] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:34:32] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:34:32] [PASSED] drm_test_check_output_bpc_dvi
[13:34:32] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:34:32] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:34:32] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:34:32] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:34:32] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:34:32] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:34:32] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:34:32] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:34:32] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:34:32] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:34:32] [PASSED] drm_test_check_broadcast_rgb_value
[13:34:32] [PASSED] drm_test_check_bpc_8_value
[13:34:32] [PASSED] drm_test_check_bpc_10_value
[13:34:32] [PASSED] drm_test_check_bpc_12_value
[13:34:32] [PASSED] drm_test_check_format_value
[13:34:32] [PASSED] drm_test_check_tmds_char_value
[13:34:32] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:34:32] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[13:34:32] [PASSED] drm_test_check_mode_valid
[13:34:32] [PASSED] drm_test_check_mode_valid_reject
[13:34:32] [PASSED] drm_test_check_mode_valid_reject_rate
[13:34:32] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:34:32] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:34:32] ================= drm_managed (2 subtests) =================
[13:34:32] [PASSED] drm_test_managed_release_action
[13:34:32] [PASSED] drm_test_managed_run_action
[13:34:32] =================== [PASSED] drm_managed ===================
[13:34:32] =================== drm_mm (6 subtests) ====================
[13:34:32] [PASSED] drm_test_mm_init
[13:34:32] [PASSED] drm_test_mm_debug
[13:34:32] [PASSED] drm_test_mm_align32
[13:34:32] [PASSED] drm_test_mm_align64
[13:34:32] [PASSED] drm_test_mm_lowest
[13:34:32] [PASSED] drm_test_mm_highest
[13:34:32] ===================== [PASSED] drm_mm ======================
[13:34:32] ============= drm_modes_analog_tv (5 subtests) =============
[13:34:32] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:34:32] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:34:32] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:34:32] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:34:32] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:34:32] =============== [PASSED] drm_modes_analog_tv ===============
[13:34:32] ============== drm_plane_helper (2 subtests) ===============
[13:34:32] =============== drm_test_check_plane_state  ================
[13:34:32] [PASSED] clipping_simple
[13:34:32] [PASSED] clipping_rotate_reflect
[13:34:32] [PASSED] positioning_simple
[13:34:32] [PASSED] upscaling
[13:34:32] [PASSED] downscaling
[13:34:32] [PASSED] rounding1
[13:34:32] [PASSED] rounding2
[13:34:32] [PASSED] rounding3
[13:34:32] [PASSED] rounding4
[13:34:32] =========== [PASSED] drm_test_check_plane_state ============
[13:34:32] =========== drm_test_check_invalid_plane_state  ============
[13:34:32] [PASSED] positioning_invalid
[13:34:32] [PASSED] upscaling_invalid
[13:34:32] [PASSED] downscaling_invalid
[13:34:32] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:34:32] ================ [PASSED] drm_plane_helper =================
[13:34:32] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:34:32] ====== drm_test_connector_helper_tv_get_modes_check  =======
[13:34:32] [PASSED] None
[13:34:32] [PASSED] PAL
[13:34:32] [PASSED] NTSC
[13:34:32] [PASSED] Both, NTSC Default
[13:34:32] [PASSED] Both, PAL Default
[13:34:32] [PASSED] Both, NTSC Default, with PAL on command-line
[13:34:32] [PASSED] Both, PAL Default, with NTSC on command-line
[13:34:32] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:34:32] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:34:32] ================== drm_rect (9 subtests) ===================
[13:34:32] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:34:32] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:34:32] [PASSED] drm_test_rect_clip_scaled_clipped
[13:34:32] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:34:32] ================= drm_test_rect_intersect  =================
[13:34:32] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:34:32] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:34:32] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:34:32] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:34:32] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:34:32] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:34:32] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:34:32] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:34:32] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:34:32] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:34:32] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:34:32] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:34:32] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:34:32] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:34:32] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:34:32] ============= [PASSED] drm_test_rect_intersect =============
[13:34:32] ================ drm_test_rect_calc_hscale  ================
[13:34:32] [PASSED] normal use
[13:34:32] [PASSED] out of max range
[13:34:32] [PASSED] out of min range
[13:34:32] [PASSED] zero dst
[13:34:32] [PASSED] negative src
[13:34:32] [PASSED] negative dst
[13:34:32] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:34:32] ================ drm_test_rect_calc_vscale  ================
[13:34:32] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[13:34:32] [PASSED] out of max range
[13:34:32] [PASSED] out of min range
[13:34:32] [PASSED] zero dst
[13:34:32] [PASSED] negative src
[13:34:32] [PASSED] negative dst
[13:34:32] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:34:32] ================== drm_test_rect_rotate  ===================
[13:34:32] [PASSED] reflect-x
[13:34:32] [PASSED] reflect-y
[13:34:32] [PASSED] rotate-0
[13:34:32] [PASSED] rotate-90
[13:34:32] [PASSED] rotate-180
[13:34:32] [PASSED] rotate-270
[13:34:32] ============== [PASSED] drm_test_rect_rotate ===============
[13:34:32] ================ drm_test_rect_rotate_inv  =================
[13:34:32] [PASSED] reflect-x
[13:34:32] [PASSED] reflect-y
[13:34:32] [PASSED] rotate-0
[13:34:32] [PASSED] rotate-90
[13:34:32] [PASSED] rotate-180
[13:34:32] [PASSED] rotate-270
[13:34:32] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:34:32] ==================== [PASSED] drm_rect =====================
[13:34:32] ============ drm_sysfb_modeset_test (1 subtest) ============
[13:34:32] ============ drm_test_sysfb_build_fourcc_list  =============
[13:34:32] [PASSED] no native formats
[13:34:32] [PASSED] XRGB8888 as native format
[13:34:32] [PASSED] remove duplicates
[13:34:32] [PASSED] convert alpha formats
[13:34:32] [PASSED] random formats
[13:34:32] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[13:34:32] ============= [PASSED] drm_sysfb_modeset_test ==============
[13:34:32] ============================================================
[13:34:32] Testing complete. Ran 622 tests: passed: 622
[13:34:32] Elapsed time: 32.346s total, 1.578s configuring, 30.300s building, 0.411s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:34:32] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:34:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:34:43] Starting KUnit Kernel (1/1)...
[13:34:43] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:34:43] ================= ttm_device (5 subtests) ==================
[13:34:43] [PASSED] ttm_device_init_basic
[13:34:43] [PASSED] ttm_device_init_multiple
[13:34:43] [PASSED] ttm_device_fini_basic
[13:34:43] [PASSED] ttm_device_init_no_vma_man
[13:34:43] ================== ttm_device_init_pools  ==================
[13:34:43] [PASSED] No DMA allocations, no DMA32 required
[13:34:43] [PASSED] DMA allocations, DMA32 required
[13:34:43] [PASSED] No DMA allocations, DMA32 required
[13:34:43] [PASSED] DMA allocations, no DMA32 required
[13:34:43] ============== [PASSED] ttm_device_init_pools ==============
[13:34:43] =================== [PASSED] ttm_device ====================
[13:34:43] ================== ttm_pool (8 subtests) ===================
[13:34:43] ================== ttm_pool_alloc_basic  ===================
[13:34:43] [PASSED] One page
[13:34:43] [PASSED] More than one page
[13:34:43] [PASSED] Above the allocation limit
[13:34:43] [PASSED] One page, with coherent DMA mappings enabled
[13:34:43] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:34:43] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:34:43] ============== ttm_pool_alloc_basic_dma_addr  ==============
[13:34:43] [PASSED] One page
[13:34:43] [PASSED] More than one page
[13:34:43] [PASSED] Above the allocation limit
[13:34:43] [PASSED] One page, with coherent DMA mappings enabled
[13:34:43] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:34:43] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:34:43] [PASSED] ttm_pool_alloc_order_caching_match
[13:34:43] [PASSED] ttm_pool_alloc_caching_mismatch
[13:34:43] [PASSED] ttm_pool_alloc_order_mismatch
[13:34:43] [PASSED] ttm_pool_free_dma_alloc
[13:34:43] [PASSED] ttm_pool_free_no_dma_alloc
[13:34:43] [PASSED] ttm_pool_fini_basic
[13:34:43] ==================== [PASSED] ttm_pool =====================
[13:34:43] ================ ttm_resource (8 subtests) =================
[13:34:43] ================= ttm_resource_init_basic  =================
[13:34:43] [PASSED] Init resource in TTM_PL_SYSTEM
[13:34:43] [PASSED] Init resource in TTM_PL_VRAM
[13:34:43] [PASSED] Init resource in a private placement
[13:34:43] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:34:43] ============= [PASSED] ttm_resource_init_basic =============
[13:34:43] [PASSED] ttm_resource_init_pinned
[13:34:43] [PASSED] ttm_resource_fini_basic
[13:34:43] [PASSED] ttm_resource_manager_init_basic
[13:34:43] [PASSED] ttm_resource_manager_usage_basic
[13:34:43] [PASSED] ttm_resource_manager_set_used_basic
[13:34:43] [PASSED] ttm_sys_man_alloc_basic
[13:34:43] [PASSED] ttm_sys_man_free_basic
[13:34:43] ================== [PASSED] ttm_resource ===================
[13:34:43] =================== ttm_tt (15 subtests) ===================
[13:34:43] ==================== ttm_tt_init_basic  ====================
[13:34:43] [PASSED] Page-aligned size
[13:34:43] [PASSED] Extra pages requested
[13:34:43] ================ [PASSED] ttm_tt_init_basic ================
[13:34:43] [PASSED] ttm_tt_init_misaligned
[13:34:43] [PASSED] ttm_tt_fini_basic
[13:34:43] [PASSED] ttm_tt_fini_sg
[13:34:43] [PASSED] ttm_tt_fini_shmem
[13:34:43] [PASSED] ttm_tt_create_basic
[13:34:43] [PASSED] ttm_tt_create_invalid_bo_type
[13:34:43] [PASSED] ttm_tt_create_ttm_exists
[13:34:43] [PASSED] ttm_tt_create_failed
[13:34:43] [PASSED] ttm_tt_destroy_basic
[13:34:43] [PASSED] ttm_tt_populate_null_ttm
[13:34:43] [PASSED] ttm_tt_populate_populated_ttm
[13:34:43] [PASSED] ttm_tt_unpopulate_basic
[13:34:43] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:34:43] [PASSED] ttm_tt_swapin_basic
[13:34:43] ===================== [PASSED] ttm_tt ======================
[13:34:43] =================== ttm_bo (14 subtests) ===================
[13:34:43] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[13:34:43] [PASSED] Cannot be interrupted and sleeps
[13:34:43] [PASSED] Cannot be interrupted, locks straight away
[13:34:43] [PASSED] Can be interrupted, sleeps
[13:34:43] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:34:43] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:34:43] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:34:43] [PASSED] ttm_bo_reserve_double_resv
[13:34:43] [PASSED] ttm_bo_reserve_interrupted
[13:34:43] [PASSED] ttm_bo_reserve_deadlock
[13:34:43] [PASSED] ttm_bo_unreserve_basic
[13:34:43] [PASSED] ttm_bo_unreserve_pinned
[13:34:43] [PASSED] ttm_bo_unreserve_bulk
[13:34:43] [PASSED] ttm_bo_fini_basic
[13:34:43] [PASSED] ttm_bo_fini_shared_resv
[13:34:43] [PASSED] ttm_bo_pin_basic
[13:34:43] [PASSED] ttm_bo_pin_unpin_resource
[13:34:43] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:34:43] ===================== [PASSED] ttm_bo ======================
[13:34:43] ============== ttm_bo_validate (21 subtests) ===============
[13:34:43] ============== ttm_bo_init_reserved_sys_man  ===============
[13:34:43] [PASSED] Buffer object for userspace
[13:34:43] [PASSED] Kernel buffer object
[13:34:43] [PASSED] Shared buffer object
[13:34:43] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:34:43] ============== ttm_bo_init_reserved_mock_man  ==============
[13:34:43] [PASSED] Buffer object for userspace
[13:34:43] [PASSED] Kernel buffer object
[13:34:43] [PASSED] Shared buffer object
[13:34:43] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:34:43] [PASSED] ttm_bo_init_reserved_resv
[13:34:43] ================== ttm_bo_validate_basic  ==================
[13:34:43] [PASSED] Buffer object for userspace
[13:34:43] [PASSED] Kernel buffer object
[13:34:43] [PASSED] Shared buffer object
[13:34:43] ============== [PASSED] ttm_bo_validate_basic ==============
[13:34:43] [PASSED] ttm_bo_validate_invalid_placement
[13:34:43] ============= ttm_bo_validate_same_placement  ==============
[13:34:43] [PASSED] System manager
[13:34:43] [PASSED] VRAM manager
[13:34:43] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:34:43] [PASSED] ttm_bo_validate_failed_alloc
[13:34:43] [PASSED] ttm_bo_validate_pinned
[13:34:43] [PASSED] ttm_bo_validate_busy_placement
[13:34:43] ================ ttm_bo_validate_multihop  =================
[13:34:43] [PASSED] Buffer object for userspace
[13:34:43] [PASSED] Kernel buffer object
[13:34:43] [PASSED] Shared buffer object
[13:34:43] ============ [PASSED] ttm_bo_validate_multihop =============
[13:34:43] ========== ttm_bo_validate_no_placement_signaled  ==========
[13:34:43] [PASSED] Buffer object in system domain, no page vector
[13:34:43] [PASSED] Buffer object in system domain with an existing page vector
[13:34:43] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:34:43] ======== ttm_bo_validate_no_placement_not_signaled  ========
[13:34:43] [PASSED] Buffer object for userspace
[13:34:43] [PASSED] Kernel buffer object
[13:34:43] [PASSED] Shared buffer object
[13:34:43] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:34:43] [PASSED] ttm_bo_validate_move_fence_signaled
[13:34:44] ========= ttm_bo_validate_move_fence_not_signaled  =========
[13:34:44] [PASSED] Waits for GPU
[13:34:44] [PASSED] Tries to lock straight away
[13:34:44] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:34:44] [PASSED] ttm_bo_validate_happy_evict
[13:34:44] [PASSED] ttm_bo_validate_all_pinned_evict
[13:34:44] [PASSED] ttm_bo_validate_allowed_only_evict
[13:34:44] [PASSED] ttm_bo_validate_deleted_evict
[13:34:44] [PASSED] ttm_bo_validate_busy_domain_evict
[13:34:44] [PASSED] ttm_bo_validate_evict_gutting
[13:34:44] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[13:34:44] ================= [PASSED] ttm_bo_validate =================
[13:34:44] ============================================================
[13:34:44] Testing complete. Ran 101 tests: passed: 101
[13:34:44] Elapsed time: 11.444s total, 1.588s configuring, 9.640s building, 0.184s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Enable DP2.1 alpm (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2294 bytes --]

== Series Details ==

Series: Enable DP2.1 alpm (rev4)
URL   : https://patchwork.freedesktop.org/series/156416/
State : success

== Summary ==

CI Bug Log - changes from xe-4098-643055091beeceb59164e42ca982632505b66a13_BAT -> xe-pw-156416v4_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-156416v4_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@kms_flip@basic-plain-flip@b-edp1:
    - bat-adlp-7:         [DMESG-WARN][1] ([Intel XE#4543]) -> [PASS][2] +1 other test pass
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/bat-adlp-7/igt@kms_flip@basic-plain-flip@b-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/bat-adlp-7/igt@kms_flip@basic-plain-flip@b-edp1.html

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       [FAIL][3] ([Intel XE#6519]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/bat-dg2-oem2/igt@xe_waitfence@engine.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/bat-dg2-oem2/igt@xe_waitfence@engine.html

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [FAIL][5] ([Intel XE#6520]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520


Build changes
-------------

  * Linux: xe-4098-643055091beeceb59164e42ca982632505b66a13 -> xe-pw-156416v4

  IGT_8622: 8622
  xe-4098-643055091beeceb59164e42ca982632505b66a13: 643055091beeceb59164e42ca982632505b66a13
  xe-pw-156416v4: 156416v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/index.html

[-- Attachment #2: Type: text/html, Size: 2918 bytes --]

✓ Xe.CI.Full: success for Enable DP2.1 alpm (rev4)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 54414 bytes --]

== Series Details ==

Series: Enable DP2.1 alpm (rev4)
URL   : https://patchwork.freedesktop.org/series/156416/
State : success

== Summary ==

CI Bug Log - changes from xe-4098-643055091beeceb59164e42ca982632505b66a13_FULL -> xe-pw-156416v4_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-156416v4_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-bmg:          NOTRUN -> [SKIP][1] ([Intel XE#2370])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-adlp:         NOTRUN -> [SKIP][2] ([Intel XE#1124]) +1 other test skip
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@linear-32bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][3] ([Intel XE#2327]) +3 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_big_fb@linear-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][4] ([Intel XE#1124]) +7 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-adlp:         [PASS][5] -> [DMESG-FAIL][6] ([Intel XE#4543])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
    - shard-dg2-set2:     NOTRUN -> [SKIP][7] ([Intel XE#1124])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-466/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-adlp:         NOTRUN -> [SKIP][8] ([Intel XE#619])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#610])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
    - shard-bmg:          [PASS][10] -> [SKIP][11] ([Intel XE#2314] / [Intel XE#2894])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-7/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2314] / [Intel XE#2894])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html

  * igt@kms_bw@linear-tiling-1-displays-2560x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#367]) +1 other test skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-1920x1080p:
    - shard-adlp:         NOTRUN -> [SKIP][14] ([Intel XE#367])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_bw@linear-tiling-4-displays-1920x1080p.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
    - shard-adlp:         NOTRUN -> [SKIP][15] ([Intel XE#455] / [Intel XE#787]) +7 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][16] ([Intel XE#2907])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-466/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][17] ([Intel XE#787]) +11 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#3432])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2887]) +12 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [PASS][20] -> [INCOMPLETE][21] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4:
    - shard-dg2-set2:     [PASS][22] -> [INCOMPLETE][23] ([Intel XE#6168] / [i915#14968])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [PASS][24] -> [DMESG-WARN][25] ([Intel XE#1727] / [Intel XE#3113])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-b-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][27] ([Intel XE#787]) +13 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-466/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-b-dp-4.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][28] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-466/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-d-dp-4.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-adlp:         NOTRUN -> [SKIP][29] ([Intel XE#306])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_color@ctm-max:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#2325])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_chamelium_color@ctm-max.html

  * igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
    - shard-dg2-set2:     NOTRUN -> [SKIP][31] ([Intel XE#373])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-433/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html

  * igt@kms_chamelium_frames@dp-crc-multiple:
    - shard-adlp:         NOTRUN -> [SKIP][32] ([Intel XE#373]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_chamelium_frames@dp-crc-multiple.html

  * igt@kms_chamelium_frames@hdmi-crc-single:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2252]) +7 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_chamelium_frames@hdmi-crc-single.html

  * igt@kms_content_protection@content-type-change:
    - shard-adlp:         NOTRUN -> [SKIP][34] ([Intel XE#455]) +5 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_content_protection@content-type-change.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-adlp:         NOTRUN -> [SKIP][35] ([Intel XE#308])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#2320]) +2 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2321])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
    - shard-bmg:          [PASS][38] -> [SKIP][39] ([Intel XE#2291])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-1/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-6/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-adlp:         NOTRUN -> [SKIP][40] ([Intel XE#309])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#2286])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#4331])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_feature_discovery@display-2x:
    - shard-bmg:          [PASS][43] -> [SKIP][44] ([Intel XE#2373])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-7/igt@kms_feature_discovery@display-2x.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-6/igt@kms_feature_discovery@display-2x.html

  * igt@kms_feature_discovery@display-3x:
    - shard-adlp:         NOTRUN -> [SKIP][45] ([Intel XE#703])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@display-4x:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#1138])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@psr1:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2374])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_feature_discovery@psr1.html

  * igt@kms_flip@2x-absolute-wf_vblank:
    - shard-adlp:         NOTRUN -> [SKIP][48] ([Intel XE#310])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_flip@2x-absolute-wf_vblank.html

  * igt@kms_flip@2x-blocking-wf_vblank:
    - shard-bmg:          [PASS][49] -> [SKIP][50] ([Intel XE#2316]) +2 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-7/igt@kms_flip@2x-blocking-wf_vblank.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-6/igt@kms_flip@2x-blocking-wf_vblank.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [PASS][51] -> [FAIL][52] ([Intel XE#301]) +1 other test fail
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@d-hdmi-a1:
    - shard-adlp:         [PASS][53] -> [DMESG-WARN][54] ([Intel XE#4543]) +2 other tests dmesg-warn
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-6/igt@kms_flip@flip-vs-expired-vblank@d-hdmi-a1.html
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-6/igt@kms_flip@flip-vs-expired-vblank@d-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#2293] / [Intel XE#2380]) +3 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-dg2-set2:     NOTRUN -> [SKIP][56] ([Intel XE#455]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-433/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#2293]) +3 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#2311]) +20 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][59] ([Intel XE#6313])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#5390]) +5 other tests skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2352])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-plflip-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][62] ([Intel XE#651]) +4 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary:
    - shard-adlp:         NOTRUN -> [SKIP][63] ([Intel XE#651]) +3 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
    - shard-adlp:         NOTRUN -> [SKIP][64] ([Intel XE#653]) +3 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-adlp:         NOTRUN -> [SKIP][65] ([Intel XE#656]) +7 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@pipe-fbc-rte:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#5672])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#2313]) +23 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-move:
    - shard-dg2-set2:     NOTRUN -> [SKIP][68] ([Intel XE#653]) +3 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-move.html

  * igt@kms_hdr@static-swap:
    - shard-bmg:          [PASS][69] -> [SKIP][70] ([Intel XE#1503]) +1 other test skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-7/igt@kms_hdr@static-swap.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-6/igt@kms_hdr@static-swap.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#2927])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-bmg:          NOTRUN -> [SKIP][72] ([Intel XE#2501])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_pipe_stress@stress-xrgb8888-yftiled:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#5624])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_pipe_stress@stress-xrgb8888-yftiled.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-bmg:          [PASS][74] -> [SKIP][75] ([Intel XE#4596])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-4.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-adlp:         NOTRUN -> [SKIP][76] ([Intel XE#5020])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][77] ([Intel XE#1439] / [Intel XE#836])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
    - shard-adlp:         NOTRUN -> [SKIP][79] ([Intel XE#1406] / [Intel XE#1489]) +1 other test skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][80] ([Intel XE#1406] / [Intel XE#1489]) +4 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#1406] / [Intel XE#2387])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-pr-sprite-blt:
    - shard-adlp:         NOTRUN -> [SKIP][82] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_psr@fbc-pr-sprite-blt.html

  * igt@kms_psr@fbc-psr2-cursor-plane-move:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +10 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_psr@fbc-psr2-cursor-plane-move.html

  * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
    - shard-adlp:         NOTRUN -> [SKIP][84] ([Intel XE#1406] / [Intel XE#2939] / [Intel XE#5585])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html

  * igt@kms_rotation_crc@bad-pixel-format:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_rotation_crc@bad-pixel-format.html

  * igt@kms_sharpness_filter@invalid-filter-with-plane:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#6503]) +2 other tests skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@kms_sharpness_filter@invalid-filter-with-plane.html

  * igt@kms_universal_plane@cursor-fb-leak:
    - shard-bmg:          [PASS][87] -> [ABORT][88] ([Intel XE#3970]) +1 other test abort
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-8/igt@kms_universal_plane@cursor-fb-leak.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-7/igt@kms_universal_plane@cursor-fb-leak.html

  * igt@kms_universal_plane@disable-primary-vs-flip:
    - shard-adlp:         [PASS][89] -> [DMESG-WARN][90] ([Intel XE#2953] / [Intel XE#4173]) +2 other tests dmesg-warn
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-4/igt@kms_universal_plane@disable-primary-vs-flip.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-9/igt@kms_universal_plane@disable-primary-vs-flip.html

  * igt@kms_vrr@flip-basic:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#1499]) +1 other test skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@kms_vrr@flip-basic.html

  * igt@xe_ccs@block-multicopy-inplace:
    - shard-adlp:         NOTRUN -> [SKIP][92] ([Intel XE#455] / [Intel XE#488] / [Intel XE#5607])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_ccs@block-multicopy-inplace.html

  * igt@xe_copy_basic@mem-copy-linear-0x8fffe:
    - shard-dg2-set2:     NOTRUN -> [SKIP][93] ([Intel XE#5300])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-466/igt@xe_copy_basic@mem-copy-linear-0x8fffe.html

  * igt@xe_eudebug@basic-vm-bind:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#4837]) +8 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@xe_eudebug@basic-vm-bind.html

  * igt@xe_eudebug_online@single-step:
    - shard-adlp:         NOTRUN -> [SKIP][95] ([Intel XE#4837] / [Intel XE#5565]) +2 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_eudebug_online@single-step.html

  * igt@xe_evict@evict-cm-threads-large:
    - shard-adlp:         NOTRUN -> [SKIP][96] ([Intel XE#261]) +1 other test skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_evict@evict-cm-threads-large.html

  * igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen:
    - shard-adlp:         NOTRUN -> [SKIP][97] ([Intel XE#688])
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-mmap:
    - shard-adlp:         NOTRUN -> [SKIP][98] ([Intel XE#1392] / [Intel XE#5575]) +1 other test skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-mmap.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][99] ([Intel XE#2322]) +5 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_fault_mode@many-bindexecqueue-userptr-rebind:
    - shard-adlp:         NOTRUN -> [SKIP][100] ([Intel XE#288] / [Intel XE#5561]) +5 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_exec_fault_mode@many-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_fault_mode@many-userptr-rebind-imm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][101] ([Intel XE#288]) +1 other test skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-466/igt@xe_exec_fault_mode@many-userptr-rebind-imm.html

  * igt@xe_exec_system_allocator@many-64k-mmap-huge:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#5007])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-8/igt@xe_exec_system_allocator@many-64k-mmap-huge.html

  * igt@xe_exec_system_allocator@many-large-mmap-remap-ro:
    - shard-adlp:         NOTRUN -> [SKIP][103] ([Intel XE#4915]) +78 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_exec_system_allocator@many-large-mmap-remap-ro.html

  * igt@xe_exec_system_allocator@process-many-mmap-shared-remap-eocheck:
    - shard-dg2-set2:     NOTRUN -> [SKIP][104] ([Intel XE#4915]) +29 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-466/igt@xe_exec_system_allocator@process-many-mmap-shared-remap-eocheck.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-free-huge:
    - shard-bmg:          NOTRUN -> [SKIP][105] ([Intel XE#4943]) +17 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-free-huge.html

  * igt@xe_oa@mmio-triggered-reports:
    - shard-adlp:         NOTRUN -> [SKIP][106] ([Intel XE#3573]) +1 other test skip
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_oa@mmio-triggered-reports.html

  * igt@xe_pm@d3cold-basic:
    - shard-bmg:          NOTRUN -> [SKIP][107] ([Intel XE#2284])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@xe_pm@d3cold-basic.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-adlp:         NOTRUN -> [SKIP][108] ([Intel XE#2284] / [Intel XE#366])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0:
    - shard-lnl:          [PASS][109] -> [FAIL][110] ([Intel XE#6251])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-lnl-5/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-lnl-5/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_compute0.html

  * igt@xe_pxp@pxp-stale-queue-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][111] ([Intel XE#4733])
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-2/igt@xe_pxp@pxp-stale-queue-post-suspend.html

  * igt@xe_pxp@pxp-stale-queue-post-termination-irq:
    - shard-adlp:         NOTRUN -> [SKIP][112] ([Intel XE#4733] / [Intel XE#5594])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_pxp@pxp-stale-queue-post-termination-irq.html

  * igt@xe_query@multigpu-query-invalid-cs-cycles:
    - shard-adlp:         NOTRUN -> [SKIP][113] ([Intel XE#944])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_query@multigpu-query-invalid-cs-cycles.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random:
    - shard-adlp:         [PASS][114] -> [ABORT][115] ([Intel XE#5466] / [Intel XE#5545]) +1 other test abort
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-8/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-6/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html

  
#### Possible fixes ####

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-adlp:         [DMESG-FAIL][116] ([Intel XE#4543]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic:
    - shard-bmg:          [SKIP][118] ([Intel XE#2291]) -> [PASS][119]
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html

  * igt@kms_flip@2x-flip-vs-absolute-wf_vblank:
    - shard-bmg:          [SKIP][120] ([Intel XE#2316]) -> [PASS][121] +1 other test pass
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-6/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a6-dp4:
    - shard-dg2-set2:     [FAIL][122] ([Intel XE#301]) -> [PASS][123] +1 other test pass
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-dg2-435/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a6-dp4.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-436/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a6-dp4.html

  * igt@kms_flip@flip-vs-dpms-on-nop@b-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][124] ([Intel XE#4543]) -> [PASS][125] +3 other tests pass
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-1/igt@kms_flip@flip-vs-dpms-on-nop@b-hdmi-a1.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-4/igt@kms_flip@flip-vs-dpms-on-nop@b-hdmi-a1.html

  * igt@kms_flip@flip-vs-rmfb-interruptible:
    - shard-adlp:         [DMESG-WARN][126] ([Intel XE#4543] / [Intel XE#5208]) -> [PASS][127]
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-1/igt@kms_flip@flip-vs-rmfb-interruptible.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-1/igt@kms_flip@flip-vs-rmfb-interruptible.html

  * igt@kms_flip@flip-vs-suspend@c-dp4:
    - shard-dg2-set2:     [INCOMPLETE][128] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][129] +1 other test pass
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-dg2-463/igt@kms_flip@flip-vs-suspend@c-dp4.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-433/igt@kms_flip@flip-vs-suspend@c-dp4.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format@pipe-d:
    - shard-adlp:         [DMESG-WARN][130] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][131] +1 other test pass
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-2/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format@pipe-d.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-2/igt@kms_plane_scaling@plane-downscale-factor-0-75-with-pixel-format@pipe-d.html

  * igt@xe_gt_freq@freq_fixed_idle:
    - shard-dg2-set2:     [FAIL][132] ([Intel XE#6407]) -> [PASS][133]
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-dg2-466/igt@xe_gt_freq@freq_fixed_idle.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-dg2-432/igt@xe_gt_freq@freq_fixed_idle.html

  
#### Warnings ####

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [FAIL][134] ([Intel XE#4633]) -> [FAIL][135] ([Intel XE#5299])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move:
    - shard-bmg:          [SKIP][136] ([Intel XE#2312]) -> [SKIP][137] ([Intel XE#2311]) +3 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][138] ([Intel XE#5390]) -> [SKIP][139] ([Intel XE#2312]) +3 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][140] ([Intel XE#2312]) -> [SKIP][141] ([Intel XE#5390])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][142] ([Intel XE#2311]) -> [SKIP][143] ([Intel XE#2312]) +7 other tests skip
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][144] ([Intel XE#2312]) -> [SKIP][145] ([Intel XE#2313]) +3 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt:
    - shard-bmg:          [SKIP][146] ([Intel XE#2313]) -> [SKIP][147] ([Intel XE#2312]) +6 other tests skip
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][148] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][149] ([Intel XE#3544])
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-adlp:         [SKIP][150] ([Intel XE#734]) -> [FAIL][151] ([Intel XE#3325])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-9/igt@kms_pm_dc@dc9-dpms.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-8/igt@kms_pm_dc@dc9-dpms.html

  * igt@xe_module_load@load:
    - shard-adlp:         ([PASS][152], [SKIP][153], [PASS][154], [PASS][155], [PASS][156], [PASS][157], [PASS][158], [PASS][159], [PASS][160], [PASS][161], [PASS][162], [PASS][163], [PASS][164], [PASS][165], [PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [DMESG-WARN][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177]) ([Intel XE#2953] / [Intel XE#378] / [Intel XE#4173] / [Intel XE#5612]) -> ([PASS][178], [PASS][179], [PASS][180], [PASS][181], [PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [PASS][195], [PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [SKIP][201], [PASS][202], [PASS][203]) ([Intel XE#378] / [Intel XE#5612])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-4/igt@xe_module_load@load.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-3/igt@xe_module_load@load.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-2/igt@xe_module_load@load.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-2/igt@xe_module_load@load.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-2/igt@xe_module_load@load.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-2/igt@xe_module_load@load.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-3/igt@xe_module_load@load.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-3/igt@xe_module_load@load.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-3/igt@xe_module_load@load.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-3/igt@xe_module_load@load.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-1/igt@xe_module_load@load.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-4/igt@xe_module_load@load.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-1/igt@xe_module_load@load.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-1/igt@xe_module_load@load.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-6/igt@xe_module_load@load.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-6/igt@xe_module_load@load.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-6/igt@xe_module_load@load.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-8/igt@xe_module_load@load.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-8/igt@xe_module_load@load.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-8/igt@xe_module_load@load.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-9/igt@xe_module_load@load.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-4/igt@xe_module_load@load.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-6/igt@xe_module_load@load.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-4/igt@xe_module_load@load.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-9/igt@xe_module_load@load.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4098-643055091beeceb59164e42ca982632505b66a13/shard-adlp-9/igt@xe_module_load@load.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-4/igt@xe_module_load@load.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-2/igt@xe_module_load@load.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-2/igt@xe_module_load@load.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-2/igt@xe_module_load@load.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-2/igt@xe_module_load@load.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_module_load@load.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_module_load@load.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-8/igt@xe_module_load@load.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-1/igt@xe_module_load@load.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-9/igt@xe_module_load@load.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-9/igt@xe_module_load@load.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-6/igt@xe_module_load@load.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-6/igt@xe_module_load@load.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-9/igt@xe_module_load@load.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-8/igt@xe_module_load@load.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-8/igt@xe_module_load@load.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-9/igt@xe_module_load@load.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-6/igt@xe_module_load@load.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-6/igt@xe_module_load@load.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_module_load@load.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_module_load@load.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-4/igt@xe_module_load@load.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-4/igt@xe_module_load@load.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-3/igt@xe_module_load@load.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-1/igt@xe_module_load@load.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/shard-adlp-1/igt@xe_module_load@load.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
  [Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
  [Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
  [Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3325
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
  [Intel XE#5299]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5299
  [Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
  [Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5585]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5585
  [Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
  [Intel XE#5607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5607
  [Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
  [Intel XE#5624]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5624
  [Intel XE#5672]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5672
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
  [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
  [Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
  [Intel XE#6313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6313
  [Intel XE#6407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6407
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
  [Intel XE#734]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/734
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [i915#14968]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14968


Build changes
-------------

  * Linux: xe-4098-643055091beeceb59164e42ca982632505b66a13 -> xe-pw-156416v4

  IGT_8622: 8622
  xe-4098-643055091beeceb59164e42ca982632505b66a13: 643055091beeceb59164e42ca982632505b66a13
  xe-pw-156416v4: 156416v4

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156416v4/index.html

[-- Attachment #2: Type: text/html, Size: 62195 bytes --]

RE: [PATCH v4 05/10] drm/i915/alpm: Auxless wake time calculation for Xe3p

[Kandpal, Suraj]

> Subject: [PATCH v4 05/10] drm/i915/alpm: Auxless wake time calculation for
> Xe3p
> 
> Add support for auxless waketime calculation for DP2.1 ALPM as dependent
> parameter got changed.
> 
> v1: Initial version.
> v2: Use intel_dp_is_uhbr(). [Jani]
> 

Add Bspec no. here

> Cc: Jouni Högander <jouni.hogander@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c | 63 +++++++++++++++++++----
>  1 file changed, 53 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index b4b874dd3725..81472254ab73 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -100,23 +100,64 @@ static int get_lfps_half_cycle_clocks(const struct
> intel_crtc_state *crtc_state)
> 
>  static int get_tphy2_p2_to_p0(const struct intel_crtc_state *crtc_state)  {
> -	return 12 * 1000;
> +	struct intel_display *display = to_intel_display(crtc_state);
> +
> +	return DISPLAY_VER(display) >= 35 ? (40 * 1000) : (12 * 1000);
>  }
> 
> -static int get_establishment_period(const struct intel_crtc_state *crtc_state)
> +static int get_establishment_period(struct intel_dp *intel_dp,
> +				    const struct intel_crtc_state *crtc_state)
>  {
>  	int t1 = 50 * 1000;
> -	int tps4 = 252;
> +	int tps4 = intel_dp_is_uhbr(crtc_state) ? (396 * 32) : (252 * 10);
>  	/* port_clock is link rate in 10kbit/s units */
> -	int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state->port_clock;
> +	int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state->port_clock / 10;
> +	int lttpr_count = 0;
>  	int tcds, establishment_period;
> 
> -	tcds = (7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1) * tml_phy_lock;
> -	establishment_period = (SILENCE_PERIOD_TIME + t1 + tcds);
> +	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
> +		tcds = (7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1) *
> tml_phy_lock;
> +	} else {
> +		tcds = 7 * tml_phy_lock;
> +		lttpr_count = drm_dp_lttpr_count(intel_dp-
> >lttpr_common_caps);
> +	}
> +
> +	if (lttpr_count) {
> +		int tlw = 13000;
> +		int tcs = 10000;
> +		int tlfps_period = get_lfps_cycle_time(crtc_state);
> +		int tdcs = (SILENCE_PERIOD_TIME + t1 + tcs +
> +			    (lttpr_count - 1) * (tlw + tlfps_period));
> +		int tacds = 70000;
> +		int tds = (lttpr_count - 1) * 7 * tml_phy_lock;
> +
> +		/* tdrl is same as tcds*/
> +		establishment_period = tlw + tlfps_period + tdcs + tacds +
> tds + tcds;
> +	} else {
> +		/* TODO: Add a check for data realign by DPCD 0x116[3] */
> +
> +		establishment_period = (SILENCE_PERIOD_TIME + t1 + tcds);
> +	}
> 
>  	return establishment_period;
>  }
> 
> +static int get_switch_to_active(const struct intel_crtc_state
> +*crtc_state) {
> +	int port_clock = crtc_state->port_clock;
> +	int switch_to_active;

Make this switch_to_active = 0 that way the else block later is not required 

> +
> +	if (intel_dp_is_uhbr(crtc_state)) {
> +		int symbol_clock = port_clock /
> +intel_dp_link_symbol_size(port_clock);
> +
> +		switch_to_active = 32 * DIV_ROUND_UP((396 + 3 + 64),

I would like if you had 396 assigned as a variable ml_phy_lock_len

> symbol_clock);
> +	} else {
> +		switch_to_active = 0;
> +	}

Should you not take care of  the mst use case.

So the switch to active latency seems wrong here what you are calculating here is
T_switch_to_active = 32 * DIV_ROUND_UP((396 + 3 + 64),flink)
Switch_to_active_latency= CEIL(t_switch_to_active/t_line)
And this need to be written to ALPM_CTL2 which you are not doing see below comment.
Also you are not taking into account the fact that f_link is in MHZ and intel_dp_link_symbol_clock give value in kHZ so probably look into that too.
Still not sure how f_link is the intel_dp_link_symbol_clock can you explain that too?

> +
> +	return switch_to_active;
> +}
> +
>  /*
>   * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period, Max+
>   * tSilence, Max+ tPHY Establishment + tCDS) / tline) @@ -136,13 +177,15
> @@ static int get_establishment_period(const struct intel_crtc_state
> *crtc_state)
>   * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
>   * TPS4 Length = 252 Symbols
>   */

Lot of changes in this function and how we calculate data so the comment also needs to change here
To reflect those changes.


> -static int _lnl_
compute_aux_less_wake_time(const struct intel_crtc_state
> *crtc_state)
> +static int _lnl_compute_aux_less_wake_time(struct intel_dp *intel_dp,
> +					   const struct intel_crtc_state
> *crtc_state)
>  {
>  	int tphy2_p2_to_p0 = get_tphy2_p2_to_p0(crtc_state);
> -	int establishment_period = get_establishment_period(crtc_state);
> +	int establishment_period = get_establishment_period(intel_dp,
> crtc_state);
> +	int switch_to_active = get_switch_to_active(crtc_state);
> 
>  	return DIV_ROUND_UP(tphy2_p2_to_p0 +
> get_lfps_cycle_time(crtc_state) +
> -			    establishment_period, 1000);
> +			    establishment_period + switch_to_active, 1000);

I do not think you have to  add the switch to active latency here,
Switch to active latency a separate field in ALPM_CTL2 so you will have to write it
Which means you need to create another variable that you fill with switch to active latency.
H/w will internally maintain Aux Wake time + Switch to active latency.
I don't see you writing to ALPM_CTL2[Switch to Active time] here or anywhere else did you miss it?

Regards,
Suraj Kandpal

>  }
> 
>  static int
> @@ -154,7 +197,7 @@ _lnl_compute_aux_less_alpm_params(struct
> intel_dp *intel_dp,
>  		lfps_half_cycle;
> 
>  	aux_less_wake_time =
> -		_lnl_compute_aux_less_wake_time(crtc_state);
> +		_lnl_compute_aux_less_wake_time(intel_dp, crtc_state);
>  	aux_less_wake_lines = intel_usecs_to_scanlines(&crtc_state-
> >hw.adjusted_mode,
>  						       aux_less_wake_time);
>  	silence_period = get_silence_period_symbols(crtc_state);
> --
> 2.29.0

RE: [PATCH v4 07/10] drm/i915/alpm: Program LTTPR count for DP 2.1 ALPM

[Kandpal, Suraj]

> Subject: [PATCH v4 07/10] drm/i915/alpm: Program LTTPR count for DP 2.1
> ALPM
> 
> Issue a AUX write transaction to DPCD DP_TOTAL_LTTPR_CNT (0xf000a) with
> total number of LTTPR before link training.
> 
> v2: Cosmetic changes. [Suraj]
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  .../drm/i915/display/intel_dp_link_training.c    | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index aad5fe14962f..d694c2474159 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -1624,6 +1624,20 @@ intel_dp_128b132b_link_train(struct intel_dp
> *intel_dp,
>  	return passed;
>  }
> 
> +static void intel_dp_update_lttpr_count(struct intel_dp *intel_dp,
> +					int lttpr_count)
> +{
> +	/*
> +	 * Program only for DP2.1 and return if LTTPR revison is less than 0x20
> +	 * where 0:3 represents minor rev and 4:7 represent major rev
> +	 */
> +	if (!intel_dp_is_edp(intel_dp) ||
> +	    intel_dp->lttpr_common_caps[0] <= 0x20)
> +		return;
> +
> +	drm_dp_dpcd_writeb(&intel_dp->aux, DP_TOTAL_LTTPR_CNT,
> lttpr_count); }


You need to be writing to ALPM_CTL2[Number_of_LTTPR] at some point to which is not being done anywhere
I think this needs a second look too.

Regards,
Suraj Kandpal

> +
>  /**
>   * intel_dp_start_link_train - start link training
>   * @state: Atomic state
> @@ -1660,6 +1674,8 @@ void intel_dp_start_link_train(struct
> intel_atomic_state *state,
> 
>  	intel_dp_prepare_link_train(intel_dp, crtc_state);
> 
> +	intel_dp_update_lttpr_count(intel_dp, lttpr_count);
> +
>  	if (intel_dp_is_uhbr(crtc_state))
>  		passed = intel_dp_128b132b_link_train(intel_dp, crtc_state,
> lttpr_count);
>  	else
> --
> 2.29.0

RE: [PATCH v4 06/10] drm/i915/alpm: Half LFPS cycle calculation

[Kandpal, Suraj]

> Subject: [PATCH v4 06/10] drm/i915/alpm: Half LFPS cycle calculation
> 
> Add support for half LFPS cycle calculation for DP2.1 ALPM as dependent
> parameters got changed.
> 
> v1: Initial version.
> v2: Avoid returning early. [Jani]
> v3: Use intel_crtc_has_type(). [Suraj]
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c | 18 +++++++++++++-----
>  1 file changed, 13 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 81472254ab73..33620f95ecc5 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -73,12 +73,20 @@ static int get_silence_period_symbols(const struct
> intel_crtc_state *crtc_state)  static void get_lfps_cycle_min_max_time(const
> struct intel_crtc_state *crtc_state,
>  					int *min, int *max)
>  {
> -	if (crtc_state->port_clock < 540000) {
> -		*min = 65 * LFPS_CYCLE_COUNT;
> -		*max = 75 * LFPS_CYCLE_COUNT;
> +	struct intel_display *display = to_intel_display(crtc_state);
> +
> +	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
> +		if (crtc_state->port_clock < 540000) {
> +			*min = DISPLAY_VER(display) < 35 ? 65 *
> LFPS_CYCLE_COUNT : 140;
> +			*max = DISPLAY_VER(display) < 35 ? 75 *
> LFPS_CYCLE_COUNT : 800;
> +		} else {
> +			*min = 140;
> +			*max = 800;
> +		}
>  	} else {
> -		*min = 140;
> -		*max = 800;
> +		*min = 320;
> +		*max = 1600;
> +		return;
>  	}


This can be just 
struct intel_display *display = to_intel_display(crtc_state);

*min = 140;
*max= 180;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
	if (crtc_state->port_clock < 540000 && DISPLAY_VER < 540000) {
		*min = 65 * LFPS_CYCLE_COUNT ;
 		*max = 75 * LFPS_CYCLE_COUNT;
  	} else {
		*min = 320;
		*max = 1600;
		return;
  	}

Regards,
Suraj Kandpal

> 
> --
> 2.29.0

Re: [PATCH v4 02/10] drm/i915/alpm: alpm_init() for DP2.1

[Jani Nikula]

On Thu, 13 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> Initialize ALPM for DP2.1 and separate out ALPM mutex-init
> from alpm-init.

I thought I said you're going to need multiple init functions. Don't
move the alpm mutex init away from alpm code. It needs to stay in alpm
code.

And now the whole patch and subject and commit message talk of
completely different things.

Please read the review comments, and ask questions if they comments are
not clear.

BR,
Jani.


>
> v2: Separate out mutex-init. [Jani]
> v3: Refactor further to avoid DISPLAY_VER check in multiple places. [Jani]
> V4: Cosmetic changes. [Suraj]
>
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c | 16 ++++++++++++++--
>  drivers/gpu/drm/i915/display/intel_alpm.h |  3 ++-
>  drivers/gpu/drm/i915/display/intel_dp.c   |  8 +++++++-
>  3 files changed, 23 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 6372f533f65b..14acd6717e59 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -41,7 +41,20 @@ bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp,
>  		(crtc_state->has_lobf && intel_alpm_aux_less_wake_supported(intel_dp));
>  }
>  
> -void intel_alpm_init(struct intel_dp *intel_dp)
> +bool intel_alpm_source_supported(struct intel_connector *connector)
> +{
> +	struct intel_display *display = to_intel_display(connector);
> +
> +	if (!((connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
> +	       DISPLAY_VER(display) >= 35) ||
> +	    (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
> +	     DISPLAY_VER(display) >= 20)))
> +		return false;
> +
> +	return true;
> +}
> +
> +void intel_alpm_get_sink_capability(struct intel_dp *intel_dp)
>  {
>  	u8 dpcd;
>  
> @@ -49,7 +62,6 @@ void intel_alpm_init(struct intel_dp *intel_dp)
>  		return;
>  
>  	intel_dp->alpm_dpcd = dpcd;
> -	mutex_init(&intel_dp->alpm.lock);
>  }
>  
>  static int get_silence_period_symbols(const struct intel_crtc_state *crtc_state)
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h
> index 53599b464dea..bcc354a46a1d 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> @@ -15,7 +15,8 @@ struct intel_connector;
>  struct intel_atomic_state;
>  struct intel_crtc;
>  
> -void intel_alpm_init(struct intel_dp *intel_dp);
> +bool intel_alpm_source_supported(struct intel_connector *connector);
> +void intel_alpm_get_sink_capability(struct intel_dp *intel_dp);
>  bool intel_alpm_compute_params(struct intel_dp *intel_dp,
>  			       struct intel_crtc_state *crtc_state);
>  void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0ec82fcbcf48..81dd5bf7e3c5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -6074,6 +6074,9 @@ intel_dp_detect(struct drm_connector *_connector,
>  	if (ret == 1)
>  		connector->base.epoch_counter++;
>  
> +	if (intel_alpm_source_supported(connector))
> +		intel_alpm_get_sink_capability(intel_dp);
> +
>  	if (!intel_dp_is_edp(intel_dp))
>  		intel_psr_init_dpcd(intel_dp);
>  
> @@ -6716,7 +6719,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
>  	 */
>  	intel_hpd_enable_detection(encoder);
>  
> -	intel_alpm_init(intel_dp);
> +	intel_alpm_get_sink_capability(intel_dp);
>  
>  	/* Cache DPCD and EDID for edp. */
>  	has_dpcd = intel_edp_init_dpcd(intel_dp, connector);
> @@ -6932,6 +6935,9 @@ intel_dp_init_connector(struct intel_digital_port *dig_port,
>  
>  	intel_psr_init(intel_dp);
>  
> +	if (intel_alpm_source_supported(connector))
> +		mutex_init(&intel_dp->alpm.lock);
> +
>  	return true;
>  
>  fail:

-- 
Jani Nikula, Intel

RE: [PATCH v4 06/10] drm/i915/alpm: Half LFPS cycle calculation

[Kandpal, Suraj]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Kandpal, Suraj
> Sent: Monday, November 17, 2025 3:16 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org; dri-
> devel@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>
> Subject: RE: [PATCH v4 06/10] drm/i915/alpm: Half LFPS cycle calculation
> 
> > Subject: [PATCH v4 06/10] drm/i915/alpm: Half LFPS cycle calculation
> >
> > Add support for half LFPS cycle calculation for DP2.1 ALPM as
> > dependent parameters got changed.
> >
> > v1: Initial version.
> > v2: Avoid returning early. [Jani]
> > v3: Use intel_crtc_has_type(). [Suraj]
> >
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Also I did not find a correct place where this comment can be added hence commenting it here
I think you have missed LFPS Cycle count calculation and modification to the register bits
Have a look at that

Bspec: 71477

Regards,
Suraj Kandpal

> > ---
> >  drivers/gpu/drm/i915/display/intel_alpm.c | 18 +++++++++++++-----
> >  1 file changed, 13 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index 81472254ab73..33620f95ecc5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -73,12 +73,20 @@ static int get_silence_period_symbols(const struct
> > intel_crtc_state *crtc_state)  static void
> > get_lfps_cycle_min_max_time(const struct intel_crtc_state *crtc_state,
> >  					int *min, int *max)
> >  {
> > -	if (crtc_state->port_clock < 540000) {
> > -		*min = 65 * LFPS_CYCLE_COUNT;
> > -		*max = 75 * LFPS_CYCLE_COUNT;
> > +	struct intel_display *display = to_intel_display(crtc_state);
> > +
> > +	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
> > +		if (crtc_state->port_clock < 540000) {
> > +			*min = DISPLAY_VER(display) < 35 ? 65 *
> > LFPS_CYCLE_COUNT : 140;
> > +			*max = DISPLAY_VER(display) < 35 ? 75 *
> > LFPS_CYCLE_COUNT : 800;
> > +		} else {
> > +			*min = 140;
> > +			*max = 800;
> > +		}
> >  	} else {
> > -		*min = 140;
> > -		*max = 800;
> > +		*min = 320;
> > +		*max = 1600;
> > +		return;
> >  	}
> 
> 
> This can be just
> struct intel_display *display = to_intel_display(crtc_state);
> 
> *min = 140;
> *max= 180;
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
> 	if (crtc_state->port_clock < 540000 && DISPLAY_VER < 540000) {
> 		*min = 65 * LFPS_CYCLE_COUNT ;
>  		*max = 75 * LFPS_CYCLE_COUNT;
>   	} else {
> 		*min = 320;
> 		*max = 1600;
> 		return;
>   	}
> 
> Regards,
> Suraj Kandpal
> 
> >
> > --
> > 2.29.0

RE: [PATCH v4 05/10] drm/i915/alpm: Auxless wake time calculation for Xe3p

[Kandpal, Suraj]

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of
> Kandpal, Suraj
> Sent: Monday, November 17, 2025 2:50 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org; dri-
> devel@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>
> Subject: RE: [PATCH v4 05/10] drm/i915/alpm: Auxless wake time calculation
> for Xe3p
> 
> > Subject: [PATCH v4 05/10] drm/i915/alpm: Auxless wake time calculation
> > for Xe3p
> >
> > Add support for auxless waketime calculation for DP2.1 ALPM as
> > dependent parameter got changed.
> >
> > v1: Initial version.
> > v2: Use intel_dp_is_uhbr(). [Jani]
> >
> 
> Add Bspec no. here
> 
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_alpm.c | 63
> > +++++++++++++++++++----
> >  1 file changed, 53 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index b4b874dd3725..81472254ab73 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -100,23 +100,64 @@ static int get_lfps_half_cycle_clocks(const
> > struct intel_crtc_state *crtc_state)
> >
> >  static int get_tphy2_p2_to_p0(const struct intel_crtc_state *crtc_state)  {
> > -	return 12 * 1000;
> > +	struct intel_display *display = to_intel_display(crtc_state);
> > +
> > +	return DISPLAY_VER(display) >= 35 ? (40 * 1000) : (12 * 1000);
> >  }
> >
> > -static int get_establishment_period(const struct intel_crtc_state
> > *crtc_state)
> > +static int get_establishment_period(struct intel_dp *intel_dp,
> > +				    const struct intel_crtc_state *crtc_state)
> >  {
> >  	int t1 = 50 * 1000;
> > -	int tps4 = 252;
> > +	int tps4 = intel_dp_is_uhbr(crtc_state) ? (396 * 32) : (252 * 10);

Also I see 396 is used at more places than 1 so maybe we can have a define for it
ML_PHY_LOCK_LEN 

> >  	/* port_clock is link rate in 10kbit/s units */
> > -	int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state->port_clock;
> > +	int tml_phy_lock = 1000 * 1000 * tps4 / crtc_state->port_clock / 10;
> > +	int lttpr_count = 0;
> >  	int tcds, establishment_period;
> >
> > -	tcds = (7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1) * tml_phy_lock;
> > -	establishment_period = (SILENCE_PERIOD_TIME + t1 + tcds);
> > +	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) {
> > +		tcds = (7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1) *
> > tml_phy_lock;
> > +	} else {
> > +		tcds = 7 * tml_phy_lock;
> > +		lttpr_count = drm_dp_lttpr_count(intel_dp-
> > >lttpr_common_caps);
> > +	}
> > +
> > +	if (lttpr_count) {
> > +		int tlw = 13000;
> > +		int tcs = 10000;
> > +		int tlfps_period = get_lfps_cycle_time(crtc_state);
> > +		int tdcs = (SILENCE_PERIOD_TIME + t1 + tcs +
> > +			    (lttpr_count - 1) * (tlw + tlfps_period));
> > +		int tacds = 70000;
> > +		int tds = (lttpr_count - 1) * 7 * tml_phy_lock;
> > +
> > +		/* tdrl is same as tcds*/
> > +		establishment_period = tlw + tlfps_period + tdcs + tacds +
> > tds + tcds;
> > +	} else {
> > +		/* TODO: Add a check for data realign by DPCD 0x116[3] */
> > +
> > +		establishment_period = (SILENCE_PERIOD_TIME + t1 + tcds);
> > +	}
> >
> >  	return establishment_period;
> >  }
> >
> > +static int get_switch_to_active(const struct intel_crtc_state
> > +*crtc_state) {
> > +	int port_clock = crtc_state->port_clock;
> > +	int switch_to_active;
> 
> Make this switch_to_active = 0 that way the else block later is not required
> 
> > +
> > +	if (intel_dp_is_uhbr(crtc_state)) {
> > +		int symbol_clock = port_clock /
> > +intel_dp_link_symbol_size(port_clock);
> > +
> > +		switch_to_active = 32 * DIV_ROUND_UP((396 + 3 + 64),
> 
> I would like if you had 396 assigned as a variable ml_phy_lock_len
> 
> > symbol_clock);
> > +	} else {
> > +		switch_to_active = 0;
> > +	}
> 
> Should you not take care of  the mst use case.
> 
> So the switch to active latency seems wrong here what you are calculating
> here is T_switch_to_active = 32 * DIV_ROUND_UP((396 + 3 + 64),flink)
> Switch_to_active_latency= CEIL(t_switch_to_active/t_line) And this need to
> be written to ALPM_CTL2 which you are not doing see below comment.
> Also you are not taking into account the fact that f_link is in MHZ and
> intel_dp_link_symbol_clock give value in kHZ so probably look into that too.
> Still not sure how f_link is the intel_dp_link_symbol_clock can you explain that
> too?
> 
> > +
> > +	return switch_to_active;
> > +}
> > +
> >  /*
> >   * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period, Max+
> >   * tSilence, Max+ tPHY Establishment + tCDS) / tline) @@ -136,13
> > +177,15 @@ static int get_establishment_period(const struct
> > intel_crtc_state
> > *crtc_state)
> >   * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
> >   * TPS4 Length = 252 Symbols
> >   */
> 
> Lot of changes in this function and how we calculate data so the comment also
> needs to change here To reflect those changes.
> 
> 
> > -static int _lnl_
> compute_aux_less_wake_time(const struct intel_crtc_state
> > *crtc_state)
> > +static int _lnl_compute_aux_less_wake_time(struct intel_dp *intel_dp,
> > +					   const struct intel_crtc_state
> > *crtc_state)

You also seem to have missed the addition of register bits auxless wake time extension in ALPM_CLT2 and
Updation of Auxless wake time in APLM_CTL and the corresponding checks that you need to do to determine what needs
To be written.
There are also some other register bit in ALPM_CTL that need updation or redefinition of how the value in them is written.
Have a look
AUX_LESS_SLEEP_HOLD_TIME
ALPM_ENTRY_CHECK
AUX_LESS_WAKE_TIME

Regards,
Suraj Kandpal

> >  {
> >  	int tphy2_p2_to_p0 = get_tphy2_p2_to_p0(crtc_state);
> > -	int establishment_period = get_establishment_period(crtc_state);
> > +	int establishment_period = get_establishment_period(intel_dp,
> > crtc_state);
> > +	int switch_to_active = get_switch_to_active(crtc_state);
> >
> >  	return DIV_ROUND_UP(tphy2_p2_to_p0 +
> > get_lfps_cycle_time(crtc_state) +
> > -			    establishment_period, 1000);
> > +			    establishment_period + switch_to_active, 1000);
> 
> I do not think you have to  add the switch to active latency here, Switch to
> active latency a separate field in ALPM_CTL2 so you will have to write it
> Which means you need to create another variable that you fill with switch to
> active latency.
> H/w will internally maintain Aux Wake time + Switch to active latency.
> I don't see you writing to ALPM_CTL2[Switch to Active time] here or
> anywhere else did you miss it?
> 
> Regards,
> Suraj Kandpal
> 
> >  }
> >
> >  static int
> > @@ -154,7 +197,7 @@ _lnl_compute_aux_less_alpm_params(struct
> > intel_dp *intel_dp,
> >  		lfps_half_cycle;
> >
> >  	aux_less_wake_time =
> > -		_lnl_compute_aux_less_wake_time(crtc_state);
> > +		_lnl_compute_aux_less_wake_time(intel_dp, crtc_state);
> >  	aux_less_wake_lines = intel_usecs_to_scanlines(&crtc_state-
> > >hw.adjusted_mode,
> >  						       aux_less_wake_time);
> >  	silence_period = get_silence_period_symbols(crtc_state);
> > --
> > 2.29.0

RE: [PATCH v4 02/10] drm/i915/alpm: alpm_init() for DP2.1

[Manna, Animesh]

> -----Original Message-----
> From: Nikula, Jani <jani.nikula@intel.com>
> Sent: Monday, November 17, 2025 8:59 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org; dri-
> devel@lists.freedesktop.org
> Cc: Kandpal, Suraj <suraj.kandpal@intel.com>; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>
> Subject: Re: [PATCH v4 02/10] drm/i915/alpm: alpm_init() for DP2.1
> 
> On Thu, 13 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> > Initialize ALPM for DP2.1 and separate out ALPM mutex-init from
> > alpm-init.
> 
> I thought I said you're going to need multiple init functions. Don't move the
> alpm mutex init away from alpm code. It needs to stay in alpm code.

Only for mutex-init do you want me to add a separate function?

> 
> And now the whole patch and subject and commit message talk of
> completely different things.

Earlier alpm is initialized for EDP only, now its extended for DP2.1 in this patch.
Earlier mutex init is part of alpm-init. Now after feedback I also felt it can be separate out because reading dpcd always not possible if the display is disconnected for dp-connector but mutex-init can be done.
So mentioned as separate out ALPM mutex-init from alpm-init().

> 
> Please read the review comments, and ask questions if they comments are
> not clear.

Currently I am little confused, need change in code or commit description. From here onwards if you can point out some specific change will modify accordingly in next version.

Regards,
Animesh 

> 
> BR,
> Jani.
> 
> 
> >
> > v2: Separate out mutex-init. [Jani]
> > v3: Refactor further to avoid DISPLAY_VER check in multiple places.
> > [Jani]
> > V4: Cosmetic changes. [Suraj]
> >
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_alpm.c | 16 ++++++++++++++--
> > drivers/gpu/drm/i915/display/intel_alpm.h |  3 ++-
> >  drivers/gpu/drm/i915/display/intel_dp.c   |  8 +++++++-
> >  3 files changed, 23 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> > b/drivers/gpu/drm/i915/display/intel_alpm.c
> > index 6372f533f65b..14acd6717e59 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> > @@ -41,7 +41,20 @@ bool intel_alpm_is_alpm_aux_less(struct intel_dp
> *intel_dp,
> >  		(crtc_state->has_lobf &&
> > intel_alpm_aux_less_wake_supported(intel_dp));
> >  }
> >
> > -void intel_alpm_init(struct intel_dp *intel_dp)
> > +bool intel_alpm_source_supported(struct intel_connector *connector) {
> > +	struct intel_display *display = to_intel_display(connector);
> > +
> > +	if (!((connector->base.connector_type ==
> DRM_MODE_CONNECTOR_DisplayPort &&
> > +	       DISPLAY_VER(display) >= 35) ||
> > +	    (connector->base.connector_type ==
> DRM_MODE_CONNECTOR_eDP &&
> > +	     DISPLAY_VER(display) >= 20)))
> > +		return false;
> > +
> > +	return true;
> > +}
> > +
> > +void intel_alpm_get_sink_capability(struct intel_dp *intel_dp)
> >  {
> >  	u8 dpcd;
> >
> > @@ -49,7 +62,6 @@ void intel_alpm_init(struct intel_dp *intel_dp)
> >  		return;
> >
> >  	intel_dp->alpm_dpcd = dpcd;
> > -	mutex_init(&intel_dp->alpm.lock);
> >  }
> >
> >  static int get_silence_period_symbols(const struct intel_crtc_state
> > *crtc_state) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h
> > b/drivers/gpu/drm/i915/display/intel_alpm.h
> > index 53599b464dea..bcc354a46a1d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_alpm.h
> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
> > @@ -15,7 +15,8 @@ struct intel_connector;  struct intel_atomic_state;
> > struct intel_crtc;
> >
> > -void intel_alpm_init(struct intel_dp *intel_dp);
> > +bool intel_alpm_source_supported(struct intel_connector *connector);
> > +void intel_alpm_get_sink_capability(struct intel_dp *intel_dp);
> >  bool intel_alpm_compute_params(struct intel_dp *intel_dp,
> >  			       struct intel_crtc_state *crtc_state);  void
> > intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, diff --git
> > a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 0ec82fcbcf48..81dd5bf7e3c5 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -6074,6 +6074,9 @@ intel_dp_detect(struct drm_connector
> *_connector,
> >  	if (ret == 1)
> >  		connector->base.epoch_counter++;
> >
> > +	if (intel_alpm_source_supported(connector))
> > +		intel_alpm_get_sink_capability(intel_dp);
> > +
> >  	if (!intel_dp_is_edp(intel_dp))
> >  		intel_psr_init_dpcd(intel_dp);
> >
> > @@ -6716,7 +6719,7 @@ static bool intel_edp_init_connector(struct
> intel_dp *intel_dp,
> >  	 */
> >  	intel_hpd_enable_detection(encoder);
> >
> > -	intel_alpm_init(intel_dp);
> > +	intel_alpm_get_sink_capability(intel_dp);
> >
> >  	/* Cache DPCD and EDID for edp. */
> >  	has_dpcd = intel_edp_init_dpcd(intel_dp, connector); @@ -6932,6
> > +6935,9 @@ intel_dp_init_connector(struct intel_digital_port
> > *dig_port,
> >
> >  	intel_psr_init(intel_dp);
> >
> > +	if (intel_alpm_source_supported(connector))
> > +		mutex_init(&intel_dp->alpm.lock);
> > +
> >  	return true;
> >
> >  fail:
> 
> --
> Jani Nikula, Intel

RE: [PATCH v4 02/10] drm/i915/alpm: alpm_init() for DP2.1

[Jani Nikula]

On Tue, 18 Nov 2025, "Manna, Animesh" <animesh.manna@intel.com> wrote:
>> -----Original Message-----
>> From: Nikula, Jani <jani.nikula@intel.com>
>> Sent: Monday, November 17, 2025 8:59 PM
>> To: Manna, Animesh <animesh.manna@intel.com>; intel-
>> gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org; dri-
>> devel@lists.freedesktop.org
>> Cc: Kandpal, Suraj <suraj.kandpal@intel.com>; Manna, Animesh
>> <animesh.manna@intel.com>; Hogander, Jouni
>> <jouni.hogander@intel.com>
>> Subject: Re: [PATCH v4 02/10] drm/i915/alpm: alpm_init() for DP2.1
>> 
>> On Thu, 13 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
>> > Initialize ALPM for DP2.1 and separate out ALPM mutex-init from
>> > alpm-init.
>> 
>> I thought I said you're going to need multiple init functions. Don't move the
>> alpm mutex init away from alpm code. It needs to stay in alpm code.
>
> Only for mutex-init do you want me to add a separate function?

Yes, I absolutely do.

It's not about how small or big something is, it's about the
organization of the code. All things alpm should be in
intel_alpm.[ch]. We also have alpm sub-struct in struct intel_dp; as a
rule of thumb only intel_alpm.[ch] should touch stuff in that
sub-struct.

This also sets the example of what to do next, and where to add stuff
next. If you have the mutex init in intel_dp.c, if more init is needed
later, it'll also get added in intel_dp.c, intead of intel_alpm.c where
it belongs.

>> And now the whole patch and subject and commit message talk of
>> completely different things.
>
> Earlier alpm is initialized for EDP only, now its extended for DP2.1 in this patch.
> Earlier mutex init is part of alpm-init. Now after feedback I also felt it can be separate out because reading dpcd always not possible if the display is disconnected for dp-connector but mutex-init can be done.
> So mentioned as separate out ALPM mutex-init from alpm-init().
>
>> 
>> Please read the review comments, and ask questions if they comments are
>> not clear.
>
> Currently I am little confused, need change in code or commit description. From here onwards if you can point out some specific change will modify accordingly in next version.

As the first thing, I think you should add a function such as
intel_alpm_init_dpcd(), and move the DPCD parts of intel_alpm_init()
there. The mutex init should remain in
intel_alpm_init(). intel_alpm_init_dpcd() should be called from
intel_edp_init_dpcd().

That's it, that's the first thing. Don't add anything more. The commit
message should of course describe those changes. It should be all
non-functional, no addition of new platform checks or anything.

The next part would be moving intel_alpm_init() to be done for all DP,
not just eDP, and calling intel_alpm_init_dpcd() also from
intel_dp_detect_dpcd(), where supported.

Small incremental things, one thing at a time.

BR,
Jani.





>
> Regards,
> Animesh 
>
>> 
>> BR,
>> Jani.
>> 
>> 
>> >
>> > v2: Separate out mutex-init. [Jani]
>> > v3: Refactor further to avoid DISPLAY_VER check in multiple places.
>> > [Jani]
>> > V4: Cosmetic changes. [Suraj]
>> >
>> > Cc: Jouni Högander <jouni.hogander@intel.com>
>> > Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
>> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/display/intel_alpm.c | 16 ++++++++++++++--
>> > drivers/gpu/drm/i915/display/intel_alpm.h |  3 ++-
>> >  drivers/gpu/drm/i915/display/intel_dp.c   |  8 +++++++-
>> >  3 files changed, 23 insertions(+), 4 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
>> > b/drivers/gpu/drm/i915/display/intel_alpm.c
>> > index 6372f533f65b..14acd6717e59 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_alpm.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
>> > @@ -41,7 +41,20 @@ bool intel_alpm_is_alpm_aux_less(struct intel_dp
>> *intel_dp,
>> >  		(crtc_state->has_lobf &&
>> > intel_alpm_aux_less_wake_supported(intel_dp));
>> >  }
>> >
>> > -void intel_alpm_init(struct intel_dp *intel_dp)
>> > +bool intel_alpm_source_supported(struct intel_connector *connector) {
>> > +	struct intel_display *display = to_intel_display(connector);
>> > +
>> > +	if (!((connector->base.connector_type ==
>> DRM_MODE_CONNECTOR_DisplayPort &&
>> > +	       DISPLAY_VER(display) >= 35) ||
>> > +	    (connector->base.connector_type ==
>> DRM_MODE_CONNECTOR_eDP &&
>> > +	     DISPLAY_VER(display) >= 20)))
>> > +		return false;
>> > +
>> > +	return true;
>> > +}
>> > +
>> > +void intel_alpm_get_sink_capability(struct intel_dp *intel_dp)
>> >  {
>> >  	u8 dpcd;
>> >
>> > @@ -49,7 +62,6 @@ void intel_alpm_init(struct intel_dp *intel_dp)
>> >  		return;
>> >
>> >  	intel_dp->alpm_dpcd = dpcd;
>> > -	mutex_init(&intel_dp->alpm.lock);
>> >  }
>> >
>> >  static int get_silence_period_symbols(const struct intel_crtc_state
>> > *crtc_state) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h
>> > b/drivers/gpu/drm/i915/display/intel_alpm.h
>> > index 53599b464dea..bcc354a46a1d 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_alpm.h
>> > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h
>> > @@ -15,7 +15,8 @@ struct intel_connector;  struct intel_atomic_state;
>> > struct intel_crtc;
>> >
>> > -void intel_alpm_init(struct intel_dp *intel_dp);
>> > +bool intel_alpm_source_supported(struct intel_connector *connector);
>> > +void intel_alpm_get_sink_capability(struct intel_dp *intel_dp);
>> >  bool intel_alpm_compute_params(struct intel_dp *intel_dp,
>> >  			       struct intel_crtc_state *crtc_state);  void
>> > intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, diff --git
>> > a/drivers/gpu/drm/i915/display/intel_dp.c
>> > b/drivers/gpu/drm/i915/display/intel_dp.c
>> > index 0ec82fcbcf48..81dd5bf7e3c5 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> > @@ -6074,6 +6074,9 @@ intel_dp_detect(struct drm_connector
>> *_connector,
>> >  	if (ret == 1)
>> >  		connector->base.epoch_counter++;
>> >
>> > +	if (intel_alpm_source_supported(connector))
>> > +		intel_alpm_get_sink_capability(intel_dp);
>> > +
>> >  	if (!intel_dp_is_edp(intel_dp))
>> >  		intel_psr_init_dpcd(intel_dp);
>> >
>> > @@ -6716,7 +6719,7 @@ static bool intel_edp_init_connector(struct
>> intel_dp *intel_dp,
>> >  	 */
>> >  	intel_hpd_enable_detection(encoder);
>> >
>> > -	intel_alpm_init(intel_dp);
>> > +	intel_alpm_get_sink_capability(intel_dp);
>> >
>> >  	/* Cache DPCD and EDID for edp. */
>> >  	has_dpcd = intel_edp_init_dpcd(intel_dp, connector); @@ -6932,6
>> > +6935,9 @@ intel_dp_init_connector(struct intel_digital_port
>> > *dig_port,
>> >
>> >  	intel_psr_init(intel_dp);
>> >
>> > +	if (intel_alpm_source_supported(connector))
>> > +		mutex_init(&intel_dp->alpm.lock);
>> > +
>> >  	return true;
>> >
>> >  fail:
>> 
>> --
>> Jani Nikula, Intel

-- 
Jani Nikula, Intel