Re: [PATCH 1/2] drm/i915/dp: Fix pipe BPP clamping due to HDR

["Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>]

On 2/6/2026 4:12 PM, Imre Deak wrote:
> The pipe BPP value shouldn't be set outside of the source's / sink's
> valid pipe BPP range, ensure this when increasing the minimum pipe BPP
> value to 30 due to HDR.
>
> Fixes: ba49a4643cf53 ("drm/i915/dp: Set min_bpp limit to 30 in HDR mode")
> Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Cc: <stable@vger.kernel.org> # v6.18+
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_dp.c | 14 ++++++++++++--
>   1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2b8f43e211741..4d8f480cf803f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2697,6 +2697,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
>   			       bool dsc,
>   			       struct link_config_limits *limits)
>   {
> +	struct intel_display *display = to_intel_display(intel_dp);
>   	bool is_mst = intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST);
>   	struct intel_connector *connector =
>   		to_intel_connector(conn_state->connector);
> @@ -2709,8 +2710,7 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
>   	limits->min_lane_count = intel_dp_min_lane_count(intel_dp);
>   	limits->max_lane_count = intel_dp_max_lane_count(intel_dp);
>   
> -	limits->pipe.min_bpp = intel_dp_in_hdr_mode(conn_state) ? 30 :
> -				intel_dp_min_bpp(crtc_state->output_format);
> +	limits->pipe.min_bpp = intel_dp_min_bpp(crtc_state->output_format);
>   	if (is_mst) {
>   		/*
>   		 * FIXME: If all the streams can't fit into the link with their
> @@ -2726,6 +2726,16 @@ intel_dp_compute_config_limits(struct intel_dp *intel_dp,
>   							respect_downstream_limits);
>   	}
>   
> +	if (intel_dp_in_hdr_mode(conn_state)) {
> +		if (limits->pipe.min_bpp <= 30 && limits->pipe.max_bpp >= 30)
> +			limits->pipe.min_bpp = 30;
> +		else
> +			drm_dbg_kms(display->drm,
> +				    "[CONNECTOR:%d:%s] HDR min 30 bpp outside of valid pipe bpp range (%d-%d)\n",
> +				    connector->base.base.id, connector->base.name,
> +				    limits->pipe.min_bpp, limits->pipe.max_bpp);


pipe.max_bpp < 30 will be either due to the max_bpc property set to less 
than 10, or perhaps when the panel itself does not support 10 bpc 
(limited by EDID or VBT).
With these constraints doesn't make sense to enable HDR and send HDR 
metadata.
However, as we see in some reported issues [1] [2], in practice some 
compositor seems to enable HDR by default and with the hard limit set, 
they report blankout.
So it does make sense to raise the min bpp limit only if its inside the 
supported range.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7052
[2] 
https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5969#note_3248404

> +	}
> +
>   	if (dsc && !intel_dp_dsc_compute_pipe_bpp_limits(connector, limits))
>   		return false;
>