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From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Matthew Brost <matthew.brost@intel.com>,
	<intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v9 13/34] drm/xe/vf: Move LMEM config to tile layer
Date: Wed, 8 Oct 2025 22:36:48 +0200	[thread overview]
Message-ID: <f6faff6c-7fda-4719-ae4f-1a179b538096@intel.com> (raw)
In-Reply-To: <20251008180500.3261209-14-matthew.brost@intel.com>



On 10/8/2025 8:04 PM, Matthew Brost wrote:
> The LMEM VF provision is tile-layer-specific information. Move the LMEM
> configuration to the tile layer accordingly.
> 
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device_types.h        |  3 ++
>  drivers/gpu/drm/xe/xe_gt_sriov_vf.c         | 36 +++++++--------------
>  drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h   |  2 --
>  drivers/gpu/drm/xe/xe_tile_sriov_vf.c       | 33 +++++++++++++++++++
>  drivers/gpu/drm/xe/xe_tile_sriov_vf.h       |  2 ++
>  drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h | 19 +++++++++++
>  drivers/gpu/drm/xe/xe_vram.c                |  6 ++--
>  7 files changed, 71 insertions(+), 30 deletions(-)
>  create mode 100644 drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 1d2718b70a5c..c66523bf4bf0 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -27,6 +27,7 @@
>  #include "xe_sriov_vf_ccs_types.h"
>  #include "xe_step_types.h"
>  #include "xe_survivability_mode_types.h"
> +#include "xe_tile_sriov_vf_types.h"
>  #include "xe_validation.h"
>  
>  #if IS_ENABLED(CONFIG_DRM_XE_DEBUG)
> @@ -193,6 +194,8 @@ struct xe_tile {
>  		struct {
>  			/** @sriov.vf.ggtt_balloon: GGTT regions excluded from use. */
>  			struct xe_ggtt_node *ggtt_balloon[2];
> +			/** @sriov.vf.self_config: VF configuration data */
> +			struct xe_tile_sriov_vf_selfconfig self_config;
>  		} vf;
>  	} sriov;
>  
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> index 31a80d77da36..6f3d9bc5ed22 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> @@ -471,10 +471,10 @@ static int vf_get_ggtt_info(struct xe_gt *gt)
>  
>  static int vf_get_lmem_info(struct xe_gt *gt)
>  {
> -	struct xe_gt_sriov_vf_selfconfig *config = &gt->sriov.vf.self_config;
> +	struct xe_tile *tile = gt_to_tile(gt);
>  	struct xe_guc *guc = &gt->uc.guc;
>  	char size_str[10];
> -	u64 size;
> +	u64 size, lmem_size;
>  	int err;
>  
>  	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> @@ -483,18 +483,19 @@ static int vf_get_lmem_info(struct xe_gt *gt)
>  	if (unlikely(err))
>  		return err;
>  
> -	if (config->lmem_size && config->lmem_size != size) {
> +	lmem_size = xe_tile_sriov_vf_lmem(tile);
> +	if (lmem_size && lmem_size != size) {
>  		xe_gt_sriov_err(gt, "Unexpected LMEM reassignment: %lluM != %lluM\n",
> -				size / SZ_1M, config->lmem_size / SZ_1M);
> +				size / SZ_1M, lmem_size / SZ_1M);
>  		return -EREMCHG;
>  	}
>  
>  	string_get_size(size, 1, STRING_UNITS_2, size_str, sizeof(size_str));
>  	xe_gt_sriov_dbg_verbose(gt, "LMEM %lluM %s\n", size / SZ_1M, size_str);
>  
> -	config->lmem_size = size;
> +	xe_tile_sriov_vf_lmem_store(tile, size);
>  
> -	return config->lmem_size ? 0 : -ENODATA;
> +	return size ? 0 : -ENODATA;
>  }
>  
>  static int vf_get_submission_cfg(struct xe_gt *gt)
> @@ -591,23 +592,6 @@ u16 xe_gt_sriov_vf_guc_ids(struct xe_gt *gt)
>  	return gt->sriov.vf.self_config.num_ctxs;
>  }
>  
> -/**
> - * xe_gt_sriov_vf_lmem - VF LMEM configuration.
> - * @gt: the &xe_gt
> - *
> - * This function is for VF use only.
> - *
> - * Return: size of the LMEM assigned to VF.
> - */
> -u64 xe_gt_sriov_vf_lmem(struct xe_gt *gt)
> -{
> -	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> -	xe_gt_assert(gt, gt->sriov.vf.guc_version.major);
> -	xe_gt_assert(gt, gt->sriov.vf.self_config.lmem_size);
> -
> -	return gt->sriov.vf.self_config.lmem_size;
> -}
> -
>  /**
>   * xe_gt_sriov_vf_ggtt - VF GGTT configuration.
>   * @gt: the &xe_gt
> @@ -1059,6 +1043,7 @@ void xe_gt_sriov_vf_print_config(struct xe_gt *gt, struct drm_printer *p)
>  {
>  	struct xe_gt_sriov_vf_selfconfig *config = &gt->sriov.vf.self_config;
>  	struct xe_device *xe = gt_to_xe(gt);
> +	u64 lmem_size;
>  	char buf[10];
>  
>  	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> @@ -1072,9 +1057,10 @@ void xe_gt_sriov_vf_print_config(struct xe_gt *gt, struct drm_printer *p)
>  
>  	drm_printf(p, "GGTT shift on last restore:\t%lld\n", config->ggtt_shift);
>  
> +	lmem_size = xe_tile_sriov_vf_lmem(gt_to_tile(gt));

that should be under below "if"

>  	if (IS_DGFX(xe) && xe_gt_is_main_type(gt)) {
> -		string_get_size(config->lmem_size, 1, STRING_UNITS_2, buf, sizeof(buf));
> -		drm_printf(p, "LMEM size:\t%llu (%s)\n", config->lmem_size, buf);
> +		string_get_size(lmem_size, 1, STRING_UNITS_2, buf, sizeof(buf));
> +		drm_printf(p, "LMEM size:\t%llu (%s)\n", lmem_size, buf);
>  	}
>  
>  	drm_printf(p, "GuC contexts:\t%u\n", config->num_ctxs);
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> index e753646debc4..aff76051c9bb 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> @@ -20,8 +20,6 @@ struct xe_gt_sriov_vf_selfconfig {
>  	u64 ggtt_size;
>  	/** @ggtt_shift: difference in ggtt_base on last migration */
>  	s64 ggtt_shift;
> -	/** @lmem_size: assigned size of the LMEM. */
> -	u64 lmem_size;
>  	/** @num_ctxs: assigned number of GuC submission context IDs. */
>  	u16 num_ctxs;
>  	/** @num_dbs: assigned number of GuC doorbells IDs. */
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> index f221dbed16f0..02430a53da9f 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.c
> @@ -252,3 +252,36 @@ void xe_tile_sriov_vf_fixup_ggtt_nodes(struct xe_tile *tile, s64 shift)
>  
>  	mutex_unlock(&ggtt->lock);
>  }
> +
> +/**
> + * xe_tile_sriov_vf_lmem - VF LMEM configuration.
> + * @tile: the &xe_tile
> + *
> + * This function is for VF use only.
> + *
> + * Return: size of the LMEM assigned to VF.
> + */
> +u64 xe_tile_sriov_vf_lmem(struct xe_tile *tile)
> +{
> +	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
> +
> +	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> +
> +	return config->lmem_size;
> +}
> +
> +/**
> + * xe_tile_sriov_vf_lmem_store - Store VF LMEM configuration
> + * @tile: the &xe_tile
> + * @lmem_size: VF LMEM size to store
> + *
> + * This function is for VF use only.
> + */
> +void xe_tile_sriov_vf_lmem_store(struct xe_tile *tile, u64 lmem_size)
> +{
> +	struct xe_tile_sriov_vf_selfconfig *config = &tile->sriov.vf.self_config;
> +
> +	xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile)));
> +
> +	config->lmem_size = lmem_size;
> +}
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> index 93eb043171e8..86d750a57530 100644
> --- a/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf.h
> @@ -14,5 +14,7 @@ int xe_tile_sriov_vf_prepare_ggtt(struct xe_tile *tile);
>  int xe_tile_sriov_vf_balloon_ggtt_locked(struct xe_tile *tile);
>  void xe_tile_sriov_vf_deballoon_ggtt_locked(struct xe_tile *tile);
>  void xe_tile_sriov_vf_fixup_ggtt_nodes(struct xe_tile *tile, s64 shift);
> +u64 xe_tile_sriov_vf_lmem(struct xe_tile *tile);
> +void xe_tile_sriov_vf_lmem_store(struct xe_tile *tile, u64 lmem_size);
>  
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> new file mode 100644
> index 000000000000..f49afa8338f1
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_tile_sriov_vf_types.h
> @@ -0,0 +1,19 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +#ifndef _XE_TILE_SRIOV_VF_TYPES_H_
> +#define _XE_TILE_SRIOV_VF_TYPES_H_
> +
> +#include <linux/mutex.h>

that's not needed

it should be <linux/types.h> instead

> +
> +/**
> + * struct xe_tile_sriov_vf_selfconfig - VF configuration data.
> + */
> +struct xe_tile_sriov_vf_selfconfig {
> +	/** @lmem_size: assigned size of the LMEM. */
> +	u64 lmem_size;
> +};
> +
> +#endif
> diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c
> index 7adfccf68e4c..70bcbb188867 100644
> --- a/drivers/gpu/drm/xe/xe_vram.c
> +++ b/drivers/gpu/drm/xe/xe_vram.c
> @@ -17,10 +17,10 @@
>  #include "xe_device.h"
>  #include "xe_force_wake.h"
>  #include "xe_gt_mcr.h"
> -#include "xe_gt_sriov_vf.h"
>  #include "xe_mmio.h"
>  #include "xe_module.h"
>  #include "xe_sriov.h"
> +#include "xe_tile_sriov_vf.h"
>  #include "xe_ttm_vram_mgr.h"
>  #include "xe_vram.h"
>  #include "xe_vram_types.h"
> @@ -238,9 +238,9 @@ static int tile_vram_size(struct xe_tile *tile, u64 *vram_size,
>  		offset = 0;
>  		for_each_tile(t, xe, id)
>  			for_each_if(t->id < tile->id)
> -				offset += xe_gt_sriov_vf_lmem(t->primary_gt);
> +				offset += xe_tile_sriov_vf_lmem(t);
>  
> -		*tile_size = xe_gt_sriov_vf_lmem(gt);
> +		*tile_size = xe_tile_sriov_vf_lmem(tile);
>  		*vram_size = *tile_size;
>  		*tile_offset = offset;
>  

two small nits, but LGTM

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>


  reply	other threads:[~2025-10-08 20:37 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-08 18:04 [PATCH v9 00/34] VF migration redesign Matthew Brost
2025-10-08 18:04 ` [PATCH v9 01/34] drm/xe: Add NULL checks to scratch LRC allocation Matthew Brost
2025-10-08 18:04 ` [PATCH v9 02/34] drm/xe: Save off position in ring in which a job was programmed Matthew Brost
2025-10-08 18:04 ` [PATCH v9 03/34] drm/xe/guc: Track pending-enable source in submission state Matthew Brost
2025-10-08 18:04 ` [PATCH v9 04/34] drm/xe: Track LR jobs in DRM scheduler pending list Matthew Brost
2025-10-08 18:04 ` [PATCH v9 05/34] drm/xe: Return first unsignaled job first pending job helper Matthew Brost
2025-10-08 18:04 ` [PATCH v9 06/34] drm/xe: Don't change LRC ring head on job resubmission Matthew Brost
2025-10-08 18:04 ` [PATCH v9 07/34] drm/xe: Make LRC W/A scratch buffer usage consistent Matthew Brost
2025-10-08 18:04 ` [PATCH v9 08/34] drm/xe/vf: Add xe_gt_recovery_pending helper Matthew Brost
2025-10-08 18:04 ` [PATCH v9 09/34] drm/xe/vf: Make VF recovery run on per-GT worker Matthew Brost
2025-10-08 18:04 ` [PATCH v9 10/34] drm/xe/vf: Abort H2G sends during VF post-migration recovery Matthew Brost
2025-10-08 18:04 ` [PATCH v9 11/34] drm/xe/vf: Remove memory allocations from VF post migration recovery Matthew Brost
2025-10-08 18:04 ` [PATCH v9 12/34] drm/xe: Move GGTT lock init to alloc Matthew Brost
2025-10-08 18:04 ` [PATCH v9 13/34] drm/xe/vf: Move LMEM config to tile layer Matthew Brost
2025-10-08 20:36   ` Michal Wajdeczko [this message]
2025-10-08 18:04 ` [PATCH v9 14/34] drm/xe/vf: Close multi-GT GGTT shift race Matthew Brost
2025-10-08 21:11   ` Michal Wajdeczko
2025-10-08 18:04 ` [PATCH v9 15/34] drm/xe/vf: Teardown VF post migration worker on driver unload Matthew Brost
2025-10-08 18:04 ` [PATCH v9 16/34] drm/xe/vf: Don't allow GT reset to be queued during VF post migration recovery Matthew Brost
2025-10-08 18:04 ` [PATCH v9 17/34] drm/xe/vf: Wakeup in GuC backend on " Matthew Brost
2025-10-08 18:04 ` [PATCH v9 18/34] drm/xe/vf: Avoid indefinite blocking in preempt rebind worker for VFs supporting migration Matthew Brost
2025-10-08 18:04 ` [PATCH v9 19/34] drm/xe/vf: Use GUC_HXG_TYPE_EVENT for GuC context register Matthew Brost
2025-10-08 18:04 ` [PATCH v9 20/34] drm/xe/vf: Flush and stop CTs in VF post migration recovery Matthew Brost
2025-10-08 18:04 ` [PATCH v9 21/34] drm/xe/vf: Reset TLB invalidations during " Matthew Brost
2025-10-08 18:04 ` [PATCH v9 22/34] drm/xe/vf: Kickstart after resfix in " Matthew Brost
2025-10-08 18:04 ` [PATCH v9 23/34] drm/xe: Add CTB_H2G_BUFFER_OFFSET define Matthew Brost
2025-10-08 18:04 ` [PATCH v9 24/34] drm/xe/vf: Start CTs before resfix VF post migration recovery Matthew Brost
2025-10-08 18:04 ` [PATCH v9 25/34] drm/xe/vf: Abort VF post migration recovery on failure Matthew Brost
2025-10-08 19:49   ` Niranjana Vishwanathapura
2025-10-08 18:04 ` [PATCH v9 26/34] drm/xe/vf: Replay GuC submission state on pause / unpause Matthew Brost
2025-10-08 18:04 ` [PATCH v9 27/34] drm/xe: Move queue init before LRC creation Matthew Brost
2025-10-08 18:04 ` [PATCH v9 28/34] drm/xe/vf: Add debug prints for GuC replaying state during VF recovery Matthew Brost
2025-10-08 18:04 ` [PATCH v9 29/34] drm/xe/vf: Workaround for race condition in GuC firmware during VF pause Matthew Brost
2025-10-08 18:04 ` [PATCH v9 30/34] drm/xe: Use PPGTT addresses for TLB invalidation to avoid GGTT fixups Matthew Brost
2025-10-08 18:04 ` [PATCH v9 31/34] drm/xe/vf: Use primary GT ordered work queue on media GT on PTL VF Matthew Brost
2025-10-08 18:04 ` [PATCH v9 32/34] drm/xe/vf: Ensure media GT VF recovery runs after primary GT on PTL Matthew Brost
2025-10-08 18:04 ` [PATCH v9 33/34] drm/xe/vf: Rebase CCS save/restore BB GGTT addresses Matthew Brost
2025-10-08 18:05 ` [PATCH v9 34/34] drm/xe/guc: Increase wait timeout to 2sec after BUSY reply from GuC Matthew Brost
2025-10-08 18:28 ` ✗ CI.checkpatch: warning for VF migration redesign (rev9) Patchwork
2025-10-08 18:29 ` ✓ CI.KUnit: success " Patchwork
2025-10-08 19:04 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-08 21:40 ` ✗ Xe.CI.Full: failure " Patchwork

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