Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v5 23/23] drm/xe/sriov: Disable SR-IOV if primary GT is disabled via configfs
Date: Mon, 13 Oct 2025 22:25:33 +0200	[thread overview]
Message-ID: <f72f8b30-61e5-487e-ab75-3c0965b2b5d0@intel.com> (raw)
In-Reply-To: <20251013200944.2499947-48-matthew.d.roper@intel.com>



On 10/13/2025 10:10 PM, Matt Roper wrote:
> SR-IOV operation relies on the primary GT's GuC to operate (in both PF
> and VF mode).  If the primary GT is disabled in VF mode, fail the probe.
> If the primary GT is disabled in PF mode, force the device back to
> native (non-sriov) mode.

I guess we should update this msg to the latest approach:

"Don't enable .has_sriov flag if the primary-GT was disabled by configfs."

and then we can keep the change log under ---

> 
> v2:
>  - Move handling to xe_info_init().  (Michal)
> 
> v3:
>  - Just update the .has_sriov flag in xe_info_init_early().  (Michal)
> 
> v4:
>  - Drop unnecessary comment.  (Michal)
>  - Flip condition order for consistency with other checks.  (Michal)
> 
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_pci.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index ef559a79c5ba..24a38904bb50 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -631,7 +631,8 @@ static int xe_info_init_early(struct xe_device *xe,
>  	xe->info.has_late_bind = desc->has_late_bind;
>  	xe->info.has_llc = desc->has_llc;
>  	xe->info.has_pxp = desc->has_pxp;
> -	xe->info.has_sriov = desc->has_sriov;
> +	xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
> +		desc->has_sriov;

but this part should work, so

Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

>  	xe->info.skip_guc_pc = desc->skip_guc_pc;
>  	xe->info.skip_mtcfg = desc->skip_mtcfg;
>  	xe->info.skip_pcode = desc->skip_pcode;


  reply	other threads:[~2025-10-13 20:25 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-13 20:09 [PATCH v5 00/23] Allow configfs to disable specific GT type(s) Matt Roper
2025-10-13 20:09 ` [PATCH v5 01/23] drm/xe/huc: Adjust HuC check on primary GT Matt Roper
2025-10-13 20:09 ` [PATCH v5 02/23] drm/xe: Drop GT parameter to xe_display_irq_postinstall() Matt Roper
2025-10-13 20:09 ` [PATCH v5 03/23] drm/xe: Move 'va_bits' flag back to platform descriptor Matt Roper
2025-10-13 20:09 ` [PATCH v5 04/23] drm/xe: Move 'vm_max_level' " Matt Roper
2025-10-13 20:09 ` [PATCH v5 05/23] drm/xe: Move 'vram_flags' " Matt Roper
2025-10-13 20:09 ` [PATCH v5 06/23] drm/xe: Move 'has_flatccs' " Matt Roper
2025-10-13 20:09 ` [PATCH v5 07/23] drm/xe: Read VF GMD_ID with a specifically-allocated dummy GT Matt Roper
2025-10-13 20:09 ` [PATCH v5 08/23] drm/xe: Move primary GT allocation from xe_tile_init_early to xe_tile_init Matt Roper
2025-10-13 20:09 ` [PATCH v5 09/23] drm/xe: Skip L2 / TDF cache flushes if primary GT is disabled Matt Roper
2025-10-13 20:09 ` [PATCH v5 10/23] drm/xe/query: Report hwconfig size as 0 " Matt Roper
2025-10-13 20:09 ` [PATCH v5 11/23] drm/xe/pmu: Initialize PMU event types based on first available GT Matt Roper
2025-10-13 20:09 ` [PATCH v5 12/23] drm/xe: Check for primary GT before looking up Wa_22019338487 Matt Roper
2025-10-13 20:09 ` [PATCH v5 13/23] drm/xe: Make display part of Wa_22019338487 a device workaround Matt Roper
2025-10-13 20:09 ` [PATCH v5 14/23] drm/xe/irq: Don't try to lookup engine masks for non-existent primary GT Matt Roper
2025-10-13 20:09 ` [PATCH v5 15/23] drm/xe: Handle Wa_22010954014 and Wa_14022085890 as device workarounds Matt Roper
2025-10-13 20:09 ` [PATCH v5 16/23] drm/xe/rtp: Pass xe_device parameter to FUNC matches Matt Roper
2025-10-13 20:10 ` [PATCH v5 17/23] drm/xe: Bypass Wa_14018094691 when primary GT is disabled Matt Roper
2025-10-13 20:10 ` [PATCH v5 18/23] drm/xe: Correct lineage for Wa_22014953428 and only check with valid GT Matt Roper
2025-10-13 20:10 ` [PATCH v5 19/23] drm/xe: Check that GT is not NULL before testing Wa_16023588340 Matt Roper
2025-10-13 20:10 ` [PATCH v5 20/23] drm/xe: Don't check BIOS-disabled FlatCCS if primary GT is disabled Matt Roper
2025-10-13 20:10 ` [PATCH v5 21/23] drm/xe: Break GT setup out of xe_info_init() Matt Roper
2025-10-13 20:10 ` [PATCH v5 22/23] drm/xe/configfs: Add attribute to disable GT types Matt Roper
2025-10-13 20:10 ` [PATCH v5 23/23] drm/xe/sriov: Disable SR-IOV if primary GT is disabled via configfs Matt Roper
2025-10-13 20:25   ` Michal Wajdeczko [this message]
2025-10-13 23:30 ` ✗ CI.checkpatch: warning for Allow configfs to disable specific GT type(s) (rev5) Patchwork
2025-10-13 23:31 ` ✓ CI.KUnit: success " Patchwork
2025-10-14  0:11 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-14  8:08 ` ✓ Xe.CI.Full: " Patchwork
2025-10-14 15:10   ` Matt Roper

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=f72f8b30-61e5-487e-ab75-3c0965b2b5d0@intel.com \
    --to=michal.wajdeczko@intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=matthew.d.roper@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox