[PATCH 17/19] drm/i915/display: Remove DC3CO DMC debugfs

Dibin Moolakadan Subrahmanian
2026-03-26T17:16:02Z

DC3CO is not enabled on TGL and DG1. Remove the debugfs entry for
DC3CO counts. A new debugfs entry for Xe3LP will be added in a
subsequent patch.

Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
---
drivers/gpu/drm/i915/display/intel_dmc.c | 6 ------
1 file changed, 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 74d18806d01f..f0ebdab089ca 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1645,19 +1645,13 @@ static int intel_dmc_debugfs_status_show(struct seq_file *m, void *unused)
DMC_VERSION_MINOR(dmc->version));

if (DISPLAY_VER(display) >= 12) {
- i915_reg_t dc3co_reg;
-
if (display->platform.dgfx || DISPLAY_VER(display) >= 14) {
- dc3co_reg = DG1_DMC_DEBUG3;
dc5_reg = DG1_DMC_DEBUG_DC5_COUNT;
} else {
- dc3co_reg = TGL_DMC_DEBUG3;
dc5_reg = TGL_DMC_DEBUG_DC5_COUNT;
dc6_reg = TGL_DMC_DEBUG_DC6_COUNT;
}

- seq_printf(m, "DC3CO count: %d\n",
- intel_de_read(display, dc3co_reg));
} else {
dc5_reg = display->platform.broxton ? BXT_DMC_DC3_DC5_COUNT :
SKL_DMC_DC3_DC5_COUNT;
--
2.43.0