[PATCH v8 0/8] drm/xe/vf: Post-migration recovery of queues and jobs

[PATCH v8 0/8] drm/xe/vf: Post-migration recovery of queues and jobs

[Tomasz Lis]

To support VF Migration, it is necessary to do fixups to any
non-virtualized resources. These fixups need to be applied within
VM, on the KMD working with VF.

This series adds two fixup functions to the recovery worker:
* for fixing xe_lrc structs within queues
* for fixing xe_job structs and the commands they emit
It also provides some performance and stability fixes - blocking
submissions and resets while the fixups are being applied.
In case of sub-allocator, it removes the cached GGTT addresses
instead of implementing fixups for them.

v2: Switcghed to update of addresses by xe_lrc_write_ctx_reg()
  to avoid kzalloc(), renamed or moved few functions
v3: Renamed and reordered parameters, added kerneldocs
v4: Take job_list_lock, introduce a new atomic for reset
  blocking, add "refresh utilization buffer" patch
v5: Replaced "Finish RESFIX by reset" patch with "Skip fixups
  before getting GGTT info", rebased "Refresh utilization buffer"
  patch
v6: Rebased to changes in "Make multi-GT migration less error prone",
  used a scratch buffer, and added one more ring recovery patch
v7: Used better matching atomic functs, fixed noop item at end of
  WQ ring, added more exit conditions in wq ring
v8: Improve error/warn logging, add propagation of errors,
 make enum for offsets

Tomasz Lis (8):
  drm/xe/sa: Avoid caching GGTT address within the manager
  drm/xe/vf: Pause submissions during RESFIX fixups
  drm/xe: Block reset while recovering from VF migration
  drm/xe/vf: Rebase HWSP of all contexts after migration
  drm/xe/vf: Rebase MEMIRQ structures for all contexts after migration
  drm/xe/vf: Post migration, repopulate ring area for pending request
  drm/xe/vf: Refresh utilization buffer during migration recovery
  drm/xe/vf: Rebase exec queue parallel commands during migration
    recovery

 drivers/gpu/drm/xe/abi/guc_actions_abi.h |   8 ++
 drivers/gpu/drm/xe/xe_exec_queue.c       |  48 +++++++
 drivers/gpu/drm/xe/xe_exec_queue.h       |   4 +
 drivers/gpu/drm/xe/xe_gpu_scheduler.c    |  13 ++
 drivers/gpu/drm/xe/xe_gpu_scheduler.h    |   1 +
 drivers/gpu/drm/xe/xe_gt.c               |  10 ++
 drivers/gpu/drm/xe/xe_gt_debugfs.c       |   5 +-
 drivers/gpu/drm/xe/xe_gt_sriov_vf.c      |  14 ++
 drivers/gpu/drm/xe/xe_gt_sriov_vf.h      |   1 +
 drivers/gpu/drm/xe/xe_guc_buf.c          |   2 +-
 drivers/gpu/drm/xe/xe_guc_submit.c       | 175 +++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_guc_submit.h       |   9 ++
 drivers/gpu/drm/xe/xe_guc_types.h        |   6 +
 drivers/gpu/drm/xe/xe_lrc.c              | 107 ++++++++++++--
 drivers/gpu/drm/xe/xe_lrc.h              |   9 ++
 drivers/gpu/drm/xe/xe_sa.c               |   1 -
 drivers/gpu/drm/xe/xe_sa.h               |  15 +-
 drivers/gpu/drm/xe/xe_sa_types.h         |   1 -
 drivers/gpu/drm/xe/xe_sriov_vf.c         |  78 +++++++++-
 drivers/gpu/drm/xe/xe_sriov_vf_ccs.c     |   2 +-
 20 files changed, 490 insertions(+), 19 deletions(-)

-- 
2.25.1

[PATCH v8 1/8] drm/xe/sa: Avoid caching GGTT address within the manager

[Tomasz Lis]

Non-virtualized resources require fixups after SRIOV VF migration.
Caching GGTT references rather than re-computing them from the
underlying Buffer Object is something we want to avoid, as such
code would require additional fixup step and additional locking
around all the places where the address is accessed.

This change removes the cached GPU address from the Sub-Allocation
Manager, and introduces a function which recomputes and returns
the address instead.

v2: renamed xe_sa_manager_gpu_addr(), added kerneldoc

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/xe/xe_gt_debugfs.c   |  5 +++--
 drivers/gpu/drm/xe/xe_guc_buf.c      |  2 +-
 drivers/gpu/drm/xe/xe_sa.c           |  1 -
 drivers/gpu/drm/xe/xe_sa.h           | 15 ++++++++++++++-
 drivers/gpu/drm/xe/xe_sa_types.h     |  1 -
 drivers/gpu/drm/xe/xe_sriov_vf_ccs.c |  2 +-
 6 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt_debugfs.c b/drivers/gpu/drm/xe/xe_gt_debugfs.c
index 8d4b66ca38b7..bf3a67b5951c 100644
--- a/drivers/gpu/drm/xe/xe_gt_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_gt_debugfs.c
@@ -29,6 +29,7 @@
 #include "xe_pm.h"
 #include "xe_reg_sr.h"
 #include "xe_reg_whitelist.h"
+#include "xe_sa.h"
 #include "xe_sriov.h"
 #include "xe_tuning.h"
 #include "xe_uc_debugfs.h"
@@ -128,7 +129,7 @@ static int sa_info(struct xe_gt *gt, struct drm_printer *p)
 
 	xe_pm_runtime_get(gt_to_xe(gt));
 	drm_suballoc_dump_debug_info(&tile->mem.kernel_bb_pool->base, p,
-				     tile->mem.kernel_bb_pool->gpu_addr);
+				     xe_sa_manager_gpu_addr(tile->mem.kernel_bb_pool));
 	xe_pm_runtime_put(gt_to_xe(gt));
 
 	return 0;
@@ -152,7 +153,7 @@ static int sa_info_vf_ccs(struct xe_gt *gt, struct drm_printer *p)
 
 		drm_printf(p, "ccs %s bb suballoc info\n", ctx_id ? "write" : "read");
 		drm_printf(p, "-------------------------\n");
-		drm_suballoc_dump_debug_info(&bb_pool->base, p, bb_pool->gpu_addr);
+		drm_suballoc_dump_debug_info(&bb_pool->base, p, xe_sa_manager_gpu_addr(bb_pool));
 		drm_puts(p, "\n");
 	}
 
diff --git a/drivers/gpu/drm/xe/xe_guc_buf.c b/drivers/gpu/drm/xe/xe_guc_buf.c
index 14a07dca48e7..502ca3a4ee60 100644
--- a/drivers/gpu/drm/xe/xe_guc_buf.c
+++ b/drivers/gpu/drm/xe/xe_guc_buf.c
@@ -164,7 +164,7 @@ u64 xe_guc_cache_gpu_addr_from_ptr(struct xe_guc_buf_cache *cache, const void *p
 	if (offset < 0 || offset + size > cache->sam->base.size)
 		return 0;
 
-	return cache->sam->gpu_addr + offset;
+	return xe_sa_manager_gpu_addr(cache->sam) + offset;
 }
 
 #if IS_BUILTIN(CONFIG_DRM_XE_KUNIT_TEST)
diff --git a/drivers/gpu/drm/xe/xe_sa.c b/drivers/gpu/drm/xe/xe_sa.c
index 1d43e183ca21..fedd017d6dd3 100644
--- a/drivers/gpu/drm/xe/xe_sa.c
+++ b/drivers/gpu/drm/xe/xe_sa.c
@@ -69,7 +69,6 @@ struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u3
 	}
 	sa_manager->bo = bo;
 	sa_manager->is_iomem = bo->vmap.is_iomem;
-	sa_manager->gpu_addr = xe_bo_ggtt_addr(bo);
 
 	if (bo->vmap.is_iomem) {
 		sa_manager->cpu_ptr = kvzalloc(managed_size, GFP_KERNEL);
diff --git a/drivers/gpu/drm/xe/xe_sa.h b/drivers/gpu/drm/xe/xe_sa.h
index 1170ee5a81a8..99dbf0eea540 100644
--- a/drivers/gpu/drm/xe/xe_sa.h
+++ b/drivers/gpu/drm/xe/xe_sa.h
@@ -7,6 +7,8 @@
 
 #include <linux/sizes.h>
 #include <linux/types.h>
+
+#include "xe_bo.h"
 #include "xe_sa_types.h"
 
 struct dma_fence;
@@ -43,9 +45,20 @@ to_xe_sa_manager(struct drm_suballoc_manager *mng)
 	return container_of(mng, struct xe_sa_manager, base);
 }
 
+/**
+ * xe_sa_manager_gpu_addr - Retrieve GPU address of a back storage BO
+ * within suballocator.
+ * @sa_manager: the &xe_sa_manager struct instance
+ * Return: GGTT address of the back storage BO.
+ */
+static inline u64 xe_sa_manager_gpu_addr(struct xe_sa_manager *sa_manager)
+{
+	return xe_bo_ggtt_addr(sa_manager->bo);
+}
+
 static inline u64 xe_sa_bo_gpu_addr(struct drm_suballoc *sa)
 {
-	return to_xe_sa_manager(sa->manager)->gpu_addr +
+	return xe_sa_manager_gpu_addr(to_xe_sa_manager(sa->manager)) +
 		drm_suballoc_soffset(sa);
 }
 
diff --git a/drivers/gpu/drm/xe/xe_sa_types.h b/drivers/gpu/drm/xe/xe_sa_types.h
index 2b070ff1292e..cb7238799dcb 100644
--- a/drivers/gpu/drm/xe/xe_sa_types.h
+++ b/drivers/gpu/drm/xe/xe_sa_types.h
@@ -12,7 +12,6 @@ struct xe_bo;
 struct xe_sa_manager {
 	struct drm_suballoc_manager base;
 	struct xe_bo *bo;
-	u64 gpu_addr;
 	void *cpu_ptr;
 	bool is_iomem;
 };
diff --git a/drivers/gpu/drm/xe/xe_sriov_vf_ccs.c b/drivers/gpu/drm/xe/xe_sriov_vf_ccs.c
index bf9fa1238462..bc3c19c3ecef 100644
--- a/drivers/gpu/drm/xe/xe_sriov_vf_ccs.c
+++ b/drivers/gpu/drm/xe/xe_sriov_vf_ccs.c
@@ -169,7 +169,7 @@ static int alloc_bb_pool(struct xe_tile *tile, struct xe_tile_vf_ccs *ctx)
 static void ccs_rw_update_ring(struct xe_tile_vf_ccs *ctx)
 {
 	struct xe_lrc *lrc = xe_migrate_lrc(ctx->migrate);
-	u64 addr = ctx->mem.ccs_bb_pool->gpu_addr;
+	u64 addr = xe_sa_manager_gpu_addr(ctx->mem.ccs_bb_pool);
 	u32 dw[10], i = 0;
 
 	dw[i++] = MI_ARB_ON_OFF | MI_ARB_ENABLE;
-- 
2.25.1

[PATCH v8 2/8] drm/xe/vf: Pause submissions during RESFIX fixups

[Tomasz Lis]

While applying post-migration fixups to VF, GuC will not respond
to any commands. This means submissions have no way of finishing.

To avoid acquiring additional resources and then stalling
on hardware access, pause the submission work. This will
decrease the chance of depleting resources, and speed up
the recovery.

v2: Commented xe_irq_resume() call
v3: Typo fix

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Reviewed-by: Michal Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/xe/xe_gpu_scheduler.c | 13 ++++++++
 drivers/gpu/drm/xe/xe_gpu_scheduler.h |  1 +
 drivers/gpu/drm/xe/xe_guc_submit.c    | 35 ++++++++++++++++++++
 drivers/gpu/drm/xe/xe_guc_submit.h    |  2 ++
 drivers/gpu/drm/xe/xe_sriov_vf.c      | 46 +++++++++++++++++++++++++++
 5 files changed, 97 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
index 869b43a4151d..455ccaf17314 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
@@ -101,6 +101,19 @@ void xe_sched_submission_stop(struct xe_gpu_scheduler *sched)
 	cancel_work_sync(&sched->work_process_msg);
 }
 
+/**
+ * xe_sched_submission_stop_async - Stop further runs of submission tasks on a scheduler.
+ * @sched: the &xe_gpu_scheduler struct instance
+ *
+ * This call disables further runs of scheduling work queue. It does not wait
+ * for any in-progress runs to finish, only makes sure no further runs happen
+ * afterwards.
+ */
+void xe_sched_submission_stop_async(struct xe_gpu_scheduler *sched)
+{
+	drm_sched_wqueue_stop(&sched->base);
+}
+
 void xe_sched_submission_resume_tdr(struct xe_gpu_scheduler *sched)
 {
 	drm_sched_resume_timeout(&sched->base, sched->base.timeout);
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
index 308061f0cf37..e548b2aed95a 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
@@ -21,6 +21,7 @@ void xe_sched_fini(struct xe_gpu_scheduler *sched);
 
 void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
 void xe_sched_submission_stop(struct xe_gpu_scheduler *sched);
+void xe_sched_submission_stop_async(struct xe_gpu_scheduler *sched);
 
 void xe_sched_submission_resume_tdr(struct xe_gpu_scheduler *sched);
 
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 751da5cd1d44..fe132d9d3156 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1830,6 +1830,19 @@ void xe_guc_submit_stop(struct xe_guc *guc)
 
 }
 
+/**
+ * xe_guc_submit_pause - Stop further runs of submission tasks on given GuC.
+ * @guc: the &xe_guc struct instance whose scheduler is to be disabled
+ */
+void xe_guc_submit_pause(struct xe_guc *guc)
+{
+	struct xe_exec_queue *q;
+	unsigned long index;
+
+	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
+		xe_sched_submission_stop_async(&q->guc->sched);
+}
+
 static void guc_exec_queue_start(struct xe_exec_queue *q)
 {
 	struct xe_gpu_scheduler *sched = &q->guc->sched;
@@ -1870,6 +1883,28 @@ int xe_guc_submit_start(struct xe_guc *guc)
 	return 0;
 }
 
+static void guc_exec_queue_unpause(struct xe_exec_queue *q)
+{
+	struct xe_gpu_scheduler *sched = &q->guc->sched;
+
+	xe_sched_submission_start(sched);
+}
+
+/**
+ * xe_guc_submit_unpause - Allow further runs of submission tasks on given GuC.
+ * @guc: the &xe_guc struct instance whose scheduler is to be enabled
+ */
+void xe_guc_submit_unpause(struct xe_guc *guc)
+{
+	struct xe_exec_queue *q;
+	unsigned long index;
+
+	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
+		guc_exec_queue_unpause(q);
+
+	wake_up_all(&guc->ct.wq);
+}
+
 static struct xe_exec_queue *
 g2h_exec_queue_lookup(struct xe_guc *guc, u32 guc_id)
 {
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
index 8f64e799283b..ff44500f3da2 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.h
+++ b/drivers/gpu/drm/xe/xe_guc_submit.h
@@ -18,6 +18,8 @@ int xe_guc_submit_reset_prepare(struct xe_guc *guc);
 void xe_guc_submit_reset_wait(struct xe_guc *guc);
 void xe_guc_submit_stop(struct xe_guc *guc);
 int xe_guc_submit_start(struct xe_guc *guc);
+void xe_guc_submit_pause(struct xe_guc *guc);
+void xe_guc_submit_unpause(struct xe_guc *guc);
 void xe_guc_submit_wedge(struct xe_guc *guc);
 
 int xe_guc_read_stopped(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_sriov_vf.c b/drivers/gpu/drm/xe/xe_sriov_vf.c
index 26e243c28994..c66b17da1ce7 100644
--- a/drivers/gpu/drm/xe/xe_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_sriov_vf.c
@@ -11,6 +11,8 @@
 #include "xe_gt_sriov_printk.h"
 #include "xe_gt_sriov_vf.h"
 #include "xe_guc_ct.h"
+#include "xe_guc_submit.h"
+#include "xe_irq.h"
 #include "xe_pm.h"
 #include "xe_sriov.h"
 #include "xe_sriov_printk.h"
@@ -147,6 +149,48 @@ void xe_sriov_vf_init_early(struct xe_device *xe)
 		xe_sriov_info(xe, "migration not supported by this module version\n");
 }
 
+/**
+ * vf_post_migration_shutdown - Stop the driver activities after VF migration.
+ * @xe: the &xe_device struct instance
+ *
+ * After this VM is migrated and assigned to a new VF, it is running on a new
+ * hardware, and therefore many hardware-dependent states and related structures
+ * require fixups. Without fixups, the hardware cannot do any work, and therefore
+ * all GPU pipelines are stalled.
+ * Stop some of kernel activities to make the fixup process faster.
+ */
+static void vf_post_migration_shutdown(struct xe_device *xe)
+{
+	struct xe_gt *gt;
+	unsigned int id;
+
+	for_each_gt(gt, xe, id)
+		xe_guc_submit_pause(&gt->uc.guc);
+}
+
+/**
+ * vf_post_migration_kickstart - Re-start the driver activities under new hardware.
+ * @xe: the &xe_device struct instance
+ *
+ * After we have finished with all post-migration fixups, restart the driver
+ * activities to continue feeding the GPU with workloads.
+ */
+static void vf_post_migration_kickstart(struct xe_device *xe)
+{
+	struct xe_gt *gt;
+	unsigned int id;
+
+	/*
+	 * Make sure interrupts on the new HW are properly set. The GuC IRQ
+	 * must be working at this point, since the recovery did started,
+	 * but the rest was not enabled using the procedure from spec.
+	 */
+	xe_irq_resume(xe);
+
+	for_each_gt(gt, xe, id)
+		xe_guc_submit_unpause(&gt->uc.guc);
+}
+
 static bool gt_vf_post_migration_needed(struct xe_gt *gt)
 {
 	return test_bit(gt->info.id, &gt_to_xe(gt)->sriov.vf.migration.gt_flags);
@@ -230,6 +274,7 @@ static void vf_post_migration_recovery(struct xe_device *xe)
 
 	drm_dbg(&xe->drm, "migration recovery in progress\n");
 	xe_pm_runtime_get(xe);
+	vf_post_migration_shutdown(xe);
 
 	if (!vf_migration_supported(xe)) {
 		xe_sriov_err(xe, "migration not supported by this module version\n");
@@ -247,6 +292,7 @@ static void vf_post_migration_recovery(struct xe_device *xe)
 		set_bit(id, &fixed_gts);
 	}
 
+	vf_post_migration_kickstart(xe);
 	err = vf_post_migration_notify_resfix_done(xe, fixed_gts);
 	if (err)
 		goto fail;
-- 
2.25.1

[PATCH v8 3/8] drm/xe: Block reset while recovering from VF migration

[Tomasz Lis]

Resetting GuC during recovery could interfere with the recovery
process. Such reset might be also triggered without justification,
due to migration taking time, rather than due to the workload not
progressing.

Doing GuC reset during the recovery would cause exit of RESFIX state,
and therefore continuation of GuC work while fixups are still being
applied. To avoid that, reset needs to be blocked during the recovery.

This patch blocks the reset during recovery. Reset request in that
time range will be stalled, and unblocked only after GuC goes out
of RESFIX state.

In case a reset procedure already started while the recovery is
triggered, there isn't much we can do - we cannot wait for it to
finish as it involves waiting for hardware, and we can't be sure
at which exact point of the reset procedure the GPU got switched.
Therefore, the rare cases where migration happens while reset is
in progress, are still dangerous. Resets are not a part of the
standard flow, and cause unfinished workloads - that will happen
during the reset interrupted by migration as well, so it doesn't
diverge that much from what normally happens during such resets.

v2: Introduce a new atomic for reset blocking, as we cannot reuse
  `stopped` atomic (that could lead to losing a workload).
v3: Switched atomic functs to ones which include proper barriers

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Reviewed-by: Michal Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/xe/xe_gt.c         | 10 ++++++++
 drivers/gpu/drm/xe/xe_guc_submit.c | 37 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_guc_submit.h |  3 +++
 drivers/gpu/drm/xe/xe_guc_types.h  |  6 +++++
 drivers/gpu/drm/xe/xe_sriov_vf.c   | 12 ++++++++--
 5 files changed, 66 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 5a79c6e3208b..390394bbaadc 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -41,6 +41,7 @@
 #include "xe_gt_topology.h"
 #include "xe_guc_exec_queue_types.h"
 #include "xe_guc_pc.h"
+#include "xe_guc_submit.h"
 #include "xe_hw_fence.h"
 #include "xe_hw_engine_class_sysfs.h"
 #include "xe_irq.h"
@@ -802,6 +803,11 @@ static int do_gt_restart(struct xe_gt *gt)
 	return 0;
 }
 
+static int gt_wait_reset_unblock(struct xe_gt *gt)
+{
+	return xe_guc_wait_reset_unblock(&gt->uc.guc);
+}
+
 static int gt_reset(struct xe_gt *gt)
 {
 	unsigned int fw_ref;
@@ -816,6 +822,10 @@ static int gt_reset(struct xe_gt *gt)
 
 	xe_gt_info(gt, "reset started\n");
 
+	err = gt_wait_reset_unblock(gt);
+	if (!err)
+		xe_gt_warn(gt, "reset block failed to get lifted");
+
 	xe_pm_runtime_get(gt_to_xe(gt));
 
 	if (xe_fault_inject_gt_reset()) {
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index fe132d9d3156..f72785c655f8 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1777,6 +1777,43 @@ static void guc_exec_queue_stop(struct xe_guc *guc, struct xe_exec_queue *q)
 	}
 }
 
+/**
+ * xe_guc_submit_reset_block - Disallow reset calls on given GuC.
+ * @guc: the &xe_guc struct instance
+ */
+int xe_guc_submit_reset_block(struct xe_guc *guc)
+{
+	return atomic_fetch_or(1, &guc->submission_state.reset_blocked);
+}
+
+/**
+ * xe_guc_submit_reset_unblock - Allow back reset calls on given GuC.
+ * @guc: the &xe_guc struct instance
+ */
+void xe_guc_submit_reset_unblock(struct xe_guc *guc)
+{
+	atomic_set_release(&guc->submission_state.reset_blocked, 0);
+	wake_up_all(&guc->ct.wq);
+}
+
+static int guc_submit_reset_is_blocked(struct xe_guc *guc)
+{
+	return atomic_read_acquire(&guc->submission_state.reset_blocked);
+}
+
+/* Maximum time of blocking reset */
+#define RESET_BLOCK_PERIOD_MAX (HZ * 5)
+
+/**
+ * xe_guc_wait_reset_unblock - Wait until reset blocking flag is lifted, or timeout.
+ * @guc: the &xe_guc struct instance
+ */
+int xe_guc_wait_reset_unblock(struct xe_guc *guc)
+{
+	return wait_event_timeout(guc->ct.wq,
+				  !guc_submit_reset_is_blocked(guc), RESET_BLOCK_PERIOD_MAX);
+}
+
 int xe_guc_submit_reset_prepare(struct xe_guc *guc)
 {
 	int ret;
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
index ff44500f3da2..4dd278f5f61b 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.h
+++ b/drivers/gpu/drm/xe/xe_guc_submit.h
@@ -20,6 +20,9 @@ void xe_guc_submit_stop(struct xe_guc *guc);
 int xe_guc_submit_start(struct xe_guc *guc);
 void xe_guc_submit_pause(struct xe_guc *guc);
 void xe_guc_submit_unpause(struct xe_guc *guc);
+int xe_guc_submit_reset_block(struct xe_guc *guc);
+void xe_guc_submit_reset_unblock(struct xe_guc *guc);
+int xe_guc_wait_reset_unblock(struct xe_guc *guc);
 void xe_guc_submit_wedge(struct xe_guc *guc);
 
 int xe_guc_read_stopped(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_guc_types.h b/drivers/gpu/drm/xe/xe_guc_types.h
index 1fde7614fcc5..c7b9642b41ba 100644
--- a/drivers/gpu/drm/xe/xe_guc_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_types.h
@@ -85,6 +85,12 @@ struct xe_guc {
 		struct xarray exec_queue_lookup;
 		/** @submission_state.stopped: submissions are stopped */
 		atomic_t stopped;
+		/**
+		 * @submission_state.reset_blocked: reset attempts are blocked;
+		 * blocking reset in order to delay it may be required if running
+		 * an operation which is sensitive to resets.
+		 */
+		atomic_t reset_blocked;
 		/** @submission_state.lock: protects submission state */
 		struct mutex lock;
 		/** @submission_state.enabled: submission is enabled */
diff --git a/drivers/gpu/drm/xe/xe_sriov_vf.c b/drivers/gpu/drm/xe/xe_sriov_vf.c
index c66b17da1ce7..71d28b30de43 100644
--- a/drivers/gpu/drm/xe/xe_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_sriov_vf.c
@@ -163,9 +163,15 @@ static void vf_post_migration_shutdown(struct xe_device *xe)
 {
 	struct xe_gt *gt;
 	unsigned int id;
+	int ret = 0;
 
-	for_each_gt(gt, xe, id)
+	for_each_gt(gt, xe, id) {
 		xe_guc_submit_pause(&gt->uc.guc);
+		ret |= xe_guc_submit_reset_block(&gt->uc.guc);
+	}
+
+	if (ret)
+		drm_info(&xe->drm, "migration recovery encountered ongoing reset\n");
 }
 
 /**
@@ -187,8 +193,10 @@ static void vf_post_migration_kickstart(struct xe_device *xe)
 	 */
 	xe_irq_resume(xe);
 
-	for_each_gt(gt, xe, id)
+	for_each_gt(gt, xe, id) {
+		xe_guc_submit_reset_unblock(&gt->uc.guc);
 		xe_guc_submit_unpause(&gt->uc.guc);
+	}
 }
 
 static bool gt_vf_post_migration_needed(struct xe_gt *gt)
-- 
2.25.1

[PATCH v8 4/8] drm/xe/vf: Rebase HWSP of all contexts after migration

[Tomasz Lis]

All contexts require an update due to GGTT range shift, as that
affects their HWSP.

The HW status page of a context contains GGTT references, which
need to be shifted to a new range (or re-computed using the
previously updated vma nodes). The references include ring start
address and indirect state address.

v2: move some functions to better matched files
v3: Add missing kerneldocs
v4: Style fix

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Acked-by: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Reviewed-by: Michal Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c | 13 +++++++++++++
 drivers/gpu/drm/xe/xe_exec_queue.h |  2 ++
 drivers/gpu/drm/xe/xe_guc_submit.c | 16 ++++++++++++++++
 drivers/gpu/drm/xe/xe_guc_submit.h |  2 ++
 drivers/gpu/drm/xe/xe_lrc.c        | 17 +++++++++++++++++
 drivers/gpu/drm/xe/xe_lrc.h        |  1 +
 drivers/gpu/drm/xe/xe_sriov_vf.c   |  1 +
 7 files changed, 52 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index d5958518ef00..ae36a35ec80b 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -1076,3 +1076,16 @@ int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q, struct xe_vm *vm)
 
 	return err;
 }
+
+/**
+ * xe_exec_queue_contexts_hwsp_rebase - Re-compute GGTT references
+ * within all LRCs of a queue.
+ * @q: the &xe_exec_queue struct instance containing target LRCs
+ */
+void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q)
+{
+	int i;
+
+	for (i = 0; i < q->width; ++i)
+		xe_lrc_update_hwctx_regs_with_address(q->lrc[i]);
+}
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index 17bc50a7f05a..1d399a33c5c0 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -90,4 +90,6 @@ int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q,
 				      struct xe_vm *vm);
 void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
 
+void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q);
+
 #endif
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index f72785c655f8..bc0fc0494250 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2499,3 +2499,19 @@ void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p)
 		guc_exec_queue_print(q, p);
 	mutex_unlock(&guc->submission_state.lock);
 }
+
+/**
+ * xe_guc_contexts_hwsp_rebase - Re-compute GGTT references within all
+ * exec queues registered to given GuC.
+ * @guc: the &xe_guc struct instance
+ */
+void xe_guc_contexts_hwsp_rebase(struct xe_guc *guc)
+{
+	struct xe_exec_queue *q;
+	unsigned long index;
+
+	mutex_lock(&guc->submission_state.lock);
+	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
+		xe_exec_queue_contexts_hwsp_rebase(q);
+	mutex_unlock(&guc->submission_state.lock);
+}
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
index 4dd278f5f61b..d22f2d36dca1 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.h
+++ b/drivers/gpu/drm/xe/xe_guc_submit.h
@@ -46,4 +46,6 @@ xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot *snapsh
 void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p);
 void xe_guc_register_exec_queue(struct xe_exec_queue *q, int ctx_type);
 
+void xe_guc_contexts_hwsp_rebase(struct xe_guc *guc);
+
 #endif
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 540f044bf425..baf926ad3a66 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1439,6 +1439,23 @@ void xe_lrc_destroy(struct kref *ref)
 	kfree(lrc);
 }
 
+/**
+ * xe_lrc_update_hwctx_regs_with_address - Re-compute GGTT references within given LRC.
+ * @lrc: the &xe_lrc struct instance
+ */
+void xe_lrc_update_hwctx_regs_with_address(struct xe_lrc *lrc)
+{
+	if (xe_lrc_has_indirect_ring_state(lrc)) {
+		xe_lrc_write_ctx_reg(lrc, CTX_INDIRECT_RING_STATE,
+				     __xe_lrc_indirect_ring_ggtt_addr(lrc));
+
+		xe_lrc_write_indirect_ctx_reg(lrc, INDIRECT_CTX_RING_START,
+					      __xe_lrc_ring_ggtt_addr(lrc));
+	} else {
+		xe_lrc_write_ctx_reg(lrc, CTX_RING_START, __xe_lrc_ring_ggtt_addr(lrc));
+	}
+}
+
 void xe_lrc_set_ring_tail(struct xe_lrc *lrc, u32 tail)
 {
 	if (xe_lrc_has_indirect_ring_state(lrc))
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index b6c8053c581b..cc231bec709c 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -88,6 +88,7 @@ bool xe_lrc_ring_is_idle(struct xe_lrc *lrc);
 u32 xe_lrc_indirect_ring_ggtt_addr(struct xe_lrc *lrc);
 u32 xe_lrc_ggtt_addr(struct xe_lrc *lrc);
 u32 *xe_lrc_regs(struct xe_lrc *lrc);
+void xe_lrc_update_hwctx_regs_with_address(struct xe_lrc *lrc);
 
 u32 xe_lrc_read_ctx_reg(struct xe_lrc *lrc, int reg_nr);
 void xe_lrc_write_ctx_reg(struct xe_lrc *lrc, int reg_nr, u32 val);
diff --git a/drivers/gpu/drm/xe/xe_sriov_vf.c b/drivers/gpu/drm/xe/xe_sriov_vf.c
index 71d28b30de43..54a6218e48b0 100644
--- a/drivers/gpu/drm/xe/xe_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_sriov_vf.c
@@ -269,6 +269,7 @@ static int gt_vf_post_migration_fixups(struct xe_gt *gt)
 	shift = xe_gt_sriov_vf_ggtt_shift(gt);
 	if (shift) {
 		xe_tile_sriov_vf_fixup_ggtt_nodes(gt_to_tile(gt), shift);
+		xe_guc_contexts_hwsp_rebase(&gt->uc.guc);
 		/* FIXME: add the recovery steps */
 		xe_guc_ct_fixup_messages_with_ggtt(&gt->uc.guc.ct, shift);
 	}
-- 
2.25.1

[PATCH v8 5/8] drm/xe/vf: Rebase MEMIRQ structures for all contexts after migration

[Tomasz Lis]

All contexts require an update of state data, as the data includes
GGTT references to memirq-related buffers.

Default contexts need these references updated as well, because they
are not refreshed when a new context is created from them.

The way we write to vram requires scratch buffer to be used
before the whole block is memcopied. Since using kalloc() within
specific recovery functions would lead to unintended relations
between locks, we are allocating the buffer earlier, before
any locks are taken. The same buffer will be used for other steps
of the recovery.

v2: Update addresses by xe_lrc_write_ctx_reg() rather than
  set_memory_based_intr()
v3: Renamed parameter, reordered parameters in some functs
v4: Check if have MEMIRQ, move `xe_gt*` funct to proper file
v5: Revert back to requiring scratch buffer, but allocate it
  earlier this time

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Acked-by: Satyanarayana K V P <satyanarayana.k.v.p@intel.com> (v3)
Reviewed-by: Michal Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c  |  7 ++--
 drivers/gpu/drm/xe/xe_exec_queue.h  |  2 +-
 drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 14 ++++++++
 drivers/gpu/drm/xe/xe_gt_sriov_vf.h |  1 +
 drivers/gpu/drm/xe/xe_guc_submit.c  |  5 +--
 drivers/gpu/drm/xe/xe_guc_submit.h  |  2 +-
 drivers/gpu/drm/xe/xe_lrc.c         | 51 +++++++++++++++++++++++++++--
 drivers/gpu/drm/xe/xe_lrc.h         |  4 +++
 drivers/gpu/drm/xe/xe_sriov_vf.c    | 20 +++++++++--
 9 files changed, 96 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index ae36a35ec80b..0beb6388acb0 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -1081,11 +1081,14 @@ int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q, struct xe_vm *vm)
  * xe_exec_queue_contexts_hwsp_rebase - Re-compute GGTT references
  * within all LRCs of a queue.
  * @q: the &xe_exec_queue struct instance containing target LRCs
+ * @scratch: scratch buffer to be used as temporary storage
  */
-void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q)
+void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)
 {
 	int i;
 
-	for (i = 0; i < q->width; ++i)
+	for (i = 0; i < q->width; ++i) {
+		xe_lrc_update_memirq_regs_with_address(q->lrc[i], q->hwe, scratch);
 		xe_lrc_update_hwctx_regs_with_address(q->lrc[i]);
+	}
 }
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index 1d399a33c5c0..da720197929b 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -90,6 +90,6 @@ int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q,
 				      struct xe_vm *vm);
 void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
 
-void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q);
+void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
index b282838d59e6..0461d5513487 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
@@ -25,6 +25,7 @@
 #include "xe_guc.h"
 #include "xe_guc_hxg_helpers.h"
 #include "xe_guc_relay.h"
+#include "xe_lrc.h"
 #include "xe_mmio.h"
 #include "xe_sriov.h"
 #include "xe_sriov_vf.h"
@@ -750,6 +751,19 @@ int xe_gt_sriov_vf_connect(struct xe_gt *gt)
 	return err;
 }
 
+/**
+ * xe_gt_sriov_vf_default_lrcs_hwsp_rebase - Update GGTT references in HWSP of default LRCs.
+ * @gt: the &xe_gt struct instance
+ */
+void xe_gt_sriov_vf_default_lrcs_hwsp_rebase(struct xe_gt *gt)
+{
+	struct xe_hw_engine *hwe;
+	enum xe_hw_engine_id id;
+
+	for_each_hw_engine(hwe, gt, id)
+		xe_default_lrc_update_memirq_regs_with_address(hwe);
+}
+
 /**
  * xe_gt_sriov_vf_migrated_event_handler - Start a VF migration recovery,
  *   or just mark that a GuC is ready for it.
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
index e0357f341a2d..0af1dc769fe0 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.h
@@ -21,6 +21,7 @@ void xe_gt_sriov_vf_guc_versions(struct xe_gt *gt,
 int xe_gt_sriov_vf_query_config(struct xe_gt *gt);
 int xe_gt_sriov_vf_connect(struct xe_gt *gt);
 int xe_gt_sriov_vf_query_runtime(struct xe_gt *gt);
+void xe_gt_sriov_vf_default_lrcs_hwsp_rebase(struct xe_gt *gt);
 int xe_gt_sriov_vf_notify_resfix_done(struct xe_gt *gt);
 void xe_gt_sriov_vf_migrated_event_handler(struct xe_gt *gt);
 
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index bc0fc0494250..452fb6e63f31 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2504,14 +2504,15 @@ void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p)
  * xe_guc_contexts_hwsp_rebase - Re-compute GGTT references within all
  * exec queues registered to given GuC.
  * @guc: the &xe_guc struct instance
+ * @scratch: scratch buffer to be used as temporary storage
  */
-void xe_guc_contexts_hwsp_rebase(struct xe_guc *guc)
+void xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch)
 {
 	struct xe_exec_queue *q;
 	unsigned long index;
 
 	mutex_lock(&guc->submission_state.lock);
 	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
-		xe_exec_queue_contexts_hwsp_rebase(q);
+		xe_exec_queue_contexts_hwsp_rebase(q, scratch);
 	mutex_unlock(&guc->submission_state.lock);
 }
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
index d22f2d36dca1..9a2718c81d43 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.h
+++ b/drivers/gpu/drm/xe/xe_guc_submit.h
@@ -46,6 +46,6 @@ xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot *snapsh
 void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p);
 void xe_guc_register_exec_queue(struct xe_exec_queue *q, int ctx_type);
 
-void xe_guc_contexts_hwsp_rebase(struct xe_guc *guc);
+void xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index baf926ad3a66..9a67f4ae235a 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -697,7 +697,13 @@ u32 xe_lrc_regs_offset(struct xe_lrc *lrc)
 	return xe_lrc_pphwsp_offset(lrc) + LRC_PPHWSP_SIZE;
 }
 
-static size_t lrc_reg_size(struct xe_device *xe)
+/**
+ * xe_lrc_reg_size() - Get size of the LRC registers area within queues
+ * @xe: the &xe_device struct instance
+ *
+ * Returns: Size of the LRC registers area for current platform
+ */
+size_t xe_lrc_reg_size(struct xe_device *xe)
 {
 	if (GRAPHICS_VERx100(xe) >= 1250)
 		return 96 * sizeof(u32);
@@ -707,7 +713,7 @@ static size_t lrc_reg_size(struct xe_device *xe)
 
 size_t xe_lrc_skip_size(struct xe_device *xe)
 {
-	return LRC_PPHWSP_SIZE + lrc_reg_size(xe);
+	return LRC_PPHWSP_SIZE + xe_lrc_reg_size(xe);
 }
 
 static inline u32 __xe_lrc_seqno_offset(struct xe_lrc *lrc)
@@ -948,6 +954,47 @@ static void *empty_lrc_data(struct xe_hw_engine *hwe)
 	return data;
 }
 
+/**
+ * xe_default_lrc_update_memirq_regs_with_address - Re-compute GGTT references in default LRC
+ * of given engine.
+ * @hwe: the &xe_hw_engine struct instance
+ */
+void xe_default_lrc_update_memirq_regs_with_address(struct xe_hw_engine *hwe)
+{
+	struct xe_gt *gt = hwe->gt;
+	u32 *regs;
+
+	if (!gt->default_lrc[hwe->class])
+		return;
+
+	regs = gt->default_lrc[hwe->class] + LRC_PPHWSP_SIZE;
+	set_memory_based_intr(regs, hwe);
+}
+
+/**
+ * xe_lrc_update_memirq_regs_with_address - Re-compute GGTT references in mem interrupt data
+ * for given LRC.
+ * @lrc: the &xe_lrc struct instance
+ * @hwe: the &xe_hw_engine struct instance
+ * @regs: scratch buffer to be used as temporary storage
+ */
+void xe_lrc_update_memirq_regs_with_address(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
+					    u32 *regs)
+{
+	struct xe_gt *gt = hwe->gt;
+	struct iosys_map map;
+	size_t regs_len;
+
+	if (!xe_device_uses_memirq(gt_to_xe(gt)))
+		return;
+
+	map = __xe_lrc_regs_map(lrc);
+	regs_len = xe_lrc_reg_size(gt_to_xe(gt));
+	xe_map_memcpy_from(gt_to_xe(gt), regs, &map, 0, regs_len);
+	set_memory_based_intr(regs, hwe);
+	xe_map_memcpy_to(gt_to_xe(gt), &map, 0, regs, regs_len);
+}
+
 static void xe_lrc_set_ppgtt(struct xe_lrc *lrc, struct xe_vm *vm)
 {
 	u64 desc = xe_vm_pdp4_descriptor(vm, gt_to_tile(lrc->gt));
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index cc231bec709c..eceeeee6c021 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -89,6 +89,9 @@ u32 xe_lrc_indirect_ring_ggtt_addr(struct xe_lrc *lrc);
 u32 xe_lrc_ggtt_addr(struct xe_lrc *lrc);
 u32 *xe_lrc_regs(struct xe_lrc *lrc);
 void xe_lrc_update_hwctx_regs_with_address(struct xe_lrc *lrc);
+void xe_default_lrc_update_memirq_regs_with_address(struct xe_hw_engine *hwe);
+void xe_lrc_update_memirq_regs_with_address(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
+					    u32 *regs);
 
 u32 xe_lrc_read_ctx_reg(struct xe_lrc *lrc, int reg_nr);
 void xe_lrc_write_ctx_reg(struct xe_lrc *lrc, int reg_nr, u32 val);
@@ -107,6 +110,7 @@ s32 xe_lrc_start_seqno(struct xe_lrc *lrc);
 u32 xe_lrc_parallel_ggtt_addr(struct xe_lrc *lrc);
 struct iosys_map xe_lrc_parallel_map(struct xe_lrc *lrc);
 
+size_t xe_lrc_reg_size(struct xe_device *xe);
 size_t xe_lrc_skip_size(struct xe_device *xe);
 
 void xe_lrc_dump_default(struct drm_printer *p,
diff --git a/drivers/gpu/drm/xe/xe_sriov_vf.c b/drivers/gpu/drm/xe/xe_sriov_vf.c
index 54a6218e48b0..43ac73e432d4 100644
--- a/drivers/gpu/drm/xe/xe_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_sriov_vf.c
@@ -13,6 +13,7 @@
 #include "xe_guc_ct.h"
 #include "xe_guc_submit.h"
 #include "xe_irq.h"
+#include "xe_lrc.h"
 #include "xe_pm.h"
 #include "xe_sriov.h"
 #include "xe_sriov_printk.h"
@@ -244,6 +245,11 @@ static int vf_get_next_migrated_gt_id(struct xe_device *xe)
 	return -1;
 }
 
+static size_t post_migration_scratch_size(struct xe_device *xe)
+{
+	return xe_lrc_reg_size(xe);
+}
+
 /**
  * Perform post-migration fixups on a single GT.
  *
@@ -260,19 +266,29 @@ static int vf_get_next_migrated_gt_id(struct xe_device *xe)
 static int gt_vf_post_migration_fixups(struct xe_gt *gt)
 {
 	s64 shift;
+	void *buf;
 	int err;
 
+	buf = kmalloc(post_migration_scratch_size(gt_to_xe(gt)), GFP_KERNEL);
+	if (!buf)
+		return -ENOMEM;
+
 	err = xe_gt_sriov_vf_query_config(gt);
-	if (err)
+	if (err) {
+		kfree(buf);
 		return err;
+	}
 
 	shift = xe_gt_sriov_vf_ggtt_shift(gt);
 	if (shift) {
 		xe_tile_sriov_vf_fixup_ggtt_nodes(gt_to_tile(gt), shift);
-		xe_guc_contexts_hwsp_rebase(&gt->uc.guc);
+		xe_gt_sriov_vf_default_lrcs_hwsp_rebase(gt);
+		xe_guc_contexts_hwsp_rebase(&gt->uc.guc, buf);
 		/* FIXME: add the recovery steps */
 		xe_guc_ct_fixup_messages_with_ggtt(&gt->uc.guc.ct, shift);
 	}
+
+	kfree(buf);
 	return 0;
 }
 
-- 
2.25.1

[PATCH v8 6/8] drm/xe/vf: Post migration, repopulate ring area for pending request

[Tomasz Lis]

The commands within ring area allocated for a request may contain
references to GGTT. These references require update after VF
migration, in order to continue any preempted LRCs, or jobs which
were emitted to the ring but not sent to GuC yet.

This change calls the emit function again for all such jobs,
as part of post-migration recovery.

v2: Moved few functions to better files
v3: Take job_list_lock

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Reviewed-by: Michal Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_exec_queue.h |  2 ++
 drivers/gpu/drm/xe/xe_guc_submit.c | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_guc_submit.h |  2 ++
 drivers/gpu/drm/xe/xe_sriov_vf.c   |  2 +-
 5 files changed, 53 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 0beb6388acb0..1a7950d18800 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -1092,3 +1092,27 @@ void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)
 		xe_lrc_update_hwctx_regs_with_address(q->lrc[i]);
 	}
 }
+
+/**
+ * xe_exec_queue_jobs_ring_restore - Re-emit ring commands of requests pending on given queue.
+ * @q: the &xe_exec_queue struct instance
+ */
+void xe_exec_queue_jobs_ring_restore(struct xe_exec_queue *q)
+{
+	struct xe_gpu_scheduler *sched = &q->guc->sched;
+	struct xe_sched_job *job;
+
+	/*
+	 * This routine is used within VF migration recovery. This means
+	 * using the lock here, introduces a restriction: in no place we
+	 * can wait for any GFX HW response when that lock is taken.
+	 */
+	spin_lock(&sched->base.job_list_lock);
+	list_for_each_entry(job, &sched->base.pending_list, drm.list) {
+		if (xe_sched_job_is_error(job))
+			continue;
+
+		q->ring_ops->emit_job(job);
+	}
+	spin_unlock(&sched->base.job_list_lock);
+}
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index da720197929b..0ffc0cb03aa6 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -92,4 +92,6 @@ void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
 
 void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch);
 
+void xe_exec_queue_jobs_ring_restore(struct xe_exec_queue *q);
+
 #endif
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 452fb6e63f31..8d090dced9cf 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -781,6 +781,30 @@ guc_exec_queue_run_job(struct drm_sched_job *drm_job)
 	return fence;
 }
 
+/**
+ * xe_guc_jobs_ring_rebase - Re-emit ring commands of requests pending
+ * on all queues under a guc.
+ * @guc: the &xe_guc struct instance
+ */
+void xe_guc_jobs_ring_rebase(struct xe_guc *guc)
+{
+	struct xe_exec_queue *q;
+	unsigned long index;
+
+	/*
+	 * This routine is used within VF migration recovery. This means
+	 * using the lock here, introduces a restriction: in no place we
+	 * can wait for any GFX HW response when that lock is taken.
+	 */
+	mutex_lock(&guc->submission_state.lock);
+	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
+		if (exec_queue_killed_or_banned_or_wedged(q))
+			continue;
+		xe_exec_queue_jobs_ring_restore(q);
+	}
+	mutex_unlock(&guc->submission_state.lock);
+}
+
 static void guc_exec_queue_free_job(struct drm_sched_job *drm_job)
 {
 	struct xe_sched_job *job = to_xe_sched_job(drm_job);
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
index 9a2718c81d43..92a6f0ade615 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.h
+++ b/drivers/gpu/drm/xe/xe_guc_submit.h
@@ -34,6 +34,8 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
 int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len);
 int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len);
 
+void xe_guc_jobs_ring_rebase(struct xe_guc *guc);
+
 struct xe_guc_submit_exec_queue_snapshot *
 xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q);
 void
diff --git a/drivers/gpu/drm/xe/xe_sriov_vf.c b/drivers/gpu/drm/xe/xe_sriov_vf.c
index 43ac73e432d4..a219395c15de 100644
--- a/drivers/gpu/drm/xe/xe_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_sriov_vf.c
@@ -284,7 +284,7 @@ static int gt_vf_post_migration_fixups(struct xe_gt *gt)
 		xe_tile_sriov_vf_fixup_ggtt_nodes(gt_to_tile(gt), shift);
 		xe_gt_sriov_vf_default_lrcs_hwsp_rebase(gt);
 		xe_guc_contexts_hwsp_rebase(&gt->uc.guc, buf);
-		/* FIXME: add the recovery steps */
+		xe_guc_jobs_ring_rebase(&gt->uc.guc);
 		xe_guc_ct_fixup_messages_with_ggtt(&gt->uc.guc.ct, shift);
 	}
 
-- 
2.25.1

[PATCH v8 7/8] drm/xe/vf: Refresh utilization buffer during migration recovery

[Tomasz Lis]

The WA buffer we use to capture context utilization contains GGTT
references. This means its instructions have to be either fixed or
re-emitted during VF post-migration recovery.

This patch adds re-emitting content of the utilization WA BB during
the recovery.

The way we write to vram requires scratch buffer to be used before
the whole block is memcopied. We are re-using a scratch buffer
introduced in earlier part of the recovery. This is not a performance
optimization, but a necessity to avoid creating dependencies between
locks.

v2: Notable rebase after "Prepare WA BB setup for more users" patch
v3: Added error propagation

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Reviewed-by: Michal Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c | 10 +++++++-
 drivers/gpu/drm/xe/xe_exec_queue.h |  2 +-
 drivers/gpu/drm/xe/xe_guc_submit.c | 14 ++++++++---
 drivers/gpu/drm/xe/xe_guc_submit.h |  2 +-
 drivers/gpu/drm/xe/xe_lrc.c        | 39 ++++++++++++++++++++++++------
 drivers/gpu/drm/xe/xe_lrc.h        |  4 +++
 drivers/gpu/drm/xe/xe_sriov_vf.c   | 15 ++++++------
 7 files changed, 66 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 1a7950d18800..df900ea90c60 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -1082,15 +1082,23 @@ int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q, struct xe_vm *vm)
  * within all LRCs of a queue.
  * @q: the &xe_exec_queue struct instance containing target LRCs
  * @scratch: scratch buffer to be used as temporary storage
+ *
+ * Returns: zero on success, negative error code on failure
  */
-void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)
+int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)
 {
 	int i;
+	int err = 0;
 
 	for (i = 0; i < q->width; ++i) {
 		xe_lrc_update_memirq_regs_with_address(q->lrc[i], q->hwe, scratch);
 		xe_lrc_update_hwctx_regs_with_address(q->lrc[i]);
+		err = xe_lrc_setup_wa_bb_with_scratch(q->lrc[i], q->hwe, scratch);
+		if (err)
+			break;
 	}
+
+	return err;
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index 0ffc0cb03aa6..4d416f23001c 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -90,7 +90,7 @@ int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q,
 				      struct xe_vm *vm);
 void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
 
-void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch);
+int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch);
 
 void xe_exec_queue_jobs_ring_restore(struct xe_exec_queue *q);
 
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 8d090dced9cf..f59fecc58fa8 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2529,14 +2529,22 @@ void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p)
  * exec queues registered to given GuC.
  * @guc: the &xe_guc struct instance
  * @scratch: scratch buffer to be used as temporary storage
+ *
+ * Returns: zero on success, negative error code on failure.
  */
-void xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch)
+int xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch)
 {
 	struct xe_exec_queue *q;
 	unsigned long index;
+	int err = 0;
 
 	mutex_lock(&guc->submission_state.lock);
-	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q)
-		xe_exec_queue_contexts_hwsp_rebase(q, scratch);
+	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
+		err = xe_exec_queue_contexts_hwsp_rebase(q, scratch);
+		if (err)
+			break;
+	}
 	mutex_unlock(&guc->submission_state.lock);
+
+	return err;
 }
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
index 92a6f0ade615..6b5df5d0956b 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.h
+++ b/drivers/gpu/drm/xe/xe_guc_submit.h
@@ -48,6 +48,6 @@ xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot *snapsh
 void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p);
 void xe_guc_register_exec_queue(struct xe_exec_queue *q, int ctx_type);
 
-void xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch);
+int xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 9a67f4ae235a..8760c4c2ca38 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -41,7 +41,6 @@
 #define LRC_PPHWSP_SIZE				SZ_4K
 #define LRC_INDIRECT_CTX_BO_SIZE		SZ_4K
 #define LRC_INDIRECT_RING_STATE_SIZE		SZ_4K
-#define LRC_WA_BB_SIZE				SZ_4K
 
 /*
  * Layout of the LRC and associated data allocated as
@@ -1149,13 +1148,11 @@ static int setup_bo(struct bo_setup_state *state)
 	ssize_t remain;
 
 	if (state->lrc->bo->vmap.is_iomem) {
-		state->buffer = kmalloc(state->max_size, GFP_KERNEL);
 		if (!state->buffer)
 			return -ENOMEM;
 		state->ptr = state->buffer;
 	} else {
 		state->ptr = state->lrc->bo->vmap.vaddr + state->offset;
-		state->buffer = NULL;
 	}
 
 	remain = state->max_size / sizeof(u32);
@@ -1180,7 +1177,6 @@ static int setup_bo(struct bo_setup_state *state)
 	return 0;
 
 fail:
-	kfree(state->buffer);
 	return -ENOSPC;
 }
 
@@ -1192,10 +1188,16 @@ static void finish_bo(struct bo_setup_state *state)
 	xe_map_memcpy_to(gt_to_xe(state->lrc->gt), &state->lrc->bo->vmap,
 			 state->offset, state->buffer,
 			 state->written * sizeof(u32));
-	kfree(state->buffer);
 }
 
-static int setup_wa_bb(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
+/**
+ * xe_lrc_setup_wa_bb_with_scratch - Execute all wa bb setup callbacks.
+ * @lrc: the &xe_lrc struct instance
+ * @hwe: the &xe_hw_engine struct instance
+ * @scratch: preallocated scratch buffer for temporary storage
+ * Return: 0 on success, negative error code on failure
+ */
+int xe_lrc_setup_wa_bb_with_scratch(struct xe_lrc *lrc, struct xe_hw_engine *hwe, u32 *scratch)
 {
 	static const struct bo_setup funcs[] = {
 		{ .setup = setup_timestamp_wa },
@@ -1206,6 +1208,7 @@ static int setup_wa_bb(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
 		.lrc = lrc,
 		.hwe = hwe,
 		.max_size = LRC_WA_BB_SIZE,
+		.buffer = scratch,
 		.reserve_dw = 1,
 		.offset = __xe_lrc_wa_bb_offset(lrc),
 		.funcs = funcs,
@@ -1228,6 +1231,21 @@ static int setup_wa_bb(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
 	return 0;
 }
 
+static int setup_wa_bb(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
+{
+	u32 *buf = NULL;
+	int ret;
+
+	if (lrc->bo->vmap.is_iomem)
+		buf = kmalloc(LRC_WA_BB_SIZE, GFP_KERNEL);
+
+	ret = xe_lrc_setup_wa_bb_with_scratch(lrc, hwe, buf);
+
+	kfree(buf);
+
+	return ret;
+}
+
 static int
 setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
 {
@@ -1238,6 +1256,7 @@ setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
 		.lrc = lrc,
 		.hwe = hwe,
 		.max_size = (63 * 64) /* max 63 cachelines */,
+		.buffer = NULL,
 		.offset = __xe_lrc_indirect_ctx_offset(lrc),
 	};
 	int ret;
@@ -1254,9 +1273,14 @@ setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
 	if (xe_gt_WARN_ON(lrc->gt, !state.funcs))
 		return 0;
 
+	if (lrc->bo->vmap.is_iomem)
+		state.buffer = kmalloc(state.max_size, GFP_KERNEL);
+
 	ret = setup_bo(&state);
-	if (ret)
+	if (ret) {
+		kfree(state.buffer);
 		return ret;
+	}
 
 	/*
 	 * Align to 64B cacheline so there's no garbage at the end for CS to
@@ -1268,6 +1292,7 @@ setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
 	}
 
 	finish_bo(&state);
+	kfree(state.buffer);
 
 	xe_lrc_write_ctx_reg(lrc,
 			     CTX_CS_INDIRECT_CTX,
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index eceeeee6c021..188565465779 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -42,6 +42,8 @@ struct xe_lrc_snapshot {
 #define LRC_PPHWSP_FLUSH_INVAL_SCRATCH_ADDR (0x34 * 4)
 #define LRC_PPHWSP_PXP_INVAL_SCRATCH_ADDR (0x40 * 4)
 
+#define LRC_WA_BB_SIZE SZ_4K
+
 #define XE_LRC_CREATE_RUNALONE 0x1
 #define XE_LRC_CREATE_PXP 0x2
 struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
@@ -129,6 +131,8 @@ u32 xe_lrc_ctx_timestamp_udw_ggtt_addr(struct xe_lrc *lrc);
 u64 xe_lrc_ctx_timestamp(struct xe_lrc *lrc);
 u32 xe_lrc_ctx_job_timestamp_ggtt_addr(struct xe_lrc *lrc);
 u32 xe_lrc_ctx_job_timestamp(struct xe_lrc *lrc);
+int xe_lrc_setup_wa_bb_with_scratch(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
+				    u32 *scratch);
 
 /**
  * xe_lrc_update_timestamp - readout LRC timestamp and update cached value
diff --git a/drivers/gpu/drm/xe/xe_sriov_vf.c b/drivers/gpu/drm/xe/xe_sriov_vf.c
index a219395c15de..5de81f213d83 100644
--- a/drivers/gpu/drm/xe/xe_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_sriov_vf.c
@@ -247,7 +247,7 @@ static int vf_get_next_migrated_gt_id(struct xe_device *xe)
 
 static size_t post_migration_scratch_size(struct xe_device *xe)
 {
-	return xe_lrc_reg_size(xe);
+	return max(xe_lrc_reg_size(xe), LRC_WA_BB_SIZE);
 }
 
 /**
@@ -274,22 +274,23 @@ static int gt_vf_post_migration_fixups(struct xe_gt *gt)
 		return -ENOMEM;
 
 	err = xe_gt_sriov_vf_query_config(gt);
-	if (err) {
-		kfree(buf);
-		return err;
-	}
+	if (err)
+		goto out;
 
 	shift = xe_gt_sriov_vf_ggtt_shift(gt);
 	if (shift) {
 		xe_tile_sriov_vf_fixup_ggtt_nodes(gt_to_tile(gt), shift);
 		xe_gt_sriov_vf_default_lrcs_hwsp_rebase(gt);
-		xe_guc_contexts_hwsp_rebase(&gt->uc.guc, buf);
+		err = xe_guc_contexts_hwsp_rebase(&gt->uc.guc, buf);
+		if (err)
+			goto out;
 		xe_guc_jobs_ring_rebase(&gt->uc.guc);
 		xe_guc_ct_fixup_messages_with_ggtt(&gt->uc.guc.ct, shift);
 	}
 
+out:
 	kfree(buf);
-	return 0;
+	return err;
 }
 
 static void vf_post_migration_recovery(struct xe_device *xe)
-- 
2.25.1

[PATCH v8 8/8] drm/xe/vf: Rebase exec queue parallel commands during migration recovery

[Tomasz Lis]

Parallel exec queues have an additional command streamer buffer which holds
a GGTT reference to data within context status. The GGTT references have to
be fixed after VF migration.

v2: Properly handle nop entry, verify if parsing goes ok
v3: Improve error/warn logging, add propagation of errors,
 give names to magic offsets

Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/xe/abi/guc_actions_abi.h |  8 ++++
 drivers/gpu/drm/xe/xe_guc_submit.c       | 54 ++++++++++++++++++++++++
 2 files changed, 62 insertions(+)

diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
index 81eb046aeebf..d8cf68a0516d 100644
--- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
@@ -193,6 +193,14 @@ enum xe_guc_register_context_multi_lrc_param_offsets {
 	XE_GUC_REGISTER_CONTEXT_MULTI_LRC_MSG_MIN_LEN = 11,
 };
 
+enum xe_guc_context_wq_item_offsets {
+	XE_GUC_CONTEXT_WQ_HEADER_DATA_0_TYPE_LEN = 0,
+	XE_GUC_CONTEXT_WQ_EL_INFO_DATA_1_CTX_DESC_LOW,
+	XE_GUC_CONTEXT_WQ_EL_INFO_DATA_2_GUCCTX_RINGTAIL_FREEZEPOCS,
+	XE_GUC_CONTEXT_WQ_EL_INFO_DATA_3_WI_FENCE_ID,
+	XE_GUC_CONTEXT_WQ_EL_CHILD_LIST_DATA_4_RINGTAIL,
+};
+
 enum xe_guc_report_status {
 	XE_GUC_REPORT_STATUS_UNKNOWN = 0x0,
 	XE_GUC_REPORT_STATUS_ACKED = 0x1,
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index f59fecc58fa8..427694afe0cc 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -671,12 +671,18 @@ static void wq_item_append(struct xe_exec_queue *q)
 	if (wq_wait_for_space(q, wqi_size))
 		return;
 
+	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_HEADER_DATA_0_TYPE_LEN);
 	wqi[i++] = FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_MULTI_LRC) |
 		FIELD_PREP(WQ_LEN_MASK, len_dw);
+	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_INFO_DATA_1_CTX_DESC_LOW);
 	wqi[i++] = xe_lrc_descriptor(q->lrc[0]);
+	xe_gt_assert(guc_to_gt(guc), i ==
+		     XE_GUC_CONTEXT_WQ_EL_INFO_DATA_2_GUCCTX_RINGTAIL_FREEZEPOCS);
 	wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
 		FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc[0]->ring.tail / sizeof(u64));
+	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_INFO_DATA_3_WI_FENCE_ID);
 	wqi[i++] = 0;
+	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_CHILD_LIST_DATA_4_RINGTAIL);
 	for (j = 1; j < q->width; ++j) {
 		struct xe_lrc *lrc = q->lrc[j];
 
@@ -697,6 +703,50 @@ static void wq_item_append(struct xe_exec_queue *q)
 	parallel_write(xe, map, wq_desc.tail, q->guc->wqi_tail);
 }
 
+static int wq_items_rebase(struct xe_exec_queue *q)
+{
+	struct xe_guc *guc = exec_queue_to_guc(q);
+	struct xe_device *xe = guc_to_xe(guc);
+	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
+	int i = q->guc->wqi_head;
+
+	/* the ring starts after a header struct */
+	iosys_map_incr(&map, offsetof(struct guc_submit_parallel_scratch, wq[0]));
+
+	while ((i % WQ_SIZE) != (q->guc->wqi_tail % WQ_SIZE)) {
+		u32 len_dw, type, val;
+
+		if (drm_WARN_ON_ONCE(&xe->drm, i < 0 || i > 2 * WQ_SIZE))
+			break;
+
+		val = xe_map_rd_ring_u32(xe, &map, i / sizeof(u32) +
+					 XE_GUC_CONTEXT_WQ_HEADER_DATA_0_TYPE_LEN,
+					 WQ_SIZE / sizeof(u32));
+		len_dw = FIELD_GET(WQ_LEN_MASK, val);
+		type = FIELD_GET(WQ_TYPE_MASK, val);
+
+		if (drm_WARN_ON_ONCE(&xe->drm, len_dw >= WQ_SIZE / sizeof(u32)))
+			break;
+
+		if (type == WQ_TYPE_MULTI_LRC) {
+			val = xe_lrc_descriptor(q->lrc[0]);
+			xe_map_wr_ring_u32(xe, &map, i / sizeof(u32) +
+					   XE_GUC_CONTEXT_WQ_EL_INFO_DATA_1_CTX_DESC_LOW,
+					   WQ_SIZE / sizeof(u32), val);
+		} else if (drm_WARN_ON_ONCE(&xe->drm, type != WQ_TYPE_NOOP)) {
+			break;
+		}
+
+		i += (len_dw + 1) * sizeof(u32);
+	}
+
+	if ((i % WQ_SIZE) != (q->guc->wqi_tail % WQ_SIZE)) {
+		xe_gt_err(q->gt, "Exec queue fixups incomplete - wqi parse failed\n");
+		return -EBADMSG;
+	}
+	return 0;
+}
+
 #define RESUME_PENDING	~0x0ull
 static void submit_exec_queue(struct xe_exec_queue *q)
 {
@@ -2543,6 +2593,10 @@ int xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch)
 		err = xe_exec_queue_contexts_hwsp_rebase(q, scratch);
 		if (err)
 			break;
+		if (xe_exec_queue_is_parallel(q))
+			err = wq_items_rebase(q);
+		if (err)
+			break;
 	}
 	mutex_unlock(&guc->submission_state.lock);
 
-- 
2.25.1

✓ CI.KUnit: success for drm/xe/vf: Post-migration recovery of queues and jobs (rev9)

[Patchwork]

== Series Details ==

Series: drm/xe/vf: Post-migration recovery of queues and jobs (rev9)
URL   : https://patchwork.freedesktop.org/series/148982/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[03:06:15] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:06:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:06:46] Starting KUnit Kernel (1/1)...
[03:06:46] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:06:46] ================== guc_buf (11 subtests) ===================
[03:06:46] [PASSED] test_smallest
[03:06:46] [PASSED] test_largest
[03:06:46] [PASSED] test_granular
[03:06:46] [PASSED] test_unique
[03:06:46] [PASSED] test_overlap
[03:06:46] [PASSED] test_reusable
[03:06:46] [PASSED] test_too_big
[03:06:46] [PASSED] test_flush
[03:06:46] [PASSED] test_lookup
[03:06:46] [PASSED] test_data
[03:06:46] [PASSED] test_class
[03:06:46] ===================== [PASSED] guc_buf =====================
[03:06:46] =================== guc_dbm (7 subtests) ===================
[03:06:46] [PASSED] test_empty
[03:06:46] [PASSED] test_default
[03:06:46] ======================== test_size  ========================
[03:06:46] [PASSED] 4
[03:06:46] [PASSED] 8
[03:06:46] [PASSED] 32
[03:06:46] [PASSED] 256
[03:06:46] ==================== [PASSED] test_size ====================
[03:06:46] ======================= test_reuse  ========================
[03:06:46] [PASSED] 4
[03:06:46] [PASSED] 8
[03:06:46] [PASSED] 32
[03:06:46] [PASSED] 256
[03:06:46] =================== [PASSED] test_reuse ====================
[03:06:46] =================== test_range_overlap  ====================
[03:06:46] [PASSED] 4
[03:06:46] [PASSED] 8
[03:06:46] [PASSED] 32
[03:06:46] [PASSED] 256
[03:06:46] =============== [PASSED] test_range_overlap ================
[03:06:46] =================== test_range_compact  ====================
[03:06:46] [PASSED] 4
[03:06:46] [PASSED] 8
[03:06:46] [PASSED] 32
[03:06:46] [PASSED] 256
[03:06:46] =============== [PASSED] test_range_compact ================
[03:06:46] ==================== test_range_spare  =====================
[03:06:46] [PASSED] 4
[03:06:46] [PASSED] 8
[03:06:46] [PASSED] 32
[03:06:46] [PASSED] 256
[03:06:46] ================ [PASSED] test_range_spare =================
[03:06:46] ===================== [PASSED] guc_dbm =====================
[03:06:46] =================== guc_idm (6 subtests) ===================
[03:06:46] [PASSED] bad_init
[03:06:46] [PASSED] no_init
[03:06:46] [PASSED] init_fini
[03:06:46] [PASSED] check_used
[03:06:46] [PASSED] check_quota
[03:06:46] [PASSED] check_all
[03:06:46] ===================== [PASSED] guc_idm =====================
[03:06:46] ================== no_relay (3 subtests) ===================
[03:06:46] [PASSED] xe_drops_guc2pf_if_not_ready
[03:06:46] [PASSED] xe_drops_guc2vf_if_not_ready
[03:06:46] [PASSED] xe_rejects_send_if_not_ready
[03:06:46] ==================== [PASSED] no_relay =====================
[03:06:46] ================== pf_relay (14 subtests) ==================
[03:06:46] [PASSED] pf_rejects_guc2pf_too_short
[03:06:46] [PASSED] pf_rejects_guc2pf_too_long
[03:06:46] [PASSED] pf_rejects_guc2pf_no_payload
[03:06:46] [PASSED] pf_fails_no_payload
[03:06:46] [PASSED] pf_fails_bad_origin
[03:06:46] [PASSED] pf_fails_bad_type
[03:06:46] [PASSED] pf_txn_reports_error
[03:06:46] [PASSED] pf_txn_sends_pf2guc
[03:06:46] [PASSED] pf_sends_pf2guc
[03:06:46] [SKIPPED] pf_loopback_nop
[03:06:46] [SKIPPED] pf_loopback_echo
[03:06:46] [SKIPPED] pf_loopback_fail
[03:06:46] [SKIPPED] pf_loopback_busy
[03:06:46] [SKIPPED] pf_loopback_retry
[03:06:46] ==================== [PASSED] pf_relay =====================
[03:06:46] ================== vf_relay (3 subtests) ===================
[03:06:46] [PASSED] vf_rejects_guc2vf_too_short
[03:06:46] [PASSED] vf_rejects_guc2vf_too_long
[03:06:46] [PASSED] vf_rejects_guc2vf_no_payload
[03:06:46] ==================== [PASSED] vf_relay =====================
[03:06:46] ===================== lmtt (1 subtest) =====================
[03:06:46] ======================== test_ops  =========================
[03:06:46] [PASSED] 2-level
[03:06:46] [PASSED] multi-level
[03:06:46] ==================== [PASSED] test_ops =====================
[03:06:46] ====================== [PASSED] lmtt =======================
[03:06:46] ================= pf_service (11 subtests) =================
[03:06:46] [PASSED] pf_negotiate_any
[03:06:46] [PASSED] pf_negotiate_base_match
[03:06:46] [PASSED] pf_negotiate_base_newer
[03:06:46] [PASSED] pf_negotiate_base_next
[03:06:46] [SKIPPED] pf_negotiate_base_older
[03:06:46] [PASSED] pf_negotiate_base_prev
[03:06:46] [PASSED] pf_negotiate_latest_match
[03:06:46] [PASSED] pf_negotiate_latest_newer
[03:06:46] [PASSED] pf_negotiate_latest_next
[03:06:46] [SKIPPED] pf_negotiate_latest_older
[03:06:46] [SKIPPED] pf_negotiate_latest_prev
[03:06:46] =================== [PASSED] pf_service ====================
[03:06:46] =================== xe_mocs (2 subtests) ===================
[03:06:46] ================ xe_live_mocs_kernel_kunit  ================
[03:06:46] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[03:06:46] ================ xe_live_mocs_reset_kunit  =================
[03:06:46] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[03:06:46] ==================== [SKIPPED] xe_mocs =====================
[03:06:46] ================= xe_migrate (2 subtests) ==================
[03:06:46] ================= xe_migrate_sanity_kunit  =================
[03:06:46] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[03:06:46] ================== xe_validate_ccs_kunit  ==================
[03:06:46] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[03:06:46] =================== [SKIPPED] xe_migrate ===================
[03:06:46] ================== xe_dma_buf (1 subtest) ==================
[03:06:46] ==================== xe_dma_buf_kunit  =====================
[03:06:46] ================ [SKIPPED] xe_dma_buf_kunit ================
[03:06:46] =================== [SKIPPED] xe_dma_buf ===================
[03:06:46] ================= xe_bo_shrink (1 subtest) =================
[03:06:46] =================== xe_bo_shrink_kunit  ====================
[03:06:46] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[03:06:46] ================== [SKIPPED] xe_bo_shrink ==================
[03:06:46] ==================== xe_bo (2 subtests) ====================
[03:06:46] ================== xe_ccs_migrate_kunit  ===================
[03:06:46] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[03:06:46] ==================== xe_bo_evict_kunit  ====================
[03:06:46] =============== [SKIPPED] xe_bo_evict_kunit ================
[03:06:46] ===================== [SKIPPED] xe_bo ======================
[03:06:46] ==================== args (11 subtests) ====================
[03:06:46] [PASSED] count_args_test
[03:06:46] [PASSED] call_args_example
[03:06:46] [PASSED] call_args_test
[03:06:46] [PASSED] drop_first_arg_example
[03:06:46] [PASSED] drop_first_arg_test
[03:06:46] [PASSED] first_arg_example
[03:06:46] [PASSED] first_arg_test
[03:06:46] [PASSED] last_arg_example
[03:06:46] [PASSED] last_arg_test
[03:06:46] [PASSED] pick_arg_example
[03:06:46] [PASSED] sep_comma_example
[03:06:46] ====================== [PASSED] args =======================
[03:06:46] =================== xe_pci (3 subtests) ====================
[03:06:46] ==================== check_graphics_ip  ====================
[03:06:46] [PASSED] 12.70 Xe_LPG
[03:06:46] [PASSED] 12.71 Xe_LPG
[03:06:46] [PASSED] 12.74 Xe_LPG+
[03:06:46] [PASSED] 20.01 Xe2_HPG
[03:06:46] [PASSED] 20.02 Xe2_HPG
[03:06:46] [PASSED] 20.04 Xe2_LPG
[03:06:46] [PASSED] 30.00 Xe3_LPG
[03:06:46] [PASSED] 30.01 Xe3_LPG
[03:06:46] [PASSED] 30.03 Xe3_LPG
[03:06:46] ================ [PASSED] check_graphics_ip ================
[03:06:46] ===================== check_media_ip  ======================
[03:06:46] [PASSED] 13.00 Xe_LPM+
[03:06:46] [PASSED] 13.01 Xe2_HPM
[03:06:46] [PASSED] 20.00 Xe2_LPM
[03:06:46] [PASSED] 30.00 Xe3_LPM
[03:06:46] [PASSED] 30.02 Xe3_LPM
[03:06:46] ================= [PASSED] check_media_ip ==================
[03:06:46] ================= check_platform_gt_count  =================
[03:06:46] [PASSED] 0x9A60 (TIGERLAKE)
[03:06:46] [PASSED] 0x9A68 (TIGERLAKE)
[03:06:46] [PASSED] 0x9A70 (TIGERLAKE)
[03:06:46] [PASSED] 0x9A40 (TIGERLAKE)
[03:06:46] [PASSED] 0x9A49 (TIGERLAKE)
[03:06:46] [PASSED] 0x9A59 (TIGERLAKE)
[03:06:46] [PASSED] 0x9A78 (TIGERLAKE)
[03:06:46] [PASSED] 0x9AC0 (TIGERLAKE)
[03:06:46] [PASSED] 0x9AC9 (TIGERLAKE)
[03:06:46] [PASSED] 0x9AD9 (TIGERLAKE)
[03:06:46] [PASSED] 0x9AF8 (TIGERLAKE)
[03:06:46] [PASSED] 0x4C80 (ROCKETLAKE)
[03:06:46] [PASSED] 0x4C8A (ROCKETLAKE)
[03:06:46] [PASSED] 0x4C8B (ROCKETLAKE)
[03:06:46] [PASSED] 0x4C8C (ROCKETLAKE)
[03:06:46] [PASSED] 0x4C90 (ROCKETLAKE)
[03:06:46] [PASSED] 0x4C9A (ROCKETLAKE)
[03:06:46] [PASSED] 0x4680 (ALDERLAKE_S)
[03:06:46] [PASSED] 0x4682 (ALDERLAKE_S)
[03:06:46] [PASSED] 0x4688 (ALDERLAKE_S)
[03:06:46] [PASSED] 0x468A (ALDERLAKE_S)
[03:06:46] [PASSED] 0x468B (ALDERLAKE_S)
[03:06:46] [PASSED] 0x4690 (ALDERLAKE_S)
[03:06:46] [PASSED] 0x4692 (ALDERLAKE_S)
[03:06:46] [PASSED] 0x4693 (ALDERLAKE_S)
[03:06:46] [PASSED] 0x46A0 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46A1 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46A2 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46A3 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46A6 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46A8 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46AA (ALDERLAKE_P)
[03:06:46] [PASSED] 0x462A (ALDERLAKE_P)
[03:06:46] [PASSED] 0x4626 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x4628 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46B0 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46B1 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46B2 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46B3 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46C0 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46C1 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46C2 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46C3 (ALDERLAKE_P)
[03:06:46] [PASSED] 0x46D0 (ALDERLAKE_N)
[03:06:46] [PASSED] 0x46D1 (ALDERLAKE_N)
[03:06:46] [PASSED] 0x46D2 (ALDERLAKE_N)
[03:06:46] [PASSED] 0x46D3 (ALDERLAKE_N)
[03:06:46] [PASSED] 0x46D4 (ALDERLAKE_N)
[03:06:46] [PASSED] 0xA721 (ALDERLAKE_P)
[03:06:46] [PASSED] 0xA7A1 (ALDERLAKE_P)
[03:06:46] [PASSED] 0xA7A9 (ALDERLAKE_P)
[03:06:46] [PASSED] 0xA7AC (ALDERLAKE_P)
[03:06:46] [PASSED] 0xA7AD (ALDERLAKE_P)
[03:06:46] [PASSED] 0xA720 (ALDERLAKE_P)
[03:06:46] [PASSED] 0xA7A0 (ALDERLAKE_P)
[03:06:46] [PASSED] 0xA7A8 (ALDERLAKE_P)
[03:06:46] [PASSED] 0xA7AA (ALDERLAKE_P)
[03:06:46] [PASSED] 0xA7AB (ALDERLAKE_P)
[03:06:46] [PASSED] 0xA780 (ALDERLAKE_S)
[03:06:46] [PASSED] 0xA781 (ALDERLAKE_S)
[03:06:46] [PASSED] 0xA782 (ALDERLAKE_S)
[03:06:46] [PASSED] 0xA783 (ALDERLAKE_S)
[03:06:46] [PASSED] 0xA788 (ALDERLAKE_S)
[03:06:46] [PASSED] 0xA789 (ALDERLAKE_S)
[03:06:46] [PASSED] 0xA78A (ALDERLAKE_S)
[03:06:46] [PASSED] 0xA78B (ALDERLAKE_S)
[03:06:46] [PASSED] 0x4905 (DG1)
[03:06:46] [PASSED] 0x4906 (DG1)
[03:06:46] [PASSED] 0x4907 (DG1)
[03:06:46] [PASSED] 0x4908 (DG1)
[03:06:46] [PASSED] 0x4909 (DG1)
[03:06:46] [PASSED] 0x56C0 (DG2)
[03:06:46] [PASSED] 0x56C2 (DG2)
[03:06:46] [PASSED] 0x56C1 (DG2)
[03:06:46] [PASSED] 0x7D51 (METEORLAKE)
[03:06:46] [PASSED] 0x7DD1 (METEORLAKE)
[03:06:46] [PASSED] 0x7D41 (METEORLAKE)
[03:06:46] [PASSED] 0x7D67 (METEORLAKE)
[03:06:46] [PASSED] 0xB640 (METEORLAKE)
[03:06:46] [PASSED] 0x56A0 (DG2)
[03:06:46] [PASSED] 0x56A1 (DG2)
[03:06:46] [PASSED] 0x56A2 (DG2)
[03:06:46] [PASSED] 0x56BE (DG2)
[03:06:46] [PASSED] 0x56BF (DG2)
[03:06:46] [PASSED] 0x5690 (DG2)
[03:06:46] [PASSED] 0x5691 (DG2)
[03:06:46] [PASSED] 0x5692 (DG2)
[03:06:46] [PASSED] 0x56A5 (DG2)
[03:06:46] [PASSED] 0x56A6 (DG2)
[03:06:46] [PASSED] 0x56B0 (DG2)
[03:06:46] [PASSED] 0x56B1 (DG2)
[03:06:46] [PASSED] 0x56BA (DG2)
[03:06:46] [PASSED] 0x56BB (DG2)
[03:06:46] [PASSED] 0x56BC (DG2)
[03:06:46] [PASSED] 0x56BD (DG2)
[03:06:46] [PASSED] 0x5693 (DG2)
[03:06:46] [PASSED] 0x5694 (DG2)
[03:06:46] [PASSED] 0x5695 (DG2)
[03:06:46] [PASSED] 0x56A3 (DG2)
[03:06:46] [PASSED] 0x56A4 (DG2)
[03:06:46] [PASSED] 0x56B2 (DG2)
[03:06:46] [PASSED] 0x56B3 (DG2)
[03:06:46] [PASSED] 0x5696 (DG2)
[03:06:46] [PASSED] 0x5697 (DG2)
[03:06:46] [PASSED] 0xB69 (PVC)
[03:06:46] [PASSED] 0xB6E (PVC)
[03:06:46] [PASSED] 0xBD4 (PVC)
[03:06:46] [PASSED] 0xBD5 (PVC)
[03:06:46] [PASSED] 0xBD6 (PVC)
[03:06:46] [PASSED] 0xBD7 (PVC)
[03:06:46] [PASSED] 0xBD8 (PVC)
[03:06:46] [PASSED] 0xBD9 (PVC)
[03:06:46] [PASSED] 0xBDA (PVC)
[03:06:46] [PASSED] 0xBDB (PVC)
[03:06:46] [PASSED] 0xBE0 (PVC)
[03:06:46] [PASSED] 0xBE1 (PVC)
[03:06:46] [PASSED] 0xBE5 (PVC)
[03:06:46] [PASSED] 0x7D40 (METEORLAKE)
[03:06:46] [PASSED] 0x7D45 (METEORLAKE)
[03:06:46] [PASSED] 0x7D55 (METEORLAKE)
[03:06:46] [PASSED] 0x7D60 (METEORLAKE)
[03:06:46] [PASSED] 0x7DD5 (METEORLAKE)
[03:06:46] [PASSED] 0x6420 (LUNARLAKE)
[03:06:46] [PASSED] 0x64A0 (LUNARLAKE)
[03:06:46] [PASSED] 0x64B0 (LUNARLAKE)
[03:06:46] [PASSED] 0xE202 (BATTLEMAGE)
[03:06:46] [PASSED] 0xE209 (BATTLEMAGE)
[03:06:46] [PASSED] 0xE20B (BATTLEMAGE)
[03:06:46] [PASSED] 0xE20C (BATTLEMAGE)
[03:06:46] [PASSED] 0xE20D (BATTLEMAGE)
[03:06:46] [PASSED] 0xE210 (BATTLEMAGE)
[03:06:46] [PASSED] 0xE211 (BATTLEMAGE)
[03:06:46] [PASSED] 0xE212 (BATTLEMAGE)
[03:06:46] [PASSED] 0xE216 (BATTLEMAGE)
[03:06:46] [PASSED] 0xE220 (BATTLEMAGE)
[03:06:46] [PASSED] 0xE221 (BATTLEMAGE)
[03:06:46] [PASSED] 0xE222 (BATTLEMAGE)
[03:06:46] [PASSED] 0xE223 (BATTLEMAGE)
[03:06:46] [PASSED] 0xB080 (PANTHERLAKE)
[03:06:46] [PASSED] 0xB081 (PANTHERLAKE)
[03:06:46] [PASSED] 0xB082 (PANTHERLAKE)
[03:06:46] [PASSED] 0xB083 (PANTHERLAKE)
[03:06:46] [PASSED] 0xB084 (PANTHERLAKE)
[03:06:46] [PASSED] 0xB085 (PANTHERLAKE)
[03:06:46] [PASSED] 0xB086 (PANTHERLAKE)
[03:06:46] [PASSED] 0xB087 (PANTHERLAKE)
[03:06:46] [PASSED] 0xB08F (PANTHERLAKE)
[03:06:46] [PASSED] 0xB090 (PANTHERLAKE)
[03:06:46] [PASSED] 0xB0A0 (PANTHERLAKE)
[03:06:46] [PASSED] 0xB0B0 (PANTHERLAKE)
[03:06:46] [PASSED] 0xFD80 (PANTHERLAKE)
[03:06:46] [PASSED] 0xFD81 (PANTHERLAKE)
[03:06:46] ============= [PASSED] check_platform_gt_count =============
[03:06:46] ===================== [PASSED] xe_pci ======================
[03:06:46] =================== xe_rtp (2 subtests) ====================
[03:06:46] =============== xe_rtp_process_to_sr_tests  ================
[03:06:46] [PASSED] coalesce-same-reg
[03:06:46] [PASSED] no-match-no-add
[03:06:46] [PASSED] match-or
[03:06:46] [PASSED] match-or-xfail
[03:06:46] [PASSED] no-match-no-add-multiple-rules
[03:06:46] [PASSED] two-regs-two-entries
[03:06:46] [PASSED] clr-one-set-other
[03:06:46] [PASSED] set-field
[03:06:46] [PASSED] conflict-duplicate
[03:06:46] [PASSED] conflict-not-disjoint
[03:06:46] [PASSED] conflict-reg-type
[03:06:46] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[03:06:46] ================== xe_rtp_process_tests  ===================
[03:06:46] [PASSED] active1
[03:06:46] [PASSED] active2
[03:06:46] [PASSED] active-inactive
[03:06:46] [PASSED] inactive-active
[03:06:46] [PASSED] inactive-1st_or_active-inactive
[03:06:46] [PASSED] inactive-2nd_or_active-inactive
[03:06:46] [PASSED] inactive-last_or_active-inactive
[03:06:46] [PASSED] inactive-no_or_active-inactive
[03:06:46] ============== [PASSED] xe_rtp_process_tests ===============
[03:06:46] ===================== [PASSED] xe_rtp ======================
[03:06:46] ==================== xe_wa (1 subtest) =====================
[03:06:46] ======================== xe_wa_gt  =========================
[03:06:46] [PASSED] TIGERLAKE (B0)
[03:06:46] [PASSED] DG1 (A0)
[03:06:46] [PASSED] DG1 (B0)
[03:06:46] [PASSED] ALDERLAKE_S (A0)
[03:06:46] [PASSED] ALDERLAKE_S (B0)
[03:06:46] [PASSED] ALDERLAKE_S (C0)
[03:06:46] [PASSED] ALDERLAKE_S (D0)
[03:06:46] [PASSED] ALDERLAKE_P (A0)
[03:06:46] [PASSED] ALDERLAKE_P (B0)
[03:06:46] [PASSED] ALDERLAKE_P (C0)
[03:06:46] [PASSED] ALDERLAKE_S_RPLS (D0)
[03:06:46] [PASSED] ALDERLAKE_P_RPLU (E0)
[03:06:46] [PASSED] DG2_G10 (C0)
[03:06:46] [PASSED] DG2_G11 (B1)
[03:06:46] [PASSED] DG2_G12 (A1)
[03:06:46] [PASSED] METEORLAKE (g:A0, m:A0)
[03:06:46] [PASSED] METEORLAKE (g:A0, m:A0)
[03:06:46] [PASSED] METEORLAKE (g:A0, m:A0)
[03:06:46] [PASSED] LUNARLAKE (g:A0, m:A0)
[03:06:46] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[03:06:46] [PASSED] BATTLEMAGE (g:A0, m:A1)
[03:06:46] ==================== [PASSED] xe_wa_gt =====================
[03:06:46] ====================== [PASSED] xe_wa ======================
[03:06:46] ============================================================
[03:06:46] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[03:06:47] Elapsed time: 31.959s total, 4.117s configuring, 27.476s building, 0.327s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[03:06:47] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:06:48] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:07:10] Starting KUnit Kernel (1/1)...
[03:07:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:07:10] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[03:07:10] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[03:07:10] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[03:07:10] =========== drm_validate_clone_mode (2 subtests) ===========
[03:07:10] ============== drm_test_check_in_clone_mode  ===============
[03:07:10] [PASSED] in_clone_mode
[03:07:10] [PASSED] not_in_clone_mode
[03:07:10] ========== [PASSED] drm_test_check_in_clone_mode ===========
[03:07:10] =============== drm_test_check_valid_clones  ===============
[03:07:10] [PASSED] not_in_clone_mode
[03:07:10] [PASSED] valid_clone
[03:07:10] [PASSED] invalid_clone
[03:07:10] =========== [PASSED] drm_test_check_valid_clones ===========
[03:07:10] ============= [PASSED] drm_validate_clone_mode =============
[03:07:10] ============= drm_validate_modeset (1 subtest) =============
[03:07:10] [PASSED] drm_test_check_connector_changed_modeset
[03:07:10] ============== [PASSED] drm_validate_modeset ===============
[03:07:10] ====== drm_test_bridge_get_current_state (2 subtests) ======
[03:07:10] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[03:07:10] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[03:07:10] ======== [PASSED] drm_test_bridge_get_current_state ========
[03:07:10] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[03:07:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[03:07:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[03:07:10] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[03:07:10] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[03:07:10] ============== drm_bridge_alloc (2 subtests) ===============
[03:07:10] [PASSED] drm_test_drm_bridge_alloc_basic
[03:07:10] [PASSED] drm_test_drm_bridge_alloc_get_put
[03:07:10] ================ [PASSED] drm_bridge_alloc =================
[03:07:10] ================== drm_buddy (7 subtests) ==================
[03:07:10] [PASSED] drm_test_buddy_alloc_limit
[03:07:10] [PASSED] drm_test_buddy_alloc_optimistic
[03:07:10] [PASSED] drm_test_buddy_alloc_pessimistic
[03:07:10] [PASSED] drm_test_buddy_alloc_pathological
[03:07:10] [PASSED] drm_test_buddy_alloc_contiguous
[03:07:10] [PASSED] drm_test_buddy_alloc_clear
[03:07:10] [PASSED] drm_test_buddy_alloc_range_bias
[03:07:10] ==================== [PASSED] drm_buddy ====================
[03:07:10] ============= drm_cmdline_parser (40 subtests) =============
[03:07:10] [PASSED] drm_test_cmdline_force_d_only
[03:07:10] [PASSED] drm_test_cmdline_force_D_only_dvi
[03:07:10] [PASSED] drm_test_cmdline_force_D_only_hdmi
[03:07:10] [PASSED] drm_test_cmdline_force_D_only_not_digital
[03:07:10] [PASSED] drm_test_cmdline_force_e_only
[03:07:10] [PASSED] drm_test_cmdline_res
[03:07:10] [PASSED] drm_test_cmdline_res_vesa
[03:07:10] [PASSED] drm_test_cmdline_res_vesa_rblank
[03:07:10] [PASSED] drm_test_cmdline_res_rblank
[03:07:10] [PASSED] drm_test_cmdline_res_bpp
[03:07:10] [PASSED] drm_test_cmdline_res_refresh
[03:07:10] [PASSED] drm_test_cmdline_res_bpp_refresh
[03:07:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[03:07:10] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[03:07:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[03:07:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[03:07:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[03:07:10] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[03:07:10] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[03:07:10] [PASSED] drm_test_cmdline_res_margins_force_on
[03:07:10] [PASSED] drm_test_cmdline_res_vesa_margins
[03:07:10] [PASSED] drm_test_cmdline_name
[03:07:10] [PASSED] drm_test_cmdline_name_bpp
[03:07:10] [PASSED] drm_test_cmdline_name_option
[03:07:10] [PASSED] drm_test_cmdline_name_bpp_option
[03:07:10] [PASSED] drm_test_cmdline_rotate_0
[03:07:10] [PASSED] drm_test_cmdline_rotate_90
[03:07:10] [PASSED] drm_test_cmdline_rotate_180
[03:07:10] [PASSED] drm_test_cmdline_rotate_270
[03:07:10] [PASSED] drm_test_cmdline_hmirror
[03:07:10] [PASSED] drm_test_cmdline_vmirror
[03:07:10] [PASSED] drm_test_cmdline_margin_options
[03:07:10] [PASSED] drm_test_cmdline_multiple_options
[03:07:10] [PASSED] drm_test_cmdline_bpp_extra_and_option
[03:07:10] [PASSED] drm_test_cmdline_extra_and_option
[03:07:10] [PASSED] drm_test_cmdline_freestanding_options
[03:07:10] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[03:07:10] [PASSED] drm_test_cmdline_panel_orientation
[03:07:10] ================ drm_test_cmdline_invalid  =================
[03:07:10] [PASSED] margin_only
[03:07:10] [PASSED] interlace_only
[03:07:10] [PASSED] res_missing_x
[03:07:10] [PASSED] res_missing_y
[03:07:10] [PASSED] res_bad_y
[03:07:10] [PASSED] res_missing_y_bpp
[03:07:10] [PASSED] res_bad_bpp
[03:07:10] [PASSED] res_bad_refresh
[03:07:10] [PASSED] res_bpp_refresh_force_on_off
[03:07:10] [PASSED] res_invalid_mode
[03:07:10] [PASSED] res_bpp_wrong_place_mode
[03:07:10] [PASSED] name_bpp_refresh
[03:07:10] [PASSED] name_refresh
[03:07:10] [PASSED] name_refresh_wrong_mode
[03:07:10] [PASSED] name_refresh_invalid_mode
[03:07:10] [PASSED] rotate_multiple
[03:07:10] [PASSED] rotate_invalid_val
[03:07:10] [PASSED] rotate_truncated
[03:07:10] [PASSED] invalid_option
[03:07:10] [PASSED] invalid_tv_option
[03:07:10] [PASSED] truncated_tv_option
[03:07:10] ============ [PASSED] drm_test_cmdline_invalid =============
[03:07:10] =============== drm_test_cmdline_tv_options  ===============
[03:07:10] [PASSED] NTSC
[03:07:10] [PASSED] NTSC_443
[03:07:10] [PASSED] NTSC_J
[03:07:10] [PASSED] PAL
[03:07:10] [PASSED] PAL_M
[03:07:10] [PASSED] PAL_N
[03:07:10] [PASSED] SECAM
[03:07:10] [PASSED] MONO_525
[03:07:10] [PASSED] MONO_625
[03:07:10] =========== [PASSED] drm_test_cmdline_tv_options ===========
[03:07:10] =============== [PASSED] drm_cmdline_parser ================
[03:07:10] ========== drmm_connector_hdmi_init (20 subtests) ==========
[03:07:10] [PASSED] drm_test_connector_hdmi_init_valid
[03:07:10] [PASSED] drm_test_connector_hdmi_init_bpc_8
[03:07:10] [PASSED] drm_test_connector_hdmi_init_bpc_10
[03:07:10] [PASSED] drm_test_connector_hdmi_init_bpc_12
[03:07:10] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[03:07:10] [PASSED] drm_test_connector_hdmi_init_bpc_null
[03:07:10] [PASSED] drm_test_connector_hdmi_init_formats_empty
[03:07:10] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[03:07:10] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[03:07:10] [PASSED] supported_formats=0x9 yuv420_allowed=1
[03:07:10] [PASSED] supported_formats=0x9 yuv420_allowed=0
[03:07:10] [PASSED] supported_formats=0x3 yuv420_allowed=1
[03:07:10] [PASSED] supported_formats=0x3 yuv420_allowed=0
[03:07:10] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[03:07:10] [PASSED] drm_test_connector_hdmi_init_null_ddc
[03:07:10] [PASSED] drm_test_connector_hdmi_init_null_product
[03:07:10] [PASSED] drm_test_connector_hdmi_init_null_vendor
[03:07:10] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[03:07:10] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[03:07:10] [PASSED] drm_test_connector_hdmi_init_product_valid
[03:07:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[03:07:10] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[03:07:10] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[03:07:10] ========= drm_test_connector_hdmi_init_type_valid  =========
[03:07:10] [PASSED] HDMI-A
[03:07:10] [PASSED] HDMI-B
[03:07:10] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[03:07:10] ======== drm_test_connector_hdmi_init_type_invalid  ========
[03:07:10] [PASSED] Unknown
[03:07:10] [PASSED] VGA
[03:07:10] [PASSED] DVI-I
[03:07:10] [PASSED] DVI-D
[03:07:10] [PASSED] DVI-A
[03:07:10] [PASSED] Composite
[03:07:10] [PASSED] SVIDEO
[03:07:10] [PASSED] LVDS
[03:07:10] [PASSED] Component
[03:07:10] [PASSED] DIN
[03:07:10] [PASSED] DP
[03:07:10] [PASSED] TV
[03:07:10] [PASSED] eDP
[03:07:10] [PASSED] Virtual
[03:07:10] [PASSED] DSI
[03:07:10] [PASSED] DPI
[03:07:10] [PASSED] Writeback
[03:07:10] [PASSED] SPI
[03:07:10] [PASSED] USB
[03:07:10] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[03:07:10] ============ [PASSED] drmm_connector_hdmi_init =============
[03:07:10] ============= drmm_connector_init (3 subtests) =============
[03:07:10] [PASSED] drm_test_drmm_connector_init
[03:07:10] [PASSED] drm_test_drmm_connector_init_null_ddc
[03:07:10] ========= drm_test_drmm_connector_init_type_valid  =========
[03:07:10] [PASSED] Unknown
[03:07:10] [PASSED] VGA
[03:07:10] [PASSED] DVI-I
[03:07:10] [PASSED] DVI-D
[03:07:10] [PASSED] DVI-A
[03:07:10] [PASSED] Composite
[03:07:10] [PASSED] SVIDEO
[03:07:10] [PASSED] LVDS
[03:07:10] [PASSED] Component
[03:07:10] [PASSED] DIN
[03:07:10] [PASSED] DP
[03:07:10] [PASSED] HDMI-A
[03:07:10] [PASSED] HDMI-B
[03:07:10] [PASSED] TV
[03:07:10] [PASSED] eDP
[03:07:10] [PASSED] Virtual
[03:07:10] [PASSED] DSI
[03:07:10] [PASSED] DPI
[03:07:10] [PASSED] Writeback
[03:07:10] [PASSED] SPI
[03:07:10] [PASSED] USB
[03:07:10] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[03:07:10] =============== [PASSED] drmm_connector_init ===============
[03:07:10] ========= drm_connector_dynamic_init (6 subtests) ==========
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_init
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_init_properties
[03:07:10] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[03:07:10] [PASSED] Unknown
[03:07:10] [PASSED] VGA
[03:07:10] [PASSED] DVI-I
[03:07:10] [PASSED] DVI-D
[03:07:10] [PASSED] DVI-A
[03:07:10] [PASSED] Composite
[03:07:10] [PASSED] SVIDEO
[03:07:10] [PASSED] LVDS
[03:07:10] [PASSED] Component
[03:07:10] [PASSED] DIN
[03:07:10] [PASSED] DP
[03:07:10] [PASSED] HDMI-A
[03:07:10] [PASSED] HDMI-B
[03:07:10] [PASSED] TV
[03:07:10] [PASSED] eDP
[03:07:10] [PASSED] Virtual
[03:07:10] [PASSED] DSI
[03:07:10] [PASSED] DPI
[03:07:10] [PASSED] Writeback
[03:07:10] [PASSED] SPI
[03:07:10] [PASSED] USB
[03:07:10] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[03:07:10] ======== drm_test_drm_connector_dynamic_init_name  =========
[03:07:10] [PASSED] Unknown
[03:07:10] [PASSED] VGA
[03:07:10] [PASSED] DVI-I
[03:07:10] [PASSED] DVI-D
[03:07:10] [PASSED] DVI-A
[03:07:10] [PASSED] Composite
[03:07:10] [PASSED] SVIDEO
[03:07:10] [PASSED] LVDS
[03:07:10] [PASSED] Component
[03:07:10] [PASSED] DIN
[03:07:10] [PASSED] DP
[03:07:10] [PASSED] HDMI-A
[03:07:10] [PASSED] HDMI-B
[03:07:10] [PASSED] TV
[03:07:10] [PASSED] eDP
[03:07:10] [PASSED] Virtual
[03:07:10] [PASSED] DSI
[03:07:10] [PASSED] DPI
[03:07:10] [PASSED] Writeback
[03:07:10] [PASSED] SPI
[03:07:10] [PASSED] USB
[03:07:10] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[03:07:10] =========== [PASSED] drm_connector_dynamic_init ============
[03:07:10] ==== drm_connector_dynamic_register_early (4 subtests) =====
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[03:07:10] ====== [PASSED] drm_connector_dynamic_register_early =======
[03:07:10] ======= drm_connector_dynamic_register (7 subtests) ========
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[03:07:10] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[03:07:10] ========= [PASSED] drm_connector_dynamic_register ==========
[03:07:10] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[03:07:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[03:07:10] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[03:07:10] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[03:07:10] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[03:07:10] ========== drm_test_get_tv_mode_from_name_valid  ===========
[03:07:10] [PASSED] NTSC
[03:07:10] [PASSED] NTSC-443
[03:07:10] [PASSED] NTSC-J
[03:07:10] [PASSED] PAL
[03:07:10] [PASSED] PAL-M
[03:07:10] [PASSED] PAL-N
[03:07:10] [PASSED] SECAM
[03:07:10] [PASSED] Mono
[03:07:10] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[03:07:10] [PASSED] drm_test_get_tv_mode_from_name_truncated
[03:07:10] ============ [PASSED] drm_get_tv_mode_from_name ============
[03:07:10] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[03:07:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[03:07:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[03:07:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[03:07:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[03:07:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[03:07:10] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[03:07:10] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[03:07:10] [PASSED] VIC 96
[03:07:10] [PASSED] VIC 97
[03:07:10] [PASSED] VIC 101
[03:07:10] [PASSED] VIC 102
[03:07:10] [PASSED] VIC 106
[03:07:10] [PASSED] VIC 107
[03:07:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[03:07:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[03:07:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[03:07:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[03:07:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[03:07:10] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[03:07:10] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[03:07:10] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[03:07:10] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[03:07:10] [PASSED] Automatic
[03:07:10] [PASSED] Full
[03:07:10] [PASSED] Limited 16:235
[03:07:10] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[03:07:10] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[03:07:10] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[03:07:10] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[03:07:10] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[03:07:10] [PASSED] RGB
[03:07:10] [PASSED] YUV 4:2:0
[03:07:10] [PASSED] YUV 4:2:2
[03:07:10] [PASSED] YUV 4:4:4
[03:07:10] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[03:07:10] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[03:07:10] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[03:07:10] ============= drm_damage_helper (21 subtests) ==============
[03:07:10] [PASSED] drm_test_damage_iter_no_damage
[03:07:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[03:07:10] [PASSED] drm_test_damage_iter_no_damage_src_moved
[03:07:10] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[03:07:10] [PASSED] drm_test_damage_iter_no_damage_not_visible
[03:07:10] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[03:07:10] [PASSED] drm_test_damage_iter_no_damage_no_fb
[03:07:10] [PASSED] drm_test_damage_iter_simple_damage
[03:07:10] [PASSED] drm_test_damage_iter_single_damage
[03:07:10] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[03:07:10] [PASSED] drm_test_damage_iter_single_damage_outside_src
[03:07:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[03:07:10] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[03:07:10] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[03:07:10] [PASSED] drm_test_damage_iter_single_damage_src_moved
[03:07:10] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[03:07:10] [PASSED] drm_test_damage_iter_damage
[03:07:10] [PASSED] drm_test_damage_iter_damage_one_intersect
[03:07:10] [PASSED] drm_test_damage_iter_damage_one_outside
[03:07:10] [PASSED] drm_test_damage_iter_damage_src_moved
[03:07:10] [PASSED] drm_test_damage_iter_damage_not_visible
[03:07:10] ================ [PASSED] drm_damage_helper ================
[03:07:10] ============== drm_dp_mst_helper (3 subtests) ==============
[03:07:10] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[03:07:10] [PASSED] Clock 154000 BPP 30 DSC disabled
[03:07:10] [PASSED] Clock 234000 BPP 30 DSC disabled
[03:07:10] [PASSED] Clock 297000 BPP 24 DSC disabled
[03:07:10] [PASSED] Clock 332880 BPP 24 DSC enabled
[03:07:10] [PASSED] Clock 324540 BPP 24 DSC enabled
[03:07:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[03:07:10] ============== drm_test_dp_mst_calc_pbn_div  ===============
[03:07:10] [PASSED] Link rate 2000000 lane count 4
[03:07:10] [PASSED] Link rate 2000000 lane count 2
[03:07:10] [PASSED] Link rate 2000000 lane count 1
[03:07:10] [PASSED] Link rate 1350000 lane count 4
[03:07:10] [PASSED] Link rate 1350000 lane count 2
[03:07:10] [PASSED] Link rate 1350000 lane count 1
[03:07:10] [PASSED] Link rate 1000000 lane count 4
[03:07:10] [PASSED] Link rate 1000000 lane count 2
[03:07:10] [PASSED] Link rate 1000000 lane count 1
[03:07:10] [PASSED] Link rate 810000 lane count 4
[03:07:10] [PASSED] Link rate 810000 lane count 2
[03:07:10] [PASSED] Link rate 810000 lane count 1
[03:07:10] [PASSED] Link rate 540000 lane count 4
[03:07:10] [PASSED] Link rate 540000 lane count 2
[03:07:10] [PASSED] Link rate 540000 lane count 1
[03:07:10] [PASSED] Link rate 270000 lane count 4
[03:07:10] [PASSED] Link rate 270000 lane count 2
[03:07:10] [PASSED] Link rate 270000 lane count 1
[03:07:10] [PASSED] Link rate 162000 lane count 4
[03:07:10] [PASSED] Link rate 162000 lane count 2
[03:07:10] [PASSED] Link rate 162000 lane count 1
[03:07:10] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[03:07:10] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[03:07:10] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[03:07:10] [PASSED] DP_POWER_UP_PHY with port number
[03:07:10] [PASSED] DP_POWER_DOWN_PHY with port number
[03:07:10] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[03:07:10] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[03:07:10] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[03:07:10] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[03:07:10] [PASSED] DP_QUERY_PAYLOAD with port number
[03:07:10] [PASSED] DP_QUERY_PAYLOAD with VCPI
[03:07:10] [PASSED] DP_REMOTE_DPCD_READ with port number
[03:07:10] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[03:07:10] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[03:07:10] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[03:07:10] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[03:07:10] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[03:07:10] [PASSED] DP_REMOTE_I2C_READ with port number
[03:07:10] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[03:07:10] [PASSED] DP_REMOTE_I2C_READ with transactions array
[03:07:10] [PASSED] DP_REMOTE_I2C_WRITE with port number
[03:07:10] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[03:07:10] [PASSED] DP_REMOTE_I2C_WRITE with data array
[03:07:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[03:07:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[03:07:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[03:07:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[03:07:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[03:07:10] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[03:07:10] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[03:07:10] ================ [PASSED] drm_dp_mst_helper ================
[03:07:10] ================== drm_exec (7 subtests) ===================
[03:07:10] [PASSED] sanitycheck
[03:07:10] [PASSED] test_lock
[03:07:10] [PASSED] test_lock_unlock
[03:07:10] [PASSED] test_duplicates
[03:07:10] [PASSED] test_prepare
[03:07:10] [PASSED] test_prepare_array
[03:07:10] [PASSED] test_multiple_loops
[03:07:10] ==================== [PASSED] drm_exec =====================
[03:07:10] =========== drm_format_helper_test (17 subtests) ===========
[03:07:10] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[03:07:10] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[03:07:10] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[03:07:10] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[03:07:10] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[03:07:10] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[03:07:10] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[03:07:10] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[03:07:10] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[03:07:10] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[03:07:10] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[03:07:10] ============== drm_test_fb_xrgb8888_to_mono  ===============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[03:07:10] ==================== drm_test_fb_swab  =====================
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ================ [PASSED] drm_test_fb_swab =================
[03:07:10] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[03:07:10] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[03:07:10] [PASSED] single_pixel_source_buffer
[03:07:10] [PASSED] single_pixel_clip_rectangle
[03:07:10] [PASSED] well_known_colors
[03:07:10] [PASSED] destination_pitch
[03:07:10] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[03:07:10] ================= drm_test_fb_clip_offset  =================
[03:07:10] [PASSED] pass through
[03:07:10] [PASSED] horizontal offset
[03:07:10] [PASSED] vertical offset
[03:07:10] [PASSED] horizontal and vertical offset
[03:07:10] [PASSED] horizontal offset (custom pitch)
[03:07:10] [PASSED] vertical offset (custom pitch)
[03:07:10] [PASSED] horizontal and vertical offset (custom pitch)
[03:07:10] ============= [PASSED] drm_test_fb_clip_offset =============
[03:07:10] =================== drm_test_fb_memcpy  ====================
[03:07:10] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[03:07:10] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[03:07:10] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[03:07:10] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[03:07:10] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[03:07:10] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[03:07:10] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[03:07:10] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[03:07:10] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[03:07:10] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[03:07:10] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[03:07:10] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[03:07:10] =============== [PASSED] drm_test_fb_memcpy ================
[03:07:10] ============= [PASSED] drm_format_helper_test ==============
[03:07:10] ================= drm_format (18 subtests) =================
[03:07:10] [PASSED] drm_test_format_block_width_invalid
[03:07:10] [PASSED] drm_test_format_block_width_one_plane
[03:07:10] [PASSED] drm_test_format_block_width_two_plane
[03:07:10] [PASSED] drm_test_format_block_width_three_plane
[03:07:10] [PASSED] drm_test_format_block_width_tiled
[03:07:10] [PASSED] drm_test_format_block_height_invalid
[03:07:10] [PASSED] drm_test_format_block_height_one_plane
[03:07:10] [PASSED] drm_test_format_block_height_two_plane
[03:07:10] [PASSED] drm_test_format_block_height_three_plane
[03:07:10] [PASSED] drm_test_format_block_height_tiled
[03:07:10] [PASSED] drm_test_format_min_pitch_invalid
[03:07:10] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[03:07:10] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[03:07:10] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[03:07:10] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[03:07:10] [PASSED] drm_test_format_min_pitch_two_plane
[03:07:10] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[03:07:10] [PASSED] drm_test_format_min_pitch_tiled
[03:07:10] =================== [PASSED] drm_format ====================
[03:07:10] ============== drm_framebuffer (10 subtests) ===============
[03:07:10] ========== drm_test_framebuffer_check_src_coords  ==========
[03:07:10] [PASSED] Success: source fits into fb
[03:07:10] [PASSED] Fail: overflowing fb with x-axis coordinate
[03:07:10] [PASSED] Fail: overflowing fb with y-axis coordinate
[03:07:10] [PASSED] Fail: overflowing fb with source width
[03:07:10] [PASSED] Fail: overflowing fb with source height
[03:07:10] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[03:07:10] [PASSED] drm_test_framebuffer_cleanup
[03:07:10] =============== drm_test_framebuffer_create  ===============
[03:07:10] [PASSED] ABGR8888 normal sizes
[03:07:10] [PASSED] ABGR8888 max sizes
[03:07:10] [PASSED] ABGR8888 pitch greater than min required
[03:07:10] [PASSED] ABGR8888 pitch less than min required
[03:07:10] [PASSED] ABGR8888 Invalid width
[03:07:10] [PASSED] ABGR8888 Invalid buffer handle
[03:07:10] [PASSED] No pixel format
[03:07:10] [PASSED] ABGR8888 Width 0
[03:07:10] [PASSED] ABGR8888 Height 0
[03:07:10] [PASSED] ABGR8888 Out of bound height * pitch combination
[03:07:10] [PASSED] ABGR8888 Large buffer offset
[03:07:10] [PASSED] ABGR8888 Buffer offset for inexistent plane
[03:07:10] [PASSED] ABGR8888 Invalid flag
[03:07:10] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[03:07:10] [PASSED] ABGR8888 Valid buffer modifier
[03:07:10] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[03:07:10] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[03:07:10] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[03:07:10] [PASSED] NV12 Normal sizes
[03:07:10] [PASSED] NV12 Max sizes
[03:07:10] [PASSED] NV12 Invalid pitch
[03:07:10] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[03:07:10] [PASSED] NV12 different  modifier per-plane
[03:07:10] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[03:07:10] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[03:07:10] [PASSED] NV12 Modifier for inexistent plane
[03:07:10] [PASSED] NV12 Handle for inexistent plane
[03:07:10] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[03:07:10] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[03:07:10] [PASSED] YVU420 Normal sizes
[03:07:10] [PASSED] YVU420 Max sizes
[03:07:10] [PASSED] YVU420 Invalid pitch
[03:07:10] [PASSED] YVU420 Different pitches
[03:07:10] [PASSED] YVU420 Different buffer offsets/pitches
[03:07:10] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[03:07:10] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[03:07:10] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[03:07:10] [PASSED] YVU420 Valid modifier
[03:07:10] [PASSED] YVU420 Different modifiers per plane
[03:07:10] [PASSED] YVU420 Modifier for inexistent plane
[03:07:10] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[03:07:10] [PASSED] X0L2 Normal sizes
[03:07:10] [PASSED] X0L2 Max sizes
[03:07:10] [PASSED] X0L2 Invalid pitch
[03:07:10] [PASSED] X0L2 Pitch greater than minimum required
[03:07:10] [PASSED] X0L2 Handle for inexistent plane
[03:07:10] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[03:07:10] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[03:07:10] [PASSED] X0L2 Valid modifier
[03:07:10] [PASSED] X0L2 Modifier for inexistent plane
[03:07:10] =========== [PASSED] drm_test_framebuffer_create ===========
[03:07:10] [PASSED] drm_test_framebuffer_free
[03:07:10] [PASSED] drm_test_framebuffer_init
[03:07:10] [PASSED] drm_test_framebuffer_init_bad_format
[03:07:10] [PASSED] drm_test_framebuffer_init_dev_mismatch
[03:07:10] [PASSED] drm_test_framebuffer_lookup
[03:07:10] [PASSED] drm_test_framebuffer_lookup_inexistent
[03:07:10] [PASSED] drm_test_framebuffer_modifiers_not_supported
[03:07:10] ================= [PASSED] drm_framebuffer =================
[03:07:10] ================ drm_gem_shmem (8 subtests) ================
[03:07:10] [PASSED] drm_gem_shmem_test_obj_create
[03:07:10] [PASSED] drm_gem_shmem_test_obj_create_private
[03:07:10] [PASSED] drm_gem_shmem_test_pin_pages
[03:07:10] [PASSED] drm_gem_shmem_test_vmap
[03:07:10] [PASSED] drm_gem_shmem_test_get_pages_sgt
[03:07:10] [PASSED] drm_gem_shmem_test_get_sg_table
[03:07:10] [PASSED] drm_gem_shmem_test_madvise
[03:07:10] [PASSED] drm_gem_shmem_test_purge
[03:07:10] ================== [PASSED] drm_gem_shmem ==================
[03:07:10] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[03:07:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[03:07:10] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[03:07:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[03:07:10] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[03:07:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[03:07:10] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[03:07:10] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[03:07:10] [PASSED] Automatic
[03:07:10] [PASSED] Full
[03:07:10] [PASSED] Limited 16:235
[03:07:10] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[03:07:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[03:07:10] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[03:07:10] [PASSED] drm_test_check_disable_connector
[03:07:10] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[03:07:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[03:07:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[03:07:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[03:07:10] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[03:07:10] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[03:07:10] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[03:07:10] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[03:07:10] [PASSED] drm_test_check_output_bpc_dvi
[03:07:10] [PASSED] drm_test_check_output_bpc_format_vic_1
[03:07:10] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[03:07:10] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[03:07:10] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[03:07:10] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[03:07:10] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[03:07:10] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[03:07:10] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[03:07:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[03:07:10] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[03:07:10] [PASSED] drm_test_check_broadcast_rgb_value
[03:07:10] [PASSED] drm_test_check_bpc_8_value
[03:07:10] [PASSED] drm_test_check_bpc_10_value
[03:07:10] [PASSED] drm_test_check_bpc_12_value
[03:07:10] [PASSED] drm_test_check_format_value
[03:07:10] [PASSED] drm_test_check_tmds_char_value
[03:07:10] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[03:07:10] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[03:07:10] [PASSED] drm_test_check_mode_valid
[03:07:10] [PASSED] drm_test_check_mode_valid_reject
[03:07:10] [PASSED] drm_test_check_mode_valid_reject_rate
[03:07:10] [PASSED] drm_test_check_mode_valid_reject_max_clock
[03:07:10] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[03:07:10] ================= drm_managed (2 subtests) =================
[03:07:10] [PASSED] drm_test_managed_release_action
[03:07:10] [PASSED] drm_test_managed_run_action
[03:07:10] =================== [PASSED] drm_managed ===================
[03:07:10] =================== drm_mm (6 subtests) ====================
[03:07:10] [PASSED] drm_test_mm_init
[03:07:10] [PASSED] drm_test_mm_debug
[03:07:10] [PASSED] drm_test_mm_align32
[03:07:10] [PASSED] drm_test_mm_align64
[03:07:10] [PASSED] drm_test_mm_lowest
[03:07:10] [PASSED] drm_test_mm_highest
[03:07:10] ===================== [PASSED] drm_mm ======================
[03:07:10] ============= drm_modes_analog_tv (5 subtests) =============
[03:07:10] [PASSED] drm_test_modes_analog_tv_mono_576i
[03:07:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[03:07:10] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[03:07:10] [PASSED] drm_test_modes_analog_tv_pal_576i
[03:07:10] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[03:07:10] =============== [PASSED] drm_modes_analog_tv ===============
[03:07:10] ============== drm_plane_helper (2 subtests) ===============
[03:07:10] =============== drm_test_check_plane_state  ================
[03:07:10] [PASSED] clipping_simple
[03:07:10] [PASSED] clipping_rotate_reflect
[03:07:10] [PASSED] positioning_simple
[03:07:10] [PASSED] upscaling
[03:07:10] [PASSED] downscaling
[03:07:10] [PASSED] rounding1
[03:07:10] [PASSED] rounding2
[03:07:10] [PASSED] rounding3
[03:07:10] [PASSED] rounding4
[03:07:10] =========== [PASSED] drm_test_check_plane_state ============
[03:07:10] =========== drm_test_check_invalid_plane_state  ============
[03:07:10] [PASSED] positioning_invalid
[03:07:10] [PASSED] upscaling_invalid
[03:07:10] [PASSED] downscaling_invalid
[03:07:10] ======= [PASSED] drm_test_check_invalid_plane_state ========
[03:07:10] ================ [PASSED] drm_plane_helper =================
[03:07:10] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[03:07:10] ====== drm_test_connector_helper_tv_get_modes_check  =======
[03:07:10] [PASSED] None
[03:07:10] [PASSED] PAL
[03:07:10] [PASSED] NTSC
[03:07:10] [PASSED] Both, NTSC Default
[03:07:10] [PASSED] Both, PAL Default
[03:07:10] [PASSED] Both, NTSC Default, with PAL on command-line
[03:07:10] [PASSED] Both, PAL Default, with NTSC on command-line
[03:07:10] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[03:07:10] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[03:07:10] ================== drm_rect (9 subtests) ===================
[03:07:10] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[03:07:10] [PASSED] drm_test_rect_clip_scaled_not_clipped
[03:07:10] [PASSED] drm_test_rect_clip_scaled_clipped
[03:07:10] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[03:07:10] ================= drm_test_rect_intersect  =================
[03:07:10] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[03:07:10] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[03:07:10] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[03:07:10] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[03:07:10] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[03:07:10] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[03:07:10] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[03:07:10] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[03:07:10] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[03:07:10] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[03:07:10] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[03:07:10] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[03:07:10] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[03:07:10] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[03:07:10] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[03:07:10] ============= [PASSED] drm_test_rect_intersect =============
[03:07:10] ================ drm_test_rect_calc_hscale  ================
[03:07:10] [PASSED] normal use
[03:07:10] [PASSED] out of max range
[03:07:10] [PASSED] out of min range
[03:07:10] [PASSED] zero dst
[03:07:10] [PASSED] negative src
[03:07:10] [PASSED] negative dst
[03:07:10] ============ [PASSED] drm_test_rect_calc_hscale ============
[03:07:10] ================ drm_test_rect_calc_vscale  ================
[03:07:10] [PASSED] normal use
[03:07:10] [PASSED] out of max range
[03:07:10] [PASSED] out of min range
[03:07:10] [PASSED] zero dst
[03:07:10] [PASSED] negative src
[03:07:10] [PASSED] negative dst
[03:07:10] ============ [PASSED] drm_test_rect_calc_vscale ============
[03:07:10] ================== drm_test_rect_rotate  ===================
[03:07:10] [PASSED] reflect-x
[03:07:10] [PASSED] reflect-y
[03:07:10] [PASSED] rotate-0
[03:07:10] [PASSED] rotate-90
[03:07:10] [PASSED] rotate-180
[03:07:10] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[03:07:10] ============== [PASSED] drm_test_rect_rotate ===============
[03:07:10] ================ drm_test_rect_rotate_inv  =================
[03:07:10] [PASSED] reflect-x
[03:07:10] [PASSED] reflect-y
[03:07:10] [PASSED] rotate-0
[03:07:10] [PASSED] rotate-90
[03:07:10] [PASSED] rotate-180
[03:07:10] [PASSED] rotate-270
[03:07:10] ============ [PASSED] drm_test_rect_rotate_inv =============
[03:07:10] ==================== [PASSED] drm_rect =====================
[03:07:10] ============ drm_sysfb_modeset_test (1 subtest) ============
[03:07:10] ============ drm_test_sysfb_build_fourcc_list  =============
[03:07:10] [PASSED] no native formats
[03:07:10] [PASSED] XRGB8888 as native format
[03:07:10] [PASSED] remove duplicates
[03:07:10] [PASSED] convert alpha formats
[03:07:10] [PASSED] random formats
[03:07:10] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[03:07:10] ============= [PASSED] drm_sysfb_modeset_test ==============
[03:07:10] ============================================================
[03:07:10] Testing complete. Ran 616 tests: passed: 616
[03:07:10] Elapsed time: 23.719s total, 1.616s configuring, 21.882s building, 0.192s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[03:07:10] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:07:12] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:07:20] Starting KUnit Kernel (1/1)...
[03:07:20] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:07:20] ================= ttm_device (5 subtests) ==================
[03:07:20] [PASSED] ttm_device_init_basic
[03:07:20] [PASSED] ttm_device_init_multiple
[03:07:20] [PASSED] ttm_device_fini_basic
[03:07:20] [PASSED] ttm_device_init_no_vma_man
[03:07:20] ================== ttm_device_init_pools  ==================
[03:07:20] [PASSED] No DMA allocations, no DMA32 required
[03:07:20] [PASSED] DMA allocations, DMA32 required
[03:07:20] [PASSED] No DMA allocations, DMA32 required
[03:07:20] [PASSED] DMA allocations, no DMA32 required
[03:07:20] ============== [PASSED] ttm_device_init_pools ==============
[03:07:20] =================== [PASSED] ttm_device ====================
[03:07:20] ================== ttm_pool (8 subtests) ===================
[03:07:20] ================== ttm_pool_alloc_basic  ===================
[03:07:20] [PASSED] One page
[03:07:20] [PASSED] More than one page
[03:07:20] [PASSED] Above the allocation limit
[03:07:20] [PASSED] One page, with coherent DMA mappings enabled
[03:07:20] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:07:20] ============== [PASSED] ttm_pool_alloc_basic ===============
[03:07:20] ============== ttm_pool_alloc_basic_dma_addr  ==============
[03:07:20] [PASSED] One page
[03:07:20] [PASSED] More than one page
[03:07:20] [PASSED] Above the allocation limit
[03:07:20] [PASSED] One page, with coherent DMA mappings enabled
[03:07:20] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:07:20] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[03:07:20] [PASSED] ttm_pool_alloc_order_caching_match
[03:07:20] [PASSED] ttm_pool_alloc_caching_mismatch
[03:07:20] [PASSED] ttm_pool_alloc_order_mismatch
[03:07:20] [PASSED] ttm_pool_free_dma_alloc
[03:07:20] [PASSED] ttm_pool_free_no_dma_alloc
[03:07:20] [PASSED] ttm_pool_fini_basic
[03:07:20] ==================== [PASSED] ttm_pool =====================
[03:07:20] ================ ttm_resource (8 subtests) =================
[03:07:20] ================= ttm_resource_init_basic  =================
[03:07:20] [PASSED] Init resource in TTM_PL_SYSTEM
[03:07:20] [PASSED] Init resource in TTM_PL_VRAM
[03:07:20] [PASSED] Init resource in a private placement
[03:07:20] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[03:07:20] ============= [PASSED] ttm_resource_init_basic =============
[03:07:20] [PASSED] ttm_resource_init_pinned
[03:07:20] [PASSED] ttm_resource_fini_basic
[03:07:20] [PASSED] ttm_resource_manager_init_basic
[03:07:20] [PASSED] ttm_resource_manager_usage_basic
[03:07:20] [PASSED] ttm_resource_manager_set_used_basic
[03:07:20] [PASSED] ttm_sys_man_alloc_basic
[03:07:20] [PASSED] ttm_sys_man_free_basic
[03:07:20] ================== [PASSED] ttm_resource ===================
[03:07:20] =================== ttm_tt (15 subtests) ===================
[03:07:20] ==================== ttm_tt_init_basic  ====================
[03:07:20] [PASSED] Page-aligned size
[03:07:20] [PASSED] Extra pages requested
[03:07:20] ================ [PASSED] ttm_tt_init_basic ================
[03:07:20] [PASSED] ttm_tt_init_misaligned
[03:07:20] [PASSED] ttm_tt_fini_basic
[03:07:20] [PASSED] ttm_tt_fini_sg
[03:07:20] [PASSED] ttm_tt_fini_shmem
[03:07:20] [PASSED] ttm_tt_create_basic
[03:07:20] [PASSED] ttm_tt_create_invalid_bo_type
[03:07:20] [PASSED] ttm_tt_create_ttm_exists
[03:07:20] [PASSED] ttm_tt_create_failed
[03:07:20] [PASSED] ttm_tt_destroy_basic
[03:07:20] [PASSED] ttm_tt_populate_null_ttm
[03:07:20] [PASSED] ttm_tt_populate_populated_ttm
[03:07:20] [PASSED] ttm_tt_unpopulate_basic
[03:07:20] [PASSED] ttm_tt_unpopulate_empty_ttm
[03:07:20] [PASSED] ttm_tt_swapin_basic
[03:07:20] ===================== [PASSED] ttm_tt ======================
[03:07:20] =================== ttm_bo (14 subtests) ===================
[03:07:20] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[03:07:20] [PASSED] Cannot be interrupted and sleeps
[03:07:20] [PASSED] Cannot be interrupted, locks straight away
[03:07:20] [PASSED] Can be interrupted, sleeps
[03:07:20] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[03:07:20] [PASSED] ttm_bo_reserve_locked_no_sleep
[03:07:20] [PASSED] ttm_bo_reserve_no_wait_ticket
[03:07:20] [PASSED] ttm_bo_reserve_double_resv
[03:07:20] [PASSED] ttm_bo_reserve_interrupted
[03:07:20] [PASSED] ttm_bo_reserve_deadlock
[03:07:20] [PASSED] ttm_bo_unreserve_basic
[03:07:20] [PASSED] ttm_bo_unreserve_pinned
[03:07:20] [PASSED] ttm_bo_unreserve_bulk
[03:07:20] [PASSED] ttm_bo_put_basic
[03:07:20] [PASSED] ttm_bo_put_shared_resv
[03:07:20] [PASSED] ttm_bo_pin_basic
[03:07:20] [PASSED] ttm_bo_pin_unpin_resource
[03:07:20] [PASSED] ttm_bo_multiple_pin_one_unpin
[03:07:20] ===================== [PASSED] ttm_bo ======================
[03:07:20] ============== ttm_bo_validate (21 subtests) ===============
[03:07:20] ============== ttm_bo_init_reserved_sys_man  ===============
[03:07:20] [PASSED] Buffer object for userspace
[03:07:20] [PASSED] Kernel buffer object
[03:07:20] [PASSED] Shared buffer object
[03:07:20] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[03:07:20] ============== ttm_bo_init_reserved_mock_man  ==============
[03:07:20] [PASSED] Buffer object for userspace
[03:07:20] [PASSED] Kernel buffer object
[03:07:20] [PASSED] Shared buffer object
[03:07:20] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[03:07:20] [PASSED] ttm_bo_init_reserved_resv
[03:07:20] ================== ttm_bo_validate_basic  ==================
[03:07:20] [PASSED] Buffer object for userspace
[03:07:20] [PASSED] Kernel buffer object
[03:07:20] [PASSED] Shared buffer object
[03:07:20] ============== [PASSED] ttm_bo_validate_basic ==============
[03:07:20] [PASSED] ttm_bo_validate_invalid_placement
[03:07:20] ============= ttm_bo_validate_same_placement  ==============
[03:07:20] [PASSED] System manager
[03:07:20] [PASSED] VRAM manager
[03:07:20] ========= [PASSED] ttm_bo_validate_same_placement ==========
[03:07:20] [PASSED] ttm_bo_validate_failed_alloc
[03:07:20] [PASSED] ttm_bo_validate_pinned
[03:07:20] [PASSED] ttm_bo_validate_busy_placement
[03:07:20] ================ ttm_bo_validate_multihop  =================
[03:07:20] [PASSED] Buffer object for userspace
[03:07:20] [PASSED] Kernel buffer object
[03:07:20] [PASSED] Shared buffer object
[03:07:20] ============ [PASSED] ttm_bo_validate_multihop =============
[03:07:20] ========== ttm_bo_validate_no_placement_signaled  ==========
[03:07:20] [PASSED] Buffer object in system domain, no page vector
[03:07:20] [PASSED] Buffer object in system domain with an existing page vector
[03:07:20] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[03:07:20] ======== ttm_bo_validate_no_placement_not_signaled  ========
[03:07:20] [PASSED] Buffer object for userspace
[03:07:20] [PASSED] Kernel buffer object
[03:07:20] [PASSED] Shared buffer object
[03:07:20] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[03:07:20] [PASSED] ttm_bo_validate_move_fence_signaled
[03:07:20] ========= ttm_bo_validate_move_fence_not_signaled  =========
[03:07:20] [PASSED] Waits for GPU
[03:07:20] [PASSED] Tries to lock straight away
[03:07:20] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[03:07:20] [PASSED] ttm_bo_validate_happy_evict
[03:07:20] [PASSED] ttm_bo_validate_all_pinned_evict
[03:07:20] [PASSED] ttm_bo_validate_allowed_only_evict
[03:07:20] [PASSED] ttm_bo_validate_deleted_evict
[03:07:20] [PASSED] ttm_bo_validate_busy_domain_evict
[03:07:20] [PASSED] ttm_bo_validate_evict_gutting
[03:07:20] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[03:07:20] ================= [PASSED] ttm_bo_validate =================
[03:07:20] ============================================================
[03:07:20] Testing complete. Ran 101 tests: passed: 101
[03:07:20] Elapsed time: 9.690s total, 1.665s configuring, 7.758s building, 0.227s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe/vf: Post-migration recovery of queues and jobs (rev9)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1493 bytes --]

== Series Details ==

Series: drm/xe/vf: Post-migration recovery of queues and jobs (rev9)
URL   : https://patchwork.freedesktop.org/series/148982/
State : success

== Summary ==

CI Bug Log - changes from xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2_BAT -> xe-pw-148982v9_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (8 -> 7)
------------------------------

  Missing    (1): bat-adlp-vm 

Known issues
------------

  Here are the changes found in xe-pw-148982v9_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@kms_flip@basic-flip-vs-modeset@d-edp1:
    - bat-adlp-7:         [DMESG-WARN][1] ([Intel XE#4543]) -> [PASS][2] +1 other test pass
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/bat-adlp-7/igt@kms_flip@basic-flip-vs-modeset@d-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/bat-adlp-7/igt@kms_flip@basic-flip-vs-modeset@d-edp1.html

  
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543


Build changes
-------------

  * Linux: xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2 -> xe-pw-148982v9

  IGT_8482: 8482
  xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2: 68a99106069be8ab52030c61215da008b2f6dbd2
  xe-pw-148982v9: 148982v9

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/index.html

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✓ Xe.CI.Full: success for drm/xe/vf: Post-migration recovery of queues and jobs (rev9)

[Patchwork]

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== Series Details ==

Series: drm/xe/vf: Post-migration recovery of queues and jobs (rev9)
URL   : https://patchwork.freedesktop.org/series/148982/
State : success

== Summary ==

CI Bug Log - changes from xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2_FULL -> xe-pw-148982v9_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-148982v9_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_hotunplug@hotrebind-lateclose:
    - shard-bmg:          [PASS][1] -> [SKIP][2] ([Intel XE#4963])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@core_hotunplug@hotrebind-lateclose.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@core_hotunplug@hotrebind-lateclose.html

  * igt@fbdev@nullptr:
    - shard-bmg:          [PASS][3] -> [SKIP][4] ([Intel XE#2134]) +2 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@fbdev@nullptr.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@fbdev@nullptr.html

  * igt@kms_big_fb@linear-8bpp-rotate-180:
    - shard-bmg:          [PASS][5] -> [SKIP][6] ([Intel XE#4947]) +11 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_big_fb@linear-8bpp-rotate-180.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_big_fb@linear-8bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#1124])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-dg2-set2:     NOTRUN -> [SKIP][8] ([Intel XE#607])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-463/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-dg2-set2:     NOTRUN -> [SKIP][9] ([Intel XE#1124]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#2652] / [Intel XE#787]) +12 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_ccs@bad-rotation-90-4-tiled-lnl-ccs@pipe-c-dp-2.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][11] ([Intel XE#787]) +202 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc@pipe-a-dp-4.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#3432])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-dp-4:
    - shard-dg2-set2:     [PASS][13] -> [INCOMPLETE][14] ([Intel XE#2705] / [Intel XE#4212]) +1 other test incomplete
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-dp-4.html
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [PASS][15] -> [INCOMPLETE][16] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs@pipe-d-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][17] ([Intel XE#455] / [Intel XE#787]) +31 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs@pipe-d-dp-2.html

  * igt@kms_cdclk@mode-transition@pipe-a-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][18] ([Intel XE#4417]) +3 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-432/igt@kms_cdclk@mode-transition@pipe-a-dp-2.html

  * igt@kms_cdclk@plane-scaling@pipe-b-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][19] ([Intel XE#4416]) +3 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-432/igt@kms_cdclk@plane-scaling@pipe-b-dp-2.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-dg2-set2:     NOTRUN -> [SKIP][20] ([Intel XE#306])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2252])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html

  * igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode:
    - shard-dg2-set2:     NOTRUN -> [SKIP][22] ([Intel XE#373])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_chamelium_hpd@dp-hpd-with-enabled-mode.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-dg2-set2:     NOTRUN -> [SKIP][23] ([Intel XE#307])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][24] ([Intel XE#1178]) +1 other test fail
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html

  * igt@kms_content_protection@srm@pipe-a-dp-2:
    - shard-dg2-set2:     NOTRUN -> [FAIL][25] ([Intel XE#1178])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-432/igt@kms_content_protection@srm@pipe-a-dp-2.html

  * igt@kms_content_protection@uevent@pipe-a-dp-2:
    - shard-dg2-set2:     NOTRUN -> [FAIL][26] ([Intel XE#1188])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-432/igt@kms_content_protection@uevent@pipe-a-dp-2.html
    - shard-bmg:          NOTRUN -> [FAIL][27] ([Intel XE#1188])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-4/igt@kms_content_protection@uevent@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-rapid-movement-256x85:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2320])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@kms_cursor_crc@cursor-rapid-movement-256x85.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][29] -> [SKIP][30] ([Intel XE#2291]) +2 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-adlp:         [PASS][31] -> [DMESG-WARN][32] ([Intel XE#2953] / [Intel XE#4173])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-adlp-6/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-adlp-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
    - shard-bmg:          [PASS][33] -> [FAIL][34] ([Intel XE#4633])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][35] ([Intel XE#4494])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-432/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-dg2-set2:     NOTRUN -> [SKIP][36] ([Intel XE#4354])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-bmg:          [PASS][37] -> [SKIP][38] ([Intel XE#2316]) +2 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_flip@2x-nonexisting-fb.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-6/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@basic-plain-flip@c-hdmi-a1:
    - shard-adlp:         [PASS][39] -> [DMESG-WARN][40] ([Intel XE#4543])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-adlp-3/igt@kms_flip@basic-plain-flip@c-hdmi-a1.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-adlp-1/igt@kms_flip@basic-plain-flip@c-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-lnl:          [PASS][41] -> [FAIL][42] ([Intel XE#301])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#2293]) +2 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-move:
    - shard-dg2-set2:     NOTRUN -> [SKIP][44] ([Intel XE#651]) +4 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][45] ([Intel XE#2311]) +3 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#2313]) +3 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][47] ([Intel XE#653]) +5 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_joiner@basic-max-non-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#4298])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@kms_joiner@basic-max-non-joiner.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-dg2-set2:     NOTRUN -> [SKIP][49] ([Intel XE#5020])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-dg2-set2:     NOTRUN -> [SKIP][50] ([Intel XE#1122])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_rpm@universal-planes:
    - shard-bmg:          [PASS][51] -> [SKIP][52] ([Intel XE#4962])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_pm_rpm@universal-planes.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_pm_rpm@universal-planes.html

  * igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
    - shard-dg2-set2:     NOTRUN -> [SKIP][53] ([Intel XE#1489])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr@fbc-psr-cursor-blt:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2234] / [Intel XE#2850])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@kms_psr@fbc-psr-cursor-blt.html

  * igt@kms_psr@fbc-psr2-sprite-plane-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][55] ([Intel XE#2850] / [Intel XE#929])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_psr@fbc-psr2-sprite-plane-onoff.html

  * igt@kms_scaling_modes@scaling-mode-full:
    - shard-dg2-set2:     NOTRUN -> [SKIP][56] ([Intel XE#455]) +2 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_scaling_modes@scaling-mode-full.html

  * igt@kms_sequence@get-idle:
    - shard-bmg:          [PASS][57] -> [SKIP][58] ([Intel XE#4950]) +67 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_sequence@get-idle.html
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_sequence@get-idle.html

  * igt@xe_eudebug_online@interrupt-all-set-breakpoint:
    - shard-dg2-set2:     NOTRUN -> [SKIP][59] ([Intel XE#4837]) +3 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-463/igt@xe_eudebug_online@interrupt-all-set-breakpoint.html

  * igt@xe_eudebug_online@resume-one:
    - shard-bmg:          NOTRUN -> [SKIP][60] ([Intel XE#4837])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@xe_eudebug_online@resume-one.html

  * igt@xe_exec_basic@multigpu-once-null-rebind:
    - shard-dg2-set2:     [PASS][61] -> [SKIP][62] ([Intel XE#1392]) +8 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-dg2-463/igt@xe_exec_basic@multigpu-once-null-rebind.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-432/igt@xe_exec_basic@multigpu-once-null-rebind.html

  * igt@xe_exec_basic@multigpu-once-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#2322])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@xe_exec_basic@multigpu-once-userptr.html

  * igt@xe_exec_fault_mode@once-rebind-prefetch:
    - shard-dg2-set2:     NOTRUN -> [SKIP][64] ([Intel XE#288]) +5 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-463/igt@xe_exec_fault_mode@once-rebind-prefetch.html

  * igt@xe_exec_mix_modes@exec-spinner-interrupted-lr:
    - shard-dg2-set2:     NOTRUN -> [SKIP][65] ([Intel XE#2360])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@xe_exec_mix_modes@exec-spinner-interrupted-lr.html

  * igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#4943]) +2 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@many-large-execqueues-new-race-nomemset:
    - shard-bmg:          [PASS][67] -> [SKIP][68] ([Intel XE#4945]) +299 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@xe_exec_system_allocator@many-large-execqueues-new-race-nomemset.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@xe_exec_system_allocator@many-large-execqueues-new-race-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset:
    - shard-lnl:          [PASS][69] -> [FAIL][70] ([Intel XE#5018]) +1 other test fail
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-lnl-8/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-lnl-3/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-race-nomemset:
    - shard-dg2-set2:     NOTRUN -> [SKIP][71] ([Intel XE#4915]) +45 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-463/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-new-race-nomemset.html

  * igt@xe_oa@non-privileged-access-vaddr:
    - shard-dg2-set2:     NOTRUN -> [SKIP][72] ([Intel XE#3573]) +1 other test skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@xe_oa@non-privileged-access-vaddr.html

  * igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p:
    - shard-dg2-set2:     NOTRUN -> [FAIL][73] ([Intel XE#1173])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-433/igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p.html

  * igt@xe_pm@d3cold-i2c:
    - shard-dg2-set2:     NOTRUN -> [SKIP][74] ([Intel XE#5694])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#4733])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@xe_pxp@pxp-stale-bo-bind-post-suspend.html

  
#### Possible fixes ####

  * igt@core_hotunplug@hotunplug-rescan:
    - shard-bmg:          [SKIP][76] ([Intel XE#4963]) -> [PASS][77]
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@core_hotunplug@hotunplug-rescan.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@core_hotunplug@hotunplug-rescan.html

  * igt@fbdev@eof:
    - shard-bmg:          [SKIP][78] ([Intel XE#2134]) -> [PASS][79] +1 other test pass
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@fbdev@eof.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@fbdev@eof.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-adlp:         [DMESG-FAIL][80] ([Intel XE#4543]) -> [PASS][81]
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-adlp-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-adlp-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [INCOMPLETE][82] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][83] +1 other test pass
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_cursor_crc@cursor-suspend:
    - shard-bmg:          [SKIP][84] ([Intel XE#4950]) -> [PASS][85] +55 other tests pass
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_cursor_crc@cursor-suspend.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_cursor_crc@cursor-suspend.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][86] ([Intel XE#2291]) -> [PASS][87] +4 other tests pass
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@single-move@pipe-c:
    - shard-dg2-set2:     [DMESG-WARN][88] -> [PASS][89] +1 other test pass
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-dg2-463/igt@kms_cursor_legacy@single-move@pipe-c.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-432/igt@kms_cursor_legacy@single-move@pipe-c.html

  * igt@kms_feature_discovery@display-2x:
    - shard-bmg:          [SKIP][90] ([Intel XE#2373]) -> [PASS][91]
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-6/igt@kms_feature_discovery@display-2x.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_feature_discovery@display-2x.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-bmg:          [SKIP][92] ([Intel XE#2316]) -> [PASS][93] +5 other tests pass
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-4/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
    - shard-adlp:         [DMESG-WARN][94] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-adlp-1/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-adlp-2/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][96] ([Intel XE#4543]) -> [PASS][97] +4 other tests pass
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-adlp-8/igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a1.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-adlp-1/igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
    - shard-lnl:          [FAIL][98] ([Intel XE#301]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-dg2-set2:     [INCOMPLETE][100] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][101] +1 other test pass
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-dg2-434/igt@kms_flip@flip-vs-suspend-interruptible.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-463/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-bmg:          [SKIP][102] ([Intel XE#4596]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-none.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@kms_pm_dc@dc5-dpms-negative:
    - shard-bmg:          [SKIP][104] ([Intel XE#4947]) -> [PASS][105] +14 other tests pass
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_pm_dc@dc5-dpms-negative.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_pm_dc@dc5-dpms-negative.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-bmg:          [SKIP][106] ([Intel XE#1435]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-6/igt@kms_setmode@invalid-clone-single-crtc.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@xe_exec_basic@many-bindexecqueue-rebind:
    - shard-bmg:          [SKIP][108] ([Intel XE#4945]) -> [PASS][109] +271 other tests pass
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_exec_basic@many-bindexecqueue-rebind.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@xe_exec_basic@many-bindexecqueue-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
    - shard-dg2-set2:     [SKIP][110] ([Intel XE#1392]) -> [PASS][111] +6 other tests pass
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-433/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html

  * igt@xe_gt_freq@freq_suspend:
    - shard-bmg:          [INCOMPLETE][112] -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-1/igt@xe_gt_freq@freq_suspend.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@xe_gt_freq@freq_suspend.html

  * igt@xe_live_ktest@xe_bo:
    - shard-bmg:          [SKIP][114] ([Intel XE#2229]) -> [PASS][115] +1 other test pass
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_live_ktest@xe_bo.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@xe_live_ktest@xe_bo.html

  
#### Warnings ####

  * igt@kms_async_flips@invalid-async-flip-atomic:
    - shard-bmg:          [SKIP][116] ([Intel XE#3768]) -> [SKIP][117] ([Intel XE#4950])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_async_flips@invalid-async-flip-atomic.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_async_flips@invalid-async-flip-atomic.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-270:
    - shard-bmg:          [SKIP][118] ([Intel XE#2327]) -> [SKIP][119] ([Intel XE#4947])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-90:
    - shard-bmg:          [SKIP][120] ([Intel XE#4947]) -> [SKIP][121] ([Intel XE#2327]) +2 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-bmg:          [SKIP][122] ([Intel XE#4947]) -> [SKIP][123] ([Intel XE#1124]) +6 other tests skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-bmg:          [SKIP][124] ([Intel XE#4947]) -> [SKIP][125] ([Intel XE#607])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-bmg:          [SKIP][126] ([Intel XE#1124]) -> [SKIP][127] ([Intel XE#4947]) +7 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
    - shard-bmg:          [SKIP][128] ([Intel XE#2314] / [Intel XE#2894]) -> [SKIP][129] ([Intel XE#4950])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-2-displays-2560x1440p:
    - shard-bmg:          [SKIP][130] ([Intel XE#4950]) -> [SKIP][131] ([Intel XE#367]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-2160x1440p:
    - shard-bmg:          [SKIP][132] ([Intel XE#367]) -> [SKIP][133] ([Intel XE#4950]) +1 other test skip
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs:
    - shard-bmg:          [SKIP][134] ([Intel XE#4947]) -> [SKIP][135] ([Intel XE#2887]) +6 other tests skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-ccs:
    - shard-bmg:          [SKIP][136] ([Intel XE#2887]) -> [SKIP][137] ([Intel XE#4947]) +11 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_ccs@crc-primary-basic-y-tiled-ccs.html
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_ccs@crc-primary-basic-y-tiled-ccs.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
    - shard-bmg:          [SKIP][138] ([Intel XE#4947]) -> [SKIP][139] ([Intel XE#3432])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html

  * igt@kms_chamelium_color@ctm-max:
    - shard-bmg:          [SKIP][140] ([Intel XE#2325]) -> [SKIP][141] ([Intel XE#4950]) +1 other test skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_chamelium_color@ctm-max.html
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_chamelium_color@ctm-max.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate:
    - shard-bmg:          [SKIP][142] ([Intel XE#2252]) -> [SKIP][143] ([Intel XE#4950]) +6 other tests skip
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate.html
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate.html

  * igt@kms_chamelium_hpd@hdmi-hpd-fast:
    - shard-bmg:          [SKIP][144] ([Intel XE#4950]) -> [SKIP][145] ([Intel XE#2252]) +7 other tests skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_chamelium_hpd@hdmi-hpd-fast.html
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_chamelium_hpd@hdmi-hpd-fast.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-bmg:          [SKIP][146] ([Intel XE#4950]) -> [FAIL][147] ([Intel XE#1178])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_content_protection@atomic-dpms.html
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@content-type-change:
    - shard-bmg:          [SKIP][148] ([Intel XE#2341]) -> [SKIP][149] ([Intel XE#4950]) +1 other test skip
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_content_protection@content-type-change.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_content_protection@content-type-change.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-bmg:          [SKIP][150] ([Intel XE#2390]) -> [SKIP][151] ([Intel XE#4950])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_content_protection@dp-mst-type-1.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          [FAIL][152] ([Intel XE#1178]) -> [SKIP][153] ([Intel XE#2341])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-7/igt@kms_content_protection@legacy.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-6/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@lic-type-0:
    - shard-bmg:          [SKIP][154] ([Intel XE#2341]) -> [FAIL][155] ([Intel XE#1178])
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-6/igt@kms_content_protection@lic-type-0.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [SKIP][156] ([Intel XE#2341]) -> [FAIL][157] ([Intel XE#1188])
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-6/igt@kms_content_protection@uevent.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-4/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-onscreen-256x85:
    - shard-bmg:          [SKIP][158] ([Intel XE#2320]) -> [SKIP][159] ([Intel XE#4950]) +3 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_cursor_crc@cursor-onscreen-256x85.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_cursor_crc@cursor-onscreen-256x85.html

  * igt@kms_cursor_crc@cursor-random-32x32:
    - shard-bmg:          [SKIP][160] ([Intel XE#4950]) -> [SKIP][161] ([Intel XE#2320]) +1 other test skip
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_cursor_crc@cursor-random-32x32.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_cursor_crc@cursor-random-32x32.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x512:
    - shard-bmg:          [SKIP][162] ([Intel XE#2321]) -> [SKIP][163] ([Intel XE#4950])
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-bmg:          [SKIP][164] ([Intel XE#4950]) -> [SKIP][165] ([Intel XE#2321]) +1 other test skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_cursor_crc@cursor-sliding-512x512.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
    - shard-bmg:          [SKIP][166] ([Intel XE#5428]) -> [SKIP][167] ([Intel XE#4947])
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html

  * igt@kms_dp_link_training@uhbr-mst:
    - shard-bmg:          [SKIP][168] ([Intel XE#4354]) -> [SKIP][169] ([Intel XE#4947])
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_dp_link_training@uhbr-mst.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_dp_link_training@uhbr-mst.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-bmg:          [SKIP][170] ([Intel XE#4947]) -> [SKIP][171] ([Intel XE#2244])
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_dsc@dsc-with-output-formats.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_feature_discovery@display-3x:
    - shard-bmg:          [SKIP][172] ([Intel XE#2373]) -> [SKIP][173] ([Intel XE#4950])
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_feature_discovery@display-3x.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@display-4x:
    - shard-bmg:          [SKIP][174] ([Intel XE#4950]) -> [SKIP][175] ([Intel XE#1138])
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_feature_discovery@display-4x.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_feature_discovery@display-4x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-bmg:          [SKIP][176] ([Intel XE#2375]) -> [SKIP][177] ([Intel XE#4950])
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_feature_discovery@dp-mst.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [FAIL][178] ([Intel XE#301]) -> [FAIL][179] ([Intel XE#301] / [Intel XE#3149])
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-bmg:          [SKIP][180] ([Intel XE#4947]) -> [SKIP][181] ([Intel XE#2293] / [Intel XE#2380]) +2 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
    - shard-bmg:          [SKIP][182] ([Intel XE#2293] / [Intel XE#2380]) -> [SKIP][183] ([Intel XE#4947]) +1 other test skip
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-bmg:          [SKIP][184] ([Intel XE#2380]) -> [SKIP][185] ([Intel XE#4947])
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt:
    - shard-bmg:          [SKIP][186] ([Intel XE#2311]) -> [SKIP][187] ([Intel XE#4947]) +22 other tests skip
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render:
    - shard-bmg:          [SKIP][188] ([Intel XE#2312]) -> [SKIP][189] ([Intel XE#2311]) +11 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][190] ([Intel XE#2311]) -> [SKIP][191] ([Intel XE#2312]) +9 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][192] ([Intel XE#4947]) -> [SKIP][193] ([Intel XE#5390]) +11 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move:
    - shard-bmg:          [SKIP][194] ([Intel XE#2312]) -> [SKIP][195] ([Intel XE#5390]) +4 other tests skip
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][196] ([Intel XE#5390]) -> [SKIP][197] ([Intel XE#4947]) +6 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][198] ([Intel XE#5390]) -> [SKIP][199] ([Intel XE#2312]) +4 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][200] ([Intel XE#4947]) -> [SKIP][201] ([Intel XE#2311]) +15 other tests skip
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-pgflip-blt.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][202] ([Intel XE#2312]) -> [SKIP][203] ([Intel XE#2313]) +12 other tests skip
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          [SKIP][204] ([Intel XE#2313]) -> [SKIP][205] ([Intel XE#2312]) +10 other tests skip
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-fullscreen.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@pipe-fbc-rte:
    - shard-bmg:          [SKIP][206] ([Intel XE#4947]) -> [SKIP][207] ([Intel XE#5672])
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          [SKIP][208] ([Intel XE#2313]) -> [SKIP][209] ([Intel XE#4947]) +21 other tests skip
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          [SKIP][210] ([Intel XE#4947]) -> [SKIP][211] ([Intel XE#2313]) +16 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][212] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][213] ([Intel XE#3544])
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-bmg:          [SKIP][214] ([Intel XE#2934]) -> [SKIP][215] ([Intel XE#4947])
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_joiner@basic-force-ultra-joiner.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-bmg:          [SKIP][216] ([Intel XE#346]) -> [SKIP][217] ([Intel XE#4947])
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_joiner@invalid-modeset-big-joiner.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-bmg:          [SKIP][218] ([Intel XE#4947]) -> [SKIP][219] ([Intel XE#2934])
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_plane_lowres@tiling-yf:
    - shard-bmg:          [SKIP][220] ([Intel XE#4950]) -> [SKIP][221] ([Intel XE#2393]) +1 other test skip
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_plane_lowres@tiling-yf.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_plane_lowres@tiling-yf.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          [SKIP][222] ([Intel XE#4950]) -> [SKIP][223] ([Intel XE#5021])
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-y.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-bmg:          [SKIP][224] ([Intel XE#870]) -> [SKIP][225] ([Intel XE#4947])
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_pm_backlight@bad-brightness.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-adlp:         [SKIP][226] ([Intel XE#734]) -> [FAIL][227] ([Intel XE#3325])
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-adlp-3/igt@kms_pm_dc@dc9-dpms.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-adlp-8/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-bmg:          [SKIP][228] ([Intel XE#4947]) -> [SKIP][229] ([Intel XE#2505])
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_pm_dc@deep-pkgc.html
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-bmg:          [SKIP][230] ([Intel XE#1439] / [Intel XE#836]) -> [SKIP][231] ([Intel XE#4962])
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-bmg:          [SKIP][232] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836]) -> [SKIP][233] ([Intel XE#4962])
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_pm_rpm@modeset-lpsp.html
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-bmg:          [SKIP][234] ([Intel XE#4962]) -> [SKIP][235] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_pm_rpm@modeset-lpsp-stress.html
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
    - shard-bmg:          [SKIP][236] ([Intel XE#4947]) -> [SKIP][237] ([Intel XE#1489]) +5 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
    - shard-bmg:          [SKIP][238] ([Intel XE#1489]) -> [SKIP][239] ([Intel XE#4947]) +5 other tests skip
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html

  * igt@kms_psr@fbc-pr-cursor-blt:
    - shard-bmg:          [SKIP][240] ([Intel XE#4947]) -> [SKIP][241] ([Intel XE#2234] / [Intel XE#2850]) +8 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_psr@fbc-pr-cursor-blt.html
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_psr@fbc-pr-cursor-blt.html

  * igt@kms_psr@psr-sprite-plane-move:
    - shard-bmg:          [SKIP][242] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][243] ([Intel XE#4947]) +10 other tests skip
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_psr@psr-sprite-plane-move.html
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_psr@psr-sprite-plane-move.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-bmg:          [SKIP][244] ([Intel XE#4950]) -> [SKIP][245] ([Intel XE#2330]) +1 other test skip
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
    - shard-bmg:          [SKIP][246] ([Intel XE#3414] / [Intel XE#3904]) -> [SKIP][247] ([Intel XE#4950])
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-bmg:          [SKIP][248] ([Intel XE#2330]) -> [SKIP][249] ([Intel XE#4950])
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-bmg:          [SKIP][250] ([Intel XE#1435]) -> [SKIP][251] ([Intel XE#4950]) +1 other test skip
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@kms_setmode@basic-clone-single-crtc.html
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][252] ([Intel XE#4950]) -> [SKIP][253] ([Intel XE#2426])
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2-set2:     [SKIP][254] ([Intel XE#362]) -> [SKIP][255] ([Intel XE#1500])
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-432/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@kms_vrr@cmrr:
    - shard-bmg:          [SKIP][256] ([Intel XE#4950]) -> [SKIP][257] ([Intel XE#2168])
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_vrr@cmrr.html
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@kms_vrr@cmrr.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          [SKIP][258] ([Intel XE#1499]) -> [SKIP][259] ([Intel XE#4950]) +1 other test skip
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@kms_vrr@flip-suspend.html
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@kms_vrr@flip-suspend.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-bmg:          [SKIP][260] ([Intel XE#4950]) -> [SKIP][261] ([Intel XE#1499])
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@kms_vrr@seamless-rr-switch-vrr.html
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
    - shard-bmg:          [SKIP][262] ([Intel XE#4950]) -> [SKIP][263] ([Intel XE#1091] / [Intel XE#2849])
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html

  * igt@xe_eudebug@basic-vm-bind-discovery:
    - shard-bmg:          [SKIP][264] ([Intel XE#4837]) -> [SKIP][265] ([Intel XE#4945]) +8 other tests skip
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@xe_eudebug@basic-vm-bind-discovery.html
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@xe_eudebug@basic-vm-bind-discovery.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue:
    - shard-bmg:          [SKIP][266] ([Intel XE#2322]) -> [SKIP][267] ([Intel XE#4945]) +3 other tests skip
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue.html
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind:
    - shard-bmg:          [SKIP][268] ([Intel XE#4945]) -> [SKIP][269] ([Intel XE#2322]) +5 other tests skip
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind.html
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug:
    - shard-bmg:          [SKIP][270] ([Intel XE#4945]) -> [SKIP][271] ([Intel XE#4837]) +9 other tests skip
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug.html
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@xe_exec_sip_eudebug@breakpoint-writesip-nodebug.html

  * igt@xe_exec_system_allocator@threads-many-execqueues-mmap-new-huge:
    - shard-bmg:          [SKIP][272] ([Intel XE#4943]) -> [SKIP][273] ([Intel XE#4945]) +21 other tests skip
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-new-huge.html
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@xe_exec_system_allocator@threads-many-execqueues-mmap-new-huge.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge:
    - shard-bmg:          [SKIP][274] ([Intel XE#4945]) -> [SKIP][275] ([Intel XE#4943]) +17 other tests skip
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge.html
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-mmap-free-huge.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-bmg:          [SKIP][276] ([Intel XE#4945]) -> [ABORT][277] ([Intel XE#4917] / [Intel XE#5466] / [Intel XE#5530])
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_pat@pat-index-xelp:
    - shard-bmg:          [SKIP][278] ([Intel XE#4945]) -> [SKIP][279] ([Intel XE#2245])
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_pat@pat-index-xelp.html
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-7/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pat@pat-index-xelpg:
    - shard-bmg:          [SKIP][280] ([Intel XE#4945]) -> [SKIP][281] ([Intel XE#2236])
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_pat@pat-index-xelpg.html
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@xe_pat@pat-index-xelpg.html

  * igt@xe_peer2peer@read:
    - shard-dg2-set2:     [SKIP][282] ([Intel XE#1061]) -> [FAIL][283] ([Intel XE#1173])
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-dg2-432/igt@xe_peer2peer@read.html
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-dg2-433/igt@xe_peer2peer@read.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-bmg:          [SKIP][284] ([Intel XE#2284]) -> [SKIP][285] ([Intel XE#4945]) +2 other tests skip
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@xe_pm@s3-d3cold-basic-exec.html
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_pxp@display-black-pxp-fb:
    - shard-bmg:          [SKIP][286] ([Intel XE#4733]) -> [SKIP][287] ([Intel XE#4945])
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-2/igt@xe_pxp@display-black-pxp-fb.html
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@xe_pxp@display-black-pxp-fb.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq:
    - shard-bmg:          [SKIP][288] ([Intel XE#4945]) -> [SKIP][289] ([Intel XE#4733]) +1 other test skip
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq.html
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@xe_pxp@pxp-stale-bo-exec-post-termination-irq.html

  * igt@xe_query@multigpu-query-engines:
    - shard-bmg:          [SKIP][290] ([Intel XE#4945]) -> [SKIP][291] ([Intel XE#944])
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_query@multigpu-query-engines.html
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-3/igt@xe_query@multigpu-query-engines.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-bmg:          [SKIP][292] ([Intel XE#944]) -> [SKIP][293] ([Intel XE#4945]) +2 other tests skip
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@xe_query@multigpu-query-mem-usage.html
   [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@xe_query@multigpu-query-mem-usage.html

  * igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling:
    - shard-bmg:          [SKIP][294] ([Intel XE#4130]) -> [SKIP][295] ([Intel XE#4945])
   [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-8/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html
   [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html

  * igt@xe_sriov_flr@flr-each-isolation:
    - shard-bmg:          [SKIP][296] ([Intel XE#3342]) -> [SKIP][297] ([Intel XE#4945])
   [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-4/igt@xe_sriov_flr@flr-each-isolation.html
   [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-5/igt@xe_sriov_flr@flr-each-isolation.html

  * igt@xe_sriov_flr@flr-twice:
    - shard-bmg:          [SKIP][298] ([Intel XE#4945]) -> [SKIP][299] ([Intel XE#4273])
   [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2/shard-bmg-5/igt@xe_sriov_flr@flr-twice.html
   [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/shard-bmg-8/igt@xe_sriov_flr@flr-twice.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
  [Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2393
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#3325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3325
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3768]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3768
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273
  [Intel XE#4298]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4298
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416
  [Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
  [Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#4945]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4945
  [Intel XE#4947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4947
  [Intel XE#4950]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4950
  [Intel XE#4962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4962
  [Intel XE#4963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4963
  [Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5428
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
  [Intel XE#5672]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5672
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#734]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/734
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2 -> xe-pw-148982v9

  IGT_8482: 8482
  xe-3496-68a99106069be8ab52030c61215da008b2f6dbd2: 68a99106069be8ab52030c61215da008b2f6dbd2
  xe-pw-148982v9: 148982v9

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-148982v9/index.html

[-- Attachment #2: Type: text/html, Size: 94193 bytes --]

Re: [PATCH v8 8/8] drm/xe/vf: Rebase exec queue parallel commands during migration recovery

[Michał Winiarski]

On Fri, Aug 01, 2025 at 03:50:45AM +0200, Tomasz Lis wrote:
> Parallel exec queues have an additional command streamer buffer which holds
> a GGTT reference to data within context status. The GGTT references have to
> be fixed after VF migration.
> 
> v2: Properly handle nop entry, verify if parsing goes ok
> v3: Improve error/warn logging, add propagation of errors,
>  give names to magic offsets
> 
> Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> ---
>  drivers/gpu/drm/xe/abi/guc_actions_abi.h |  8 ++++
>  drivers/gpu/drm/xe/xe_guc_submit.c       | 54 ++++++++++++++++++++++++
>  2 files changed, 62 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> index 81eb046aeebf..d8cf68a0516d 100644
> --- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> +++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
> @@ -193,6 +193,14 @@ enum xe_guc_register_context_multi_lrc_param_offsets {
>  	XE_GUC_REGISTER_CONTEXT_MULTI_LRC_MSG_MIN_LEN = 11,
>  };
>  
> +enum xe_guc_context_wq_item_offsets {
> +	XE_GUC_CONTEXT_WQ_HEADER_DATA_0_TYPE_LEN = 0,
> +	XE_GUC_CONTEXT_WQ_EL_INFO_DATA_1_CTX_DESC_LOW,
> +	XE_GUC_CONTEXT_WQ_EL_INFO_DATA_2_GUCCTX_RINGTAIL_FREEZEPOCS,
> +	XE_GUC_CONTEXT_WQ_EL_INFO_DATA_3_WI_FENCE_ID,
> +	XE_GUC_CONTEXT_WQ_EL_CHILD_LIST_DATA_4_RINGTAIL,
> +};
> +
>  enum xe_guc_report_status {
>  	XE_GUC_REPORT_STATUS_UNKNOWN = 0x0,
>  	XE_GUC_REPORT_STATUS_ACKED = 0x1,
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index f59fecc58fa8..427694afe0cc 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -671,12 +671,18 @@ static void wq_item_append(struct xe_exec_queue *q)
>  	if (wq_wait_for_space(q, wqi_size))
>  		return;
>  
> +	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_HEADER_DATA_0_TYPE_LEN);
>  	wqi[i++] = FIELD_PREP(WQ_TYPE_MASK, WQ_TYPE_MULTI_LRC) |
>  		FIELD_PREP(WQ_LEN_MASK, len_dw);
> +	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_INFO_DATA_1_CTX_DESC_LOW);
>  	wqi[i++] = xe_lrc_descriptor(q->lrc[0]);
> +	xe_gt_assert(guc_to_gt(guc), i ==
> +		     XE_GUC_CONTEXT_WQ_EL_INFO_DATA_2_GUCCTX_RINGTAIL_FREEZEPOCS);
>  	wqi[i++] = FIELD_PREP(WQ_GUC_ID_MASK, q->guc->id) |
>  		FIELD_PREP(WQ_RING_TAIL_MASK, q->lrc[0]->ring.tail / sizeof(u64));
> +	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_INFO_DATA_3_WI_FENCE_ID);
>  	wqi[i++] = 0;
> +	xe_gt_assert(guc_to_gt(guc), i == XE_GUC_CONTEXT_WQ_EL_CHILD_LIST_DATA_4_RINGTAIL);

Mixed feelings on the asserts, but I understand that it's just to
"document" the offsets used in the rebase function.

Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>

Thanks,
-Michał

>  	for (j = 1; j < q->width; ++j) {
>  		struct xe_lrc *lrc = q->lrc[j];
>  
> @@ -697,6 +703,50 @@ static void wq_item_append(struct xe_exec_queue *q)
>  	parallel_write(xe, map, wq_desc.tail, q->guc->wqi_tail);
>  }
>  
> +static int wq_items_rebase(struct xe_exec_queue *q)
> +{
> +	struct xe_guc *guc = exec_queue_to_guc(q);
> +	struct xe_device *xe = guc_to_xe(guc);
> +	struct iosys_map map = xe_lrc_parallel_map(q->lrc[0]);
> +	int i = q->guc->wqi_head;
> +
> +	/* the ring starts after a header struct */
> +	iosys_map_incr(&map, offsetof(struct guc_submit_parallel_scratch, wq[0]));
> +
> +	while ((i % WQ_SIZE) != (q->guc->wqi_tail % WQ_SIZE)) {
> +		u32 len_dw, type, val;
> +
> +		if (drm_WARN_ON_ONCE(&xe->drm, i < 0 || i > 2 * WQ_SIZE))
> +			break;
> +
> +		val = xe_map_rd_ring_u32(xe, &map, i / sizeof(u32) +
> +					 XE_GUC_CONTEXT_WQ_HEADER_DATA_0_TYPE_LEN,
> +					 WQ_SIZE / sizeof(u32));
> +		len_dw = FIELD_GET(WQ_LEN_MASK, val);
> +		type = FIELD_GET(WQ_TYPE_MASK, val);
> +
> +		if (drm_WARN_ON_ONCE(&xe->drm, len_dw >= WQ_SIZE / sizeof(u32)))
> +			break;
> +
> +		if (type == WQ_TYPE_MULTI_LRC) {
> +			val = xe_lrc_descriptor(q->lrc[0]);
> +			xe_map_wr_ring_u32(xe, &map, i / sizeof(u32) +
> +					   XE_GUC_CONTEXT_WQ_EL_INFO_DATA_1_CTX_DESC_LOW,
> +					   WQ_SIZE / sizeof(u32), val);
> +		} else if (drm_WARN_ON_ONCE(&xe->drm, type != WQ_TYPE_NOOP)) {
> +			break;
> +		}
> +
> +		i += (len_dw + 1) * sizeof(u32);
> +	}
> +
> +	if ((i % WQ_SIZE) != (q->guc->wqi_tail % WQ_SIZE)) {
> +		xe_gt_err(q->gt, "Exec queue fixups incomplete - wqi parse failed\n");
> +		return -EBADMSG;
> +	}
> +	return 0;
> +}
> +
>  #define RESUME_PENDING	~0x0ull
>  static void submit_exec_queue(struct xe_exec_queue *q)
>  {
> @@ -2543,6 +2593,10 @@ int xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch)
>  		err = xe_exec_queue_contexts_hwsp_rebase(q, scratch);
>  		if (err)
>  			break;
> +		if (xe_exec_queue_is_parallel(q))
> +			err = wq_items_rebase(q);
> +		if (err)
> +			break;
>  	}
>  	mutex_unlock(&guc->submission_state.lock);
>  
> -- 
> 2.25.1
> 

RE: [PATCH v8 6/8] drm/xe/vf: Post migration, repopulate ring area for pending request

[Cavitt, Jonathan]

-----Original Message-----
From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Tomasz Lis
Sent: Thursday, July 31, 2025 6:51 PM
To: intel-xe@lists.freedesktop.org
Cc: Winiarski, Michal <michal.winiarski@intel.com>; Wajdeczko, Michal <Michal.Wajdeczko@intel.com>; Piorkowski, Piotr <piotr.piorkowski@intel.com>; Brost, Matthew <matthew.brost@intel.com>; De Marchi, Lucas <lucas.demarchi@intel.com>
Subject: [PATCH v8 6/8] drm/xe/vf: Post migration, repopulate ring area for pending request
> 
> The commands within ring area allocated for a request may contain
> references to GGTT. These references require update after VF
> migration, in order to continue any preempted LRCs, or jobs which
> were emitted to the ring but not sent to GuC yet.
> 
> This change calls the emit function again for all such jobs,
> as part of post-migration recovery.
> 
> v2: Moved few functions to better files
> v3: Take job_list_lock
> 
> Signed-off-by: Tomasz Lis <tomasz.lis@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Reviewed-by: Michal Winiarski <michal.winiarski@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_exec_queue.c | 24 ++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_exec_queue.h |  2 ++
>  drivers/gpu/drm/xe/xe_guc_submit.c | 24 ++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_guc_submit.h |  2 ++
>  drivers/gpu/drm/xe/xe_sriov_vf.c   |  2 +-
>  5 files changed, 53 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 0beb6388acb0..1a7950d18800 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -1092,3 +1092,27 @@ void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)
>  		xe_lrc_update_hwctx_regs_with_address(q->lrc[i]);
>  	}
>  }
> +
> +/**
> + * xe_exec_queue_jobs_ring_restore - Re-emit ring commands of requests pending on given queue.
> + * @q: the &xe_exec_queue struct instance
> + */
> +void xe_exec_queue_jobs_ring_restore(struct xe_exec_queue *q)
> +{
> +	struct xe_gpu_scheduler *sched = &q->guc->sched;
> +	struct xe_sched_job *job;
> +
> +	/*
> +	 * This routine is used within VF migration recovery. This means
> +	 * using the lock here, introduces a restriction: in no place we
> +	 * can wait for any GFX HW response when that lock is taken.
> +	 */

s/here,/here
s/in no place we can/we cannot
s/response when that/responses while the

Above changes also apply to duplicate comment below.

These requests are blocking.
-Jonathan Cavitt

> +	spin_lock(&sched->base.job_list_lock);
> +	list_for_each_entry(job, &sched->base.pending_list, drm.list) {
> +		if (xe_sched_job_is_error(job))
> +			continue;
> +
> +		q->ring_ops->emit_job(job);
> +	}
> +	spin_unlock(&sched->base.job_list_lock);
> +}
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
> index da720197929b..0ffc0cb03aa6 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> @@ -92,4 +92,6 @@ void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
>  
>  void xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch);
>  
> +void xe_exec_queue_jobs_ring_restore(struct xe_exec_queue *q);
> +
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index 452fb6e63f31..8d090dced9cf 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -781,6 +781,30 @@ guc_exec_queue_run_job(struct drm_sched_job *drm_job)
>  	return fence;
>  }
>  
> +/**
> + * xe_guc_jobs_ring_rebase - Re-emit ring commands of requests pending
> + * on all queues under a guc.
> + * @guc: the &xe_guc struct instance
> + */
> +void xe_guc_jobs_ring_rebase(struct xe_guc *guc)
> +{
> +	struct xe_exec_queue *q;
> +	unsigned long index;
> +
> +	/*
> +	 * This routine is used within VF migration recovery. This means
> +	 * using the lock here, introduces a restriction: in no place we
> +	 * can wait for any GFX HW response when that lock is taken.
> +	 */
> +	mutex_lock(&guc->submission_state.lock);
> +	xa_for_each(&guc->submission_state.exec_queue_lookup, index, q) {
> +		if (exec_queue_killed_or_banned_or_wedged(q))
> +			continue;
> +		xe_exec_queue_jobs_ring_restore(q);
> +	}
> +	mutex_unlock(&guc->submission_state.lock);
> +}
> +
>  static void guc_exec_queue_free_job(struct drm_sched_job *drm_job)
>  {
>  	struct xe_sched_job *job = to_xe_sched_job(drm_job);
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
> index 9a2718c81d43..92a6f0ade615 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.h
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.h
> @@ -34,6 +34,8 @@ int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
>  int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len);
>  int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len);
>  
> +void xe_guc_jobs_ring_rebase(struct xe_guc *guc);
> +
>  struct xe_guc_submit_exec_queue_snapshot *
>  xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q);
>  void
> diff --git a/drivers/gpu/drm/xe/xe_sriov_vf.c b/drivers/gpu/drm/xe/xe_sriov_vf.c
> index 43ac73e432d4..a219395c15de 100644
> --- a/drivers/gpu/drm/xe/xe_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_sriov_vf.c
> @@ -284,7 +284,7 @@ static int gt_vf_post_migration_fixups(struct xe_gt *gt)
>  		xe_tile_sriov_vf_fixup_ggtt_nodes(gt_to_tile(gt), shift);
>  		xe_gt_sriov_vf_default_lrcs_hwsp_rebase(gt);
>  		xe_guc_contexts_hwsp_rebase(&gt->uc.guc, buf);
> -		/* FIXME: add the recovery steps */
> +		xe_guc_jobs_ring_rebase(&gt->uc.guc);
>  		xe_guc_ct_fixup_messages_with_ggtt(&gt->uc.guc.ct, shift);
>  	}
>  
> -- 
> 2.25.1
> 
> 

Re: [PATCH v8 0/8] drm/xe/vf: Post-migration recovery of queues and jobs

[Matthew Brost]

On Fri, Aug 01, 2025 at 03:50:37AM +0200, Tomasz Lis wrote:

+Maintainers, public, consolidating threads.

IMO this needs to be fully reverted or at minimum a subset of
problematic patches, along with [1].

To start, it was brought to my attention that this code was not tested
due to a lack of internal infrastructure. I believe it is completely
unacceptable for untested code to be merged, especially for a complex
feature like this. After spending some time reviewing the feature, I
found clear bugs, and the overall software architecture appears
ill-conceived.

Quick overview of bugs / issues I have spotted:

- xe_exec_queue_jobs_ring_restore does not modify existing ring jobs’ GGTT
  addresses; it instead populates new parts of the ring buffer. This not
  only fails to accomplish what it intends, it could also overflow the
  ring buffer for existing jobs.

- xe_exec_queue_jobs_ring_restore has clear layering violations by
  reaching into q->guc state.

- Upon VF resume, nothing prevents new submissions from writing to GGTT
  addresses that have been moved. I was looped into this by internal
  patches proposing an untenable locking model, which IMO is non-viable.
  Tomazs please post those publically for reference.

- During queue pause/unpause [3], nothing (i.e., a missing mutex) prevents
  a UAF during the queue lookup in submission_state.exec_queue_lookup.

- xe_sched_submission_stop_async in [3] is not actually asynchronous (it
  synchronously stops the scheduler workitems). It also doesn’t prevent
  queued scheduler messages (driver side workitems) from being
  processed; those may send GuC H2Gs over an inactive interface, or wait
  on G2Hs that will never arrive because the CT interface/GuC is not live.

- xe_sched_submission_stop_async relies on GuC CTs being alive to make
  forward progress; otherwise GuC CT timeouts can trigger a GT reset,
  which by nature loses state which opposing to this features goal.

- Even if xe_sched_submission_stop_async were actually asynchronous, GuC
  H2Gs have bounded timeouts, so H2Gs can be lost. The submission model
  assumes H2G/G2H are lossless or that losses are recoverable by
  inspecting stored GuC submission-queue state (as with GT resets).

- Modifying GGTT addresses via CTs [4] or GuC WQs [5] is fragile. Any
  interface change would likely break this, and any new interfaces that
  use GGTT addresses would also need updates.

I purpose this flow instead, which TL;DR is modified GT reset flow which
understands GuC state is not lost, rather CTs can be lost.

- Before calling xe_guc_submit_pause(), stop the CTs and drain/parse all
  pending G2H messages. Parsing G2H stabilizes the GuC submission state;
  stopping CTs prevents waits on disabled CTs and avoids timeouts due to
  lack of space.

- xe_guc_submit_{pause,unpause}() should take submission_state.lock and
  flip a bit in the global GuC submission state. This bit blocks all new
  submissions and causes any waiters in the submission/message paths to
  exit gracefully.

- xe_guc_submit_pause() stops everything synchronously, including TDRs.
  This is required here because TDRs are scheduled on the same
  single-threaded, ordered workqueue. We may need DRM scheduler hooks to
  facilitate pausing/resuming TDRs.

- xe_guc_submit_pause() scans the GuC submission state and makes any
  modifications needed for replay (e.g., adjust internal state, reset the
  WQ head and tail to match, adjust LRC head/tail pointers to match,
  etc.).

- Scan the CT buffer; convert anything that touches submission state into
  a NOP and adjust G2H credits as needed. If the GuC lacks a NOP, we’ll
  need to add one; alternatively, if feasible, we can discard the entire
  H2G queue, which would be simpler.

- Adjust all GGTT addresses of non-submission-related objects.

- Restart the CTs and enable the VF in the GuC.

- xe_guc_submit_unpause() resubmits everything through the scheduler, with
  ring-head pointer adjustment similar to [6]. (It’s possible the head
  adjustment belongs in pause; I need a complete picture of how the GuC
  replays preempted jobs—e.g., if the return address from BB start is an
  exact ring address rather than relying on the ring head, the algorithm
  would change.) The resubmission will re-register any queues whose
  registration was lost, re-enable any queues whose scheduler-enable state
  was lost, and resubmit the correct WQ items.

- xe_guc_submit_unpause() also replays any messages that were in flight
  but lost due to VF resume (e.g., teardown queue, suspend/resume of
  queues).

- xe_guc_submit_unpause() restarts all scheduler work items, including
  TDRs.

Matt

[1] https://patchwork.freedesktop.org/series/148780/
[2] https://patchwork.freedesktop.org/patch/666681/?series=148982&rev=10
[3] https://patchwork.freedesktop.org/patch/666679/?series=148982&rev=10
[4] https://patchwork.freedesktop.org/patch/652446/?series=148780&rev=1
[5] https://patchwork.freedesktop.org/patch/666683/?series=148982&rev=10
[6] https://patchwork.freedesktop.org/series/152715/ 

> To support VF Migration, it is necessary to do fixups to any
> non-virtualized resources. These fixups need to be applied within
> VM, on the KMD working with VF.
> 
> This series adds two fixup functions to the recovery worker:
> * for fixing xe_lrc structs within queues
> * for fixing xe_job structs and the commands they emit
> It also provides some performance and stability fixes - blocking
> submissions and resets while the fixups are being applied.
> In case of sub-allocator, it removes the cached GGTT addresses
> instead of implementing fixups for them.
> 
> v2: Switcghed to update of addresses by xe_lrc_write_ctx_reg()
>   to avoid kzalloc(), renamed or moved few functions
> v3: Renamed and reordered parameters, added kerneldocs
> v4: Take job_list_lock, introduce a new atomic for reset
>   blocking, add "refresh utilization buffer" patch
> v5: Replaced "Finish RESFIX by reset" patch with "Skip fixups
>   before getting GGTT info", rebased "Refresh utilization buffer"
>   patch
> v6: Rebased to changes in "Make multi-GT migration less error prone",
>   used a scratch buffer, and added one more ring recovery patch
> v7: Used better matching atomic functs, fixed noop item at end of
>   WQ ring, added more exit conditions in wq ring
> v8: Improve error/warn logging, add propagation of errors,
>  make enum for offsets
> 
> Tomasz Lis (8):
>   drm/xe/sa: Avoid caching GGTT address within the manager
>   drm/xe/vf: Pause submissions during RESFIX fixups
>   drm/xe: Block reset while recovering from VF migration
>   drm/xe/vf: Rebase HWSP of all contexts after migration
>   drm/xe/vf: Rebase MEMIRQ structures for all contexts after migration
>   drm/xe/vf: Post migration, repopulate ring area for pending request
>   drm/xe/vf: Refresh utilization buffer during migration recovery
>   drm/xe/vf: Rebase exec queue parallel commands during migration
>     recovery
> 
>  drivers/gpu/drm/xe/abi/guc_actions_abi.h |   8 ++
>  drivers/gpu/drm/xe/xe_exec_queue.c       |  48 +++++++
>  drivers/gpu/drm/xe/xe_exec_queue.h       |   4 +
>  drivers/gpu/drm/xe/xe_gpu_scheduler.c    |  13 ++
>  drivers/gpu/drm/xe/xe_gpu_scheduler.h    |   1 +
>  drivers/gpu/drm/xe/xe_gt.c               |  10 ++
>  drivers/gpu/drm/xe/xe_gt_debugfs.c       |   5 +-
>  drivers/gpu/drm/xe/xe_gt_sriov_vf.c      |  14 ++
>  drivers/gpu/drm/xe/xe_gt_sriov_vf.h      |   1 +
>  drivers/gpu/drm/xe/xe_guc_buf.c          |   2 +-
>  drivers/gpu/drm/xe/xe_guc_submit.c       | 175 +++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_guc_submit.h       |   9 ++
>  drivers/gpu/drm/xe/xe_guc_types.h        |   6 +
>  drivers/gpu/drm/xe/xe_lrc.c              | 107 ++++++++++++--
>  drivers/gpu/drm/xe/xe_lrc.h              |   9 ++
>  drivers/gpu/drm/xe/xe_sa.c               |   1 -
>  drivers/gpu/drm/xe/xe_sa.h               |  15 +-
>  drivers/gpu/drm/xe/xe_sa_types.h         |   1 -
>  drivers/gpu/drm/xe/xe_sriov_vf.c         |  78 +++++++++-
>  drivers/gpu/drm/xe/xe_sriov_vf_ccs.c     |   2 +-
>  20 files changed, 490 insertions(+), 19 deletions(-)
> 
> -- 
> 2.25.1
> 

Re: [PATCH v8 0/8] drm/xe/vf: Post-migration recovery of queues and jobs

[Thomas Hellström]

On Mon, 2025-08-11 at 21:47 -0700, Matthew Brost wrote:
> On Fri, Aug 01, 2025 at 03:50:37AM +0200, Tomasz Lis wrote:
> 
> +Maintainers, public, consolidating threads.
> 
> IMO this needs to be fully reverted or at minimum a subset of
> problematic patches, along with [1].
> 
> To start, it was brought to my attention that this code was not
> tested
> due to a lack of internal infrastructure. I believe it is completely
> unacceptable for untested code to be merged, especially for a complex
> feature like this. After spending some time reviewing the feature, I
> found clear bugs, and the overall software architecture appears
> ill-conceived.
> 

Tomasz Lis, Michał Wajdeczko, what type of testing is missing here? Is
the code not tested at all, not even internally or do we lack igts for
this specific functionality?

/Thomas

Re: [PATCH v8 0/8] drm/xe/vf: Post-migration recovery of queues and jobs

[Lis, Tomasz]

On 8/12/2025 5:55 PM, Thomas Hellström wrote:
> On Mon, 2025-08-11 at 21:47 -0700, Matthew Brost wrote:
>> On Fri, Aug 01, 2025 at 03:50:37AM +0200, Tomasz Lis wrote:
>>
>> +Maintainers, public, consolidating threads.
>>
>> IMO this needs to be fully reverted or at minimum a subset of
>> problematic patches, along with [1].
>>
>> To start, it was brought to my attention that this code was not
>> tested
>> due to a lack of internal infrastructure. I believe it is completely
>> unacceptable for untested code to be merged, especially for a complex
>> feature like this. After spending some time reviewing the feature, I
>> found clear bugs, and the overall software architecture appears
>> ill-conceived.
>>
> Tomasz Lis, Michał Wajdeczko, what type of testing is missing here? Is
> the code not tested at all, not even internally or do we lack igts for
> this specific functionality?

Most of the patches were tested with simplified VF migration scenario - 
where

both PF and VF driver is probed on the same kernel. This scenario 
limited the

ability to test objects flowing due to the GPU being busy - like jobs or CTB

messages. This is because the scenario doesn't use VM, therefore VM cannot

be paused. But GGTT address change was tested.

Recently (circa 3 weeks ago) we've enabled complete testing environment,

with VF KMD running within a VM. We are now testing the solution in an

environment where we can see the ring emit position bug noticed by

Matthew.

To conclude this was tested, and is now going through more thorough

testing. The issues are:

* A bug with position of CTB messages within ring was not spotted by the

  testing.

* The patch "drm/xe/vf: Pause submissions during RESFIX fixups" is

  too naive with its approach - this one patch is introducing problems

  which may end up in deadlock.


All VF migration code is only reachable in debug builds:

```

static bool vf_migration_supported(struct xe_device *xe)
{
         return IS_ENABLED(CONFIG_DRM_XE_DEBUG);
}
```

The feature is not enabled, because it is not fully merged yet.


-Tomasz

>
> /Thomas
>
>