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charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit On 6/17/2025 7:39 AM, Matt Roper wrote: > Although "multi-tile" and "multiple GTs per tile" are mutually-exclusive > characteristics on all of our platforms today, this may not always be > true. Assign GT IDs according to xe->info.max_gt_per_tile in a way that > should work even if future platforms have different configurations. > > This patch should not change the behavior of current platforms; it only > future-proofs for potential future designs. > > Signed-off-by: Matt Roper > --- > drivers/gpu/drm/xe/xe_mmio.c | 8 -------- > drivers/gpu/drm/xe/xe_pci.c | 14 ++++---------- > 2 files changed, 4 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c > index 7357458bc0d2..b65d888ee8e4 100644 > --- a/drivers/gpu/drm/xe/xe_mmio.c > +++ b/drivers/gpu/drm/xe/xe_mmio.c > @@ -82,14 +82,6 @@ static void mmio_multi_tile_setup(struct xe_device *xe, size_t tile_mmio_size) > drm_info(&xe->drm, "tile_count: %d, reduced_tile_count %d\n", > xe->info.tile_count, tile_count); > xe->info.tile_count = tile_count; > - > - /* > - * FIXME: Needs some work for standalone media, but > - * should be impossible with multi-tile for now: > - * multi-tile platform with standalone media doesn't > - * exist > - */ > - xe->info.gt_count = xe->info.tile_count; > } > } > > diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c > index a4885f64c2c4..b29252abbf3e 100644 > --- a/drivers/gpu/drm/xe/xe_pci.c > +++ b/drivers/gpu/drm/xe/xe_pci.c > @@ -687,10 +687,11 @@ static int xe_info_init(struct xe_device *xe, > */ > for_each_tile(tile, xe, id) { > gt = tile->primary_gt; > - gt->info.id = xe->info.gt_count++; > gt->info.type = XE_GT_TYPE_MAIN; > + gt->info.id = tile->id * xe->info.max_gt_per_tile; why gt->info.id is equal to tile->id * xe->info.max_gt_per_tile then the resultant number exceeds max_gt_per_tile , i dont know whether we can assign gt->info.id as equal to tile->id > gt->info.has_indirect_ring_state = graphics_desc->has_indirect_ring_state; > gt->info.engine_mask = graphics_desc->hw_engine_mask; > + xe->info.gt_count++; > > if (MEDIA_VER(xe) < 13 && media_desc) > gt->info.engine_mask |= media_desc->hw_engine_mask; > @@ -708,17 +709,10 @@ static int xe_info_init(struct xe_device *xe, > > gt = tile->media_gt; > gt->info.type = XE_GT_TYPE_MEDIA; > + gt->info.id = tile->id * xe->info.max_gt_per_tile + 1; > gt->info.has_indirect_ring_state = media_desc->has_indirect_ring_state; > gt->info.engine_mask = media_desc->hw_engine_mask; > - > - /* > - * FIXME: At the moment multi-tile and standalone media are > - * mutually exclusive on current platforms. We'll need to > - * come up with a better way to number GTs if we ever wind > - * up with platforms that support both together. > - */ > - drm_WARN_ON(&xe->drm, id != 0); > - gt->info.id = xe->info.gt_count++; > + xe->info.gt_count++; > } > > return 0; --------------CH0DZXZ3uTe8UFQiMXkQcOFl Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: 8bit

On 6/17/2025 7:39 AM, Matt Roper wrote:
Although "multi-tile" and "multiple GTs per tile" are mutually-exclusive
characteristics on all of our platforms today, this may not always be
true.  Assign GT IDs according to xe->info.max_gt_per_tile in a way that
should work even if future platforms have different configurations.

This patch should not change the behavior of current platforms; it only
future-proofs for potential future designs.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/xe/xe_mmio.c |  8 --------
 drivers/gpu/drm/xe/xe_pci.c  | 14 ++++----------
 2 files changed, 4 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
index 7357458bc0d2..b65d888ee8e4 100644
--- a/drivers/gpu/drm/xe/xe_mmio.c
+++ b/drivers/gpu/drm/xe/xe_mmio.c
@@ -82,14 +82,6 @@ static void mmio_multi_tile_setup(struct xe_device *xe, size_t tile_mmio_size)
 			drm_info(&xe->drm, "tile_count: %d, reduced_tile_count %d\n",
 				 xe->info.tile_count, tile_count);
 			xe->info.tile_count = tile_count;
-
-			/*
-			 * FIXME: Needs some work for standalone media, but
-			 * should be impossible with multi-tile for now:
-			 * multi-tile platform with standalone media doesn't
-			 * exist
-			 */
-			xe->info.gt_count = xe->info.tile_count;
 		}
 	}
 
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index a4885f64c2c4..b29252abbf3e 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -687,10 +687,11 @@ static int xe_info_init(struct xe_device *xe,
 	 */
 	for_each_tile(tile, xe, id) {
 		gt = tile->primary_gt;
-		gt->info.id = xe->info.gt_count++;
 		gt->info.type = XE_GT_TYPE_MAIN;
+		gt->info.id = tile->id * xe->info.max_gt_per_tile;
why  gt->info.id is equal to tile->id * xe->info.max_gt_per_tile then the resultant number exceeds max_gt_per_tile , i dont know whether we can assign gt->info.id as equal to tile->id 
 		gt->info.has_indirect_ring_state = graphics_desc->has_indirect_ring_state;
 		gt->info.engine_mask = graphics_desc->hw_engine_mask;
+		xe->info.gt_count++;
 
 		if (MEDIA_VER(xe) < 13 && media_desc)
 			gt->info.engine_mask |= media_desc->hw_engine_mask;
@@ -708,17 +709,10 @@ static int xe_info_init(struct xe_device *xe,
 
 		gt = tile->media_gt;
 		gt->info.type = XE_GT_TYPE_MEDIA;
+		gt->info.id = tile->id * xe->info.max_gt_per_tile + 1;
 		gt->info.has_indirect_ring_state = media_desc->has_indirect_ring_state;
 		gt->info.engine_mask = media_desc->hw_engine_mask;
-
-		/*
-		 * FIXME: At the moment multi-tile and standalone media are
-		 * mutually exclusive on current platforms.  We'll need to
-		 * come up with a better way to number GTs if we ever wind
-		 * up with platforms that support both together.
-		 */
-		drm_WARN_ON(&xe->drm, id != 0);
-		gt->info.id = xe->info.gt_count++;
+		xe->info.gt_count++;
 	}
 
 	return 0;

--------------CH0DZXZ3uTe8UFQiMXkQcOFl--