public inbox for intel-xe@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Mallesh, Koujalagi" <mallesh.koujalagi@intel.com>
To: Riana Tauro <riana.tauro@intel.com>, <intel-xe@lists.freedesktop.org>
Cc: <anshuman.gupta@intel.com>, <rodrigo.vivi@intel.com>,
	<aravind.iddamsetty@linux.intel.com>, <badal.nilawar@intel.com>,
	<raag.jadav@intel.com>, <ravi.kishore.koppuravuri@intel.com>,
	Matthew Brost <matthew.brost@intel.com>,
	Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Subject: Re: [PATCH 3/8] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset
Date: Tue, 27 Jan 2026 16:53:13 +0530	[thread overview]
Message-ID: <fa728edb-2929-43f6-bd4d-9009e6539079@intel.com> (raw)
In-Reply-To: <20260122100613.3631582-13-riana.tauro@intel.com>

[-- Attachment #1: Type: text/plain, Size: 3299 bytes --]

Hi Riana,

On 22-01-2026 03:36 pm, Riana Tauro wrote:
> Add devres grouping to handle device resource cleanup during
> PCI error recovery.
>
> Secondary Bus Reset (SBR) is triggered by PCI core when the
> error_detected/mmio_enabled callbacks return PCI_ERS_RESULT_NEED_RESET.
>
> Once SBR is complete, the slot_reset callback is triggered. SBR wipes
> out all device memory requiring XE KMD to perform a device removal and
> reprobe.
> Calling xe_pci_remove() alone does not free the devres allocated.
> Since there are no exported functions to release all devres, group the
> devres allocations and release the entire group during slot reset to
> ensure proper cleanup.
>
> Cc: Matthew Brost<matthew.brost@intel.com>
> Cc: Himal Prasad Ghimiray<himal.prasad.ghimiray@intel.com>
> Signed-off-by: Riana Tauro<riana.tauro@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_device.c       | 7 +++++++
>   drivers/gpu/drm/xe/xe_device_types.h | 3 +++
>   drivers/gpu/drm/xe/xe_pci_error.c    | 1 +
>   3 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 16fc6da01357..0cf6480b8aad 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -440,6 +440,7 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
>   				   const struct pci_device_id *ent)
>   {
>   	struct xe_device *xe;
> +	void *devres_id;
>   	int err;
>   
>   	xe_display_driver_set_hooks(&driver);
> @@ -448,10 +449,16 @@ struct xe_device *xe_device_create(struct pci_dev *pdev,
>   	if (err)
>   		return ERR_PTR(err);
>   
> +	devres_id = devres_open_group(&pdev->dev, NULL, GFP_KERNEL);
> +	if (!devres_id)
> +		return ERR_PTR(-ENOMEM);
> +
>   	xe = devm_drm_dev_alloc(&pdev->dev, &driver, struct xe_device, drm);
>   	if (IS_ERR(xe))
>   		return xe;
>   
> +	xe->devres_group_id = devres_id;
> +
>   	err = ttm_device_init(&xe->ttm, &xe_ttm_funcs, xe->drm.dev,
>   			      xe->drm.anon_inode->i_mapping,
>   			      xe->drm.vma_offset_manager, 0);
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 2d140463dc5e..3a19e9b5dfae 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -672,6 +672,9 @@ struct xe_device {
>   	/** @in_recovery: Indicates if device is in recovery */
>   	atomic_t in_recovery;
>   
> +	/** @devres_group_id: id for devres group */
> +	void *devres_group_id;
> +
>   	/** @bo_device: Struct to control async free of BOs */
>   	struct xe_bo_dev {
>   		/** @bo_device.async_free: Free worker */
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index a3cc01afa179..0960aa5861bc 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -65,6 +65,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
>   	 */
>   	pdev->driver->remove(pdev);
>   	xe_device_clear_in_recovery(xe);
> +	devres_release_group(&pdev->dev, xe->devres_group_id);

We see use after free issue. In pdev->driver->remove(pdev); call xe 
structure is removed. We can handle devres_group_id by assigning locally 
and release it.

Thanks,

-/Mallesh


>   
>   	if (!pdev->driver->probe(pdev, ent))
>   		return PCI_ERS_RESULT_RECOVERED;

[-- Attachment #2: Type: text/html, Size: 4099 bytes --]

  reply	other threads:[~2026-01-27 11:23 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-22 10:06 [PATCH 0/8] Introduce Xe Uncorrectable Error Handling Riana Tauro
2026-01-22  9:42 ` ✗ CI.checkpatch: warning for " Patchwork
2026-01-22  9:43 ` ✓ CI.KUnit: success " Patchwork
2026-01-22 10:06 ` [PATCH 1/8] drm/xe/xe_sysctrl: Add System controller patch Riana Tauro
2026-01-22 10:06 ` [PATCH 2/8] drm/xe/xe_pci_error: Implement PCI error recovery callbacks Riana Tauro
2026-01-27 22:49   ` Michal Wajdeczko
2026-02-02  9:45     ` Riana Tauro
2026-01-29  9:09   ` Nilawar, Badal
2026-02-02 13:19     ` Nilawar, Badal
2026-02-03  3:46       ` Riana Tauro
2026-02-03  3:41     ` Riana Tauro
2026-02-08  8:02   ` Raag Jadav
2026-02-24  3:23     ` Riana Tauro
2026-02-24  5:33       ` Raag Jadav
2026-02-16  8:53   ` Mallesh, Koujalagi
2026-02-24  3:26     ` Riana Tauro
2026-01-22 10:06 ` [PATCH 3/8] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset Riana Tauro
2026-01-27 11:23   ` Mallesh, Koujalagi [this message]
2026-02-02  8:46     ` Riana Tauro
2026-01-22 10:06 ` [PATCH 4/8] drm/xe: Skip device access during PCI error recovery Riana Tauro
2026-01-22 10:06 ` [PATCH 5/8] drm/xe/xe_ras: Initialize Uncorrectable AER Registers Riana Tauro
2026-01-27 12:41   ` Mallesh, Koujalagi
2026-02-02  9:34     ` Riana Tauro
2026-02-04  8:38   ` Aravind Iddamsetty
2026-02-16 12:27   ` Mallesh, Koujalagi
2026-02-18 14:48     ` Riana Tauro
2026-01-22 10:06 ` [PATCH 6/8] drm/xe/xe_ras: Add structures and commands for Uncorrectable Core Compute Errors Riana Tauro
2026-02-23 14:19   ` Mallesh, Koujalagi
2026-02-23 14:30     ` Riana Tauro
2026-01-22 10:06 ` [PATCH 7/8] drm/xe/xe_ras: Add support for Uncorrectable Core-Compute errors Riana Tauro
2026-01-27 11:44   ` Mallesh, Koujalagi
2026-02-02  8:38     ` Riana Tauro
2026-01-27 14:03   ` Mallesh, Koujalagi
2026-02-02  8:54     ` Riana Tauro
2026-02-24 12:17     ` Mallesh, Koujalagi
2026-02-17 14:02   ` Raag Jadav
2026-02-23 14:10     ` Riana Tauro
2026-01-22 10:06 ` [PATCH 8/8] drm/xe/xe_pci_error: Process errors in mmio_enabled Riana Tauro
2026-02-24 12:46   ` Mallesh, Koujalagi
2026-01-22 10:21 ` ✓ Xe.CI.BAT: success for Introduce Xe Uncorrectable Error Handling Patchwork
2026-01-22 20:28 ` ✗ Xe.CI.Full: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=fa728edb-2929-43f6-bd4d-9009e6539079@intel.com \
    --to=mallesh.koujalagi@intel.com \
    --cc=anshuman.gupta@intel.com \
    --cc=aravind.iddamsetty@linux.intel.com \
    --cc=badal.nilawar@intel.com \
    --cc=himal.prasad.ghimiray@intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=matthew.brost@intel.com \
    --cc=raag.jadav@intel.com \
    --cc=ravi.kishore.koppuravuri@intel.com \
    --cc=riana.tauro@intel.com \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox