From: sashiko-bot@kernel.org
To: "Mitul Golani" <mitulkumar.ajitkumar.golani@intel.com>
Cc: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v1] drm/i915/display: Allow port sync on PTL
Date: Mon, 12 Oct 2026 04:28:50 +0000 [thread overview]
Message-ID: <sashiko-outbox-167596@kernel.org> (raw)
In-Reply-To: <20261012040402.3332398-1-mitulkumar.ajitkumar.golani@intel.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] drm/i915/display: platform flag overloading enables port sync on WCL without verification
- [Low] drm/i915: comment contradicts updated code logic for Wa_16024710867 on PTL/xe3lpd
--
commit 29ddf626c62c8cb13575a86bd458e68f572eb3fa
Author: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
drm/i915/display: Allow port sync on PTL
This commit enables port sync on PTL to avoid visual corruption on dual-SST
tiled displays. It expands the version check up to display version 30 to bypass
a previous hardware workaround.
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8991
Fixes: 05cffc074938 ("drm/i915/display: Implement Wa_16024710867")
Cc: stable@vger.kernel.org
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index a46ab5d3d70fc..a0aff087fafa8 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4629,7 +4629,7 @@ intel_ddi_port_sync_transcoders(const struct intel_crtc_state *ref_crtc_state,
> * From, xe3lpd onwards we have defeatured this with reference to
> * Wa_16024710867
> */
[Severity: Low]
Is this comment still accurate? It states that port sync is defeatured from
xe3lpd onwards with reference to Wa_16024710867, but the check immediately
below now enables it for DISPLAY_VER 30 (which includes PTL/xe3lpd), directly
contradicting the comment.
> - if (!IS_DISPLAY_VER(display, 9, 20))
> + if (!IS_DISPLAY_VER(display, 9, 30))
[Severity: Medium]
Does this unconditionally enable port sync for all display version 30 hardware,
including both PTL and WCL?
The commit message justifies enabling port sync specifically for Panther Lake
(PTL) to address visual corruption. However, expanding the version check up to
30 covers both PTL and WCL.
Without subplatform differentiation, could this inadvertently re-expose WCL to
the display issues that Wa_16024710867 was originally meant to fix? Should
this use subplatform-specific checks to exclude WCL?
> return 0;
>
> if (!intel_crtc_has_type(ref_crtc_state, INTEL_OUTPUT_DP))
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261012040402.3332398-1-mitulkumar.ajitkumar.golani@intel.com?part=1
next prev parent reply other threads:[~2026-10-12 4:29 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-12 4:04 [PATCH v1] drm/i915/display: Allow port sync on PTL Mitul Golani
2026-10-12 4:21 ` ✓ CI.KUnit: success for " Patchwork
2026-10-12 4:28 ` sashiko-bot [this message]
2026-10-12 5:00 ` [PATCH v1] " Kandpal, Suraj
2026-10-12 5:00 ` ✓ Xe.CI.BAT: success for " Patchwork
2026-10-12 6:28 ` ✓ Xe.CI.FULL: " Patchwork
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