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From: sashiko-bot@kernel.org
To: "Karthik Poosa" <karthik.poosa@intel.com>,
	intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v11 04/16] drm/xe/hwmon: Add helpers to validate thermal sensor readings
Date: Tue, 13 Oct 2026 02:24:30 +0000	[thread overview]
Message-ID: <sashiko-outbox-168870@kernel.org> (raw)
In-Reply-To: <20261013020636.447620-5-karthik.poosa@intel.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] hwmon: MMIO read errors (U32_MAX) are treated as valid temperatures on legacy platforms
--

commit 30c789d23390d6abf7d18b4ec4f037b60404f1b9
Author: Karthik Poosa <karthik.poosa@intel.com>

drm/xe/hwmon: Add helpers to validate thermal sensor readings

This commit introduces mmio_temp_valid() and mbx_temp_valid() to check
whether a temperature sensor reading is valid. It gates these checks behind
the has_temp_sentinel flag.

> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 2d1fa9159c58b..712a21a996362 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c

[ ... ]

> @@ -825,6 +828,23 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>  	return ret;
>  }
>  
> +static inline bool mmio_temp_valid(const struct xe_hwmon *hwmon, u32 value)
> +{
> +	/*
> +	 * On platforms lacking temperature sentinel support, a value of 0 is treated
> +	 * as invalid. While 0°C is theoretically possible, it is highly unlikely for
> +	 * a discrete GPU in normal environments, making it a reasonable fallback
> +	 * indicator for invalid or uninitialized temperature readings.
> +	 */
> +	return hwmon->xe->info.has_temp_sentinel ? value != U32_MAX : value != 0;

[Severity: Medium]
Does this inadvertently treat PCIe MMIO read errors as valid temperatures on
legacy platforms?

When a PCIe target abort or link failure occurs, xe_mmio_read32() returns
U32_MAX (0xFFFFFFFF). If the platform lacks has_temp_sentinel support, the
condition evaluates value != 0. Because 0xFFFFFFFF is not 0, this returns
true.

Later, in xe_hwmon_temp_read(), this U32_MAX value will be blindly decoded:

*val = (s32)REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val) *
        (REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
        MILLIDEGREE_PER_DEGREE;

This could result in absurd temperature readings like -8,388,607 or 255
instead of correctly propagating an error code when the hardware fails.

Should U32_MAX be universally treated as invalid, regardless of the
has_temp_sentinel flag?

> +}
> +
> +/* Mailbox temperature is sign-magnitude (bit 7 sign, bits 6:0 magnitude). */
> +static inline bool mbx_temp_valid(const struct xe_hwmon *hwmon, u8 value)

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20261013020636.447620-1-karthik.poosa@intel.com?part=4

  reply	other threads:[~2026-10-13  2:24 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-13  2:06 [PATCH v11 00/16] drm/xe/hwmon: Update hwmon thermal mailbox Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 01/16] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit Karthik Poosa
2026-10-13  2:23   ` sashiko-bot
2026-10-13 18:39     ` Poosa, Karthik
2026-10-13  2:06 ` [PATCH v11 02/16] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 03/16] drm/xe/hwmon: Fix thermal sensor data handling Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 04/16] drm/xe/hwmon: Add helpers to validate thermal sensor readings Karthik Poosa
2026-10-13  2:24   ` sashiko-bot [this message]
2026-10-13 14:54     ` Poosa, Karthik
2026-10-13 18:47       ` Poosa, Karthik
2026-10-13  2:06 ` [PATCH v11 05/16] drm/xe/hwmon: Handle unavailable memory controller sensors Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 06/16] drm/xe/hwmon: Detect unavailable PCIe thermal sensors Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 07/16] drm/xe/hwmon: Consolidate temperature sensor availability checks Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 08/16] drm/xe/hwmon: Cache temperature availability to reduce probe time Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 09/16] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 10/16] drm/xe/hwmon: Add platform-aware VRAM thermal channel support Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 11/16] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754 Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 12/16] drm/xe/hwmon: Update memory controller temperature offset for CRI Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 13/16] drm/xe/hwmon: add PCIe temperature support " Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 14/16] drm/xe/hwmon: Simplify temperature channels config Karthik Poosa
2026-10-13  2:06 ` [PATCH v11 15/16] drm/xe: Validate thermal sensor count before reads Karthik Poosa
2026-10-13  2:25   ` sashiko-bot
2026-10-13 18:40     ` Poosa, Karthik
2026-10-13  2:06 ` [PATCH v11 16/16] drm/xe/hwmon: Propagate all hardware read errors Karthik Poosa
2026-10-13  2:17 ` ✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox Patchwork
2026-10-13  5:38 ` ✓ Xe.CI.BAT: " Patchwork
2026-10-13 14:25 ` ✗ Xe.CI.FULL: failure " Patchwork

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