From: sashiko-bot@kernel.org
To: "Karthik Poosa" <karthik.poosa@intel.com>,
intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v12 07/16] drm/xe/hwmon: Consolidate temperature sensor availability checks
Date: Tue, 13 Oct 2026 19:04:24 +0000 [thread overview]
Message-ID: <sashiko-outbox-170375@kernel.org> (raw)
In-Reply-To: <20261013184939.694945-8-karthik.poosa@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/xe/hwmon: dynamic hw queries at probe hide sysfs attributes on timeout
--
commit 4140f9b7c587fc4925ef3079bf0c972416615373
Author: Karthik Poosa <karthik.poosa@intel.com>
drm/xe/hwmon: Consolidate temperature sensor availability checks
This patch introduces a generalized is_temp_available() function to validate
PKG, VRAM, MCTRL, and PCIE temperature sensors. It uses this helper within
xe_hwmon_temp_is_visible() to prevent exposing sysfs attributes for sensors
that are not present during hwmon registration.
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 4463f32c8d8cb..b2f18a32487cc 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -1011,19 +1011,39 @@ static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *valu
> *value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
> }
>
> -static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
> +static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
> {
> struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
> - int vram_id = channel - CHANNEL_VRAM_N;
> - struct xe_reg vram_reg;
> + struct xe_reg reg;
> + u32 reg_val;
>
> - vram_reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
> - if (!xe_reg_is_valid(vram_reg) || !xe_mmio_read32(mmio, vram_reg))
> - return false;
> + switch (channel) {
> + case CHANNEL_PKG:
> + case CHANNEL_VRAM:
> + case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
> + reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
> + if (!xe_reg_is_valid(reg))
> + return false;
> +
> + reg_val = xe_mmio_read32(mmio, reg);
> + if (!mmio_temp_valid(hwmon, reg_val)) {
> + drm_dbg(&hwmon->xe->drm,
> + "channel %d temperature unavailable, val 0x%x\n", channel, reg_val);
> + return false;
> + }
[Severity: Medium]
If xe_mmio_read32() returns an uninitialized value (like 0) during early boot,
does returning false here permanently prevent the creation of the sysfs
attribute for this sensor?
In mmio_temp_valid(), 0 is treated as an invalid temperature, which might only
be a temporary state during device probe before the hardware is fully
initialized. Since this is called from the is_visible callback, returning
false will hide the attribute permanently.
> +
> + if (channel >= CHANNEL_VRAM_N)
> + sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N],
> + "vram_ch_%d", channel - CHANNEL_VRAM_N);
>
> - /* Create label only for available vram channel */
> - sprintf(hwmon->temp.vram_label[vram_id], "vram_ch_%d", vram_id);
> - return true;
> + return true;
> + case CHANNEL_MCTRL:
> + return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
> + case CHANNEL_PCIE:
> + return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
[Severity: Medium]
Do these dynamic PCODE mailbox reads at probe time risk permanently hiding
the MCTRL and PCIE sysfs attributes if there is a transient error?
If get_mc_temp() or get_pcie_temp() encounter a mailbox timeout or other
transient failure when called from xe_hwmon_temp_is_visible(), it evaluates
to false, preventing the hwmon core from creating the sysfs files.
Prior to this patch, MCTRL and PCIE merely checked hwmon->temp.count
statically without issuing a dynamic read.
> + default:
> + return false;
> + }
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261013184939.694945-1-karthik.poosa@intel.com?part=7
next prev parent reply other threads:[~2026-10-13 19:04 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-13 18:49 [PATCH v12 00/16] drm/xe/hwmon: Update hwmon thermal mailbox Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 01/16] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit Karthik Poosa
2026-10-13 19:03 ` sashiko-bot
2026-10-13 18:49 ` [PATCH v12 02/16] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 03/16] drm/xe/hwmon: Fix thermal sensor data handling Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 04/16] drm/xe/hwmon: Add helpers to validate thermal sensor readings Karthik Poosa
2026-10-13 19:01 ` sashiko-bot
2026-10-13 18:49 ` [PATCH v12 05/16] drm/xe/hwmon: Handle unavailable memory controller sensors Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 06/16] drm/xe/hwmon: Detect unavailable PCIe thermal sensors Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 07/16] drm/xe/hwmon: Consolidate temperature sensor availability checks Karthik Poosa
2026-10-13 19:04 ` sashiko-bot [this message]
2026-10-13 18:49 ` [PATCH v12 08/16] drm/xe/hwmon: Cache temperature availability to reduce probe time Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 09/16] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 10/16] drm/xe/hwmon: Add platform-aware VRAM thermal channel support Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 11/16] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754 Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 12/16] drm/xe/hwmon: Update memory controller temperature offset for CRI Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 13/16] drm/xe/hwmon: add PCIe temperature support " Karthik Poosa
2026-10-13 18:59 ` sashiko-bot
2026-10-13 18:49 ` [PATCH v12 14/16] drm/xe/hwmon: Simplify temperature channels config Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 15/16] drm/xe: Validate thermal sensor count before reads Karthik Poosa
2026-10-13 18:49 ` [PATCH v12 16/16] drm/xe/hwmon: Propagate all hardware read errors Karthik Poosa
2026-10-13 19:00 ` ✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox Patchwork
2026-10-14 0:26 ` ✓ Xe.CI.BAT: " Patchwork
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