From: sashiko-bot@kernel.org
To: "Matthew Auld" <matthew.auld@intel.com>, intel-xe@lists.freedesktop.org
Subject: Re: [PATCH v2 2/3] drm/xe: revamp hw reserved PAT index checking
Date: Thu, 15 Oct 2026 16:01:25 +0000 [thread overview]
Message-ID: <sashiko-outbox-173121@kernel.org> (raw)
In-Reply-To: <20261015154553.483229-7-matthew.auld@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] drm/xe: speculative out-of-bounds read in xe_pat_index_get_coh_mode() via madvise
--
commit a69fb578f40c8fdf51d5e718f8df4b1bc5df612f
Author: Matthew Auld <matthew.auld@intel.com>
drm/xe: revamp hw reserved PAT index checking
This commit changes how PAT index validity is verified. It introduces
xe_pat_index_is_valid() and updates xe_pat_index_get_coh_mode() to validate
the coherency mode directly from the PAT table instead of relying on the caller.
> diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c
> index 18e26f04169ab..d0dac1ebd4784 100644
> --- a/drivers/gpu/drm/xe/xe_pat.c
> +++ b/drivers/gpu/drm/xe/xe_pat.c
> @@ -294,9 +294,17 @@ static const struct xe_pat_table_entry xe3p_lpg_pat_table[] = {
> [31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
> };
>
> +bool xe_pat_index_is_valid(struct xe_device *xe, u16 pat_index)
> +{
> + WARN_ON(pat_index >= xe->pat.n_entries);
> + return xe->pat.table[pat_index].valid;
> +}
> +
> u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index)
> {
> WARN_ON(pat_index >= xe->pat.n_entries);
> + WARN_ON(!xe->pat.table[pat_index].coh_mode ||
> + xe->pat.table[pat_index].coh_mode > XE_COH_2WAY);
[Severity: Medium]
Could this new check introduce a speculative out-of-bounds array access?
If the bounds check WARN_ON(pat_index >= xe->pat.n_entries) is speculatively
mispredicted, the CPU might execute the read of
xe->pat.table[pat_index].coh_mode using an out-of-bounds index.
This seems reachable with an unmitigated user-controlled index via the
madvise ioctl. While xe_vm_madvise_ioctl() mitigates the index for the first
part of its validation, it then passes the raw user input to
check_pat_args_are_sane():
drivers/gpu/drm/xe/xe_vm_madvise.c:xe_vm_madvise_ioctl() {
...
if (args->type == DRM_XE_MEM_RANGE_ATTR_PAT) {
pat_index = array_index_nospec(args->pat_index.val,
xe->pat.n_entries);
...
}
if (args->type == DRM_XE_MEM_RANGE_ATTR_PAT) {
if (!check_pat_args_are_sane(xe, &madvise_range,
args->pat_index.val)) {
...
}
The check_pat_args_are_sane() function then forwards this unmitigated index
to xe_pat_index_get_coh_mode().
> return xe->pat.table[pat_index].coh_mode;
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261015154553.483229-5-matthew.auld@intel.com?part=2
next prev parent reply other threads:[~2026-10-15 16:01 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-15 15:45 [PATCH v2 0/3] Improve hw reserved PAT checking Matthew Auld
2026-10-15 15:45 ` [PATCH v2 1/3] drm/xe/pat: initialise pat.valid everywhere Matthew Auld
2026-10-15 15:45 ` [PATCH v2 2/3] drm/xe: revamp hw reserved PAT index checking Matthew Auld
2026-10-15 16:01 ` sashiko-bot [this message]
2026-10-15 15:45 ` [PATCH v2 3/3] drm/xe/pat: always check is_valid() when querying an index Matthew Auld
2026-10-15 16:12 ` sashiko-bot
2026-10-15 15:54 ` ✓ CI.KUnit: success for Improve hw reserved PAT checking (rev2) Patchwork
2026-10-15 20:15 ` ✓ Xe.CI.BAT: " Patchwork
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