From: Dan Carpenter <dan.carpenter@oracle.com>
To: Liam Girdwood <lgirdwood@gmail.com>,
Dharageswari R <dharageswari.r@intel.com>
Cc: Mark Brown <broonie@kernel.org>, Jaroslav Kysela <perex@perex.cz>,
Takashi Iwai <tiwai@suse.com>, Vinod Koul <vinod.koul@intel.com>,
Shreyas NC <shreyas.nc@intel.com>,
Senthilnathan Veppur <senthilnathanx.veppur@intel.com>,
Ramesh Babu <ramesh.babu@intel.com>,
Colin Ian King <colin.king@canonical.com>,
alsa-devel@alsa-project.org, kernel-janitors@vger.kernel.org
Subject: [patch] ASoC: Intel: Skylake: Fix a shift wrapping bug
Date: Thu, 13 Oct 2016 08:55:48 +0000 [thread overview]
Message-ID: <20161013085548.GK16198@mwanda> (raw)
"*val" is a u64. It definitely looks like we intend to use the high 32
bits as well.
Fixes: 700a9a63f9c1 ("ASoC: Intel: Skylake: Add module instance id generation APIs")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
diff --git a/sound/soc/intel/skylake/skl-sst-utils.c b/sound/soc/intel/skylake/skl-sst-utils.c
index 8dc0303..ea162fb 100644
--- a/sound/soc/intel/skylake/skl-sst-utils.c
+++ b/sound/soc/intel/skylake/skl-sst-utils.c
@@ -179,7 +179,7 @@ static inline int skl_getid_32(struct uuid_module *module, u64 *val,
index = ffz(mask_val);
pvt_id = index + word1_mask + word2_mask;
if (pvt_id <= (max_inst - 1)) {
- *val |= 1 << (index + word1_mask);
+ *val |= 1ULL << (index + word1_mask);
return pvt_id;
}
}
next reply other threads:[~2016-10-13 8:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-13 8:55 Dan Carpenter [this message]
2016-10-18 13:48 ` [patch] ASoC: Intel: Skylake: Fix a shift wrapping bug Vinod Koul
2016-10-26 10:15 ` Applied "ASoC: Intel: Skylake: Fix a shift wrapping bug" to the asoc tree Mark Brown
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