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* Altera/Intel SOCFPGA Cyclone5 Boot testing.
@ 2019-09-04 20:43 Thayer, Thor
  2019-09-04 23:51 ` Kevin Hilman
  0 siblings, 1 reply; 4+ messages in thread
From: Thayer, Thor @ 2019-09-04 20:43 UTC (permalink / raw)
  To: info@kernelci.org

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Hi,

I'd like to run some boot tests with the Cyclone5 boards on your farm (socfpga_cyclone5_de0_sockit and socfpga_cyclone5_socrates).

>From the API, I think I need to get an authentication token for running tests.

We'd like to add more of our boards to your farm if we can get approval.

Thanks,

Thor

INTEL PSG - Austin
1300 S. Mopac
M/S AN4, Pole A23, #A3-136-82
Austin, TX 78746

(512)362-0836
Thor.Thayer@Intel.com<mailto:Thor.Thayer@Intel.com>


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^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Altera/Intel SOCFPGA Cyclone5 Boot testing.
  2019-09-04 20:43 Altera/Intel SOCFPGA Cyclone5 Boot testing Thayer, Thor
@ 2019-09-04 23:51 ` Kevin Hilman
  2019-09-06  1:46   ` Thayer, Thor
  0 siblings, 1 reply; 4+ messages in thread
From: Kevin Hilman @ 2019-09-04 23:51 UTC (permalink / raw)
  To: kernelci, thor.thayer, info@kernelci.org; +Cc: Dinh Nguyen

[ + Dinh Nguyen, socfpga maintainer ]

"Thayer, Thor" <thor.thayer@intel.com> writes:

> I'd like to run some boot tests with the Cyclone5 boards on your farm (socfpga_cyclone5_de0_sockit and socfpga_cyclone5_socrates).
>
> From the API, I think I need to get an authentication token for running tests.

Unfortunately, it's a bit more complicated than that.  We're currently
only doing boot testing for a fixed set of upstream-focused trees,
including several maintainer trees, but we don't have an (easy) way for
anyone to submit a tree/branch for testing.

For platform-specific stuff, I would encourage you to work with the
socpfga maintainer (cc'd) to setup an experimental `for-kernelci` branch
which we could add to the list.  Then anytime that branch changes, we'll
build it and run all our boot tests.

> We'd like to add more of our boards to your farm if we can get approval.

Right now, I think the only active socfpga board is the
socfpga_cyclone5_de0_sockit (which is currently in my lab:
lab-baylibre-seattle).  I'm not finding any (current) data for
socfpga_cyclone5_socrates in the database.

While there are existing labs that can potentially host more hardware,
the best way to add more hardware is to host your own LAVA lab where you
can host all the hardware you want.

We can then add your lab to the list of labs we submit jobs to, but then
that then allows you to use some of the same kernelCI tools/scripts to
generate your own jobs for your own kernels as well.

Kevin

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Altera/Intel SOCFPGA Cyclone5 Boot testing.
  2019-09-04 23:51 ` Kevin Hilman
@ 2019-09-06  1:46   ` Thayer, Thor
  2019-09-06 17:09     ` Kevin Hilman
  0 siblings, 1 reply; 4+ messages in thread
From: Thayer, Thor @ 2019-09-06  1:46 UTC (permalink / raw)
  To: Kevin Hilman, kernelci@groups.io, info@kernelci.org
  Cc: Dinh Nguyen, Gong, Richard

Thank you, Kevin.

Richard Gong attended and grabbed the slides for the KernelCI talk at the recent Embedded Linux Conference.

He forwarded the slides to me and it looks like those slides describe how to setup the LAVA environment.

Thanks,

Thor

-----Original Message-----
From: Kevin Hilman <khilman@baylibre.com> 
Sent: Wednesday, September 4, 2019 6:52 PM
To: kernelci@groups.io; Thayer, Thor <thor.thayer@intel.com>; info@kernelci.org
Cc: Dinh Nguyen <dinguyen@kernel.org>
Subject: Re: Altera/Intel SOCFPGA Cyclone5 Boot testing.

[ + Dinh Nguyen, socfpga maintainer ]

"Thayer, Thor" <thor.thayer@intel.com> writes:

> I'd like to run some boot tests with the Cyclone5 boards on your farm (socfpga_cyclone5_de0_sockit and socfpga_cyclone5_socrates).
>
> From the API, I think I need to get an authentication token for running tests.

Unfortunately, it's a bit more complicated than that.  We're currently only doing boot testing for a fixed set of upstream-focused trees, including several maintainer trees, but we don't have an (easy) way for anyone to submit a tree/branch for testing.

For platform-specific stuff, I would encourage you to work with the socpfga maintainer (cc'd) to setup an experimental `for-kernelci` branch which we could add to the list.  Then anytime that branch changes, we'll build it and run all our boot tests.

> We'd like to add more of our boards to your farm if we can get approval.

Right now, I think the only active socfpga board is the socfpga_cyclone5_de0_sockit (which is currently in my lab:
lab-baylibre-seattle).  I'm not finding any (current) data for socfpga_cyclone5_socrates in the database.

While there are existing labs that can potentially host more hardware, the best way to add more hardware is to host your own LAVA lab where you can host all the hardware you want.

We can then add your lab to the list of labs we submit jobs to, but then that then allows you to use some of the same kernelCI tools/scripts to generate your own jobs for your own kernels as well.

Kevin

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: Altera/Intel SOCFPGA Cyclone5 Boot testing.
  2019-09-06  1:46   ` Thayer, Thor
@ 2019-09-06 17:09     ` Kevin Hilman
  0 siblings, 0 replies; 4+ messages in thread
From: Kevin Hilman @ 2019-09-06 17:09 UTC (permalink / raw)
  To: Thayer, Thor, kernelci@groups.io; +Cc: Dinh Nguyen, Gong, Richard

Great, if you have any issues don't hesitate to ask here on the list.

And based on what you mentioned earlier, it sounds like you might not
need to setup an entire kernelCI environment.  If you just want to add a
LAVA lab to the existing kernelCI set of labs, you probably just need
to setup the LAVA part.

If that's the case, you might want to have a look at lava-docker, where
we've abstracted a bit of the LAVA setup and containerized it for easy
setup/maintenance: https://github.com/kernelci/lava-docker

Hope that helps,

Thanks,

Kevin

"Thayer, Thor" <thor.thayer@intel.com> writes:

> Thank you, Kevin.
>
> Richard Gong attended and grabbed the slides for the KernelCI talk at the recent Embedded Linux Conference.
>
> He forwarded the slides to me and it looks like those slides describe how to setup the LAVA environment.
>
> Thanks,
>
> Thor
>
> -----Original Message-----
> From: Kevin Hilman <khilman@baylibre.com> 
> Sent: Wednesday, September 4, 2019 6:52 PM
> To: kernelci@groups.io; Thayer, Thor <thor.thayer@intel.com>; info@kernelci.org
> Cc: Dinh Nguyen <dinguyen@kernel.org>
> Subject: Re: Altera/Intel SOCFPGA Cyclone5 Boot testing.
>
> [ + Dinh Nguyen, socfpga maintainer ]
>
> "Thayer, Thor" <thor.thayer@intel.com> writes:
>
>> I'd like to run some boot tests with the Cyclone5 boards on your farm (socfpga_cyclone5_de0_sockit and socfpga_cyclone5_socrates).
>>
>> From the API, I think I need to get an authentication token for running tests.
>
> Unfortunately, it's a bit more complicated than that.  We're currently only doing boot testing for a fixed set of upstream-focused trees, including several maintainer trees, but we don't have an (easy) way for anyone to submit a tree/branch for testing.
>
> For platform-specific stuff, I would encourage you to work with the socpfga maintainer (cc'd) to setup an experimental `for-kernelci` branch which we could add to the list.  Then anytime that branch changes, we'll build it and run all our boot tests.
>
>> We'd like to add more of our boards to your farm if we can get approval.
>
> Right now, I think the only active socfpga board is the socfpga_cyclone5_de0_sockit (which is currently in my lab:
> lab-baylibre-seattle).  I'm not finding any (current) data for socfpga_cyclone5_socrates in the database.
>
> While there are existing labs that can potentially host more hardware, the best way to add more hardware is to host your own LAVA lab where you can host all the hardware you want.
>
> We can then add your lab to the list of labs we submit jobs to, but then that then allows you to use some of the same kernelCI tools/scripts to generate your own jobs for your own kernels as well.
>
> Kevin

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2019-09-06 17:09 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-09-04 20:43 Altera/Intel SOCFPGA Cyclone5 Boot testing Thayer, Thor
2019-09-04 23:51 ` Kevin Hilman
2019-09-06  1:46   ` Thayer, Thor
2019-09-06 17:09     ` Kevin Hilman

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